FILE
uncore-io.json
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linux-6.19.14/tools/perf/pmu-events/arch/x86/sierraforest/uncore-io.json
1[ 2 { 3 "BriefDescription": "IIO Clockticks", 4 "Counter": "0,1,2,3", 5 "EventCode": "0x01", 6 "EventName": "UNC_IIO_CLOCKTICKS", 7 "PerPkg": "1", 8 "PortMask": "0x000", 9 "Unit": "IIO" 10 }, 11 { 12 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.", 13 "Counter": "0,1,2,3", 14 "EventCode": "0xC2", 15 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", 16 "Experimental": "1", 17 "FCMask": "0x07", 18 "PerPkg": "1", 19 "PortMask": "0x0FF", 20 "UMask": "0x4", 21 "Unit": "IIO" 22 }, 23 { 24 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.", 25 "Counter": "0,1,2,3", 26 "EventCode": "0xC2", 27 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", 28 "Experimental": "1", 29 "FCMask": "0x07", 30 "PerPkg": "1", 31 "PortMask": "0x001", 32 "UMask": "0x4", 33 "Unit": "IIO" 34 }, 35 { 36 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.", 37 "Counter": "0,1,2,3", 38 "EventCode": "0xC2", 39 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", 40 "Experimental": "1", 41 "FCMask": "0x07", 42 "PerPkg": "1", 43 "PortMask": "0x002", 44 "UMask": "0x4", 45 "Unit": "IIO" 46 }, 47 { 48 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.", 49 "Counter": "0,1,2,3", 50 "EventCode": "0xC2", 51 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", 52 "Experimental": "1", 53 "FCMask": "0x07", 54 "PerPkg": "1", 55 "PortMask": "0x004", 56 "UMask": "0x4", 57 "Unit": "IIO" 58 }, 59 { 60 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.", 61 "Counter": "0,1,2,3", 62 "EventCode": "0xC2", 63 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", 64 "Experimental": "1", 65 "FCMask": "0x07", 66 "PerPkg": "1", 67 "PortMask": "0x008", 68 "UMask": "0x4", 69 "Unit": "IIO" 70 }, 71 { 72 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.", 73 "Counter": "0,1,2,3", 74 "EventCode": "0xC2", 75 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", 76 "Experimental": "1", 77 "FCMask": "0x07", 78 "PerPkg": "1", 79 "PortMask": "0x010", 80 "UMask": "0x4", 81 "Unit": "IIO" 82 }, 83 { 84 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.", 85 "Counter": "0,1,2,3", 86 "EventCode": "0xC2", 87 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", 88 "Experimental": "1", 89 "FCMask": "0x07", 90 "PerPkg": "1", 91 "PortMask": "0x020", 92 "UMask": "0x4", 93 "Unit": "IIO" 94 }, 95 { 96 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.", 97 "Counter": "0,1,2,3", 98 "EventCode": "0xC2", 99 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", 100 "Experimental": "1", 101 "FCMask": "0x07", 102 "PerPkg": "1", 103 "PortMask": "0x040", 104 "UMask": "0x4", 105 "Unit": "IIO" 106 }, 107 { 108 "BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from this PCIE device.", 109 "Counter": "0,1,2,3", 110 "EventCode": "0xC2", 111 "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", 112 "Experimental": "1", 113 "FCMask": "0x07", 114 "PerPkg": "1", 115 "PortMask": "0x080", 116 "UMask": "0x4", 117 "Unit": "IIO" 118 }, 119 { 120 "BriefDescription": "Count of allocations in the completion buffer", 121 "Counter": "2,3", 122 "EventCode": "0xD5", 123 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", 124 "Experimental": "1", 125 "FCMask": "0x07", 126 "PerPkg": "1", 127 "PortMask": "0x0FF", 128 "UMask": "0xff", 129 "Unit": "IIO" 130 }, 131 { 132 "BriefDescription": "Count of allocations in the completion buffer", 133 "Counter": "2,3", 134 "EventCode": "0xD5", 135 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", 136 "Experimental": "1", 137 "FCMask": "0x07", 138 "PerPkg": "1", 139 "PortMask": "0x001", 140 "UMask": "0x1", 141 "Unit": "IIO" 142 }, 143 { 144 "BriefDescription": "Count of allocations in the completion buffer", 145 "Counter": "2,3", 146 "EventCode": "0xD5", 147 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", 148 "Experimental": "1", 149 "FCMask": "0x07", 150 "PerPkg": "1", 151 "PortMask": "0x002", 152 "UMask": "0x2", 153 "Unit": "IIO" 154 }, 155 { 156 "BriefDescription": "Count of allocations in the completion buffer", 157 "Counter": "2,3", 158 "EventCode": "0xD5", 159 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", 160 "Experimental": "1", 161 "FCMask": "0x07", 162 "PerPkg": "1", 163 "PortMask": "0x004", 164 "UMask": "0x4", 165 "Unit": "IIO" 166 }, 167 { 168 "BriefDescription": "Count of allocations in the completion buffer", 169 "Counter": "2,3", 170 "EventCode": "0xD5", 171 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", 172 "Experimental": "1", 173 "FCMask": "0x07", 174 "PerPkg": "1", 175 "PortMask": "0x008", 176 "UMask": "0x8", 177 "Unit": "IIO" 178 }, 179 { 180 "BriefDescription": "Count of allocations in the completion buffer", 181 "Counter": "2,3", 182 "EventCode": "0xD5", 183 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4", 184 "Experimental": "1", 185 "FCMask": "0x07", 186 "PerPkg": "1", 187 "PortMask": "0x010", 188 "UMask": "0x10", 189 "Unit": "IIO" 190 }, 191 { 192 "BriefDescription": "Count of allocations in the completion buffer", 193 "Counter": "2,3", 194 "EventCode": "0xD5", 195 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5", 196 "Experimental": "1", 197 "FCMask": "0x07", 198 "PerPkg": "1", 199 "PortMask": "0x020", 200 "UMask": "0x20", 201 "Unit": "IIO" 202 }, 203 { 204 "BriefDescription": "Count of allocations in the completion buffer", 205 "Counter": "2,3", 206 "EventCode": "0xD5", 207 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6", 208 "Experimental": "1", 209 "FCMask": "0x07", 210 "PerPkg": "1", 211 "PortMask": "0x040", 212 "UMask": "0x40", 213 "Unit": "IIO" 214 }, 215 { 216 "BriefDescription": "Count of allocations in the completion buffer", 217 "Counter": "2,3", 218 "EventCode": "0xD5", 219 "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7", 220 "Experimental": "1", 221 "FCMask": "0x07", 222 "PerPkg": "1", 223 "PortMask": "0x080", 224 "UMask": "0x80", 225 "Unit": "IIO" 226 }, 227 { 228 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 229 "Counter": "2,3", 230 "EventCode": "0xC0", 231 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.ALL_PARTS", 232 "Experimental": "1", 233 "FCMask": "0x07", 234 "PerPkg": "1", 235 "PortMask": "0x0FF", 236 "UMask": "0x4", 237 "Unit": "IIO" 238 }, 239 { 240 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 241 "Counter": "2,3", 242 "EventCode": "0xC0", 243 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", 244 "Experimental": "1", 245 "FCMask": "0x07", 246 "PerPkg": "1", 247 "PortMask": "0x001", 248 "UMask": "0x4", 249 "Unit": "IIO" 250 }, 251 { 252 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 253 "Counter": "2,3", 254 "EventCode": "0xC0", 255 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", 256 "Experimental": "1", 257 "FCMask": "0x07", 258 "PerPkg": "1", 259 "PortMask": "0x002", 260 "UMask": "0x4", 261 "Unit": "IIO" 262 }, 263 { 264 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 265 "Counter": "2,3", 266 "EventCode": "0xC0", 267 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", 268 "Experimental": "1", 269 "FCMask": "0x07", 270 "PerPkg": "1", 271 "PortMask": "0x004", 272 "UMask": "0x4", 273 "Unit": "IIO" 274 }, 275 { 276 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 277 "Counter": "2,3", 278 "EventCode": "0xC0", 279 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", 280 "Experimental": "1", 281 "FCMask": "0x07", 282 "PerPkg": "1", 283 "PortMask": "0x008", 284 "UMask": "0x4", 285 "Unit": "IIO" 286 }, 287 { 288 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 289 "Counter": "2,3", 290 "EventCode": "0xC0", 291 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4", 292 "Experimental": "1", 293 "FCMask": "0x07", 294 "PerPkg": "1", 295 "PortMask": "0x010", 296 "UMask": "0x4", 297 "Unit": "IIO" 298 }, 299 { 300 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 301 "Counter": "2,3", 302 "EventCode": "0xC0", 303 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5", 304 "Experimental": "1", 305 "FCMask": "0x07", 306 "PerPkg": "1", 307 "PortMask": "0x020", 308 "UMask": "0x4", 309 "Unit": "IIO" 310 }, 311 { 312 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 313 "Counter": "2,3", 314 "EventCode": "0xC0", 315 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6", 316 "Experimental": "1", 317 "FCMask": "0x07", 318 "PerPkg": "1", 319 "PortMask": "0x040", 320 "UMask": "0x4", 321 "Unit": "IIO" 322 }, 323 { 324 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 325 "Counter": "2,3", 326 "EventCode": "0xC0", 327 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7", 328 "Experimental": "1", 329 "FCMask": "0x07", 330 "PerPkg": "1", 331 "PortMask": "0x080", 332 "UMask": "0x4", 333 "Unit": "IIO" 334 }, 335 { 336 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", 337 "Counter": "2,3", 338 "EventCode": "0xC0", 339 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.ALL_PARTS", 340 "Experimental": "1", 341 "FCMask": "0x07", 342 "PerPkg": "1", 343 "PortMask": "0x0FF", 344 "UMask": "0x1", 345 "Unit": "IIO" 346 }, 347 { 348 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", 349 "Counter": "2,3", 350 "EventCode": "0xC0", 351 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", 352 "FCMask": "0x07", 353 "PerPkg": "1", 354 "PortMask": "0x001", 355 "UMask": "0x1", 356 "Unit": "IIO" 357 }, 358 { 359 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", 360 "Counter": "2,3", 361 "EventCode": "0xC0", 362 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", 363 "FCMask": "0x07", 364 "PerPkg": "1", 365 "PortMask": "0x002", 366 "UMask": "0x1", 367 "Unit": "IIO" 368 }, 369 { 370 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", 371 "Counter": "2,3", 372 "EventCode": "0xC0", 373 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", 374 "FCMask": "0x07", 375 "PerPkg": "1", 376 "PortMask": "0x004", 377 "UMask": "0x1", 378 "Unit": "IIO" 379 }, 380 { 381 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", 382 "Counter": "2,3", 383 "EventCode": "0xC0", 384 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", 385 "FCMask": "0x07", 386 "PerPkg": "1", 387 "PortMask": "0x008", 388 "UMask": "0x1", 389 "Unit": "IIO" 390 }, 391 { 392 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", 393 "Counter": "2,3", 394 "EventCode": "0xC0", 395 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", 396 "FCMask": "0x07", 397 "PerPkg": "1", 398 "PortMask": "0x010", 399 "UMask": "0x1", 400 "Unit": "IIO" 401 }, 402 { 403 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", 404 "Counter": "2,3", 405 "EventCode": "0xC0", 406 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", 407 "FCMask": "0x07", 408 "PerPkg": "1", 409 "PortMask": "0x020", 410 "UMask": "0x1", 411 "Unit": "IIO" 412 }, 413 { 414 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", 415 "Counter": "2,3", 416 "EventCode": "0xC0", 417 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", 418 "FCMask": "0x07", 419 "PerPkg": "1", 420 "PortMask": "0x040", 421 "UMask": "0x1", 422 "Unit": "IIO" 423 }, 424 { 425 "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", 426 "Counter": "2,3", 427 "EventCode": "0xC0", 428 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", 429 "FCMask": "0x07", 430 "PerPkg": "1", 431 "PortMask": "0x080", 432 "UMask": "0x1", 433 "Unit": "IIO" 434 }, 435 { 436 "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.", 437 "Counter": "2,3", 438 "EventCode": "0xC0", 439 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.ALL_PARTS", 440 "FCMask": "0x07", 441 "PerPkg": "1", 442 "PortMask": "0x0FF", 443 "UMask": "0x8", 444 "Unit": "IIO" 445 }, 446 { 447 "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.", 448 "Counter": "2,3", 449 "EventCode": "0xC0", 450 "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.ALL_PARTS", 451 "FCMask": "0x07", 452 "PerPkg": "1", 453 "PortMask": "0x0FF", 454 "UMask": "0x2", 455 "Unit": "IIO" 456 }, 457 { 458 "BriefDescription": "Counts once for every 4 bytes read from this card to memory. This event does include reads to IO.", 459 "Counter": "0,1", 460 "EventCode": "0x83", 461 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.ALL_PARTS", 462 "FCMask": "0x07", 463 "PerPkg": "1", 464 "PortMask": "0x0FF", 465 "UMask": "0x4", 466 "Unit": "IIO" 467 }, 468 { 469 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 470 "Counter": "0,1", 471 "EventCode": "0x83", 472 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", 473 "FCMask": "0x07", 474 "PerPkg": "1", 475 "PortMask": "0x001", 476 "UMask": "0x4", 477 "Unit": "IIO" 478 }, 479 { 480 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 481 "Counter": "0,1", 482 "EventCode": "0x83", 483 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", 484 "FCMask": "0x07", 485 "PerPkg": "1", 486 "PortMask": "0x02", 487 "UMask": "0x4", 488 "Unit": "IIO" 489 }, 490 { 491 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 492 "Counter": "0,1", 493 "EventCode": "0x83", 494 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", 495 "FCMask": "0x07", 496 "PerPkg": "1", 497 "PortMask": "0x04", 498 "UMask": "0x4", 499 "Unit": "IIO" 500 }, 501 { 502 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 503 "Counter": "0,1", 504 "EventCode": "0x83", 505 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", 506 "FCMask": "0x07", 507 "PerPkg": "1", 508 "PortMask": "0x08", 509 "UMask": "0x4", 510 "Unit": "IIO" 511 }, 512 { 513 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 514 "Counter": "0,1", 515 "EventCode": "0x83", 516 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", 517 "FCMask": "0x07", 518 "PerPkg": "1", 519 "PortMask": "0x10", 520 "UMask": "0x4", 521 "Unit": "IIO" 522 }, 523 { 524 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 525 "Counter": "0,1", 526 "EventCode": "0x83", 527 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", 528 "FCMask": "0x07", 529 "PerPkg": "1", 530 "PortMask": "0x20", 531 "UMask": "0x4", 532 "Unit": "IIO" 533 }, 534 { 535 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 536 "Counter": "0,1", 537 "EventCode": "0x83", 538 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", 539 "FCMask": "0x07", 540 "PerPkg": "1", 541 "PortMask": "0x40", 542 "UMask": "0x4", 543 "Unit": "IIO" 544 }, 545 { 546 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", 547 "Counter": "0,1", 548 "EventCode": "0x83", 549 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", 550 "FCMask": "0x07", 551 "PerPkg": "1", 552 "PortMask": "0x80", 553 "UMask": "0x4", 554 "Unit": "IIO" 555 }, 556 { 557 "BriefDescription": "Counts once for every 4 bytes written from this card to memory. This event does include writes to IO.", 558 "Counter": "0,1", 559 "EventCode": "0x83", 560 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.ALL_PARTS", 561 "FCMask": "0x07", 562 "PerPkg": "1", 563 "PortMask": "0x0FF", 564 "UMask": "0x1", 565 "Unit": "IIO" 566 }, 567 { 568 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 569 "Counter": "0,1", 570 "EventCode": "0x83", 571 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", 572 "FCMask": "0x07", 573 "PerPkg": "1", 574 "PortMask": "0x001", 575 "UMask": "0x1", 576 "Unit": "IIO" 577 }, 578 { 579 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 580 "Counter": "0,1", 581 "EventCode": "0x83", 582 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", 583 "FCMask": "0x07", 584 "PerPkg": "1", 585 "PortMask": "0x02", 586 "UMask": "0x1", 587 "Unit": "IIO" 588 }, 589 { 590 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 591 "Counter": "0,1", 592 "EventCode": "0x83", 593 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", 594 "FCMask": "0x07", 595 "PerPkg": "1", 596 "PortMask": "0x04", 597 "UMask": "0x1", 598 "Unit": "IIO" 599 }, 600 { 601 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 602 "Counter": "0,1", 603 "EventCode": "0x83", 604 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", 605 "FCMask": "0x07", 606 "PerPkg": "1", 607 "PortMask": "0x08", 608 "UMask": "0x1", 609 "Unit": "IIO" 610 }, 611 { 612 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 613 "Counter": "0,1", 614 "EventCode": "0x83", 615 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", 616 "FCMask": "0x07", 617 "PerPkg": "1", 618 "PortMask": "0x10", 619 "UMask": "0x1", 620 "Unit": "IIO" 621 }, 622 { 623 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 624 "Counter": "0,1", 625 "EventCode": "0x83", 626 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", 627 "FCMask": "0x07", 628 "PerPkg": "1", 629 "PortMask": "0x20", 630 "UMask": "0x1", 631 "Unit": "IIO" 632 }, 633 { 634 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 635 "Counter": "0,1", 636 "EventCode": "0x83", 637 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", 638 "FCMask": "0x07", 639 "PerPkg": "1", 640 "PortMask": "0x40", 641 "UMask": "0x1", 642 "Unit": "IIO" 643 }, 644 { 645 "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM", 646 "Counter": "0,1", 647 "EventCode": "0x83", 648 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", 649 "FCMask": "0x07", 650 "PerPkg": "1", 651 "PortMask": "0x80", 652 "UMask": "0x1", 653 "Unit": "IIO" 654 }, 655 { 656 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)", 657 "Counter": "0,1", 658 "EventCode": "0x83", 659 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", 660 "Experimental": "1", 661 "FCMask": "0x07", 662 "PerPkg": "1", 663 "PortMask": "0x001", 664 "UMask": "0x8", 665 "Unit": "IIO" 666 }, 667 { 668 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)", 669 "Counter": "0,1", 670 "EventCode": "0x83", 671 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", 672 "Experimental": "1", 673 "FCMask": "0x07", 674 "PerPkg": "1", 675 "PortMask": "0x002", 676 "UMask": "0x8", 677 "Unit": "IIO" 678 }, 679 { 680 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)", 681 "Counter": "0,1", 682 "EventCode": "0x83", 683 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", 684 "Experimental": "1", 685 "FCMask": "0x07", 686 "PerPkg": "1", 687 "PortMask": "0x004", 688 "UMask": "0x8", 689 "Unit": "IIO" 690 }, 691 { 692 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)", 693 "Counter": "0,1", 694 "EventCode": "0x83", 695 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", 696 "Experimental": "1", 697 "FCMask": "0x07", 698 "PerPkg": "1", 699 "PortMask": "0x008", 700 "UMask": "0x8", 701 "Unit": "IIO" 702 }, 703 { 704 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)", 705 "Counter": "0,1", 706 "EventCode": "0x83", 707 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART4", 708 "Experimental": "1", 709 "FCMask": "0x07", 710 "PerPkg": "1", 711 "PortMask": "0x010", 712 "UMask": "0x8", 713 "Unit": "IIO" 714 }, 715 { 716 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)", 717 "Counter": "0,1", 718 "EventCode": "0x83", 719 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART5", 720 "Experimental": "1", 721 "FCMask": "0x07", 722 "PerPkg": "1", 723 "PortMask": "0x020", 724 "UMask": "0x8", 725 "Unit": "IIO" 726 }, 727 { 728 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)", 729 "Counter": "0,1", 730 "EventCode": "0x83", 731 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART6", 732 "Experimental": "1", 733 "FCMask": "0x07", 734 "PerPkg": "1", 735 "PortMask": "0x040", 736 "UMask": "0x8", 737 "Unit": "IIO" 738 }, 739 { 740 "BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)", 741 "Counter": "0,1", 742 "EventCode": "0x83", 743 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART7", 744 "Experimental": "1", 745 "FCMask": "0x07", 746 "PerPkg": "1", 747 "PortMask": "0x080", 748 "UMask": "0x8", 749 "Unit": "IIO" 750 }, 751 { 752 "BriefDescription": "Counts once for every 4 bytes written from this card to a peer device's IO space.", 753 "Counter": "0,1", 754 "EventCode": "0x83", 755 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.ALL_PARTS", 756 "Experimental": "1", 757 "FCMask": "0x07", 758 "PerPkg": "1", 759 "PortMask": "0x0FF", 760 "UMask": "0x2", 761 "Unit": "IIO" 762 }, 763 { 764 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", 765 "Counter": "0,1", 766 "EventCode": "0x83", 767 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", 768 "Experimental": "1", 769 "FCMask": "0x07", 770 "PerPkg": "1", 771 "PortMask": "0x001", 772 "UMask": "0x2", 773 "Unit": "IIO" 774 }, 775 { 776 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", 777 "Counter": "0,1", 778 "EventCode": "0x83", 779 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", 780 "Experimental": "1", 781 "FCMask": "0x07", 782 "PerPkg": "1", 783 "PortMask": "0x002", 784 "UMask": "0x2", 785 "Unit": "IIO" 786 }, 787 { 788 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", 789 "Counter": "0,1", 790 "EventCode": "0x83", 791 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", 792 "Experimental": "1", 793 "FCMask": "0x07", 794 "PerPkg": "1", 795 "PortMask": "0x004", 796 "UMask": "0x2", 797 "Unit": "IIO" 798 }, 799 { 800 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", 801 "Counter": "0,1", 802 "EventCode": "0x83", 803 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", 804 "Experimental": "1", 805 "FCMask": "0x07", 806 "PerPkg": "1", 807 "PortMask": "0x008", 808 "UMask": "0x2", 809 "Unit": "IIO" 810 }, 811 { 812 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", 813 "Counter": "0,1", 814 "EventCode": "0x83", 815 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", 816 "Experimental": "1", 817 "FCMask": "0x07", 818 "PerPkg": "1", 819 "PortMask": "0x010", 820 "UMask": "0x2", 821 "Unit": "IIO" 822 }, 823 { 824 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", 825 "Counter": "0,1", 826 "EventCode": "0x83", 827 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", 828 "Experimental": "1", 829 "FCMask": "0x07", 830 "PerPkg": "1", 831 "PortMask": "0x020", 832 "UMask": "0x2", 833 "Unit": "IIO" 834 }, 835 { 836 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", 837 "Counter": "0,1", 838 "EventCode": "0x83", 839 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", 840 "Experimental": "1", 841 "FCMask": "0x07", 842 "PerPkg": "1", 843 "PortMask": "0x040", 844 "UMask": "0x2", 845 "Unit": "IIO" 846 }, 847 { 848 "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", 849 "Counter": "0,1", 850 "EventCode": "0x83", 851 "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", 852 "Experimental": "1", 853 "FCMask": "0x07", 854 "PerPkg": "1", 855 "PortMask": "0x080", 856 "UMask": "0x2", 857 "Unit": "IIO" 858 }, 859 { 860 "BriefDescription": "IOTLB Hits to a 1G Page", 861 "Counter": "0,1,2,3", 862 "EventCode": "0x40", 863 "EventName": "UNC_IIO_IOMMU0.1G_HITS", 864 "Experimental": "1", 865 "PerPkg": "1", 866 "PortMask": "0x000", 867 "UMask": "0x10", 868 "Unit": "IIO" 869 }, 870 { 871 "BriefDescription": "IOTLB Hits to a 2M Page", 872 "Counter": "0,1,2,3", 873 "EventCode": "0x40", 874 "EventName": "UNC_IIO_IOMMU0.2M_HITS", 875 "Experimental": "1", 876 "PerPkg": "1", 877 "PortMask": "0x000", 878 "UMask": "0x8", 879 "Unit": "IIO" 880 }, 881 { 882 "BriefDescription": "IOTLB Hits to a 4K Page", 883 "Counter": "0,1,2,3", 884 "EventCode": "0x40", 885 "EventName": "UNC_IIO_IOMMU0.4K_HITS", 886 "Experimental": "1", 887 "PerPkg": "1", 888 "PortMask": "0x000", 889 "UMask": "0x4", 890 "Unit": "IIO" 891 }, 892 { 893 "BriefDescription": "IOTLB lookups all", 894 "Counter": "0,1,2,3", 895 "EventCode": "0x40", 896 "EventName": "UNC_IIO_IOMMU0.ALL_LOOKUPS", 897 "Experimental": "1", 898 "PerPkg": "1", 899 "PortMask": "0x000", 900 "UMask": "0x2", 901 "Unit": "IIO" 902 }, 903 { 904 "BriefDescription": "Context cache hits", 905 "Counter": "0,1,2,3", 906 "EventCode": "0x40", 907 "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", 908 "Experimental": "1", 909 "PerPkg": "1", 910 "PortMask": "0x000", 911 "UMask": "0x80", 912 "Unit": "IIO" 913 }, 914 { 915 "BriefDescription": "Context cache lookups", 916 "Counter": "0,1,2,3", 917 "EventCode": "0x40", 918 "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", 919 "Experimental": "1", 920 "PerPkg": "1", 921 "PortMask": "0x000", 922 "UMask": "0x40", 923 "Unit": "IIO" 924 }, 925 { 926 "BriefDescription": "IOTLB lookups first", 927 "Counter": "0,1,2,3", 928 "EventCode": "0x40", 929 "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", 930 "Experimental": "1", 931 "PerPkg": "1", 932 "PortMask": "0x000", 933 "UMask": "0x1", 934 "Unit": "IIO" 935 }, 936 { 937 "BriefDescription": "IOTLB Fills (same as IOTLB miss)", 938 "Counter": "0,1,2,3", 939 "EventCode": "0x40", 940 "EventName": "UNC_IIO_IOMMU0.MISSES", 941 "Experimental": "1", 942 "PerPkg": "1", 943 "PortMask": "0x000", 944 "UMask": "0x20", 945 "Unit": "IIO" 946 }, 947 { 948 "BriefDescription": "IOMMU memory access (both low and high priority)", 949 "Counter": "0,1,2,3", 950 "EventCode": "0x41", 951 "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", 952 "Experimental": "1", 953 "PerPkg": "1", 954 "PortMask": "0x000", 955 "UMask": "0xc0", 956 "Unit": "IIO" 957 }, 958 { 959 "BriefDescription": "IOMMU high priority memory access", 960 "Counter": "0,1,2,3", 961 "EventCode": "0x41", 962 "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES_HIGH", 963 "Experimental": "1", 964 "PerPkg": "1", 965 "PortMask": "0x000", 966 "UMask": "0x80", 967 "Unit": "IIO" 968 }, 969 { 970 "BriefDescription": "IOMMU low priority memory access", 971 "Counter": "0,1,2,3", 972 "EventCode": "0x41", 973 "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES_LOW", 974 "Experimental": "1", 975 "PerPkg": "1", 976 "PortMask": "0x000", 977 "UMask": "0x40", 978 "Unit": "IIO" 979 }, 980 { 981 "BriefDescription": "Second Level Page Walk Cache Hit to a 1G page", 982 "Counter": "0,1,2,3", 983 "EventCode": "0x41", 984 "EventName": "UNC_IIO_IOMMU1.SLPWC_1G_HITS", 985 "Experimental": "1", 986 "PerPkg": "1", 987 "PortMask": "0x000", 988 "UMask": "0x4", 989 "Unit": "IIO" 990 }, 991 { 992 "BriefDescription": "Second Level Page Walk Cache Hit to a 256T page", 993 "Counter": "0,1,2,3", 994 "EventCode": "0x41", 995 "EventName": "UNC_IIO_IOMMU1.SLPWC_256T_HITS", 996 "Experimental": "1", 997 "PerPkg": "1", 998 "PortMask": "0x000", 999 "UMask": "0x10", 1000 "Unit": "IIO" 1001 }, 1002 { 1003 "BriefDescription": "Second Level Page Walk Cache Hit to a 2M page", 1004 "Counter": "0,1,2,3", 1005 "EventCode": "0x41", 1006 "EventName": "UNC_IIO_IOMMU1.SLPWC_2M_HITS", 1007 "Experimental": "1", 1008 "PerPkg": "1", 1009 "PortMask": "0x000", 1010 "UMask": "0x2", 1011 "Unit": "IIO" 1012 }, 1013 { 1014 "BriefDescription": "Second Level Page Walk Cache Hit to a 512G page", 1015 "Counter": "0,1,2,3", 1016 "EventCode": "0x41", 1017 "EventName": "UNC_IIO_IOMMU1.SLPWC_512G_HITS", 1018 "Experimental": "1", 1019 "PerPkg": "1", 1020 "PortMask": "0x000", 1021 "UMask": "0x8", 1022 "Unit": "IIO" 1023 }, 1024 { 1025 "BriefDescription": "Second Level Page Walk Cache fill", 1026 "Counter": "0,1,2,3", 1027 "EventCode": "0x41", 1028 "EventName": "UNC_IIO_IOMMU1.SLPWC_CACHE_FILLS", 1029 "Experimental": "1", 1030 "PerPkg": "1", 1031 "PortMask": "0x000", 1032 "UMask": "0x20", 1033 "Unit": "IIO" 1034 }, 1035 { 1036 "BriefDescription": "Second Level Page Walk Cache lookup", 1037 "Counter": "0,1,2,3", 1038 "EventCode": "0x41", 1039 "EventName": "UNC_IIO_IOMMU1.SLPWC_CACHE_LOOKUPS", 1040 "Experimental": "1", 1041 "PerPkg": "1", 1042 "PortMask": "0x000", 1043 "UMask": "0x1", 1044 "Unit": "IIO" 1045 }, 1046 { 1047 "BriefDescription": "Cycles PWT full", 1048 "Counter": "0,1,2,3", 1049 "EventCode": "0x43", 1050 "EventName": "UNC_IIO_IOMMU3.CYC_PWT_FULL", 1051 "Experimental": "1", 1052 "PerPkg": "1", 1053 "PortMask": "0x000", 1054 "UMask": "0x2", 1055 "Unit": "IIO" 1056 }, 1057 { 1058 "BriefDescription": "Interrupt Entry cache hit", 1059 "Counter": "0,1,2,3", 1060 "EventCode": "0x43", 1061 "EventName": "UNC_IIO_IOMMU3.INT_CACHE_HITS", 1062 "Experimental": "1", 1063 "PerPkg": "1", 1064 "PortMask": "0x000", 1065 "UMask": "0x80", 1066 "Unit": "IIO" 1067 }, 1068 { 1069 "BriefDescription": "Interrupt Entry cache lookup", 1070 "Counter": "0,1,2,3", 1071 "EventCode": "0x43", 1072 "EventName": "UNC_IIO_IOMMU3.INT_CACHE_LOOKUPS", 1073 "Experimental": "1", 1074 "PerPkg": "1", 1075 "PortMask": "0x000", 1076 "UMask": "0x40", 1077 "Unit": "IIO" 1078 }, 1079 { 1080 "BriefDescription": "Context Cache invalidation events", 1081 "Counter": "0,1,2,3", 1082 "EventCode": "0x43", 1083 "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_CTXT_CACHE", 1084 "Experimental": "1", 1085 "PerPkg": "1", 1086 "PortMask": "0x000", 1087 "UMask": "0x8", 1088 "Unit": "IIO" 1089 }, 1090 { 1091 "BriefDescription": "Interrupt Entry Cache invalidation events", 1092 "Counter": "0,1,2,3", 1093 "EventCode": "0x43", 1094 "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_INT_CACHE", 1095 "Experimental": "1", 1096 "PerPkg": "1", 1097 "PortMask": "0x000", 1098 "UMask": "0x20", 1099 "Unit": "IIO" 1100 }, 1101 { 1102 "BriefDescription": "IOTLB invalidation events", 1103 "Counter": "0,1,2,3", 1104 "EventCode": "0x43", 1105 "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_IOTLB", 1106 "Experimental": "1", 1107 "PerPkg": "1", 1108 "PortMask": "0x000", 1109 "UMask": "0x4", 1110 "Unit": "IIO" 1111 }, 1112 { 1113 "BriefDescription": "PASID Cache invalidation events", 1114 "Counter": "0,1,2,3", 1115 "EventCode": "0x43", 1116 "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_PASID_CACHE", 1117 "Experimental": "1", 1118 "PerPkg": "1", 1119 "PortMask": "0x000", 1120 "UMask": "0x10", 1121 "Unit": "IIO" 1122 }, 1123 { 1124 "BriefDescription": "This event is deprecated. [This event is alias to UNC_IIO_NUM_OUTSTANDING_REQ_FROM_CPU.TO_IO]", 1125 "Counter": "2,3", 1126 "Deprecated": "1", 1127 "EventCode": "0xc5", 1128 "EventName": "UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO", 1129 "Experimental": "1", 1130 "FCMask": "0x07", 1131 "PerPkg": "1", 1132 "PortMask": "0x0FF", 1133 "UMask": "0x8", 1134 "Unit": "IIO" 1135 }, 1136 { 1137 "BriefDescription": "Occupancy of outbound request queue : To device : Counts number of outbound requests/completions IIO is currently processing [This event is alias to UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO]", 1138 "Counter": "2,3", 1139 "EventCode": "0xc5", 1140 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_FROM_CPU.TO_IO", 1141 "Experimental": "1", 1142 "FCMask": "0x07", 1143 "PerPkg": "1", 1144 "PortMask": "0x0FF", 1145 "UMask": "0x8", 1146 "Unit": "IIO" 1147 }, 1148 { 1149 "BriefDescription": "Passing data to be written", 1150 "Counter": "0,1,2,3", 1151 "EventCode": "0x88", 1152 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.DATA", 1153 "Experimental": "1", 1154 "FCMask": "0x07", 1155 "PerPkg": "1", 1156 "PortMask": "0x0FF", 1157 "UMask": "0x20", 1158 "Unit": "IIO" 1159 }, 1160 { 1161 "BriefDescription": "Issuing final read or write of line", 1162 "Counter": "0,1,2,3", 1163 "EventCode": "0x88", 1164 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.FINAL_RD_WR", 1165 "Experimental": "1", 1166 "FCMask": "0x07", 1167 "PerPkg": "1", 1168 "PortMask": "0x0FF", 1169 "UMask": "0x8", 1170 "Unit": "IIO" 1171 }, 1172 { 1173 "BriefDescription": "Processing response from IOMMU", 1174 "Counter": "0,1,2,3", 1175 "EventCode": "0x88", 1176 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_HIT", 1177 "Experimental": "1", 1178 "FCMask": "0x07", 1179 "PerPkg": "1", 1180 "PortMask": "0x0FF", 1181 "UMask": "0x2", 1182 "Unit": "IIO" 1183 }, 1184 { 1185 "BriefDescription": "Issuing to IOMMU", 1186 "Counter": "0,1,2,3", 1187 "EventCode": "0x88", 1188 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_REQ", 1189 "Experimental": "1", 1190 "FCMask": "0x07", 1191 "PerPkg": "1", 1192 "PortMask": "0x0FF", 1193 "UMask": "0x1", 1194 "Unit": "IIO" 1195 }, 1196 { 1197 "BriefDescription": "Request Ownership", 1198 "Counter": "0,1,2,3", 1199 "EventCode": "0x88", 1200 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.REQ_OWN", 1201 "Experimental": "1", 1202 "FCMask": "0x07", 1203 "PerPkg": "1", 1204 "PortMask": "0x0FF", 1205 "UMask": "0x4", 1206 "Unit": "IIO" 1207 }, 1208 { 1209 "BriefDescription": "Writing line", 1210 "Counter": "0,1,2,3", 1211 "EventCode": "0x88", 1212 "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.WR", 1213 "Experimental": "1", 1214 "FCMask": "0x07", 1215 "PerPkg": "1", 1216 "PortMask": "0x0FF", 1217 "UMask": "0x10", 1218 "Unit": "IIO" 1219 }, 1220 { 1221 "BriefDescription": "-", 1222 "Counter": "0,1,2,3", 1223 "EventCode": "0x8e", 1224 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT", 1225 "Experimental": "1", 1226 "FCMask": "0x07", 1227 "PerPkg": "1", 1228 "PortMask": "0x0FF", 1229 "UMask": "0x80", 1230 "Unit": "IIO" 1231 }, 1232 { 1233 "BriefDescription": "-", 1234 "Counter": "0,1,2,3", 1235 "EventCode": "0x8e", 1236 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P", 1237 "Experimental": "1", 1238 "FCMask": "0x07", 1239 "PerPkg": "1", 1240 "PortMask": "0x0FF", 1241 "UMask": "0x40", 1242 "Unit": "IIO" 1243 }, 1244 { 1245 "BriefDescription": "-", 1246 "Counter": "0,1,2,3", 1247 "EventCode": "0x8e", 1248 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P", 1249 "Experimental": "1", 1250 "FCMask": "0x07", 1251 "PerPkg": "1", 1252 "PortMask": "0x0FF", 1253 "UMask": "0x20", 1254 "Unit": "IIO" 1255 }, 1256 { 1257 "BriefDescription": "-", 1258 "Counter": "0,1,2,3", 1259 "EventCode": "0x8e", 1260 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST", 1261 "Experimental": "1", 1262 "FCMask": "0x07", 1263 "PerPkg": "1", 1264 "PortMask": "0x0FF", 1265 "UMask": "0x2", 1266 "Unit": "IIO" 1267 }, 1268 { 1269 "BriefDescription": "-", 1270 "Counter": "0,1,2,3", 1271 "EventCode": "0x8e", 1272 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM", 1273 "Experimental": "1", 1274 "FCMask": "0x07", 1275 "PerPkg": "1", 1276 "PortMask": "0x0FF", 1277 "UMask": "0x8", 1278 "Unit": "IIO" 1279 }, 1280 { 1281 "BriefDescription": "-", 1282 "Counter": "0,1,2,3", 1283 "EventCode": "0x8e", 1284 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB", 1285 "Experimental": "1", 1286 "FCMask": "0x07", 1287 "PerPkg": "1", 1288 "PortMask": "0x0FF", 1289 "UMask": "0x1", 1290 "Unit": "IIO" 1291 }, 1292 { 1293 "BriefDescription": "-", 1294 "Counter": "0,1,2,3", 1295 "EventCode": "0x8e", 1296 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P", 1297 "Experimental": "1", 1298 "FCMask": "0x07", 1299 "PerPkg": "1", 1300 "PortMask": "0x0FF", 1301 "UMask": "0x10", 1302 "Unit": "IIO" 1303 }, 1304 { 1305 "BriefDescription": "-", 1306 "Counter": "0,1,2,3", 1307 "EventCode": "0x8e", 1308 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX", 1309 "Experimental": "1", 1310 "FCMask": "0x07", 1311 "PerPkg": "1", 1312 "PortMask": "0x0FF", 1313 "UMask": "0x4", 1314 "Unit": "IIO" 1315 }, 1316 { 1317 "BriefDescription": "Posted requests sent by the integrated IO (IIO) controller to the Ubox, useful for counting message signaled interrupts (MSI).", 1318 "Counter": "0,1,2,3", 1319 "EventCode": "0x8e", 1320 "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX_POSTED", 1321 "FCMask": "0x01", 1322 "PerPkg": "1", 1323 "PortMask": "0x0FF", 1324 "UMask": "0x4", 1325 "Unit": "IIO" 1326 }, 1327 { 1328 "BriefDescription": "All 9 bits of Page Walk Tracker Occupancy", 1329 "Counter": "0,1,2,3", 1330 "EventCode": "0x42", 1331 "EventName": "UNC_IIO_PWT_OCCUPANCY", 1332 "Experimental": "1", 1333 "PerPkg": "1", 1334 "PortMask": "0x000", 1335 "Unit": "IIO" 1336 }, 1337 { 1338 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", 1339 "Counter": "2,3", 1340 "EventCode": "0xC1", 1341 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.ALL_PARTS", 1342 "FCMask": "0x07", 1343 "PerPkg": "1", 1344 "PortMask": "0x0FF", 1345 "UMask": "0x4", 1346 "Unit": "IIO" 1347 }, 1348 { 1349 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", 1350 "Counter": "2,3", 1351 "EventCode": "0xC1", 1352 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", 1353 "FCMask": "0x07", 1354 "PerPkg": "1", 1355 "PortMask": "0x001", 1356 "UMask": "0x4", 1357 "Unit": "IIO" 1358 }, 1359 { 1360 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", 1361 "Counter": "2,3", 1362 "EventCode": "0xC1", 1363 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", 1364 "FCMask": "0x07", 1365 "PerPkg": "1", 1366 "PortMask": "0x002", 1367 "UMask": "0x4", 1368 "Unit": "IIO" 1369 }, 1370 { 1371 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", 1372 "Counter": "2,3", 1373 "EventCode": "0xC1", 1374 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", 1375 "FCMask": "0x07", 1376 "PerPkg": "1", 1377 "PortMask": "0x004", 1378 "UMask": "0x4", 1379 "Unit": "IIO" 1380 }, 1381 { 1382 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", 1383 "Counter": "2,3", 1384 "EventCode": "0xC1", 1385 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", 1386 "FCMask": "0x07", 1387 "PerPkg": "1", 1388 "PortMask": "0x008", 1389 "UMask": "0x4", 1390 "Unit": "IIO" 1391 }, 1392 { 1393 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", 1394 "Counter": "2,3", 1395 "EventCode": "0xC1", 1396 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", 1397 "FCMask": "0x07", 1398 "PerPkg": "1", 1399 "PortMask": "0x010", 1400 "UMask": "0x4", 1401 "Unit": "IIO" 1402 }, 1403 { 1404 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", 1405 "Counter": "2,3", 1406 "EventCode": "0xC1", 1407 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", 1408 "FCMask": "0x07", 1409 "PerPkg": "1", 1410 "PortMask": "0x020", 1411 "UMask": "0x4", 1412 "Unit": "IIO" 1413 }, 1414 { 1415 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", 1416 "Counter": "2,3", 1417 "EventCode": "0xC1", 1418 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", 1419 "FCMask": "0x07", 1420 "PerPkg": "1", 1421 "PortMask": "0x040", 1422 "UMask": "0x4", 1423 "Unit": "IIO" 1424 }, 1425 { 1426 "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", 1427 "Counter": "2,3", 1428 "EventCode": "0xC1", 1429 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", 1430 "FCMask": "0x07", 1431 "PerPkg": "1", 1432 "PortMask": "0x080", 1433 "UMask": "0x4", 1434 "Unit": "IIO" 1435 }, 1436 { 1437 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", 1438 "Counter": "2,3", 1439 "EventCode": "0xC1", 1440 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.ALL_PARTS", 1441 "FCMask": "0x07", 1442 "PerPkg": "1", 1443 "PortMask": "0x0FF", 1444 "UMask": "0x1", 1445 "Unit": "IIO" 1446 }, 1447 { 1448 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", 1449 "Counter": "2,3", 1450 "EventCode": "0xC1", 1451 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", 1452 "FCMask": "0x07", 1453 "PerPkg": "1", 1454 "PortMask": "0x001", 1455 "UMask": "0x1", 1456 "Unit": "IIO" 1457 }, 1458 { 1459 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", 1460 "Counter": "2,3", 1461 "EventCode": "0xC1", 1462 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", 1463 "FCMask": "0x07", 1464 "PerPkg": "1", 1465 "PortMask": "0x002", 1466 "UMask": "0x1", 1467 "Unit": "IIO" 1468 }, 1469 { 1470 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", 1471 "Counter": "2,3", 1472 "EventCode": "0xC1", 1473 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", 1474 "FCMask": "0x07", 1475 "PerPkg": "1", 1476 "PortMask": "0x004", 1477 "UMask": "0x1", 1478 "Unit": "IIO" 1479 }, 1480 { 1481 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", 1482 "Counter": "2,3", 1483 "EventCode": "0xC1", 1484 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", 1485 "FCMask": "0x07", 1486 "PerPkg": "1", 1487 "PortMask": "0x008", 1488 "UMask": "0x1", 1489 "Unit": "IIO" 1490 }, 1491 { 1492 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", 1493 "Counter": "2,3", 1494 "EventCode": "0xC1", 1495 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", 1496 "FCMask": "0x07", 1497 "PerPkg": "1", 1498 "PortMask": "0x010", 1499 "UMask": "0x1", 1500 "Unit": "IIO" 1501 }, 1502 { 1503 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", 1504 "Counter": "2,3", 1505 "EventCode": "0xC1", 1506 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", 1507 "FCMask": "0x07", 1508 "PerPkg": "1", 1509 "PortMask": "0x020", 1510 "UMask": "0x1", 1511 "Unit": "IIO" 1512 }, 1513 { 1514 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", 1515 "Counter": "2,3", 1516 "EventCode": "0xC1", 1517 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", 1518 "FCMask": "0x07", 1519 "PerPkg": "1", 1520 "PortMask": "0x040", 1521 "UMask": "0x1", 1522 "Unit": "IIO" 1523 }, 1524 { 1525 "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", 1526 "Counter": "2,3", 1527 "EventCode": "0xC1", 1528 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", 1529 "FCMask": "0x07", 1530 "PerPkg": "1", 1531 "PortMask": "0x080", 1532 "UMask": "0x1", 1533 "Unit": "IIO" 1534 }, 1535 { 1536 "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.", 1537 "Counter": "2,3", 1538 "EventCode": "0xC1", 1539 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.ALL_PARTS", 1540 "FCMask": "0x07", 1541 "PerPkg": "1", 1542 "PortMask": "0x0FF", 1543 "UMask": "0x8", 1544 "Unit": "IIO" 1545 }, 1546 { 1547 "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.", 1548 "Counter": "2,3", 1549 "EventCode": "0xC1", 1550 "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.ALL_PARTS", 1551 "FCMask": "0x07", 1552 "PerPkg": "1", 1553 "PortMask": "0x0FF", 1554 "UMask": "0x2", 1555 "Unit": "IIO" 1556 }, 1557 { 1558 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1559 "Counter": "0,1", 1560 "EventCode": "0x84", 1561 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", 1562 "FCMask": "0x07", 1563 "PerPkg": "1", 1564 "PortMask": "0x001", 1565 "UMask": "0x4", 1566 "Unit": "IIO" 1567 }, 1568 { 1569 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1570 "Counter": "0,1", 1571 "EventCode": "0x84", 1572 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", 1573 "FCMask": "0x07", 1574 "PerPkg": "1", 1575 "PortMask": "0x002", 1576 "UMask": "0x4", 1577 "Unit": "IIO" 1578 }, 1579 { 1580 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1581 "Counter": "0,1", 1582 "EventCode": "0x84", 1583 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", 1584 "FCMask": "0x07", 1585 "PerPkg": "1", 1586 "PortMask": "0x004", 1587 "UMask": "0x4", 1588 "Unit": "IIO" 1589 }, 1590 { 1591 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1592 "Counter": "0,1", 1593 "EventCode": "0x84", 1594 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", 1595 "FCMask": "0x07", 1596 "PerPkg": "1", 1597 "PortMask": "0x008", 1598 "UMask": "0x4", 1599 "Unit": "IIO" 1600 }, 1601 { 1602 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1603 "Counter": "0,1", 1604 "EventCode": "0x84", 1605 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", 1606 "FCMask": "0x07", 1607 "PerPkg": "1", 1608 "PortMask": "0x010", 1609 "UMask": "0x4", 1610 "Unit": "IIO" 1611 }, 1612 { 1613 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1614 "Counter": "0,1", 1615 "EventCode": "0x84", 1616 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", 1617 "FCMask": "0x07", 1618 "PerPkg": "1", 1619 "PortMask": "0x020", 1620 "UMask": "0x4", 1621 "Unit": "IIO" 1622 }, 1623 { 1624 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1625 "Counter": "0,1", 1626 "EventCode": "0x84", 1627 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", 1628 "FCMask": "0x07", 1629 "PerPkg": "1", 1630 "PortMask": "0x040", 1631 "UMask": "0x4", 1632 "Unit": "IIO" 1633 }, 1634 { 1635 "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", 1636 "Counter": "0,1", 1637 "EventCode": "0x84", 1638 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", 1639 "FCMask": "0x07", 1640 "PerPkg": "1", 1641 "PortMask": "0x080", 1642 "UMask": "0x4", 1643 "Unit": "IIO" 1644 }, 1645 { 1646 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1647 "Counter": "0,1", 1648 "EventCode": "0x84", 1649 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", 1650 "FCMask": "0x07", 1651 "PerPkg": "1", 1652 "PortMask": "0x001", 1653 "UMask": "0x1", 1654 "Unit": "IIO" 1655 }, 1656 { 1657 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1658 "Counter": "0,1", 1659 "EventCode": "0x84", 1660 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", 1661 "FCMask": "0x07", 1662 "PerPkg": "1", 1663 "PortMask": "0x002", 1664 "UMask": "0x1", 1665 "Unit": "IIO" 1666 }, 1667 { 1668 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1669 "Counter": "0,1", 1670 "EventCode": "0x84", 1671 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", 1672 "FCMask": "0x07", 1673 "PerPkg": "1", 1674 "PortMask": "0x004", 1675 "UMask": "0x1", 1676 "Unit": "IIO" 1677 }, 1678 { 1679 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1680 "Counter": "0,1", 1681 "EventCode": "0x84", 1682 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", 1683 "FCMask": "0x07", 1684 "PerPkg": "1", 1685 "PortMask": "0x008", 1686 "UMask": "0x1", 1687 "Unit": "IIO" 1688 }, 1689 { 1690 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1691 "Counter": "0,1", 1692 "EventCode": "0x84", 1693 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", 1694 "FCMask": "0x07", 1695 "PerPkg": "1", 1696 "PortMask": "0x010", 1697 "UMask": "0x1", 1698 "Unit": "IIO" 1699 }, 1700 { 1701 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1702 "Counter": "0,1", 1703 "EventCode": "0x84", 1704 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", 1705 "FCMask": "0x07", 1706 "PerPkg": "1", 1707 "PortMask": "0x020", 1708 "UMask": "0x1", 1709 "Unit": "IIO" 1710 }, 1711 { 1712 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1713 "Counter": "0,1", 1714 "EventCode": "0x84", 1715 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", 1716 "FCMask": "0x07", 1717 "PerPkg": "1", 1718 "PortMask": "0x040", 1719 "UMask": "0x1", 1720 "Unit": "IIO" 1721 }, 1722 { 1723 "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", 1724 "Counter": "0,1", 1725 "EventCode": "0x84", 1726 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", 1727 "FCMask": "0x07", 1728 "PerPkg": "1", 1729 "PortMask": "0x080", 1730 "UMask": "0x1", 1731 "Unit": "IIO" 1732 }, 1733 { 1734 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)", 1735 "Counter": "0,1", 1736 "EventCode": "0x84", 1737 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", 1738 "Experimental": "1", 1739 "FCMask": "0x07", 1740 "PerPkg": "1", 1741 "PortMask": "0x001", 1742 "UMask": "0x8", 1743 "Unit": "IIO" 1744 }, 1745 { 1746 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)", 1747 "Counter": "0,1", 1748 "EventCode": "0x84", 1749 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", 1750 "Experimental": "1", 1751 "FCMask": "0x07", 1752 "PerPkg": "1", 1753 "PortMask": "0x002", 1754 "UMask": "0x8", 1755 "Unit": "IIO" 1756 }, 1757 { 1758 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)", 1759 "Counter": "0,1", 1760 "EventCode": "0x84", 1761 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", 1762 "Experimental": "1", 1763 "FCMask": "0x07", 1764 "PerPkg": "1", 1765 "PortMask": "0x004", 1766 "UMask": "0x8", 1767 "Unit": "IIO" 1768 }, 1769 { 1770 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)", 1771 "Counter": "0,1", 1772 "EventCode": "0x84", 1773 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", 1774 "Experimental": "1", 1775 "FCMask": "0x07", 1776 "PerPkg": "1", 1777 "PortMask": "0x008", 1778 "UMask": "0x8", 1779 "Unit": "IIO" 1780 }, 1781 { 1782 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)", 1783 "Counter": "0,1", 1784 "EventCode": "0x84", 1785 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART4", 1786 "Experimental": "1", 1787 "FCMask": "0x07", 1788 "PerPkg": "1", 1789 "PortMask": "0x010", 1790 "UMask": "0x8", 1791 "Unit": "IIO" 1792 }, 1793 { 1794 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)", 1795 "Counter": "0,1", 1796 "EventCode": "0x84", 1797 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART5", 1798 "Experimental": "1", 1799 "FCMask": "0x07", 1800 "PerPkg": "1", 1801 "PortMask": "0x020", 1802 "UMask": "0x8", 1803 "Unit": "IIO" 1804 }, 1805 { 1806 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)", 1807 "Counter": "0,1", 1808 "EventCode": "0x84", 1809 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART6", 1810 "Experimental": "1", 1811 "FCMask": "0x07", 1812 "PerPkg": "1", 1813 "PortMask": "0x040", 1814 "UMask": "0x8", 1815 "Unit": "IIO" 1816 }, 1817 { 1818 "BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)", 1819 "Counter": "0,1", 1820 "EventCode": "0x84", 1821 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART7", 1822 "Experimental": "1", 1823 "FCMask": "0x07", 1824 "PerPkg": "1", 1825 "PortMask": "0x080", 1826 "UMask": "0x8", 1827 "Unit": "IIO" 1828 }, 1829 { 1830 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", 1831 "Counter": "0,1", 1832 "EventCode": "0x84", 1833 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", 1834 "Experimental": "1", 1835 "FCMask": "0x07", 1836 "PerPkg": "1", 1837 "PortMask": "0x001", 1838 "UMask": "0x2", 1839 "Unit": "IIO" 1840 }, 1841 { 1842 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", 1843 "Counter": "0,1", 1844 "EventCode": "0x84", 1845 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", 1846 "Experimental": "1", 1847 "FCMask": "0x07", 1848 "PerPkg": "1", 1849 "PortMask": "0x002", 1850 "UMask": "0x2", 1851 "Unit": "IIO" 1852 }, 1853 { 1854 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", 1855 "Counter": "0,1", 1856 "EventCode": "0x84", 1857 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", 1858 "Experimental": "1", 1859 "FCMask": "0x07", 1860 "PerPkg": "1", 1861 "PortMask": "0x004", 1862 "UMask": "0x2", 1863 "Unit": "IIO" 1864 }, 1865 { 1866 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", 1867 "Counter": "0,1", 1868 "EventCode": "0x84", 1869 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", 1870 "Experimental": "1", 1871 "FCMask": "0x07", 1872 "PerPkg": "1", 1873 "PortMask": "0x008", 1874 "UMask": "0x2", 1875 "Unit": "IIO" 1876 }, 1877 { 1878 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", 1879 "Counter": "0,1", 1880 "EventCode": "0x84", 1881 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4", 1882 "Experimental": "1", 1883 "FCMask": "0x07", 1884 "PerPkg": "1", 1885 "PortMask": "0x010", 1886 "UMask": "0x2", 1887 "Unit": "IIO" 1888 }, 1889 { 1890 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", 1891 "Counter": "0,1", 1892 "EventCode": "0x84", 1893 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5", 1894 "Experimental": "1", 1895 "FCMask": "0x07", 1896 "PerPkg": "1", 1897 "PortMask": "0x020", 1898 "UMask": "0x2", 1899 "Unit": "IIO" 1900 }, 1901 { 1902 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", 1903 "Counter": "0,1", 1904 "EventCode": "0x84", 1905 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6", 1906 "Experimental": "1", 1907 "FCMask": "0x07", 1908 "PerPkg": "1", 1909 "PortMask": "0x040", 1910 "UMask": "0x2", 1911 "Unit": "IIO" 1912 }, 1913 { 1914 "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", 1915 "Counter": "0,1", 1916 "EventCode": "0x84", 1917 "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7", 1918 "Experimental": "1", 1919 "FCMask": "0x07", 1920 "PerPkg": "1", 1921 "PortMask": "0x080", 1922 "UMask": "0x2", 1923 "Unit": "IIO" 1924 } 1925]
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