fp_operation.json

  1[
  2    {
  3        "EventCode": "0x0105",
  4        "EventName": "FP_MV_SPEC",
  5        "BriefDescription": "This event counts architecturally executed floating-point move operation."
  6    },
  7    {
  8        "EventCode": "0x0112",
  9        "EventName": "FP_LD_SPEC",
 10        "BriefDescription": "This event counts architecturally executed NOSIMD load operations that using SIMD&FP registers."
 11    },
 12    {
 13        "EventCode": "0x0113",
 14        "EventName": "FP_ST_SPEC",
 15        "BriefDescription": "This event counts architecturally executed NOSIMD store operations that using SIMD&FP registers."
 16    },
 17    {
 18        "ArchStdEvent": "ASE_FP_SPEC",
 19        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point operation."
 20    },
 21    {
 22        "ArchStdEvent": "SVE_FP_SPEC",
 23        "BriefDescription": "This event counts architecturally executed SVE floating-point operation."
 24    },
 25    {
 26        "ArchStdEvent": "ASE_SVE_FP_SPEC",
 27        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point operation."
 28    },
 29    {
 30        "ArchStdEvent": "FP_HP_SPEC",
 31        "BriefDescription": "This event counts architecturally executed half-precision floating-point operation."
 32    },
 33    {
 34        "ArchStdEvent": "ASE_FP_HP_SPEC",
 35        "BriefDescription": "This event counts architecturally executed Advanced SIMD half-precision floating-point operation."
 36    },
 37    {
 38        "ArchStdEvent": "SVE_FP_HP_SPEC",
 39        "BriefDescription": "This event counts architecturally executed SVE half-precision floating-point operation."
 40    },
 41    {
 42        "ArchStdEvent": "ASE_SVE_FP_HP_SPEC",
 43        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE half-precision floating-point operation."
 44    },
 45    {
 46        "ArchStdEvent": "FP_SP_SPEC",
 47        "BriefDescription": "This event counts architecturally executed single-precision floating-point operation."
 48    },
 49    {
 50        "ArchStdEvent": "ASE_FP_SP_SPEC",
 51        "BriefDescription": "This event counts architecturally executed Advanced SIMD single-precision floating-point operation."
 52    },
 53    {
 54        "ArchStdEvent": "SVE_FP_SP_SPEC",
 55        "BriefDescription": "This event counts architecturally executed SVE single-precision floating-point operation."
 56    },
 57    {
 58        "ArchStdEvent": "ASE_SVE_FP_SP_SPEC",
 59        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE single-precision floating-point operation."
 60    },
 61    {
 62        "ArchStdEvent": "FP_DP_SPEC",
 63        "BriefDescription": "This event counts architecturally executed double-precision floating-point operation."
 64    },
 65    {
 66        "ArchStdEvent": "ASE_FP_DP_SPEC",
 67        "BriefDescription": "This event counts architecturally executed Advanced SIMD double-precision floating-point operation."
 68    },
 69    {
 70        "ArchStdEvent": "SVE_FP_DP_SPEC",
 71        "BriefDescription": "This event counts architecturally executed SVE double-precision floating-point operation."
 72    },
 73    {
 74        "ArchStdEvent": "ASE_SVE_FP_DP_SPEC",
 75        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE double-precision floating-point operation."
 76    },
 77    {
 78        "ArchStdEvent": "FP_DIV_SPEC",
 79        "BriefDescription": "This event counts architecturally executed floating-point divide operation."
 80    },
 81    {
 82        "ArchStdEvent": "ASE_FP_DIV_SPEC",
 83        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point divide operation."
 84    },
 85    {
 86        "ArchStdEvent": "SVE_FP_DIV_SPEC",
 87        "BriefDescription": "This event counts architecturally executed SVE floating-point divide operation."
 88    },
 89    {
 90        "ArchStdEvent": "ASE_SVE_FP_DIV_SPEC",
 91        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point divide operation."
 92    },
 93    {
 94        "ArchStdEvent": "FP_SQRT_SPEC",
 95        "BriefDescription": "This event counts architecturally executed floating-point square root operation."
 96    },
 97    {
 98        "ArchStdEvent": "ASE_FP_SQRT_SPEC",
 99        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point square root operation."
100    },
101    {
102        "ArchStdEvent": "SVE_FP_SQRT_SPEC",
103        "BriefDescription": "This event counts architecturally executed SVE floating-point square root operation."
104    },
105    {
106        "ArchStdEvent": "ASE_SVE_FP_SQRT_SPEC",
107        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point square root operation."
108    },
109    {
110        "ArchStdEvent": "ASE_FP_FMA_SPEC",
111        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point FMA operation."
112    },
113    {
114        "ArchStdEvent": "SVE_FP_FMA_SPEC",
115        "BriefDescription": "This event counts architecturally executed SVE floating-point FMA operation."
116    },
117    {
118        "ArchStdEvent": "ASE_SVE_FP_FMA_SPEC",
119        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point FMA operation."
120    },
121    {
122        "ArchStdEvent": "FP_MUL_SPEC",
123        "BriefDescription": "This event counts architecturally executed floating-point multiply operation."
124    },
125    {
126        "ArchStdEvent": "ASE_FP_MUL_SPEC",
127        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point multiply operation."
128    },
129    {
130        "ArchStdEvent": "SVE_FP_MUL_SPEC",
131        "BriefDescription": "This event counts architecturally executed SVE floating-point multiply operation."
132    },
133    {
134        "ArchStdEvent": "ASE_SVE_FP_MUL_SPEC",
135        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point multiply operation."
136    },
137    {
138        "ArchStdEvent": "FP_ADDSUB_SPEC",
139        "BriefDescription": "This event counts architecturally executed floating-point add or subtract operation."
140    },
141    {
142        "ArchStdEvent": "ASE_FP_ADDSUB_SPEC",
143        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point add or subtract operation."
144    },
145    {
146        "ArchStdEvent": "SVE_FP_ADDSUB_SPEC",
147        "BriefDescription": "This event counts architecturally executed SVE floating-point add or subtract operation."
148    },
149    {
150        "ArchStdEvent": "ASE_SVE_FP_ADDSUB_SPEC",
151        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point add or subtract operation."
152    },
153    {
154        "ArchStdEvent": "ASE_FP_RECPE_SPEC",
155        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point reciprocal estimate operation."
156    },
157    {
158        "ArchStdEvent": "SVE_FP_RECPE_SPEC",
159        "BriefDescription": "This event counts architecturally executed SVE floating-point reciprocal estimate operation."
160    },
161    {
162        "ArchStdEvent": "ASE_SVE_FP_RECPE_SPEC",
163        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point reciprocal estimate operation."
164    },
165    {
166        "ArchStdEvent": "ASE_FP_CVT_SPEC",
167        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point convert operation."
168    },
169    {
170        "ArchStdEvent": "SVE_FP_CVT_SPEC",
171        "BriefDescription": "This event counts architecturally executed SVE floating-point convert operation."
172    },
173    {
174        "ArchStdEvent": "ASE_SVE_FP_CVT_SPEC",
175        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point convert operation."
176    },
177    {
178        "ArchStdEvent": "SVE_FP_AREDUCE_SPEC",
179        "BriefDescription": "This event counts architecturally executed SVE floating-point accumulating reduction operation."
180    },
181    {
182        "ArchStdEvent": "ASE_FP_PREDUCE_SPEC",
183        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point pairwise add step operation."
184    },
185    {
186        "ArchStdEvent": "SVE_FP_VREDUCE_SPEC",
187        "BriefDescription": "This event counts architecturally executed SVE floating-point vector reduction operation."
188    },
189    {
190        "ArchStdEvent": "ASE_SVE_FP_VREDUCE_SPEC",
191        "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point vector reduction operation."
192    },
193    {
194        "ArchStdEvent": "FP_SCALE_OPS_SPEC",
195        "BriefDescription": "This event counts architecturally executed SVE arithmetic operation. See FP_SCALE_OPS_SPEC of ARMv9 Reference Manual for more information. This event counter is incremented by (128 / CSIZE) and by twice that amount for operations that would also be counted by SVE_FP_FMA_SPEC."
196    },
197    {
198        "ArchStdEvent": "FP_FIXED_OPS_SPEC",
199        "BriefDescription": "This event counts architecturally executed v8SIMD&FP arithmetic operation. See FP_FIXED_OPS_SPEC of ARMv9 Reference Manual for more information. This event counter is incremented by the specified number of elements for Advanced SIMD operations or by 1 for scalar operations, and by twice those amounts for operations that would also be counted by FP_FMA_SPEC."
200    },
201    {
202        "ArchStdEvent": "ASE_SVE_FP_DOT_SPEC",
203        "BriefDescription": "This event counts architecturally executed microarchitectural Advanced SIMD or SVE floating-point dot-product operation."
204    },
205    {
206        "ArchStdEvent": "ASE_SVE_FP_MMLA_SPEC",
207        "BriefDescription": "This event counts architecturally executed microarchitectural Advanced SIMD or SVE floating-point matrix multiply operation."
208    },
209    {
210        "ArchStdEvent": "ASE_FP_VREDUCE_SPEC",
211        "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point vector reduction operation."
212    },
213    {
214        "ArchStdEvent": "SVE_FP_PREDUCE_SPEC",
215        "BriefDescription": "This event counts architecturally executed SVE floating-point pairwise add step operation."
216    },
217    {
218        "ArchStdEvent": "ASE_FP_BF16_MIN_SPEC",
219        "BriefDescription": "This event counts architecturally executed Advanced SIMD data processing operations, smallest type is BFloat16 floating-point."
220    },
221    {
222        "ArchStdEvent": "ASE_FP_FP8_MIN_SPEC",
223        "BriefDescription": "This event counts architecturally executed Advanced SIMD data processing operations, smallest type is 8-bit floating-point."
224    },
225    {
226        "ArchStdEvent": "ASE_SVE_FP_BF16_MIN_SPEC",
227        "BriefDescription": "This event counts architecturally executed Advanced SIMD data processing or SVE data processing operations, smallest type is BFloat16 floating-point."
228    },
229    {
230        "ArchStdEvent": "ASE_SVE_FP_FP8_MIN_SPEC",
231        "BriefDescription": "This event counts architecturally executed Advanced SIMD data processing or SVE data processing operations, smallest type is 8-bit floating-point."
232    },
233    {
234        "ArchStdEvent": "SVE_FP_BF16_MIN_SPEC",
235        "BriefDescription": "This event counts architecturally executed SVE data processing operations, smallest type is BFloat16 floating-point."
236    },
237    {
238        "ArchStdEvent": "SVE_FP_FP8_MIN_SPEC",
239        "BriefDescription": "This event counts architecturally executed SVE data processing operations, smallest type is 8-bit floating-point."
240    },
241    {
242        "ArchStdEvent": "FP_BF16_MIN_SPEC",
243        "BriefDescription": "This event counts architecturally executed data processing operations, smallest type is BFloat16 floating-point."
244    },
245    {
246        "ArchStdEvent": "FP_FP8_MIN_SPEC",
247        "BriefDescription": "This event counts architecturally executed data processing operations, smallest type is 8-bit floating-point."
248    },
249    {
250        "ArchStdEvent": "FP_BF16_FIXED_MIN_OPS_SPEC",
251        "BriefDescription": "This event counts architecturally executed non-scalable element arithmetic operations, smallest type is BFloat16 floating-point."
252    },
253    {
254        "ArchStdEvent": "FP_FP8_FIXED_MIN_OPS_SPEC",
255        "BriefDescription": "This event counts architecturally executed non-scalable element arithmetic operations, smallest type is 8-bit floating-point."
256    },
257    {
258        "ArchStdEvent": "FP_BF16_SCALE_MIN_OPS_SPEC",
259        "BriefDescription": "This event counts architecturally executed scalable element arithmetic operations, smallest type is BFloat16 floating-point."
260    },
261    {
262        "ArchStdEvent": "FP_FP8_SCALE_MIN_OPS_SPEC",
263        "BriefDescription": "This event counts architecturally executed scalable element arithmetic operations, smallest type is 8-bit floating-point."
264    }
265]