FILE
cs4231.c
File preview with syntax highlighting.
linux-6.19.14/sound/sparc/cs4231.c
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Driver for CS4231 sound chips found on Sparcs. 4 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net> 5 * 6 * Based entirely upon drivers/sbus/audio/cs4231.c which is: 7 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu) 8 * and also sound/isa/cs423x/cs4231_lib.c which is: 9 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 10 */ 11 12#include <linux/module.h> 13#include <linux/kernel.h> 14#include <linux/delay.h> 15#include <linux/init.h> 16#include <linux/interrupt.h> 17#include <linux/moduleparam.h> 18#include <linux/irq.h> 19#include <linux/io.h> 20#include <linux/of.h> 21#include <linux/platform_device.h> 22 23#include <sound/core.h> 24#include <sound/pcm.h> 25#include <sound/info.h> 26#include <sound/control.h> 27#include <sound/timer.h> 28#include <sound/initval.h> 29#include <sound/pcm_params.h> 30 31#ifdef CONFIG_SBUS 32#define SBUS_SUPPORT 33#endif 34 35#if defined(CONFIG_PCI) && defined(CONFIG_SPARC64) 36#define EBUS_SUPPORT 37#include <linux/pci.h> 38#include <asm/ebus_dma.h> 39#endif 40 41static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 42static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 43/* Enable this card */ 44static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 45 46module_param_array(index, int, NULL, 0444); 47MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard."); 48module_param_array(id, charp, NULL, 0444); 49MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard."); 50module_param_array(enable, bool, NULL, 0444); 51MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard."); 52MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller"); 53MODULE_DESCRIPTION("Sun CS4231"); 54MODULE_LICENSE("GPL"); 55 56#ifdef SBUS_SUPPORT 57struct sbus_dma_info { 58 spinlock_t lock; /* DMA access lock */ 59 int dir; 60 void __iomem *regs; 61}; 62#endif 63 64struct snd_cs4231; 65struct cs4231_dma_control { 66 void (*prepare)(struct cs4231_dma_control *dma_cont, 67 int dir); 68 void (*enable)(struct cs4231_dma_control *dma_cont, int on); 69 int (*request)(struct cs4231_dma_control *dma_cont, 70 dma_addr_t bus_addr, size_t len); 71 unsigned int (*address)(struct cs4231_dma_control *dma_cont); 72#ifdef EBUS_SUPPORT 73 struct ebus_dma_info ebus_info; 74#endif 75#ifdef SBUS_SUPPORT 76 struct sbus_dma_info sbus_info; 77#endif 78}; 79 80struct snd_cs4231 { 81 spinlock_t lock; /* registers access lock */ 82 void __iomem *port; 83 84 struct cs4231_dma_control p_dma; 85 struct cs4231_dma_control c_dma; 86 87 u32 flags; 88#define CS4231_FLAG_EBUS 0x00000001 89#define CS4231_FLAG_PLAYBACK 0x00000002 90#define CS4231_FLAG_CAPTURE 0x00000004 91 92 struct snd_card *card; 93 struct snd_pcm *pcm; 94 struct snd_pcm_substream *playback_substream; 95 unsigned int p_periods_sent; 96 struct snd_pcm_substream *capture_substream; 97 unsigned int c_periods_sent; 98 struct snd_timer *timer; 99 100 unsigned short mode; 101#define CS4231_MODE_NONE 0x0000 102#define CS4231_MODE_PLAY 0x0001 103#define CS4231_MODE_RECORD 0x0002 104#define CS4231_MODE_TIMER 0x0004 105#define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \ 106 CS4231_MODE_TIMER) 107 108 unsigned char image[32]; /* registers image */ 109 int mce_bit; 110 int calibrate_mute; 111 struct mutex mce_mutex; /* mutex for mce register */ 112 struct mutex open_mutex; /* mutex for ALSA open/close */ 113 114 struct platform_device *op; 115 unsigned int irq[2]; 116 unsigned int regs_size; 117 struct snd_cs4231 *next; 118}; 119 120/* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for 121 * now.... -DaveM 122 */ 123 124/* IO ports */ 125#include <sound/cs4231-regs.h> 126 127/* XXX offsets are different than PC ISA chips... */ 128#define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2)) 129 130/* SBUS DMA register defines. */ 131 132#define APCCSR 0x10UL /* APC DMA CSR */ 133#define APCCVA 0x20UL /* APC Capture DMA Address */ 134#define APCCC 0x24UL /* APC Capture Count */ 135#define APCCNVA 0x28UL /* APC Capture DMA Next Address */ 136#define APCCNC 0x2cUL /* APC Capture Next Count */ 137#define APCPVA 0x30UL /* APC Play DMA Address */ 138#define APCPC 0x34UL /* APC Play Count */ 139#define APCPNVA 0x38UL /* APC Play DMA Next Address */ 140#define APCPNC 0x3cUL /* APC Play Next Count */ 141 142/* Defines for SBUS DMA-routines */ 143 144#define APCVA 0x0UL /* APC DMA Address */ 145#define APCC 0x4UL /* APC Count */ 146#define APCNVA 0x8UL /* APC DMA Next Address */ 147#define APCNC 0xcUL /* APC Next Count */ 148#define APC_PLAY 0x30UL /* Play registers start at 0x30 */ 149#define APC_RECORD 0x20UL /* Record registers start at 0x20 */ 150 151/* APCCSR bits */ 152 153#define APC_INT_PENDING 0x800000 /* Interrupt Pending */ 154#define APC_PLAY_INT 0x400000 /* Playback interrupt */ 155#define APC_CAPT_INT 0x200000 /* Capture interrupt */ 156#define APC_GENL_INT 0x100000 /* General interrupt */ 157#define APC_XINT_ENA 0x80000 /* General ext int. enable */ 158#define APC_XINT_PLAY 0x40000 /* Playback ext intr */ 159#define APC_XINT_CAPT 0x20000 /* Capture ext intr */ 160#define APC_XINT_GENL 0x10000 /* Error ext intr */ 161#define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */ 162#define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */ 163#define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */ 164#define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */ 165#define APC_XINT_COVF 0x800 /* Cap data dropped on floor */ 166#define APC_XINT_CNVA 0x400 /* Capture NVA dirty */ 167#define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */ 168#define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */ 169#define APC_PPAUSE 0x80 /* Pause the play DMA */ 170#define APC_CPAUSE 0x40 /* Pause the capture DMA */ 171#define APC_CDC_RESET 0x20 /* CODEC RESET */ 172#define APC_PDMA_READY 0x08 /* Play DMA Go */ 173#define APC_CDMA_READY 0x04 /* Capture DMA Go */ 174#define APC_CHIP_RESET 0x01 /* Reset the chip */ 175 176/* EBUS DMA register offsets */ 177 178#define EBDMA_CSR 0x00UL /* Control/Status */ 179#define EBDMA_ADDR 0x04UL /* DMA Address */ 180#define EBDMA_COUNT 0x08UL /* DMA Count */ 181 182/* 183 * Some variables 184 */ 185 186static const unsigned char freq_bits[14] = { 187 /* 5510 */ 0x00 | CS4231_XTAL2, 188 /* 6620 */ 0x0E | CS4231_XTAL2, 189 /* 8000 */ 0x00 | CS4231_XTAL1, 190 /* 9600 */ 0x0E | CS4231_XTAL1, 191 /* 11025 */ 0x02 | CS4231_XTAL2, 192 /* 16000 */ 0x02 | CS4231_XTAL1, 193 /* 18900 */ 0x04 | CS4231_XTAL2, 194 /* 22050 */ 0x06 | CS4231_XTAL2, 195 /* 27042 */ 0x04 | CS4231_XTAL1, 196 /* 32000 */ 0x06 | CS4231_XTAL1, 197 /* 33075 */ 0x0C | CS4231_XTAL2, 198 /* 37800 */ 0x08 | CS4231_XTAL2, 199 /* 44100 */ 0x0A | CS4231_XTAL2, 200 /* 48000 */ 0x0C | CS4231_XTAL1 201}; 202 203static const unsigned int rates[14] = { 204 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050, 205 27042, 32000, 33075, 37800, 44100, 48000 206}; 207 208static const struct snd_pcm_hw_constraint_list hw_constraints_rates = { 209 .count = ARRAY_SIZE(rates), 210 .list = rates, 211}; 212 213static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime) 214{ 215 return snd_pcm_hw_constraint_list(runtime, 0, 216 SNDRV_PCM_HW_PARAM_RATE, 217 &hw_constraints_rates); 218} 219 220static const unsigned char snd_cs4231_original_image[32] = 221{ 222 0x00, /* 00/00 - lic */ 223 0x00, /* 01/01 - ric */ 224 0x9f, /* 02/02 - la1ic */ 225 0x9f, /* 03/03 - ra1ic */ 226 0x9f, /* 04/04 - la2ic */ 227 0x9f, /* 05/05 - ra2ic */ 228 0xbf, /* 06/06 - loc */ 229 0xbf, /* 07/07 - roc */ 230 0x20, /* 08/08 - pdfr */ 231 CS4231_AUTOCALIB, /* 09/09 - ic */ 232 0x00, /* 0a/10 - pc */ 233 0x00, /* 0b/11 - ti */ 234 CS4231_MODE2, /* 0c/12 - mi */ 235 0x00, /* 0d/13 - lbc */ 236 0x00, /* 0e/14 - pbru */ 237 0x00, /* 0f/15 - pbrl */ 238 0x80, /* 10/16 - afei */ 239 0x01, /* 11/17 - afeii */ 240 0x9f, /* 12/18 - llic */ 241 0x9f, /* 13/19 - rlic */ 242 0x00, /* 14/20 - tlb */ 243 0x00, /* 15/21 - thb */ 244 0x00, /* 16/22 - la3mic/reserved */ 245 0x00, /* 17/23 - ra3mic/reserved */ 246 0x00, /* 18/24 - afs */ 247 0x00, /* 19/25 - lamoc/version */ 248 0x00, /* 1a/26 - mioc */ 249 0x00, /* 1b/27 - ramoc/reserved */ 250 0x20, /* 1c/28 - cdfr */ 251 0x00, /* 1d/29 - res4 */ 252 0x00, /* 1e/30 - cbru */ 253 0x00, /* 1f/31 - cbrl */ 254}; 255 256static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr) 257{ 258 if (cp->flags & CS4231_FLAG_EBUS) 259 return readb(reg_addr); 260 else 261 return sbus_readb(reg_addr); 262} 263 264static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, 265 void __iomem *reg_addr) 266{ 267 if (cp->flags & CS4231_FLAG_EBUS) 268 return writeb(val, reg_addr); 269 else 270 return sbus_writeb(val, reg_addr); 271} 272 273/* 274 * Basic I/O functions 275 */ 276 277static void snd_cs4231_ready(struct snd_cs4231 *chip) 278{ 279 int timeout; 280 281 for (timeout = 250; timeout > 0; timeout--) { 282 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); 283 if ((val & CS4231_INIT) == 0) 284 break; 285 udelay(100); 286 } 287} 288 289static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, 290 unsigned char value) 291{ 292 snd_cs4231_ready(chip); 293#ifdef CONFIG_SND_DEBUG 294 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 295 dev_dbg(chip->card->dev, 296 "out: auto calibration time out - reg = 0x%x, value = 0x%x\n", 297 reg, value); 298#endif 299 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); 300 wmb(); 301 __cs4231_writeb(chip, value, CS4231U(chip, REG)); 302 mb(); 303} 304 305static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg, 306 unsigned char mask, unsigned char value) 307{ 308 unsigned char tmp = (chip->image[reg] & mask) | value; 309 310 chip->image[reg] = tmp; 311 if (!chip->calibrate_mute) 312 snd_cs4231_dout(chip, reg, tmp); 313} 314 315static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, 316 unsigned char value) 317{ 318 snd_cs4231_dout(chip, reg, value); 319 chip->image[reg] = value; 320 mb(); 321} 322 323static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg) 324{ 325 snd_cs4231_ready(chip); 326#ifdef CONFIG_SND_DEBUG 327 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 328 dev_dbg(chip->card->dev, 329 "in: auto calibration time out - reg = 0x%x\n", 330 reg); 331#endif 332 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); 333 mb(); 334 return __cs4231_readb(chip, CS4231U(chip, REG)); 335} 336 337/* 338 * CS4231 detection / MCE routines 339 */ 340 341static void snd_cs4231_busy_wait(struct snd_cs4231 *chip) 342{ 343 int timeout; 344 345 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */ 346 for (timeout = 5; timeout > 0; timeout--) 347 __cs4231_readb(chip, CS4231U(chip, REGSEL)); 348 349 /* end of cleanup sequence */ 350 for (timeout = 500; timeout > 0; timeout--) { 351 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); 352 if ((val & CS4231_INIT) == 0) 353 break; 354 msleep(1); 355 } 356} 357 358static void snd_cs4231_mce_up(struct snd_cs4231 *chip) 359{ 360 int timeout; 361 362 guard(spinlock_irqsave)(&chip->lock); 363 snd_cs4231_ready(chip); 364#ifdef CONFIG_SND_DEBUG 365 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 366 dev_dbg(chip->card->dev, 367 "mce_up - auto calibration time out (0)\n"); 368#endif 369 chip->mce_bit |= CS4231_MCE; 370 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL)); 371 if (timeout == 0x80) 372 dev_dbg(chip->card->dev, 373 "mce_up [%p]: serious init problem - codec still busy\n", 374 chip->port); 375 if (!(timeout & CS4231_MCE)) 376 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), 377 CS4231U(chip, REGSEL)); 378} 379 380static void snd_cs4231_mce_down(struct snd_cs4231 *chip) 381{ 382 unsigned long flags, timeout; 383 int reg; 384 385 snd_cs4231_busy_wait(chip); 386 spin_lock_irqsave(&chip->lock, flags); 387#ifdef CONFIG_SND_DEBUG 388 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 389 dev_dbg(chip->card->dev, 390 "mce_down [%p] - auto calibration time out (0)\n", 391 CS4231U(chip, REGSEL)); 392#endif 393 chip->mce_bit &= ~CS4231_MCE; 394 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL)); 395 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f), 396 CS4231U(chip, REGSEL)); 397 if (reg == 0x80) 398 dev_dbg(chip->card->dev, 399 "mce_down [%p]: serious init problem - codec still busy\n", 400 chip->port); 401 if ((reg & CS4231_MCE) == 0) { 402 spin_unlock_irqrestore(&chip->lock, flags); 403 return; 404 } 405 406 /* 407 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low. 408 */ 409 timeout = jiffies + msecs_to_jiffies(250); 410 do { 411 spin_unlock_irqrestore(&chip->lock, flags); 412 msleep(1); 413 spin_lock_irqsave(&chip->lock, flags); 414 reg = snd_cs4231_in(chip, CS4231_TEST_INIT); 415 reg &= CS4231_CALIB_IN_PROGRESS; 416 } while (reg && time_before(jiffies, timeout)); 417 spin_unlock_irqrestore(&chip->lock, flags); 418 419 if (reg) 420 dev_err(chip->card->dev, 421 "mce_down - auto calibration time out (2)\n"); 422} 423 424static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont, 425 struct snd_pcm_substream *substream, 426 unsigned int *periods_sent) 427{ 428 struct snd_pcm_runtime *runtime = substream->runtime; 429 430 while (1) { 431 unsigned int period_size = snd_pcm_lib_period_bytes(substream); 432 unsigned int offset = period_size * (*periods_sent); 433 434 if (WARN_ON(period_size >= (1 << 24))) 435 return; 436 437 if (dma_cont->request(dma_cont, 438 runtime->dma_addr + offset, period_size)) 439 return; 440 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods; 441 } 442} 443 444static void cs4231_dma_trigger(struct snd_pcm_substream *substream, 445 unsigned int what, int on) 446{ 447 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 448 struct cs4231_dma_control *dma_cont; 449 450 if (what & CS4231_PLAYBACK_ENABLE) { 451 dma_cont = &chip->p_dma; 452 if (on) { 453 dma_cont->prepare(dma_cont, 0); 454 dma_cont->enable(dma_cont, 1); 455 snd_cs4231_advance_dma(dma_cont, 456 chip->playback_substream, 457 &chip->p_periods_sent); 458 } else { 459 dma_cont->enable(dma_cont, 0); 460 } 461 } 462 if (what & CS4231_RECORD_ENABLE) { 463 dma_cont = &chip->c_dma; 464 if (on) { 465 dma_cont->prepare(dma_cont, 1); 466 dma_cont->enable(dma_cont, 1); 467 snd_cs4231_advance_dma(dma_cont, 468 chip->capture_substream, 469 &chip->c_periods_sent); 470 } else { 471 dma_cont->enable(dma_cont, 0); 472 } 473 } 474} 475 476static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd) 477{ 478 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 479 int result = 0; 480 481 switch (cmd) { 482 case SNDRV_PCM_TRIGGER_START: 483 case SNDRV_PCM_TRIGGER_STOP: 484 { 485 unsigned int what = 0; 486 struct snd_pcm_substream *s; 487 488 snd_pcm_group_for_each_entry(s, substream) { 489 if (s == chip->playback_substream) { 490 what |= CS4231_PLAYBACK_ENABLE; 491 snd_pcm_trigger_done(s, substream); 492 } else if (s == chip->capture_substream) { 493 what |= CS4231_RECORD_ENABLE; 494 snd_pcm_trigger_done(s, substream); 495 } 496 } 497 498 guard(spinlock_irqsave)(&chip->lock); 499 if (cmd == SNDRV_PCM_TRIGGER_START) { 500 cs4231_dma_trigger(substream, what, 1); 501 chip->image[CS4231_IFACE_CTRL] |= what; 502 } else { 503 cs4231_dma_trigger(substream, what, 0); 504 chip->image[CS4231_IFACE_CTRL] &= ~what; 505 } 506 snd_cs4231_out(chip, CS4231_IFACE_CTRL, 507 chip->image[CS4231_IFACE_CTRL]); 508 break; 509 } 510 default: 511 result = -EINVAL; 512 break; 513 } 514 515 return result; 516} 517 518/* 519 * CODEC I/O 520 */ 521 522static unsigned char snd_cs4231_get_rate(unsigned int rate) 523{ 524 int i; 525 526 for (i = 0; i < 14; i++) 527 if (rate == rates[i]) 528 return freq_bits[i]; 529 530 return freq_bits[13]; 531} 532 533static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, 534 int channels) 535{ 536 unsigned char rformat; 537 538 rformat = CS4231_LINEAR_8; 539 switch (format) { 540 case SNDRV_PCM_FORMAT_MU_LAW: 541 rformat = CS4231_ULAW_8; 542 break; 543 case SNDRV_PCM_FORMAT_A_LAW: 544 rformat = CS4231_ALAW_8; 545 break; 546 case SNDRV_PCM_FORMAT_S16_LE: 547 rformat = CS4231_LINEAR_16; 548 break; 549 case SNDRV_PCM_FORMAT_S16_BE: 550 rformat = CS4231_LINEAR_16_BIG; 551 break; 552 case SNDRV_PCM_FORMAT_IMA_ADPCM: 553 rformat = CS4231_ADPCM_16; 554 break; 555 } 556 if (channels > 1) 557 rformat |= CS4231_STEREO; 558 return rformat; 559} 560 561static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute) 562{ 563 mute = mute ? 1 : 0; 564 guard(spinlock_irqsave)(&chip->lock); 565 if (chip->calibrate_mute == mute) 566 return; 567 568 if (!mute) { 569 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, 570 chip->image[CS4231_LEFT_INPUT]); 571 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, 572 chip->image[CS4231_RIGHT_INPUT]); 573 snd_cs4231_dout(chip, CS4231_LOOPBACK, 574 chip->image[CS4231_LOOPBACK]); 575 } 576 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, 577 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]); 578 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, 579 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]); 580 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, 581 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]); 582 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, 583 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]); 584 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, 585 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]); 586 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, 587 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]); 588 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, 589 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]); 590 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, 591 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]); 592 snd_cs4231_dout(chip, CS4231_MONO_CTRL, 593 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]); 594 chip->calibrate_mute = mute; 595} 596 597static void snd_cs4231_playback_format(struct snd_cs4231 *chip, 598 struct snd_pcm_hw_params *params, 599 unsigned char pdfr) 600{ 601 guard(mutex)(&chip->mce_mutex); 602 snd_cs4231_calibrate_mute(chip, 1); 603 604 snd_cs4231_mce_up(chip); 605 606 scoped_guard(spinlock_irqsave, &chip->lock) { 607 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, 608 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ? 609 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) : 610 pdfr); 611 } 612 613 snd_cs4231_mce_down(chip); 614 615 snd_cs4231_calibrate_mute(chip, 0); 616} 617 618static void snd_cs4231_capture_format(struct snd_cs4231 *chip, 619 struct snd_pcm_hw_params *params, 620 unsigned char cdfr) 621{ 622 unsigned long flags; 623 624 guard(mutex)(&chip->mce_mutex); 625 snd_cs4231_calibrate_mute(chip, 1); 626 627 snd_cs4231_mce_up(chip); 628 629 spin_lock_irqsave(&chip->lock, flags); 630 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) { 631 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, 632 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) | 633 (cdfr & 0x0f)); 634 spin_unlock_irqrestore(&chip->lock, flags); 635 snd_cs4231_mce_down(chip); 636 snd_cs4231_mce_up(chip); 637 spin_lock_irqsave(&chip->lock, flags); 638 } 639 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr); 640 spin_unlock_irqrestore(&chip->lock, flags); 641 642 snd_cs4231_mce_down(chip); 643 644 snd_cs4231_calibrate_mute(chip, 0); 645} 646 647/* 648 * Timer interface 649 */ 650 651static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer) 652{ 653 struct snd_cs4231 *chip = snd_timer_chip(timer); 654 655 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920; 656} 657 658static int snd_cs4231_timer_start(struct snd_timer *timer) 659{ 660 unsigned int ticks; 661 struct snd_cs4231 *chip = snd_timer_chip(timer); 662 663 guard(spinlock_irqsave)(&chip->lock); 664 ticks = timer->sticks; 665 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 || 666 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] || 667 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) { 668 snd_cs4231_out(chip, CS4231_TIMER_HIGH, 669 chip->image[CS4231_TIMER_HIGH] = 670 (unsigned char) (ticks >> 8)); 671 snd_cs4231_out(chip, CS4231_TIMER_LOW, 672 chip->image[CS4231_TIMER_LOW] = 673 (unsigned char) ticks); 674 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, 675 chip->image[CS4231_ALT_FEATURE_1] | 676 CS4231_TIMER_ENABLE); 677 } 678 679 return 0; 680} 681 682static int snd_cs4231_timer_stop(struct snd_timer *timer) 683{ 684 struct snd_cs4231 *chip = snd_timer_chip(timer); 685 686 guard(spinlock_irqsave)(&chip->lock); 687 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE; 688 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, 689 chip->image[CS4231_ALT_FEATURE_1]); 690 691 return 0; 692} 693 694static void snd_cs4231_init(struct snd_cs4231 *chip) 695{ 696 snd_cs4231_mce_down(chip); 697 698#ifdef SNDRV_DEBUG_MCE 699 pr_debug("init: (1)\n"); 700#endif 701 snd_cs4231_mce_up(chip); 702 scoped_guard(spinlock_irqsave, &chip->lock) { 703 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | 704 CS4231_PLAYBACK_PIO | 705 CS4231_RECORD_ENABLE | 706 CS4231_RECORD_PIO | 707 CS4231_CALIB_MODE); 708 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB; 709 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); 710 } 711 snd_cs4231_mce_down(chip); 712 713#ifdef SNDRV_DEBUG_MCE 714 pr_debug("init: (2)\n"); 715#endif 716 717 snd_cs4231_mce_up(chip); 718 scoped_guard(spinlock_irqsave, &chip->lock) { 719 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, 720 chip->image[CS4231_ALT_FEATURE_1]); 721 } 722 snd_cs4231_mce_down(chip); 723 724#ifdef SNDRV_DEBUG_MCE 725 pr_debug("init: (3) - afei = 0x%x\n", 726 chip->image[CS4231_ALT_FEATURE_1]); 727#endif 728 729 scoped_guard(spinlock_irqsave, &chip->lock) { 730 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, 731 chip->image[CS4231_ALT_FEATURE_2]); 732 } 733 734 snd_cs4231_mce_up(chip); 735 scoped_guard(spinlock_irqsave, &chip->lock) { 736 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, 737 chip->image[CS4231_PLAYBK_FORMAT]); 738 } 739 snd_cs4231_mce_down(chip); 740 741#ifdef SNDRV_DEBUG_MCE 742 pr_debug("init: (4)\n"); 743#endif 744 745 snd_cs4231_mce_up(chip); 746 scoped_guard(spinlock_irqsave, &chip->lock) { 747 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]); 748 } 749 snd_cs4231_mce_down(chip); 750 751#ifdef SNDRV_DEBUG_MCE 752 pr_debug("init: (5)\n"); 753#endif 754} 755 756static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode) 757{ 758 guard(mutex)(&chip->open_mutex); 759 if ((chip->mode & mode)) 760 return -EAGAIN; 761 if (chip->mode & CS4231_MODE_OPEN) { 762 chip->mode |= mode; 763 return 0; 764 } 765 /* ok. now enable and ack CODEC IRQ */ 766 guard(spinlock_irqsave)(&chip->lock); 767 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | 768 CS4231_RECORD_IRQ | 769 CS4231_TIMER_IRQ); 770 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); 771 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 772 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 773 774 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | 775 CS4231_RECORD_IRQ | 776 CS4231_TIMER_IRQ); 777 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); 778 779 chip->mode = mode; 780 return 0; 781} 782 783static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode) 784{ 785 unsigned long flags; 786 787 guard(mutex)(&chip->open_mutex); 788 chip->mode &= ~mode; 789 if (chip->mode & CS4231_MODE_OPEN) 790 return; 791 snd_cs4231_calibrate_mute(chip, 1); 792 793 /* disable IRQ */ 794 spin_lock_irqsave(&chip->lock, flags); 795 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); 796 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 797 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 798 799 /* now disable record & playback */ 800 801 if (chip->image[CS4231_IFACE_CTRL] & 802 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | 803 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) { 804 spin_unlock_irqrestore(&chip->lock, flags); 805 snd_cs4231_mce_up(chip); 806 spin_lock_irqsave(&chip->lock, flags); 807 chip->image[CS4231_IFACE_CTRL] &= 808 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | 809 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO); 810 snd_cs4231_out(chip, CS4231_IFACE_CTRL, 811 chip->image[CS4231_IFACE_CTRL]); 812 spin_unlock_irqrestore(&chip->lock, flags); 813 snd_cs4231_mce_down(chip); 814 spin_lock_irqsave(&chip->lock, flags); 815 } 816 817 /* clear IRQ again */ 818 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); 819 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 820 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 821 spin_unlock_irqrestore(&chip->lock, flags); 822 823 snd_cs4231_calibrate_mute(chip, 0); 824 825 chip->mode = 0; 826} 827 828/* 829 * timer open/close 830 */ 831 832static int snd_cs4231_timer_open(struct snd_timer *timer) 833{ 834 struct snd_cs4231 *chip = snd_timer_chip(timer); 835 snd_cs4231_open(chip, CS4231_MODE_TIMER); 836 return 0; 837} 838 839static int snd_cs4231_timer_close(struct snd_timer *timer) 840{ 841 struct snd_cs4231 *chip = snd_timer_chip(timer); 842 snd_cs4231_close(chip, CS4231_MODE_TIMER); 843 return 0; 844} 845 846static const struct snd_timer_hardware snd_cs4231_timer_table = { 847 .flags = SNDRV_TIMER_HW_AUTO, 848 .resolution = 9945, 849 .ticks = 65535, 850 .open = snd_cs4231_timer_open, 851 .close = snd_cs4231_timer_close, 852 .c_resolution = snd_cs4231_timer_resolution, 853 .start = snd_cs4231_timer_start, 854 .stop = snd_cs4231_timer_stop, 855}; 856 857/* 858 * ok.. exported functions.. 859 */ 860 861static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream, 862 struct snd_pcm_hw_params *hw_params) 863{ 864 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 865 unsigned char new_pdfr; 866 867 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), 868 params_channels(hw_params)) | 869 snd_cs4231_get_rate(params_rate(hw_params)); 870 snd_cs4231_playback_format(chip, hw_params, new_pdfr); 871 872 return 0; 873} 874 875static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream) 876{ 877 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 878 struct snd_pcm_runtime *runtime = substream->runtime; 879 880 guard(spinlock_irqsave)(&chip->lock); 881 882 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | 883 CS4231_PLAYBACK_PIO); 884 885 if (WARN_ON(runtime->period_size > 0xffff + 1)) 886 return -EINVAL; 887 888 chip->p_periods_sent = 0; 889 890 return 0; 891} 892 893static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream, 894 struct snd_pcm_hw_params *hw_params) 895{ 896 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 897 unsigned char new_cdfr; 898 899 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), 900 params_channels(hw_params)) | 901 snd_cs4231_get_rate(params_rate(hw_params)); 902 snd_cs4231_capture_format(chip, hw_params, new_cdfr); 903 904 return 0; 905} 906 907static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream) 908{ 909 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 910 911 guard(spinlock_irqsave)(&chip->lock); 912 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | 913 CS4231_RECORD_PIO); 914 915 916 chip->c_periods_sent = 0; 917 918 return 0; 919} 920 921static void snd_cs4231_overrange(struct snd_cs4231 *chip) 922{ 923 unsigned char res; 924 925 guard(spinlock_irqsave)(&chip->lock); 926 res = snd_cs4231_in(chip, CS4231_TEST_INIT); 927 928 /* detect overrange only above 0dB; may be user selectable? */ 929 if (res & (0x08 | 0x02)) 930 chip->capture_substream->runtime->overrange++; 931} 932 933static void snd_cs4231_play_callback(struct snd_cs4231 *chip) 934{ 935 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) { 936 snd_pcm_period_elapsed(chip->playback_substream); 937 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream, 938 &chip->p_periods_sent); 939 } 940} 941 942static void snd_cs4231_capture_callback(struct snd_cs4231 *chip) 943{ 944 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) { 945 snd_pcm_period_elapsed(chip->capture_substream); 946 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream, 947 &chip->c_periods_sent); 948 } 949} 950 951static snd_pcm_uframes_t snd_cs4231_playback_pointer( 952 struct snd_pcm_substream *substream) 953{ 954 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 955 struct cs4231_dma_control *dma_cont = &chip->p_dma; 956 size_t ptr; 957 958 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) 959 return 0; 960 ptr = dma_cont->address(dma_cont); 961 if (ptr != 0) 962 ptr -= substream->runtime->dma_addr; 963 964 return bytes_to_frames(substream->runtime, ptr); 965} 966 967static snd_pcm_uframes_t snd_cs4231_capture_pointer( 968 struct snd_pcm_substream *substream) 969{ 970 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 971 struct cs4231_dma_control *dma_cont = &chip->c_dma; 972 size_t ptr; 973 974 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)) 975 return 0; 976 ptr = dma_cont->address(dma_cont); 977 if (ptr != 0) 978 ptr -= substream->runtime->dma_addr; 979 980 return bytes_to_frames(substream->runtime, ptr); 981} 982 983static int snd_cs4231_probe(struct snd_cs4231 *chip) 984{ 985 int i; 986 int id = 0; 987 int vers = 0; 988 unsigned char *ptr; 989 990 for (i = 0; i < 50; i++) { 991 mb(); 992 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 993 msleep(2); 994 else { 995 guard(spinlock_irqsave)(&chip->lock); 996 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2); 997 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f; 998 vers = snd_cs4231_in(chip, CS4231_VERSION); 999 if (id == 0x0a) 1000 break; /* this is valid value */ 1001 } 1002 } 1003 dev_dbg(chip->card->dev, 1004 "cs4231: port = %p, id = 0x%x\n", chip->port, id); 1005 if (id != 0x0a) 1006 return -ENODEV; /* no valid device found */ 1007 1008 scoped_guard(spinlock_irqsave, &chip->lock) { 1009 /* clear any pendings IRQ */ 1010 __cs4231_readb(chip, CS4231U(chip, STATUS)); 1011 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); 1012 mb(); 1013 } 1014 1015 chip->image[CS4231_MISC_INFO] = CS4231_MODE2; 1016 chip->image[CS4231_IFACE_CTRL] = 1017 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA; 1018 chip->image[CS4231_ALT_FEATURE_1] = 0x80; 1019 chip->image[CS4231_ALT_FEATURE_2] = 0x01; 1020 if (vers & 0x20) 1021 chip->image[CS4231_ALT_FEATURE_2] |= 0x02; 1022 1023 ptr = (unsigned char *) &chip->image; 1024 1025 snd_cs4231_mce_down(chip); 1026 1027 scoped_guard(spinlock_irqsave, &chip->lock) { 1028 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */ 1029 snd_cs4231_out(chip, i, *ptr++); 1030 } 1031 1032 snd_cs4231_mce_up(chip); 1033 1034 snd_cs4231_mce_down(chip); 1035 1036 mdelay(2); 1037 1038 return 0; /* all things are ok.. */ 1039} 1040 1041static const struct snd_pcm_hardware snd_cs4231_playback = { 1042 .info = SNDRV_PCM_INFO_MMAP | 1043 SNDRV_PCM_INFO_INTERLEAVED | 1044 SNDRV_PCM_INFO_MMAP_VALID | 1045 SNDRV_PCM_INFO_SYNC_START, 1046 .formats = SNDRV_PCM_FMTBIT_MU_LAW | 1047 SNDRV_PCM_FMTBIT_A_LAW | 1048 SNDRV_PCM_FMTBIT_IMA_ADPCM | 1049 SNDRV_PCM_FMTBIT_U8 | 1050 SNDRV_PCM_FMTBIT_S16_LE | 1051 SNDRV_PCM_FMTBIT_S16_BE, 1052 .rates = SNDRV_PCM_RATE_KNOT | 1053 SNDRV_PCM_RATE_8000_48000, 1054 .rate_min = 5510, 1055 .rate_max = 48000, 1056 .channels_min = 1, 1057 .channels_max = 2, 1058 .buffer_bytes_max = 32 * 1024, 1059 .period_bytes_min = 64, 1060 .period_bytes_max = 32 * 1024, 1061 .periods_min = 1, 1062 .periods_max = 1024, 1063}; 1064 1065static const struct snd_pcm_hardware snd_cs4231_capture = { 1066 .info = SNDRV_PCM_INFO_MMAP | 1067 SNDRV_PCM_INFO_INTERLEAVED | 1068 SNDRV_PCM_INFO_MMAP_VALID | 1069 SNDRV_PCM_INFO_SYNC_START, 1070 .formats = SNDRV_PCM_FMTBIT_MU_LAW | 1071 SNDRV_PCM_FMTBIT_A_LAW | 1072 SNDRV_PCM_FMTBIT_IMA_ADPCM | 1073 SNDRV_PCM_FMTBIT_U8 | 1074 SNDRV_PCM_FMTBIT_S16_LE | 1075 SNDRV_PCM_FMTBIT_S16_BE, 1076 .rates = SNDRV_PCM_RATE_KNOT | 1077 SNDRV_PCM_RATE_8000_48000, 1078 .rate_min = 5510, 1079 .rate_max = 48000, 1080 .channels_min = 1, 1081 .channels_max = 2, 1082 .buffer_bytes_max = 32 * 1024, 1083 .period_bytes_min = 64, 1084 .period_bytes_max = 32 * 1024, 1085 .periods_min = 1, 1086 .periods_max = 1024, 1087}; 1088 1089static int snd_cs4231_playback_open(struct snd_pcm_substream *substream) 1090{ 1091 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1092 struct snd_pcm_runtime *runtime = substream->runtime; 1093 int err; 1094 1095 runtime->hw = snd_cs4231_playback; 1096 1097 err = snd_cs4231_open(chip, CS4231_MODE_PLAY); 1098 if (err < 0) 1099 return err; 1100 chip->playback_substream = substream; 1101 chip->p_periods_sent = 0; 1102 snd_pcm_set_sync(substream); 1103 snd_cs4231_xrate(runtime); 1104 1105 return 0; 1106} 1107 1108static int snd_cs4231_capture_open(struct snd_pcm_substream *substream) 1109{ 1110 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1111 struct snd_pcm_runtime *runtime = substream->runtime; 1112 int err; 1113 1114 runtime->hw = snd_cs4231_capture; 1115 1116 err = snd_cs4231_open(chip, CS4231_MODE_RECORD); 1117 if (err < 0) 1118 return err; 1119 chip->capture_substream = substream; 1120 chip->c_periods_sent = 0; 1121 snd_pcm_set_sync(substream); 1122 snd_cs4231_xrate(runtime); 1123 1124 return 0; 1125} 1126 1127static int snd_cs4231_playback_close(struct snd_pcm_substream *substream) 1128{ 1129 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1130 1131 snd_cs4231_close(chip, CS4231_MODE_PLAY); 1132 chip->playback_substream = NULL; 1133 1134 return 0; 1135} 1136 1137static int snd_cs4231_capture_close(struct snd_pcm_substream *substream) 1138{ 1139 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1140 1141 snd_cs4231_close(chip, CS4231_MODE_RECORD); 1142 chip->capture_substream = NULL; 1143 1144 return 0; 1145} 1146 1147/* XXX We can do some power-management, in particular on EBUS using 1148 * XXX the audio AUXIO register... 1149 */ 1150 1151static const struct snd_pcm_ops snd_cs4231_playback_ops = { 1152 .open = snd_cs4231_playback_open, 1153 .close = snd_cs4231_playback_close, 1154 .hw_params = snd_cs4231_playback_hw_params, 1155 .prepare = snd_cs4231_playback_prepare, 1156 .trigger = snd_cs4231_trigger, 1157 .pointer = snd_cs4231_playback_pointer, 1158}; 1159 1160static const struct snd_pcm_ops snd_cs4231_capture_ops = { 1161 .open = snd_cs4231_capture_open, 1162 .close = snd_cs4231_capture_close, 1163 .hw_params = snd_cs4231_capture_hw_params, 1164 .prepare = snd_cs4231_capture_prepare, 1165 .trigger = snd_cs4231_trigger, 1166 .pointer = snd_cs4231_capture_pointer, 1167}; 1168 1169static int snd_cs4231_pcm(struct snd_card *card) 1170{ 1171 struct snd_cs4231 *chip = card->private_data; 1172 struct snd_pcm *pcm; 1173 int err; 1174 1175 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm); 1176 if (err < 0) 1177 return err; 1178 1179 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1180 &snd_cs4231_playback_ops); 1181 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1182 &snd_cs4231_capture_ops); 1183 1184 /* global setup */ 1185 pcm->private_data = chip; 1186 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 1187 strscpy(pcm->name, "CS4231"); 1188 1189 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1190 &chip->op->dev, 64 * 1024, 128 * 1024); 1191 1192 chip->pcm = pcm; 1193 1194 return 0; 1195} 1196 1197static int snd_cs4231_timer(struct snd_card *card) 1198{ 1199 struct snd_cs4231 *chip = card->private_data; 1200 struct snd_timer *timer; 1201 struct snd_timer_id tid; 1202 int err; 1203 1204 /* Timer initialization */ 1205 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1206 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1207 tid.card = card->number; 1208 tid.device = 0; 1209 tid.subdevice = 0; 1210 err = snd_timer_new(card, "CS4231", &tid, &timer); 1211 if (err < 0) 1212 return err; 1213 strscpy(timer->name, "CS4231"); 1214 timer->private_data = chip; 1215 timer->hw = snd_cs4231_timer_table; 1216 chip->timer = timer; 1217 1218 return 0; 1219} 1220 1221/* 1222 * MIXER part 1223 */ 1224 1225static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, 1226 struct snd_ctl_elem_info *uinfo) 1227{ 1228 static const char * const texts[4] = { 1229 "Line", "CD", "Mic", "Mix" 1230 }; 1231 1232 return snd_ctl_enum_info(uinfo, 2, 4, texts); 1233} 1234 1235static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, 1236 struct snd_ctl_elem_value *ucontrol) 1237{ 1238 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1239 1240 guard(spinlock_irqsave)(&chip->lock); 1241 ucontrol->value.enumerated.item[0] = 1242 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6; 1243 ucontrol->value.enumerated.item[1] = 1244 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6; 1245 1246 return 0; 1247} 1248 1249static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, 1250 struct snd_ctl_elem_value *ucontrol) 1251{ 1252 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1253 unsigned short left, right; 1254 int change; 1255 1256 if (ucontrol->value.enumerated.item[0] > 3 || 1257 ucontrol->value.enumerated.item[1] > 3) 1258 return -EINVAL; 1259 left = ucontrol->value.enumerated.item[0] << 6; 1260 right = ucontrol->value.enumerated.item[1] << 6; 1261 1262 guard(spinlock_irqsave)(&chip->lock); 1263 1264 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left; 1265 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right; 1266 change = left != chip->image[CS4231_LEFT_INPUT] || 1267 right != chip->image[CS4231_RIGHT_INPUT]; 1268 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left); 1269 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right); 1270 1271 return change; 1272} 1273 1274static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, 1275 struct snd_ctl_elem_info *uinfo) 1276{ 1277 int mask = (kcontrol->private_value >> 16) & 0xff; 1278 1279 uinfo->type = (mask == 1) ? 1280 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1281 uinfo->count = 1; 1282 uinfo->value.integer.min = 0; 1283 uinfo->value.integer.max = mask; 1284 1285 return 0; 1286} 1287 1288static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, 1289 struct snd_ctl_elem_value *ucontrol) 1290{ 1291 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1292 int reg = kcontrol->private_value & 0xff; 1293 int shift = (kcontrol->private_value >> 8) & 0xff; 1294 int mask = (kcontrol->private_value >> 16) & 0xff; 1295 int invert = (kcontrol->private_value >> 24) & 0xff; 1296 1297 guard(spinlock_irqsave)(&chip->lock); 1298 1299 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; 1300 1301 if (invert) 1302 ucontrol->value.integer.value[0] = 1303 (mask - ucontrol->value.integer.value[0]); 1304 1305 return 0; 1306} 1307 1308static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, 1309 struct snd_ctl_elem_value *ucontrol) 1310{ 1311 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1312 int reg = kcontrol->private_value & 0xff; 1313 int shift = (kcontrol->private_value >> 8) & 0xff; 1314 int mask = (kcontrol->private_value >> 16) & 0xff; 1315 int invert = (kcontrol->private_value >> 24) & 0xff; 1316 int change; 1317 unsigned short val; 1318 1319 val = (ucontrol->value.integer.value[0] & mask); 1320 if (invert) 1321 val = mask - val; 1322 val <<= shift; 1323 1324 guard(spinlock_irqsave)(&chip->lock); 1325 1326 val = (chip->image[reg] & ~(mask << shift)) | val; 1327 change = val != chip->image[reg]; 1328 snd_cs4231_out(chip, reg, val); 1329 1330 return change; 1331} 1332 1333static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, 1334 struct snd_ctl_elem_info *uinfo) 1335{ 1336 int mask = (kcontrol->private_value >> 24) & 0xff; 1337 1338 uinfo->type = mask == 1 ? 1339 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1340 uinfo->count = 2; 1341 uinfo->value.integer.min = 0; 1342 uinfo->value.integer.max = mask; 1343 1344 return 0; 1345} 1346 1347static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, 1348 struct snd_ctl_elem_value *ucontrol) 1349{ 1350 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1351 int left_reg = kcontrol->private_value & 0xff; 1352 int right_reg = (kcontrol->private_value >> 8) & 0xff; 1353 int shift_left = (kcontrol->private_value >> 16) & 0x07; 1354 int shift_right = (kcontrol->private_value >> 19) & 0x07; 1355 int mask = (kcontrol->private_value >> 24) & 0xff; 1356 int invert = (kcontrol->private_value >> 22) & 1; 1357 1358 guard(spinlock_irqsave)(&chip->lock); 1359 1360 ucontrol->value.integer.value[0] = 1361 (chip->image[left_reg] >> shift_left) & mask; 1362 ucontrol->value.integer.value[1] = 1363 (chip->image[right_reg] >> shift_right) & mask; 1364 1365 if (invert) { 1366 ucontrol->value.integer.value[0] = 1367 (mask - ucontrol->value.integer.value[0]); 1368 ucontrol->value.integer.value[1] = 1369 (mask - ucontrol->value.integer.value[1]); 1370 } 1371 1372 return 0; 1373} 1374 1375static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, 1376 struct snd_ctl_elem_value *ucontrol) 1377{ 1378 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1379 int left_reg = kcontrol->private_value & 0xff; 1380 int right_reg = (kcontrol->private_value >> 8) & 0xff; 1381 int shift_left = (kcontrol->private_value >> 16) & 0x07; 1382 int shift_right = (kcontrol->private_value >> 19) & 0x07; 1383 int mask = (kcontrol->private_value >> 24) & 0xff; 1384 int invert = (kcontrol->private_value >> 22) & 1; 1385 int change; 1386 unsigned short val1, val2; 1387 1388 val1 = ucontrol->value.integer.value[0] & mask; 1389 val2 = ucontrol->value.integer.value[1] & mask; 1390 if (invert) { 1391 val1 = mask - val1; 1392 val2 = mask - val2; 1393 } 1394 val1 <<= shift_left; 1395 val2 <<= shift_right; 1396 1397 guard(spinlock_irqsave)(&chip->lock); 1398 1399 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1; 1400 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2; 1401 change = val1 != chip->image[left_reg]; 1402 change |= val2 != chip->image[right_reg]; 1403 snd_cs4231_out(chip, left_reg, val1); 1404 snd_cs4231_out(chip, right_reg, val2); 1405 1406 return change; 1407} 1408 1409#define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \ 1410{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ 1411 .info = snd_cs4231_info_single, \ 1412 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \ 1413 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) } 1414 1415#define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \ 1416 shift_right, mask, invert) \ 1417{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ 1418 .info = snd_cs4231_info_double, \ 1419 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \ 1420 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \ 1421 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) } 1422 1423static const struct snd_kcontrol_new snd_cs4231_controls[] = { 1424CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, 1425 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1), 1426CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, 1427 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1), 1428CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, 1429 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1), 1430CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, 1431 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1), 1432CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, 1433 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1), 1434CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, 1435 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1), 1436CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, 1437 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1), 1438CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, 1439 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1), 1440CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1), 1441CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1), 1442CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1), 1443CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0), 1444CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 1445 15, 0), 1446{ 1447 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1448 .name = "Capture Source", 1449 .info = snd_cs4231_info_mux, 1450 .get = snd_cs4231_get_mux, 1451 .put = snd_cs4231_put_mux, 1452}, 1453CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1454 1, 0), 1455CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0), 1456CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1), 1457/* SPARC specific uses of XCTL{0,1} general purpose outputs. */ 1458CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1), 1459CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1) 1460}; 1461 1462static int snd_cs4231_mixer(struct snd_card *card) 1463{ 1464 struct snd_cs4231 *chip = card->private_data; 1465 int err, idx; 1466 1467 if (snd_BUG_ON(!chip || !chip->pcm)) 1468 return -EINVAL; 1469 1470 strscpy(card->mixername, chip->pcm->name); 1471 1472 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) { 1473 err = snd_ctl_add(card, 1474 snd_ctl_new1(&snd_cs4231_controls[idx], chip)); 1475 if (err < 0) 1476 return err; 1477 } 1478 return 0; 1479} 1480 1481static int dev; 1482 1483static int cs4231_attach_begin(struct platform_device *op, 1484 struct snd_card **rcard) 1485{ 1486 struct snd_card *card; 1487 struct snd_cs4231 *chip; 1488 int err; 1489 1490 *rcard = NULL; 1491 1492 if (dev >= SNDRV_CARDS) 1493 return -ENODEV; 1494 1495 if (!enable[dev]) { 1496 dev++; 1497 return -ENOENT; 1498 } 1499 1500 err = snd_card_new(&op->dev, index[dev], id[dev], THIS_MODULE, 1501 sizeof(struct snd_cs4231), &card); 1502 if (err < 0) 1503 return err; 1504 1505 strscpy(card->driver, "CS4231"); 1506 strscpy(card->shortname, "Sun CS4231"); 1507 1508 chip = card->private_data; 1509 chip->card = card; 1510 1511 *rcard = card; 1512 return 0; 1513} 1514 1515static int cs4231_attach_finish(struct snd_card *card) 1516{ 1517 struct snd_cs4231 *chip = card->private_data; 1518 int err; 1519 1520 err = snd_cs4231_pcm(card); 1521 if (err < 0) 1522 goto out_err; 1523 1524 err = snd_cs4231_mixer(card); 1525 if (err < 0) 1526 goto out_err; 1527 1528 err = snd_cs4231_timer(card); 1529 if (err < 0) 1530 goto out_err; 1531 1532 err = snd_card_register(card); 1533 if (err < 0) 1534 goto out_err; 1535 1536 dev_set_drvdata(&chip->op->dev, chip); 1537 1538 dev++; 1539 return 0; 1540 1541out_err: 1542 snd_card_free(card); 1543 return err; 1544} 1545 1546#ifdef SBUS_SUPPORT 1547 1548static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id) 1549{ 1550 unsigned char status; 1551 u32 csr; 1552 struct snd_cs4231 *chip = dev_id; 1553 1554 /*This is IRQ is not raised by the cs4231*/ 1555 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ)) 1556 return IRQ_NONE; 1557 1558 /* ACK the APC interrupt. */ 1559 csr = sbus_readl(chip->port + APCCSR); 1560 1561 sbus_writel(csr, chip->port + APCCSR); 1562 1563 if ((csr & APC_PDMA_READY) && 1564 (csr & APC_PLAY_INT) && 1565 (csr & APC_XINT_PNVA) && 1566 !(csr & APC_XINT_EMPT)) 1567 snd_cs4231_play_callback(chip); 1568 1569 if ((csr & APC_CDMA_READY) && 1570 (csr & APC_CAPT_INT) && 1571 (csr & APC_XINT_CNVA) && 1572 !(csr & APC_XINT_EMPT)) 1573 snd_cs4231_capture_callback(chip); 1574 1575 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS); 1576 1577 if (status & CS4231_TIMER_IRQ) { 1578 if (chip->timer) 1579 snd_timer_interrupt(chip->timer, chip->timer->sticks); 1580 } 1581 1582 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY)) 1583 snd_cs4231_overrange(chip); 1584 1585 /* ACK the CS4231 interrupt. */ 1586 guard(spinlock_irqsave)(&chip->lock); 1587 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0); 1588 1589 return IRQ_HANDLED; 1590} 1591 1592/* 1593 * SBUS DMA routines 1594 */ 1595 1596static int sbus_dma_request(struct cs4231_dma_control *dma_cont, 1597 dma_addr_t bus_addr, size_t len) 1598{ 1599 u32 test, csr; 1600 struct sbus_dma_info *base = &dma_cont->sbus_info; 1601 1602 if (len >= (1 << 24)) 1603 return -EINVAL; 1604 guard(spinlock_irqsave)(&base->lock); 1605 csr = sbus_readl(base->regs + APCCSR); 1606 test = APC_CDMA_READY; 1607 if (base->dir == APC_PLAY) 1608 test = APC_PDMA_READY; 1609 if (!(csr & test)) 1610 return -EINVAL; 1611 test = APC_XINT_CNVA; 1612 if (base->dir == APC_PLAY) 1613 test = APC_XINT_PNVA; 1614 if (!(csr & test)) 1615 return -EBUSY; 1616 sbus_writel(bus_addr, base->regs + base->dir + APCNVA); 1617 sbus_writel(len, base->regs + base->dir + APCNC); 1618 return 0; 1619} 1620 1621static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d) 1622{ 1623 u32 csr, test; 1624 struct sbus_dma_info *base = &dma_cont->sbus_info; 1625 1626 guard(spinlock_irqsave)(&base->lock); 1627 csr = sbus_readl(base->regs + APCCSR); 1628 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA | 1629 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL | 1630 APC_XINT_PENA; 1631 if (base->dir == APC_RECORD) 1632 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA | 1633 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL; 1634 csr |= test; 1635 sbus_writel(csr, base->regs + APCCSR); 1636} 1637 1638static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on) 1639{ 1640 u32 csr, shift; 1641 struct sbus_dma_info *base = &dma_cont->sbus_info; 1642 1643 guard(spinlock_irqsave)(&base->lock); 1644 if (!on) { 1645 sbus_writel(0, base->regs + base->dir + APCNC); 1646 sbus_writel(0, base->regs + base->dir + APCNVA); 1647 if (base->dir == APC_PLAY) { 1648 sbus_writel(0, base->regs + base->dir + APCC); 1649 sbus_writel(0, base->regs + base->dir + APCVA); 1650 } 1651 1652 udelay(1200); 1653 } 1654 csr = sbus_readl(base->regs + APCCSR); 1655 shift = 0; 1656 if (base->dir == APC_PLAY) 1657 shift = 1; 1658 if (on) 1659 csr &= ~(APC_CPAUSE << shift); 1660 else 1661 csr |= (APC_CPAUSE << shift); 1662 sbus_writel(csr, base->regs + APCCSR); 1663 if (on) 1664 csr |= (APC_CDMA_READY << shift); 1665 else 1666 csr &= ~(APC_CDMA_READY << shift); 1667 sbus_writel(csr, base->regs + APCCSR); 1668} 1669 1670static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont) 1671{ 1672 struct sbus_dma_info *base = &dma_cont->sbus_info; 1673 1674 return sbus_readl(base->regs + base->dir + APCVA); 1675} 1676 1677/* 1678 * Init and exit routines 1679 */ 1680 1681static int snd_cs4231_sbus_free(struct snd_cs4231 *chip) 1682{ 1683 struct platform_device *op = chip->op; 1684 1685 if (chip->irq[0]) 1686 free_irq(chip->irq[0], chip); 1687 1688 if (chip->port) 1689 of_iounmap(&op->resource[0], chip->port, chip->regs_size); 1690 1691 return 0; 1692} 1693 1694static int snd_cs4231_sbus_dev_free(struct snd_device *device) 1695{ 1696 struct snd_cs4231 *cp = device->device_data; 1697 1698 return snd_cs4231_sbus_free(cp); 1699} 1700 1701static const struct snd_device_ops snd_cs4231_sbus_dev_ops = { 1702 .dev_free = snd_cs4231_sbus_dev_free, 1703}; 1704 1705static int snd_cs4231_sbus_create(struct snd_card *card, 1706 struct platform_device *op, 1707 int dev) 1708{ 1709 struct snd_cs4231 *chip = card->private_data; 1710 int err; 1711 1712 spin_lock_init(&chip->lock); 1713 spin_lock_init(&chip->c_dma.sbus_info.lock); 1714 spin_lock_init(&chip->p_dma.sbus_info.lock); 1715 mutex_init(&chip->mce_mutex); 1716 mutex_init(&chip->open_mutex); 1717 chip->op = op; 1718 chip->regs_size = resource_size(&op->resource[0]); 1719 memcpy(&chip->image, &snd_cs4231_original_image, 1720 sizeof(snd_cs4231_original_image)); 1721 1722 chip->port = of_ioremap(&op->resource[0], 0, 1723 chip->regs_size, "cs4231"); 1724 if (!chip->port) { 1725 dev_dbg(chip->card->dev, 1726 "cs4231-%d: Unable to map chip registers.\n", dev); 1727 return -EIO; 1728 } 1729 1730 chip->c_dma.sbus_info.regs = chip->port; 1731 chip->p_dma.sbus_info.regs = chip->port; 1732 chip->c_dma.sbus_info.dir = APC_RECORD; 1733 chip->p_dma.sbus_info.dir = APC_PLAY; 1734 1735 chip->p_dma.prepare = sbus_dma_prepare; 1736 chip->p_dma.enable = sbus_dma_enable; 1737 chip->p_dma.request = sbus_dma_request; 1738 chip->p_dma.address = sbus_dma_addr; 1739 1740 chip->c_dma.prepare = sbus_dma_prepare; 1741 chip->c_dma.enable = sbus_dma_enable; 1742 chip->c_dma.request = sbus_dma_request; 1743 chip->c_dma.address = sbus_dma_addr; 1744 1745 if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt, 1746 IRQF_SHARED, "cs4231", chip)) { 1747 dev_dbg(chip->card->dev, 1748 "cs4231-%d: Unable to grab SBUS IRQ %d\n", 1749 dev, op->archdata.irqs[0]); 1750 snd_cs4231_sbus_free(chip); 1751 return -EBUSY; 1752 } 1753 chip->irq[0] = op->archdata.irqs[0]; 1754 1755 if (snd_cs4231_probe(chip) < 0) { 1756 snd_cs4231_sbus_free(chip); 1757 return -ENODEV; 1758 } 1759 snd_cs4231_init(chip); 1760 1761 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, 1762 chip, &snd_cs4231_sbus_dev_ops); 1763 if (err < 0) { 1764 snd_cs4231_sbus_free(chip); 1765 return err; 1766 } 1767 1768 return 0; 1769} 1770 1771static int cs4231_sbus_probe(struct platform_device *op) 1772{ 1773 struct resource *rp = &op->resource[0]; 1774 struct snd_card *card; 1775 int err; 1776 1777 err = cs4231_attach_begin(op, &card); 1778 if (err) 1779 return err; 1780 1781 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d", 1782 card->shortname, 1783 rp->flags & 0xffL, 1784 (unsigned long long)rp->start, 1785 op->archdata.irqs[0]); 1786 1787 err = snd_cs4231_sbus_create(card, op, dev); 1788 if (err < 0) { 1789 snd_card_free(card); 1790 return err; 1791 } 1792 1793 return cs4231_attach_finish(card); 1794} 1795#endif 1796 1797#ifdef EBUS_SUPPORT 1798 1799static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, 1800 void *cookie) 1801{ 1802 struct snd_cs4231 *chip = cookie; 1803 1804 snd_cs4231_play_callback(chip); 1805} 1806 1807static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, 1808 int event, void *cookie) 1809{ 1810 struct snd_cs4231 *chip = cookie; 1811 1812 snd_cs4231_capture_callback(chip); 1813} 1814 1815/* 1816 * EBUS DMA wrappers 1817 */ 1818 1819static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, 1820 dma_addr_t bus_addr, size_t len) 1821{ 1822 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len); 1823} 1824 1825static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on) 1826{ 1827 ebus_dma_enable(&dma_cont->ebus_info, on); 1828} 1829 1830static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir) 1831{ 1832 ebus_dma_prepare(&dma_cont->ebus_info, dir); 1833} 1834 1835static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont) 1836{ 1837 return ebus_dma_addr(&dma_cont->ebus_info); 1838} 1839 1840/* 1841 * Init and exit routines 1842 */ 1843 1844static int snd_cs4231_ebus_free(struct snd_cs4231 *chip) 1845{ 1846 struct platform_device *op = chip->op; 1847 1848 if (chip->c_dma.ebus_info.regs) { 1849 ebus_dma_unregister(&chip->c_dma.ebus_info); 1850 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10); 1851 } 1852 if (chip->p_dma.ebus_info.regs) { 1853 ebus_dma_unregister(&chip->p_dma.ebus_info); 1854 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10); 1855 } 1856 1857 if (chip->port) 1858 of_iounmap(&op->resource[0], chip->port, 0x10); 1859 1860 return 0; 1861} 1862 1863static int snd_cs4231_ebus_dev_free(struct snd_device *device) 1864{ 1865 struct snd_cs4231 *cp = device->device_data; 1866 1867 return snd_cs4231_ebus_free(cp); 1868} 1869 1870static const struct snd_device_ops snd_cs4231_ebus_dev_ops = { 1871 .dev_free = snd_cs4231_ebus_dev_free, 1872}; 1873 1874static int snd_cs4231_ebus_create(struct snd_card *card, 1875 struct platform_device *op, 1876 int dev) 1877{ 1878 struct snd_cs4231 *chip = card->private_data; 1879 int err; 1880 1881 spin_lock_init(&chip->lock); 1882 spin_lock_init(&chip->c_dma.ebus_info.lock); 1883 spin_lock_init(&chip->p_dma.ebus_info.lock); 1884 mutex_init(&chip->mce_mutex); 1885 mutex_init(&chip->open_mutex); 1886 chip->flags |= CS4231_FLAG_EBUS; 1887 chip->op = op; 1888 memcpy(&chip->image, &snd_cs4231_original_image, 1889 sizeof(snd_cs4231_original_image)); 1890 strscpy(chip->c_dma.ebus_info.name, "cs4231(capture)"); 1891 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; 1892 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback; 1893 chip->c_dma.ebus_info.client_cookie = chip; 1894 chip->c_dma.ebus_info.irq = op->archdata.irqs[0]; 1895 strscpy(chip->p_dma.ebus_info.name, "cs4231(play)"); 1896 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; 1897 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback; 1898 chip->p_dma.ebus_info.client_cookie = chip; 1899 chip->p_dma.ebus_info.irq = op->archdata.irqs[1]; 1900 1901 chip->p_dma.prepare = _ebus_dma_prepare; 1902 chip->p_dma.enable = _ebus_dma_enable; 1903 chip->p_dma.request = _ebus_dma_request; 1904 chip->p_dma.address = _ebus_dma_addr; 1905 1906 chip->c_dma.prepare = _ebus_dma_prepare; 1907 chip->c_dma.enable = _ebus_dma_enable; 1908 chip->c_dma.request = _ebus_dma_request; 1909 chip->c_dma.address = _ebus_dma_addr; 1910 1911 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231"); 1912 chip->p_dma.ebus_info.regs = 1913 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma"); 1914 chip->c_dma.ebus_info.regs = 1915 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma"); 1916 if (!chip->port || !chip->p_dma.ebus_info.regs || 1917 !chip->c_dma.ebus_info.regs) { 1918 snd_cs4231_ebus_free(chip); 1919 dev_dbg(chip->card->dev, 1920 "cs4231-%d: Unable to map chip registers.\n", dev); 1921 return -EIO; 1922 } 1923 1924 if (ebus_dma_register(&chip->c_dma.ebus_info)) { 1925 snd_cs4231_ebus_free(chip); 1926 dev_dbg(chip->card->dev, 1927 "cs4231-%d: Unable to register EBUS capture DMA\n", 1928 dev); 1929 return -EBUSY; 1930 } 1931 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) { 1932 snd_cs4231_ebus_free(chip); 1933 dev_dbg(chip->card->dev, 1934 "cs4231-%d: Unable to enable EBUS capture IRQ\n", 1935 dev); 1936 return -EBUSY; 1937 } 1938 1939 if (ebus_dma_register(&chip->p_dma.ebus_info)) { 1940 snd_cs4231_ebus_free(chip); 1941 dev_dbg(chip->card->dev, 1942 "cs4231-%d: Unable to register EBUS play DMA\n", 1943 dev); 1944 return -EBUSY; 1945 } 1946 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) { 1947 snd_cs4231_ebus_free(chip); 1948 dev_dbg(chip->card->dev, 1949 "cs4231-%d: Unable to enable EBUS play IRQ\n", dev); 1950 return -EBUSY; 1951 } 1952 1953 if (snd_cs4231_probe(chip) < 0) { 1954 snd_cs4231_ebus_free(chip); 1955 return -ENODEV; 1956 } 1957 snd_cs4231_init(chip); 1958 1959 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, 1960 chip, &snd_cs4231_ebus_dev_ops); 1961 if (err < 0) { 1962 snd_cs4231_ebus_free(chip); 1963 return err; 1964 } 1965 1966 return 0; 1967} 1968 1969static int cs4231_ebus_probe(struct platform_device *op) 1970{ 1971 struct snd_card *card; 1972 int err; 1973 1974 err = cs4231_attach_begin(op, &card); 1975 if (err) 1976 return err; 1977 1978 sprintf(card->longname, "%s at 0x%llx, irq %d", 1979 card->shortname, 1980 op->resource[0].start, 1981 op->archdata.irqs[0]); 1982 1983 err = snd_cs4231_ebus_create(card, op, dev); 1984 if (err < 0) { 1985 snd_card_free(card); 1986 return err; 1987 } 1988 1989 return cs4231_attach_finish(card); 1990} 1991#endif 1992 1993static int cs4231_probe(struct platform_device *op) 1994{ 1995#ifdef EBUS_SUPPORT 1996 if (of_node_name_eq(op->dev.of_node->parent, "ebus")) 1997 return cs4231_ebus_probe(op); 1998#endif 1999#ifdef SBUS_SUPPORT 2000 if (of_node_name_eq(op->dev.of_node->parent, "sbus") || 2001 of_node_name_eq(op->dev.of_node->parent, "sbi")) 2002 return cs4231_sbus_probe(op); 2003#endif 2004 return -ENODEV; 2005} 2006 2007static void cs4231_remove(struct platform_device *op) 2008{ 2009 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev); 2010 2011 snd_card_free(chip->card); 2012} 2013 2014static const struct of_device_id cs4231_match[] = { 2015 { 2016 .name = "SUNW,CS4231", 2017 }, 2018 { 2019 .name = "audio", 2020 .compatible = "SUNW,CS4231", 2021 }, 2022 {}, 2023}; 2024 2025MODULE_DEVICE_TABLE(of, cs4231_match); 2026 2027static struct platform_driver cs4231_driver = { 2028 .driver = { 2029 .name = "audio", 2030 .of_match_table = cs4231_match, 2031 }, 2032 .probe = cs4231_probe, 2033 .remove = cs4231_remove, 2034}; 2035 2036module_platform_driver(cs4231_driver);
~/
Read-only file preview.