mt8365-afe-clk.h

 1/* SPDX-License-Identifier: GPL-2.0
 2 *
 3 * MediaTek 8365 AFE clock control definitions
 4 *
 5 * Copyright (c) 2024 MediaTek Inc.
 6 * Authors: Jia Zeng <jia.zeng@mediatek.com>
 7 *          Alexandre Mergnat <amergnat@baylibre.com>
 8 */
 9
10#ifndef _MT8365_AFE_UTILS_H_
11#define _MT8365_AFE_UTILS_H_
12
13struct mtk_base_afe;
14struct clk;
15
16int mt8365_afe_init_audio_clk(struct mtk_base_afe *afe);
17void mt8365_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk);
18int mt8365_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk, unsigned int rate);
19int mt8365_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk, struct clk *parent);
20int mt8365_afe_enable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type);
21int mt8365_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type);
22int mt8365_afe_enable_main_clk(struct mtk_base_afe *afe);
23int mt8365_afe_disable_main_clk(struct mtk_base_afe *afe);
24int mt8365_afe_emi_clk_on(struct mtk_base_afe *afe);
25int mt8365_afe_emi_clk_off(struct mtk_base_afe *afe);
26int mt8365_afe_enable_afe_on(struct mtk_base_afe *afe);
27int mt8365_afe_disable_afe_on(struct mtk_base_afe *afe);
28int mt8365_afe_enable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll);
29int mt8365_afe_disable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll);
30int mt8365_afe_enable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll);
31int mt8365_afe_disable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll);
32#endif