mt8195-dai-adda.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * MediaTek ALSA SoC Audio DAI ADDA Control
  4 *
  5 * Copyright (c) 2021 MediaTek Inc.
  6 * Author: Bicycle Tsai <bicycle.tsai@mediatek.com>
  7 *         Trevor Wu <trevor.wu@mediatek.com>
  8 */
  9
 10#include <linux/delay.h>
 11#include <linux/regmap.h>
 12#include "mt8195-afe-clk.h"
 13#include "mt8195-afe-common.h"
 14#include "mt8195-reg.h"
 15#include "../common/mtk-dai-adda-common.h"
 16
 17#define ADDA_DL_GAIN_LOOPBACK 0x1800
 18#define ADDA_HIRES_THRES 48000
 19
 20enum {
 21	SUPPLY_SEQ_CLOCK_SEL,
 22	SUPPLY_SEQ_CLOCK_ON,
 23	SUPPLY_SEQ_ADDA_DL_ON,
 24	SUPPLY_SEQ_ADDA_MTKAIF_CFG,
 25	SUPPLY_SEQ_ADDA_UL_ON,
 26	SUPPLY_SEQ_ADDA_AFE_ON,
 27};
 28
 29enum {
 30	MTK_AFE_ADDA,
 31	MTK_AFE_ADDA6,
 32};
 33
 34struct mtk_dai_adda_priv {
 35	bool hires_required;
 36};
 37
 38static int mt8195_adda_mtkaif_init(struct mtk_base_afe *afe)
 39{
 40	struct mt8195_afe_private *afe_priv = afe->platform_priv;
 41	struct mtkaif_param *param = &afe_priv->mtkaif_params;
 42	int delay_data;
 43	int delay_cycle;
 44	unsigned int mask = 0;
 45	unsigned int val = 0;
 46
 47	/* set rx protocol 2 & mtkaif_rxif_clkinv_adc inverse */
 48	mask = (MTKAIF_RXIF_CLKINV_ADC | MTKAIF_RXIF_PROTOCOL2);
 49	val = (MTKAIF_RXIF_CLKINV_ADC | MTKAIF_RXIF_PROTOCOL2);
 50
 51	regmap_update_bits(afe->regmap, AFE_ADDA_MTKAIF_CFG0, mask, val);
 52	regmap_update_bits(afe->regmap, AFE_ADDA6_MTKAIF_CFG0, mask, val);
 53
 54	mask = RG_RX_PROTOCOL2;
 55	val = RG_RX_PROTOCOL2;
 56	regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, mask, val);
 57
 58	if (!param->mtkaif_calibration_ok) {
 59		dev_info(afe->dev, "%s(), calibration fail\n",  __func__);
 60		return 0;
 61	}
 62
 63	/* set delay for ch1, ch2 */
 64	if (param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0] >=
 65	    param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1]) {
 66		delay_data = DELAY_DATA_MISO1;
 67		delay_cycle =
 68			param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0] -
 69			param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1];
 70	} else {
 71		delay_data = DELAY_DATA_MISO0;
 72		delay_cycle =
 73			param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1] -
 74			param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0];
 75	}
 76
 77	val = 0;
 78	mask = (MTKAIF_RXIF_DELAY_DATA | MTKAIF_RXIF_DELAY_CYCLE_MASK);
 79	val |= MTKAIF_RXIF_DELAY_CYCLE(delay_cycle) &
 80	       MTKAIF_RXIF_DELAY_CYCLE_MASK;
 81	val |= delay_data << MTKAIF_RXIF_DELAY_DATA_SHIFT;
 82	regmap_update_bits(afe->regmap, AFE_ADDA_MTKAIF_RX_CFG2, mask, val);
 83
 84	/* set delay between ch3 and ch2 */
 85	if (param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2] >=
 86	    param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1]) {
 87		delay_data = DELAY_DATA_MISO1;
 88		delay_cycle =
 89			param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2] -
 90			param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1];
 91	} else {
 92		delay_data = DELAY_DATA_MISO2;
 93		delay_cycle =
 94			param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1] -
 95			param->mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2];
 96	}
 97
 98	val = 0;
 99	mask = (MTKAIF_RXIF_DELAY_DATA | MTKAIF_RXIF_DELAY_CYCLE_MASK);
100	val |= MTKAIF_RXIF_DELAY_CYCLE(delay_cycle) &
101	       MTKAIF_RXIF_DELAY_CYCLE_MASK;
102	val |= delay_data << MTKAIF_RXIF_DELAY_DATA_SHIFT;
103	regmap_update_bits(afe->regmap, AFE_ADDA6_MTKAIF_RX_CFG2, mask, val);
104
105	return 0;
106}
107
108static int mtk_adda_mtkaif_cfg_event(struct snd_soc_dapm_widget *w,
109				     struct snd_kcontrol *kcontrol,
110				     int event)
111{
112	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
113	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
114
115	dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
116		__func__, w->name, event);
117
118	switch (event) {
119	case SND_SOC_DAPM_PRE_PMU:
120		mt8195_adda_mtkaif_init(afe);
121		break;
122	default:
123		break;
124	}
125
126	return 0;
127}
128
129static int mtk_adda_dl_event(struct snd_soc_dapm_widget *w,
130			     struct snd_kcontrol *kcontrol,
131			     int event)
132{
133	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
134	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
135
136	dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
137		__func__, w->name, event);
138
139	switch (event) {
140	case SND_SOC_DAPM_POST_PMD:
141		/* should delayed 1/fs(smallest is 8k) = 125us before afe off */
142		usleep_range(125, 135);
143		break;
144	default:
145		break;
146	}
147
148	return 0;
149}
150
151static void mtk_adda_ul_mictype(struct mtk_base_afe *afe, int adda, bool dmic)
152{
153	unsigned int reg = 0;
154	unsigned int mask = 0;
155	unsigned int val = 0;
156
157	switch (adda) {
158	case MTK_AFE_ADDA:
159		reg = AFE_ADDA_UL_SRC_CON0;
160		break;
161	case MTK_AFE_ADDA6:
162		reg = AFE_ADDA6_UL_SRC_CON0;
163		break;
164	default:
165		dev_info(afe->dev, "%s(), wrong parameter\n",  __func__);
166		return;
167	}
168
169	mask = (UL_SDM3_LEVEL_CTL | UL_MODE_3P25M_CH1_CTL |
170		UL_MODE_3P25M_CH2_CTL);
171
172	/* turn on dmic, ch1, ch2 */
173	if (dmic)
174		val = mask;
175
176	regmap_update_bits(afe->regmap, reg, mask, val);
177}
178
179static int mtk_adda_ul_event(struct snd_soc_dapm_widget *w,
180			     struct snd_kcontrol *kcontrol,
181			     int event)
182{
183	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
184	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
185	struct mt8195_afe_private *afe_priv = afe->platform_priv;
186	struct mtkaif_param *param = &afe_priv->mtkaif_params;
187
188	dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
189		__func__, w->name, event);
190
191	switch (event) {
192	case SND_SOC_DAPM_PRE_PMU:
193		mtk_adda_ul_mictype(afe, MTK_AFE_ADDA, param->mtkaif_dmic_on);
194		break;
195	case SND_SOC_DAPM_POST_PMD:
196		/* should delayed 1/fs(smallest is 8k) = 125us before afe off */
197		usleep_range(125, 135);
198		break;
199	default:
200		break;
201	}
202
203	return 0;
204}
205
206static int mtk_adda6_ul_event(struct snd_soc_dapm_widget *w,
207			      struct snd_kcontrol *kcontrol,
208			      int event)
209{
210	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
211	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
212	struct mt8195_afe_private *afe_priv = afe->platform_priv;
213	struct mtkaif_param *param = &afe_priv->mtkaif_params;
214	unsigned int val;
215
216	dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
217		__func__, w->name, event);
218
219	switch (event) {
220	case SND_SOC_DAPM_PRE_PMU:
221		mtk_adda_ul_mictype(afe, MTK_AFE_ADDA6, param->mtkaif_dmic_on);
222
223		val = (param->mtkaif_adda6_only ?
224			ADDA6_MTKAIF_RX_SYNC_WORD2_DISABLE : 0);
225
226		regmap_update_bits(afe->regmap,
227				   AFE_ADDA_MTKAIF_SYNCWORD_CFG,
228				   ADDA6_MTKAIF_RX_SYNC_WORD2_DISABLE,
229				   val);
230		break;
231	case SND_SOC_DAPM_POST_PMD:
232		/* should delayed 1/fs(smallest is 8k) = 125us before afe off */
233		usleep_range(125, 135);
234		break;
235	default:
236		break;
237	}
238
239	return 0;
240}
241
242static int mtk_audio_hires_event(struct snd_soc_dapm_widget *w,
243				 struct snd_kcontrol *kcontrol,
244				 int event)
245{
246	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
247	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
248	struct mt8195_afe_private *afe_priv = afe->platform_priv;
249	struct clk *clk = afe_priv->clk[MT8195_CLK_TOP_AUDIO_H_SEL];
250	struct clk *clk_parent;
251
252	dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
253		__func__, w->name, event);
254
255	switch (event) {
256	case SND_SOC_DAPM_PRE_PMU:
257		clk_parent = afe_priv->clk[MT8195_CLK_TOP_APLL1];
258		break;
259	case SND_SOC_DAPM_POST_PMD:
260		clk_parent = afe_priv->clk[MT8195_CLK_XTAL_26M];
261		break;
262	default:
263		return 0;
264	}
265	mt8195_afe_set_clk_parent(afe, clk, clk_parent);
266
267	return 0;
268}
269
270static struct mtk_dai_adda_priv *get_adda_priv_by_name(struct mtk_base_afe *afe,
271						       const char *name)
272{
273	struct mt8195_afe_private *afe_priv = afe->platform_priv;
274	int dai_id;
275
276	if (strstr(name, "aud_adc_hires"))
277		dai_id = MT8195_AFE_IO_UL_SRC1;
278	else if (strstr(name, "aud_adda6_adc_hires"))
279		dai_id = MT8195_AFE_IO_UL_SRC2;
280	else if (strstr(name, "aud_dac_hires"))
281		dai_id = MT8195_AFE_IO_DL_SRC;
282	else
283		return NULL;
284
285	return afe_priv->dai_priv[dai_id];
286}
287
288static int mtk_afe_adda_hires_connect(struct snd_soc_dapm_widget *source,
289				      struct snd_soc_dapm_widget *sink)
290{
291	struct snd_soc_dapm_widget *w = source;
292	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
293	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
294	struct mtk_dai_adda_priv *adda_priv;
295
296	adda_priv = get_adda_priv_by_name(afe, w->name);
297
298	if (!adda_priv) {
299		dev_info(afe->dev, "adda_priv == NULL");
300		return 0;
301	}
302
303	return (adda_priv->hires_required) ? 1 : 0;
304}
305
306static const struct snd_kcontrol_new mtk_dai_adda_o176_mix[] = {
307	SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN176, 0, 1, 0),
308	SOC_DAPM_SINGLE_AUTODISABLE("I002 Switch", AFE_CONN176, 2, 1, 0),
309	SOC_DAPM_SINGLE_AUTODISABLE("I020 Switch", AFE_CONN176, 20, 1, 0),
310	SOC_DAPM_SINGLE_AUTODISABLE("I022 Switch", AFE_CONN176, 22, 1, 0),
311	SOC_DAPM_SINGLE_AUTODISABLE("I070 Switch", AFE_CONN176_2, 6, 1, 0),
312};
313
314static const struct snd_kcontrol_new mtk_dai_adda_o177_mix[] = {
315	SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN177, 1, 1, 0),
316	SOC_DAPM_SINGLE_AUTODISABLE("I003 Switch", AFE_CONN177, 3, 1, 0),
317	SOC_DAPM_SINGLE_AUTODISABLE("I021 Switch", AFE_CONN177, 21, 1, 0),
318	SOC_DAPM_SINGLE_AUTODISABLE("I023 Switch", AFE_CONN177, 23, 1, 0),
319	SOC_DAPM_SINGLE_AUTODISABLE("I071 Switch", AFE_CONN177_2, 7, 1, 0),
320};
321
322static const char * const adda_dlgain_mux_map[] = {
323	"Bypass", "Connect",
324};
325
326static SOC_ENUM_SINGLE_DECL(adda_dlgain_mux_map_enum,
327			    SND_SOC_NOPM, 0,
328			    adda_dlgain_mux_map);
329
330static const struct snd_kcontrol_new adda_dlgain_mux_control =
331	SOC_DAPM_ENUM("DL_GAIN_MUX", adda_dlgain_mux_map_enum);
332
333static const struct snd_soc_dapm_widget mtk_dai_adda_widgets[] = {
334	SND_SOC_DAPM_MIXER("I168", SND_SOC_NOPM, 0, 0, NULL, 0),
335	SND_SOC_DAPM_MIXER("I169", SND_SOC_NOPM, 0, 0, NULL, 0),
336	SND_SOC_DAPM_MIXER("I170", SND_SOC_NOPM, 0, 0, NULL, 0),
337	SND_SOC_DAPM_MIXER("I171", SND_SOC_NOPM, 0, 0, NULL, 0),
338
339	SND_SOC_DAPM_MIXER("O176", SND_SOC_NOPM, 0, 0,
340			   mtk_dai_adda_o176_mix,
341			   ARRAY_SIZE(mtk_dai_adda_o176_mix)),
342	SND_SOC_DAPM_MIXER("O177", SND_SOC_NOPM, 0, 0,
343			   mtk_dai_adda_o177_mix,
344			   ARRAY_SIZE(mtk_dai_adda_o177_mix)),
345
346	SND_SOC_DAPM_SUPPLY_S("ADDA Enable", SUPPLY_SEQ_ADDA_AFE_ON,
347			      AFE_ADDA_UL_DL_CON0,
348			      ADDA_AFE_ON_SHIFT, 0,
349			      NULL,
350			      0),
351
352	SND_SOC_DAPM_SUPPLY_S("ADDA Playback Enable", SUPPLY_SEQ_ADDA_DL_ON,
353			      AFE_ADDA_DL_SRC2_CON0,
354			      DL_2_SRC_ON_TMP_CTRL_PRE_SHIFT, 0,
355			      mtk_adda_dl_event,
356			      SND_SOC_DAPM_POST_PMD),
357
358	SND_SOC_DAPM_SUPPLY_S("ADDA Capture Enable", SUPPLY_SEQ_ADDA_UL_ON,
359			      AFE_ADDA_UL_SRC_CON0,
360			      UL_SRC_ON_TMP_CTL_SHIFT, 0,
361			      mtk_adda_ul_event,
362			      SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
363
364	SND_SOC_DAPM_SUPPLY_S("ADDA6 Capture Enable", SUPPLY_SEQ_ADDA_UL_ON,
365			      AFE_ADDA6_UL_SRC_CON0,
366			      UL_SRC_ON_TMP_CTL_SHIFT, 0,
367			      mtk_adda6_ul_event,
368			      SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
369
370	SND_SOC_DAPM_SUPPLY_S("AUDIO_HIRES", SUPPLY_SEQ_CLOCK_SEL,
371			      SND_SOC_NOPM,
372			      0, 0,
373			      mtk_audio_hires_event,
374			      SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
375
376	SND_SOC_DAPM_SUPPLY_S("ADDA_MTKAIF_CFG", SUPPLY_SEQ_ADDA_MTKAIF_CFG,
377			      SND_SOC_NOPM,
378			      0, 0,
379			      mtk_adda_mtkaif_cfg_event,
380			      SND_SOC_DAPM_PRE_PMU),
381
382	SND_SOC_DAPM_MUX("DL_GAIN_MUX", SND_SOC_NOPM, 0, 0,
383			 &adda_dlgain_mux_control),
384
385	SND_SOC_DAPM_PGA("DL_GAIN", AFE_ADDA_DL_SRC2_CON0,
386			 DL_2_GAIN_ON_CTL_PRE_SHIFT, 0, NULL, 0),
387
388	SND_SOC_DAPM_INPUT("ADDA_INPUT"),
389	SND_SOC_DAPM_OUTPUT("ADDA_OUTPUT"),
390
391	SND_SOC_DAPM_CLOCK_SUPPLY("aud_dac"),
392	SND_SOC_DAPM_CLOCK_SUPPLY("aud_adc"),
393	SND_SOC_DAPM_CLOCK_SUPPLY("aud_adda6_adc"),
394	SND_SOC_DAPM_CLOCK_SUPPLY("aud_dac_hires"),
395	SND_SOC_DAPM_CLOCK_SUPPLY("aud_adc_hires"),
396	SND_SOC_DAPM_CLOCK_SUPPLY("aud_adda6_adc_hires"),
397};
398
399static const struct snd_soc_dapm_route mtk_dai_adda_routes[] = {
400	{"ADDA Capture", NULL, "ADDA Enable"},
401	{"ADDA Capture", NULL, "ADDA Capture Enable"},
402	{"ADDA Capture", NULL, "ADDA_MTKAIF_CFG"},
403	{"ADDA Capture", NULL, "aud_adc"},
404	{"ADDA Capture", NULL, "aud_adc_hires", mtk_afe_adda_hires_connect},
405	{"aud_adc_hires", NULL, "AUDIO_HIRES"},
406
407	{"ADDA6 Capture", NULL, "ADDA Enable"},
408	{"ADDA6 Capture", NULL, "ADDA6 Capture Enable"},
409	{"ADDA6 Capture", NULL, "ADDA_MTKAIF_CFG"},
410	{"ADDA6 Capture", NULL, "aud_adda6_adc"},
411	{"ADDA6 Capture", NULL, "aud_adda6_adc_hires",
412	mtk_afe_adda_hires_connect},
413	{"aud_adda6_adc_hires", NULL, "AUDIO_HIRES"},
414
415	{"I168", NULL, "ADDA Capture"},
416	{"I169", NULL, "ADDA Capture"},
417	{"I170", NULL, "ADDA6 Capture"},
418	{"I171", NULL, "ADDA6 Capture"},
419
420	{"ADDA Playback", NULL, "ADDA Enable"},
421	{"ADDA Playback", NULL, "ADDA Playback Enable"},
422	{"ADDA Playback", NULL, "aud_dac"},
423	{"ADDA Playback", NULL, "aud_dac_hires", mtk_afe_adda_hires_connect},
424	{"aud_dac_hires", NULL, "AUDIO_HIRES"},
425
426	{"DL_GAIN", NULL, "O176"},
427	{"DL_GAIN", NULL, "O177"},
428
429	{"DL_GAIN_MUX", "Bypass", "O176"},
430	{"DL_GAIN_MUX", "Bypass", "O177"},
431	{"DL_GAIN_MUX", "Connect", "DL_GAIN"},
432
433	{"ADDA Playback", NULL, "DL_GAIN_MUX"},
434
435	{"O176", "I000 Switch", "I000"},
436	{"O177", "I001 Switch", "I001"},
437
438	{"O176", "I002 Switch", "I002"},
439	{"O177", "I003 Switch", "I003"},
440
441	{"O176", "I020 Switch", "I020"},
442	{"O177", "I021 Switch", "I021"},
443
444	{"O176", "I022 Switch", "I022"},
445	{"O177", "I023 Switch", "I023"},
446
447	{"O176", "I070 Switch", "I070"},
448	{"O177", "I071 Switch", "I071"},
449
450	{"ADDA Capture", NULL, "ADDA_INPUT"},
451	{"ADDA6 Capture", NULL, "ADDA_INPUT"},
452	{"ADDA_OUTPUT", NULL, "ADDA Playback"},
453};
454
455static int mt8195_adda_dl_gain_put(struct snd_kcontrol *kcontrol,
456				   struct snd_ctl_elem_value *ucontrol)
457{
458	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
459	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
460	unsigned int reg = AFE_ADDA_DL_SRC2_CON1;
461	unsigned int mask = DL_2_GAIN_CTL_PRE_MASK;
462	unsigned int value = (unsigned int)(ucontrol->value.integer.value[0]);
463
464	regmap_update_bits(afe->regmap, reg, mask, DL_2_GAIN_CTL_PRE(value));
465	return 0;
466}
467
468static int mt8195_adda_dl_gain_get(struct snd_kcontrol *kcontrol,
469				   struct snd_ctl_elem_value *ucontrol)
470{
471	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
472	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
473	unsigned int reg = AFE_ADDA_DL_SRC2_CON1;
474	unsigned int mask = DL_2_GAIN_CTL_PRE_MASK;
475	unsigned int value = 0;
476
477	regmap_read(afe->regmap, reg, &value);
478
479	ucontrol->value.integer.value[0] = ((value & mask) >>
480					    DL_2_GAIN_CTL_PRE_SHIFT);
481	return 0;
482}
483
484static int mt8195_adda6_only_get(struct snd_kcontrol *kcontrol,
485				 struct snd_ctl_elem_value *ucontrol)
486{
487	struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
488	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
489	struct mt8195_afe_private *afe_priv = afe->platform_priv;
490	struct mtkaif_param *param = &afe_priv->mtkaif_params;
491
492	ucontrol->value.integer.value[0] = param->mtkaif_adda6_only;
493	return 0;
494}
495
496static int mt8195_adda6_only_set(struct snd_kcontrol *kcontrol,
497				 struct snd_ctl_elem_value *ucontrol)
498{
499	struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
500	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
501	struct mt8195_afe_private *afe_priv = afe->platform_priv;
502	struct mtkaif_param *param = &afe_priv->mtkaif_params;
503	int mtkaif_adda6_only;
504
505	mtkaif_adda6_only = ucontrol->value.integer.value[0];
506
507	dev_info(afe->dev, "%s(), kcontrol name %s, mtkaif_adda6_only %d\n",
508		 __func__, kcontrol->id.name, mtkaif_adda6_only);
509
510	param->mtkaif_adda6_only = mtkaif_adda6_only;
511
512	return 0;
513}
514
515static int mt8195_adda_dmic_get(struct snd_kcontrol *kcontrol,
516				struct snd_ctl_elem_value *ucontrol)
517{
518	struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
519	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
520	struct mt8195_afe_private *afe_priv = afe->platform_priv;
521	struct mtkaif_param *param = &afe_priv->mtkaif_params;
522
523	ucontrol->value.integer.value[0] = param->mtkaif_dmic_on;
524	return 0;
525}
526
527static int mt8195_adda_dmic_set(struct snd_kcontrol *kcontrol,
528				struct snd_ctl_elem_value *ucontrol)
529{
530	struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
531	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
532	struct mt8195_afe_private *afe_priv = afe->platform_priv;
533	struct mtkaif_param *param = &afe_priv->mtkaif_params;
534	int dmic_on;
535
536	dmic_on = ucontrol->value.integer.value[0];
537
538	dev_dbg(afe->dev, "%s(), kcontrol name %s, dmic_on %d\n",
539		__func__, kcontrol->id.name, dmic_on);
540
541	param->mtkaif_dmic_on = dmic_on;
542	return 0;
543}
544
545static const struct snd_kcontrol_new mtk_dai_adda_controls[] = {
546	SOC_SINGLE_EXT("ADDA_DL_Gain", SND_SOC_NOPM, 0, 65535, 0,
547		       mt8195_adda_dl_gain_get, mt8195_adda_dl_gain_put),
548	SOC_SINGLE_BOOL_EXT("MTKAIF_DMIC", 0,
549			    mt8195_adda_dmic_get, mt8195_adda_dmic_set),
550	SOC_SINGLE_BOOL_EXT("MTKAIF_ADDA6_ONLY", 0,
551			    mt8195_adda6_only_get,
552			    mt8195_adda6_only_set),
553};
554
555static int mtk_dai_da_configure(struct mtk_base_afe *afe,
556				unsigned int rate, int id)
557{
558	unsigned int val = 0;
559	unsigned int mask = 0;
560
561	/* set sampling rate */
562	mask |= DL_2_INPUT_MODE_CTL_MASK;
563	val |= DL_2_INPUT_MODE_CTL(mtk_adda_dl_rate_transform(afe, rate));
564
565	/* turn off saturation */
566	mask |= DL_2_CH1_SATURATION_EN_CTL;
567	mask |= DL_2_CH2_SATURATION_EN_CTL;
568
569	/* turn off mute function */
570	mask |= DL_2_MUTE_CH1_OFF_CTL_PRE;
571	mask |= DL_2_MUTE_CH2_OFF_CTL_PRE;
572	val |= DL_2_MUTE_CH1_OFF_CTL_PRE;
573	val |= DL_2_MUTE_CH2_OFF_CTL_PRE;
574
575	/* set voice input data if input sample rate is 8k or 16k */
576	mask |= DL_2_VOICE_MODE_CTL_PRE;
577	if (rate == 8000 || rate == 16000)
578		val |= DL_2_VOICE_MODE_CTL_PRE;
579
580	regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, mask, val);
581
582	mask = 0;
583	val = 0;
584
585	/* new 2nd sdm */
586	mask |= DL_USE_NEW_2ND_SDM;
587	val |= DL_USE_NEW_2ND_SDM;
588	regmap_update_bits(afe->regmap, AFE_ADDA_DL_SDM_DCCOMP_CON, mask, val);
589
590	return 0;
591}
592
593static int mtk_dai_ad_configure(struct mtk_base_afe *afe,
594				unsigned int rate, int id)
595{
596	unsigned int val = 0;
597	unsigned int mask = 0;
598
599	mask |= UL_VOICE_MODE_CTL_MASK;
600	val |= UL_VOICE_MODE_CTL(mtk_adda_ul_rate_transform(afe, rate));
601
602	switch (id) {
603	case MT8195_AFE_IO_UL_SRC1:
604		regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0,
605				   mask, val);
606		break;
607	case MT8195_AFE_IO_UL_SRC2:
608		regmap_update_bits(afe->regmap, AFE_ADDA6_UL_SRC_CON0,
609				   mask, val);
610		break;
611	default:
612		break;
613	}
614	return 0;
615}
616
617static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream,
618				  struct snd_pcm_hw_params *params,
619				  struct snd_soc_dai *dai)
620{
621	struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
622	struct mt8195_afe_private *afe_priv = afe->platform_priv;
623	struct mtk_dai_adda_priv *adda_priv;
624	unsigned int rate = params_rate(params);
625	int ret;
626
627	if (dai->id != MT8195_AFE_IO_DL_SRC &&
628	    dai->id != MT8195_AFE_IO_UL_SRC1 &&
629	    dai->id != MT8195_AFE_IO_UL_SRC2)
630		return -EINVAL;
631	adda_priv = afe_priv->dai_priv[dai->id];
632
633	dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %d\n",
634		__func__, dai->id, substream->stream, rate);
635
636	if (rate > ADDA_HIRES_THRES)
637		adda_priv->hires_required = 1;
638	else
639		adda_priv->hires_required = 0;
640
641	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
642		ret = mtk_dai_da_configure(afe, rate, dai->id);
643	else
644		ret = mtk_dai_ad_configure(afe, rate, dai->id);
645
646	return ret;
647}
648
649static const struct snd_soc_dai_ops mtk_dai_adda_ops = {
650	.hw_params = mtk_dai_adda_hw_params,
651};
652
653/* dai driver */
654#define MTK_ADDA_PLAYBACK_RATES (SNDRV_PCM_RATE_8000_48000 |\
655				 SNDRV_PCM_RATE_96000 |\
656				 SNDRV_PCM_RATE_192000)
657
658#define MTK_ADDA_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
659				SNDRV_PCM_RATE_16000 |\
660				SNDRV_PCM_RATE_32000 |\
661				SNDRV_PCM_RATE_48000 |\
662				SNDRV_PCM_RATE_96000 |\
663				SNDRV_PCM_RATE_192000)
664
665#define MTK_ADDA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
666			  SNDRV_PCM_FMTBIT_S24_LE |\
667			  SNDRV_PCM_FMTBIT_S32_LE)
668
669static struct snd_soc_dai_driver mtk_dai_adda_driver[] = {
670	{
671		.name = "DL_SRC",
672		.id = MT8195_AFE_IO_DL_SRC,
673		.playback = {
674			.stream_name = "ADDA Playback",
675			.channels_min = 1,
676			.channels_max = 2,
677			.rates = MTK_ADDA_PLAYBACK_RATES,
678			.formats = MTK_ADDA_FORMATS,
679		},
680		.ops = &mtk_dai_adda_ops,
681	},
682	{
683		.name = "UL_SRC1",
684		.id = MT8195_AFE_IO_UL_SRC1,
685		.capture = {
686			.stream_name = "ADDA Capture",
687			.channels_min = 1,
688			.channels_max = 2,
689			.rates = MTK_ADDA_CAPTURE_RATES,
690			.formats = MTK_ADDA_FORMATS,
691		},
692		.ops = &mtk_dai_adda_ops,
693	},
694	{
695		.name = "UL_SRC2",
696		.id = MT8195_AFE_IO_UL_SRC2,
697		.capture = {
698			.stream_name = "ADDA6 Capture",
699			.channels_min = 1,
700			.channels_max = 2,
701			.rates = MTK_ADDA_CAPTURE_RATES,
702			.formats = MTK_ADDA_FORMATS,
703		},
704		.ops = &mtk_dai_adda_ops,
705	},
706};
707
708static int init_adda_priv_data(struct mtk_base_afe *afe)
709{
710	struct mt8195_afe_private *afe_priv = afe->platform_priv;
711	struct mtk_dai_adda_priv *adda_priv;
712	static const int adda_dai_list[] = {
713		MT8195_AFE_IO_DL_SRC,
714		MT8195_AFE_IO_UL_SRC1,
715		MT8195_AFE_IO_UL_SRC2
716	};
717	int i;
718
719	for (i = 0; i < ARRAY_SIZE(adda_dai_list); i++) {
720		adda_priv = devm_kzalloc(afe->dev,
721					 sizeof(struct mtk_dai_adda_priv),
722					 GFP_KERNEL);
723		if (!adda_priv)
724			return -ENOMEM;
725
726		afe_priv->dai_priv[adda_dai_list[i]] = adda_priv;
727	}
728
729	return 0;
730}
731
732int mt8195_dai_adda_register(struct mtk_base_afe *afe)
733{
734	struct mtk_base_afe_dai *dai;
735
736	dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
737	if (!dai)
738		return -ENOMEM;
739
740	list_add(&dai->list, &afe->sub_dais);
741
742	dai->dai_drivers = mtk_dai_adda_driver;
743	dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_adda_driver);
744
745	dai->dapm_widgets = mtk_dai_adda_widgets;
746	dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_adda_widgets);
747	dai->dapm_routes = mtk_dai_adda_routes;
748	dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_adda_routes);
749	dai->controls = mtk_dai_adda_controls;
750	dai->num_controls = ARRAY_SIZE(mtk_dai_adda_controls);
751
752	return init_adda_priv_data(afe);
753}