cht_bsw_rt5672.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 *  cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
  4 *                     Cherrytrail and Braswell, with RT5672 codec.
  5 *
  6 *  Copyright (C) 2014 Intel Corp
  7 *  Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
  8 *          Mengdong Lin <mengdong.lin@intel.com>
  9 */
 10
 11#include <linux/gpio/consumer.h>
 12#include <linux/input.h>
 13#include <linux/module.h>
 14#include <linux/platform_device.h>
 15#include <linux/slab.h>
 16#include <linux/clk.h>
 17#include <linux/string.h>
 18#include <sound/pcm.h>
 19#include <sound/pcm_params.h>
 20#include <sound/soc.h>
 21#include <sound/jack.h>
 22#include <sound/soc-acpi.h>
 23#include "../../codecs/rt5670.h"
 24#include "../atom/sst-atom-controls.h"
 25#include "../common/soc-intel-quirks.h"
 26
 27
 28/* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
 29#define CHT_PLAT_CLK_3_HZ	19200000
 30#define CHT_CODEC_DAI	"rt5670-aif1"
 31
 32struct cht_mc_private {
 33	struct snd_soc_jack headset;
 34	char codec_name[SND_ACPI_I2C_ID_LEN];
 35	struct clk *mclk;
 36	bool use_ssp0;
 37};
 38
 39/* Headset jack detection DAPM pins */
 40static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
 41	{
 42		.pin = "Headset Mic",
 43		.mask = SND_JACK_MICROPHONE,
 44	},
 45	{
 46		.pin = "Headphone",
 47		.mask = SND_JACK_HEADPHONE,
 48	},
 49};
 50
 51static int platform_clock_control(struct snd_soc_dapm_widget *w,
 52		struct snd_kcontrol *k, int  event)
 53{
 54	struct snd_soc_card *card = snd_soc_dapm_to_card(w->dapm);
 55	struct snd_soc_dai *codec_dai;
 56	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
 57	int ret;
 58
 59	codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
 60	if (!codec_dai) {
 61		dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
 62		return -EIO;
 63	}
 64
 65	if (SND_SOC_DAPM_EVENT_ON(event)) {
 66		if (ctx->mclk) {
 67			ret = clk_prepare_enable(ctx->mclk);
 68			if (ret < 0) {
 69				dev_err(card->dev,
 70					"could not configure MCLK state");
 71				return ret;
 72			}
 73		}
 74
 75		/* set codec PLL source to the 19.2MHz platform clock (MCLK) */
 76		ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
 77				CHT_PLAT_CLK_3_HZ, 48000 * 512);
 78		if (ret < 0) {
 79			dev_err(card->dev, "can't set codec pll: %d\n", ret);
 80			return ret;
 81		}
 82
 83		/* set codec sysclk source to PLL */
 84		ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
 85			48000 * 512, SND_SOC_CLOCK_IN);
 86		if (ret < 0) {
 87			dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
 88			return ret;
 89		}
 90	} else {
 91		/* Set codec sysclk source to its internal clock because codec
 92		 * PLL will be off when idle and MCLK will also be off by ACPI
 93		 * when codec is runtime suspended. Codec needs clock for jack
 94		 * detection and button press.
 95		 */
 96		ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
 97					     48000 * 512, SND_SOC_CLOCK_IN);
 98		if (ret < 0) {
 99			dev_err(card->dev, "failed to set codec sysclk: %d\n", ret);
100			return ret;
101		}
102
103		if (ctx->mclk)
104			clk_disable_unprepare(ctx->mclk);
105	}
106	return 0;
107}
108
109static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
110	SND_SOC_DAPM_HP("Headphone", NULL),
111	SND_SOC_DAPM_MIC("Headset Mic", NULL),
112	SND_SOC_DAPM_MIC("Int Mic", NULL),
113	SND_SOC_DAPM_SPK("Ext Spk", NULL),
114	SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
115			platform_clock_control, SND_SOC_DAPM_PRE_PMU |
116			SND_SOC_DAPM_POST_PMD),
117};
118
119static const struct snd_soc_dapm_route cht_audio_map[] = {
120	{"IN1P", NULL, "Headset Mic"},
121	{"IN1N", NULL, "Headset Mic"},
122	{"DMIC L1", NULL, "Int Mic"},
123	{"DMIC R1", NULL, "Int Mic"},
124	{"Headphone", NULL, "HPOL"},
125	{"Headphone", NULL, "HPOR"},
126	{"Ext Spk", NULL, "SPOLP"},
127	{"Ext Spk", NULL, "SPOLN"},
128	{"Ext Spk", NULL, "SPORP"},
129	{"Ext Spk", NULL, "SPORN"},
130	{"Headphone", NULL, "Platform Clock"},
131	{"Headset Mic", NULL, "Platform Clock"},
132	{"Int Mic", NULL, "Platform Clock"},
133	{"Ext Spk", NULL, "Platform Clock"},
134};
135
136static const struct snd_soc_dapm_route cht_audio_ssp0_map[] = {
137	{"AIF1 Playback", NULL, "ssp0 Tx"},
138	{"ssp0 Tx", NULL, "modem_out"},
139	{"modem_in", NULL, "ssp0 Rx"},
140	{"ssp0 Rx", NULL, "AIF1 Capture"},
141};
142
143static const struct snd_soc_dapm_route cht_audio_ssp2_map[] = {
144	{"AIF1 Playback", NULL, "ssp2 Tx"},
145	{"ssp2 Tx", NULL, "codec_out0"},
146	{"ssp2 Tx", NULL, "codec_out1"},
147	{"codec_in0", NULL, "ssp2 Rx"},
148	{"codec_in1", NULL, "ssp2 Rx"},
149	{"ssp2 Rx", NULL, "AIF1 Capture"},
150};
151
152static const struct snd_kcontrol_new cht_mc_controls[] = {
153	SOC_DAPM_PIN_SWITCH("Headphone"),
154	SOC_DAPM_PIN_SWITCH("Headset Mic"),
155	SOC_DAPM_PIN_SWITCH("Int Mic"),
156	SOC_DAPM_PIN_SWITCH("Ext Spk"),
157};
158
159static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
160					struct snd_pcm_hw_params *params)
161{
162	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
163	struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
164	int ret;
165
166	/* set codec PLL source to the 19.2MHz platform clock (MCLK) */
167	ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
168				  CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
169	if (ret < 0) {
170		dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
171		return ret;
172	}
173
174	/* set codec sysclk source to PLL */
175	ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
176				     params_rate(params) * 512,
177				     SND_SOC_CLOCK_IN);
178	if (ret < 0) {
179		dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
180		return ret;
181	}
182	return 0;
183}
184
185static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
186
187static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
188	{ "headset-gpios", &headset_gpios, 1 },
189	{},
190};
191
192static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
193{
194	int ret;
195	struct snd_soc_dapm_context *dapm = snd_soc_card_to_dapm(runtime->card);
196	struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(runtime, 0);
197	struct snd_soc_component *component = codec_dai->component;
198	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
199
200	if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
201		dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
202
203	/* Select codec ASRC clock source to track I2S1 clock, because codec
204	 * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
205	 * be supported by RT5672. Otherwise, ASRC will be disabled and cause
206	 * noise.
207	 */
208	rt5670_sel_asrc_clk_src(component,
209				RT5670_DA_STEREO_FILTER
210				| RT5670_DA_MONO_L_FILTER
211				| RT5670_DA_MONO_R_FILTER
212				| RT5670_AD_STEREO_FILTER
213				| RT5670_AD_MONO_L_FILTER
214				| RT5670_AD_MONO_R_FILTER,
215				RT5670_CLK_SEL_I2S1_ASRC);
216
217	if (ctx->use_ssp0) {
218		ret = snd_soc_dapm_add_routes(dapm,
219					      cht_audio_ssp0_map,
220					      ARRAY_SIZE(cht_audio_ssp0_map));
221	} else {
222		ret = snd_soc_dapm_add_routes(dapm,
223					      cht_audio_ssp2_map,
224					      ARRAY_SIZE(cht_audio_ssp2_map));
225	}
226	if (ret)
227		return ret;
228
229	ret = snd_soc_card_jack_new_pins(runtime->card, "Headset",
230					 SND_JACK_HEADSET | SND_JACK_BTN_0 |
231					 SND_JACK_BTN_1 | SND_JACK_BTN_2,
232					 &ctx->headset,
233					 cht_bsw_headset_pins,
234					 ARRAY_SIZE(cht_bsw_headset_pins));
235        if (ret)
236                return ret;
237
238	snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
239	snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
240	snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
241
242	rt5670_set_jack_detect(component, &ctx->headset);
243	if (ctx->mclk) {
244		/*
245		 * The firmware might enable the clock at
246		 * boot (this information may or may not
247		 * be reflected in the enable clock register).
248		 * To change the rate we must disable the clock
249		 * first to cover these cases. Due to common
250		 * clock framework restrictions that do not allow
251		 * to disable a clock that has not been enabled,
252		 * we need to enable the clock first.
253		 */
254		ret = clk_prepare_enable(ctx->mclk);
255		if (!ret)
256			clk_disable_unprepare(ctx->mclk);
257
258		ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
259
260		if (ret) {
261			dev_err(runtime->dev, "unable to set MCLK rate\n");
262			return ret;
263		}
264	}
265	return 0;
266}
267
268static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
269			    struct snd_pcm_hw_params *params)
270{
271	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(rtd->card);
272	struct snd_interval *rate = hw_param_interval(params,
273			SNDRV_PCM_HW_PARAM_RATE);
274	struct snd_interval *channels = hw_param_interval(params,
275						SNDRV_PCM_HW_PARAM_CHANNELS);
276	int ret, bits;
277
278	/* The DSP will convert the FE rate to 48k, stereo, 24bits */
279	rate->min = rate->max = 48000;
280	channels->min = channels->max = 2;
281
282	if (ctx->use_ssp0) {
283		/* set SSP0 to 16-bit */
284		params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
285		bits = 16;
286	} else {
287		/* set SSP2 to 24-bit */
288		params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
289		bits = 24;
290	}
291
292	/*
293	 * The default mode for the cpu-dai is TDM 4 slot. The default mode
294	 * for the codec-dai is I2S. So we need to either set the cpu-dai to
295	 * I2S mode to match the codec-dai, or set the codec-dai to TDM 4 slot
296	 * (or program both to yet another mode).
297	 * One board, the Lenovo Miix 2 10, uses not 1 but 2 codecs connected
298	 * to SSP2. The second piggy-backed, output-only codec is inside the
299	 * keyboard-dock (which has extra speakers). Unlike the main rt5672
300	 * codec, we cannot configure this codec, it is hard coded to use
301	 * 2 channel 24 bit I2S. For this to work we must use I2S mode on this
302	 * board. Since we only support 2 channels anyways, there is no need
303	 * for TDM on any cht-bsw-rt5672 designs. So we use I2S 2ch everywhere.
304	 */
305	ret = snd_soc_dai_set_fmt(snd_soc_rtd_to_cpu(rtd, 0),
306				  SND_SOC_DAIFMT_I2S     |
307				  SND_SOC_DAIFMT_NB_NF   |
308				  SND_SOC_DAIFMT_BP_FP);
309	if (ret < 0) {
310		dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
311		return ret;
312	}
313
314	ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
315	if (ret < 0) {
316		dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
317		return ret;
318	}
319
320	return 0;
321}
322
323static int cht_aif1_startup(struct snd_pcm_substream *substream)
324{
325	return snd_pcm_hw_constraint_single(substream->runtime,
326			SNDRV_PCM_HW_PARAM_RATE, 48000);
327}
328
329static const struct snd_soc_ops cht_aif1_ops = {
330	.startup = cht_aif1_startup,
331};
332
333static const struct snd_soc_ops cht_be_ssp2_ops = {
334	.hw_params = cht_aif1_hw_params,
335};
336
337SND_SOC_DAILINK_DEF(dummy,
338	DAILINK_COMP_ARRAY(COMP_DUMMY()));
339
340SND_SOC_DAILINK_DEF(media,
341	DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai")));
342
343SND_SOC_DAILINK_DEF(deepbuffer,
344	DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai")));
345
346SND_SOC_DAILINK_DEF(ssp2_port,
347	DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port")));
348SND_SOC_DAILINK_DEF(ssp2_codec,
349	DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5670:00",
350				      "rt5670-aif1")));
351
352SND_SOC_DAILINK_DEF(platform,
353	DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform")));
354
355static struct snd_soc_dai_link cht_dailink[] = {
356	/* Front End DAI links */
357	[MERR_DPCM_AUDIO] = {
358		.name = "Audio Port",
359		.stream_name = "Audio",
360		.nonatomic = true,
361		.dynamic = 1,
362		.ops = &cht_aif1_ops,
363		SND_SOC_DAILINK_REG(media, dummy, platform),
364	},
365	[MERR_DPCM_DEEP_BUFFER] = {
366		.name = "Deep-Buffer Audio Port",
367		.stream_name = "Deep-Buffer Audio",
368		.nonatomic = true,
369		.dynamic = 1,
370		.playback_only = 1,
371		.ops = &cht_aif1_ops,
372		SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
373	},
374
375	/* Back End DAI links */
376	{
377		/* SSP2 - Codec */
378		.name = "SSP2-Codec",
379		.id = 0,
380		.no_pcm = 1,
381		.init = cht_codec_init,
382		.be_hw_params_fixup = cht_codec_fixup,
383		.ops = &cht_be_ssp2_ops,
384		SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform),
385	},
386};
387
388static int cht_suspend_pre(struct snd_soc_card *card)
389{
390	struct snd_soc_component *component;
391	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
392
393	for_each_card_components(card, component) {
394		if (!strncmp(component->name,
395			     ctx->codec_name, sizeof(ctx->codec_name))) {
396
397			dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
398			rt5670_jack_suspend(component);
399			break;
400		}
401	}
402	return 0;
403}
404
405static int cht_resume_post(struct snd_soc_card *card)
406{
407	struct snd_soc_component *component;
408	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
409
410	for_each_card_components(card, component) {
411		if (!strncmp(component->name,
412			     ctx->codec_name, sizeof(ctx->codec_name))) {
413
414			dev_dbg(component->dev, "enabling jack detect for resume.\n");
415			rt5670_jack_resume(component);
416			break;
417		}
418	}
419
420	return 0;
421}
422
423/* use space before codec name to simplify card ID, and simplify driver name */
424#define SOF_CARD_NAME "bytcht rt5672" /* card name will be 'sof-bytcht rt5672' */
425#define SOF_DRIVER_NAME "SOF"
426
427#define CARD_NAME "cht-bsw-rt5672"
428#define DRIVER_NAME NULL /* card name will be used for driver name */
429
430/* SoC card */
431static struct snd_soc_card snd_soc_card_cht = {
432	.owner = THIS_MODULE,
433	.dai_link = cht_dailink,
434	.num_links = ARRAY_SIZE(cht_dailink),
435	.dapm_widgets = cht_dapm_widgets,
436	.num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
437	.dapm_routes = cht_audio_map,
438	.num_dapm_routes = ARRAY_SIZE(cht_audio_map),
439	.controls = cht_mc_controls,
440	.num_controls = ARRAY_SIZE(cht_mc_controls),
441	.suspend_pre = cht_suspend_pre,
442	.resume_post = cht_resume_post,
443};
444
445#define RT5672_I2C_DEFAULT	"i2c-10EC5670:00"
446
447static int snd_cht_mc_probe(struct platform_device *pdev)
448{
449	int ret_val = 0;
450	struct cht_mc_private *drv;
451	struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
452	const char *platform_name;
453	struct acpi_device *adev;
454	bool sof_parent;
455	int dai_index = 0;
456	int i;
457
458	drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
459	if (!drv)
460		return -ENOMEM;
461
462	strscpy(drv->codec_name, RT5672_I2C_DEFAULT, sizeof(drv->codec_name));
463
464	/* find index of codec dai */
465	for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
466		if (cht_dailink[i].num_codecs &&
467		    !strcmp(cht_dailink[i].codecs->name, RT5672_I2C_DEFAULT)) {
468			dai_index = i;
469			break;
470		}
471	}
472
473	/* fixup codec name based on HID */
474	adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
475	if (adev) {
476		snprintf(drv->codec_name, sizeof(drv->codec_name),
477			 "i2c-%s", acpi_dev_name(adev));
478		cht_dailink[dai_index].codecs->name = drv->codec_name;
479	}  else {
480		dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
481		return -ENOENT;
482	}
483
484	acpi_dev_put(adev);
485
486	/* Use SSP0 on Bay Trail CR devices */
487	if (soc_intel_is_byt() && mach->mach_params.acpi_ipc_irq_index == 0) {
488		cht_dailink[dai_index].cpus->dai_name = "ssp0-port";
489		drv->use_ssp0 = true;
490	}
491
492	/* override platform name, if required */
493	snd_soc_card_cht.dev = &pdev->dev;
494	platform_name = mach->mach_params.platform;
495
496	ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
497							platform_name);
498	if (ret_val)
499		return ret_val;
500
501	snd_soc_card_cht.components = rt5670_components();
502
503	drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
504	if (IS_ERR(drv->mclk)) {
505		dev_err(&pdev->dev,
506			"Failed to get MCLK from pmc_plt_clk_3: %ld\n",
507			PTR_ERR(drv->mclk));
508		return PTR_ERR(drv->mclk);
509	}
510	snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
511
512	sof_parent = snd_soc_acpi_sof_parent(&pdev->dev);
513
514	/* set card and driver name */
515	if (sof_parent) {
516		snd_soc_card_cht.name = SOF_CARD_NAME;
517		snd_soc_card_cht.driver_name = SOF_DRIVER_NAME;
518	} else {
519		snd_soc_card_cht.name = CARD_NAME;
520		snd_soc_card_cht.driver_name = DRIVER_NAME;
521	}
522
523	/* set pm ops */
524	if (sof_parent)
525		pdev->dev.driver->pm = &snd_soc_pm_ops;
526
527	/* register the soc card */
528	ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
529	if (ret_val) {
530		dev_err(&pdev->dev,
531			"snd_soc_register_card failed %d\n", ret_val);
532		return ret_val;
533	}
534	platform_set_drvdata(pdev, &snd_soc_card_cht);
535	return ret_val;
536}
537
538static struct platform_driver snd_cht_mc_driver = {
539	.driver = {
540		.name = "cht-bsw-rt5672",
541	},
542	.probe = snd_cht_mc_probe,
543};
544
545module_platform_driver(snd_cht_mc_driver);
546
547MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
548MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
549MODULE_LICENSE("GPL v2");
550MODULE_ALIAS("platform:cht-bsw-rt5672");