messages.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright(c) 2021-2022 Intel Corporation
   4 *
   5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com>
   6 *          Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
   7 */
   8
   9#ifndef __SOUND_SOC_INTEL_AVS_MSGS_H
  10#define __SOUND_SOC_INTEL_AVS_MSGS_H
  11
  12#include <linux/sizes.h>
  13
  14struct avs_dev;
  15
  16#define AVS_MAILBOX_SIZE SZ_4K
  17
  18enum avs_msg_target {
  19	AVS_FW_GEN_MSG = 0,
  20	AVS_MOD_MSG = 1
  21};
  22
  23enum avs_msg_direction {
  24	AVS_MSG_REQUEST = 0,
  25	AVS_MSG_REPLY = 1
  26};
  27
  28enum avs_global_msg_type {
  29	AVS_GLB_ROM_CONTROL = 1,
  30	AVS_GLB_LOAD_MULTIPLE_MODULES = 15,
  31	AVS_GLB_UNLOAD_MULTIPLE_MODULES = 16,
  32	AVS_GLB_CREATE_PIPELINE = 17,
  33	AVS_GLB_DELETE_PIPELINE = 18,
  34	AVS_GLB_SET_PIPELINE_STATE = 19,
  35	AVS_GLB_GET_PIPELINE_STATE = 20,
  36	AVS_GLB_LOAD_LIBRARY = 24,
  37	AVS_GLB_NOTIFICATION = 27,
  38};
  39
  40union avs_global_msg {
  41	u64 val;
  42	struct {
  43		union {
  44			u32 primary;
  45			struct {
  46				u32 rsvd:24;
  47				u32 global_msg_type:5;
  48				u32 msg_direction:1;
  49				u32 msg_target:1;
  50			};
  51			/* set boot config */
  52			struct {
  53				u32 rom_ctrl_msg_type:9;
  54				u32 dma_id:5;
  55				u32 purge_request:1;
  56			} boot_cfg;
  57			/* module loading */
  58			struct {
  59				u32 mod_cnt:8;
  60			} load_multi_mods;
  61			/* pipeline management */
  62			struct {
  63				u32 ppl_mem_size:11;
  64				u32 ppl_priority:5;
  65				u32 instance_id:8;
  66			} create_ppl;
  67			struct {
  68				u32 rsvd:16;
  69				u32 instance_id:8;
  70			} ppl; /* generic ppl request */
  71			struct {
  72				u32 state:16;
  73				u32 ppl_id:8;
  74			} set_ppl_state;
  75			struct {
  76				u32 ppl_id:8;
  77			} get_ppl_state;
  78			/* library loading */
  79			struct {
  80				u32 dma_id:5;
  81				u32 rsvd:11;
  82				u32 lib_id:4;
  83			} load_lib;
  84		};
  85		union {
  86			u32 val;
  87			/* pipeline management */
  88			struct {
  89				u32 lp:1; /* low power flag */
  90				u32 rsvd:3;
  91				u32 attributes:16; /* additional scheduling flags */
  92			} create_ppl;
  93		} ext;
  94	};
  95} __packed;
  96static_assert(sizeof(union avs_global_msg) == 8);
  97
  98struct avs_tlv {
  99	u32 type;
 100	u32 length;
 101	u32 value[];
 102} __packed;
 103static_assert(sizeof(struct avs_tlv) == 8);
 104
 105#define avs_tlv_size(tlv) struct_size(tlv, value, (tlv)->length / 4)
 106
 107enum avs_module_msg_type {
 108	AVS_MOD_INIT_INSTANCE = 0,
 109	AVS_MOD_LARGE_CONFIG_GET = 3,
 110	AVS_MOD_LARGE_CONFIG_SET = 4,
 111	AVS_MOD_BIND = 5,
 112	AVS_MOD_UNBIND = 6,
 113	AVS_MOD_SET_DX = 7,
 114	AVS_MOD_SET_D0IX = 8,
 115	AVS_MOD_DELETE_INSTANCE = 11,
 116};
 117
 118union avs_module_msg {
 119	u64 val;
 120	struct {
 121		union {
 122			u32 primary;
 123			struct {
 124				u32 module_id:16;
 125				u32 instance_id:8;
 126				u32 module_msg_type:5;
 127				u32 msg_direction:1;
 128				u32 msg_target:1;
 129			};
 130		};
 131		union {
 132			u32 val;
 133			struct {
 134				u32 param_block_size:16;
 135				u32 ppl_instance_id:8;
 136				u32 core_id:4;
 137				u32 proc_domain:1;
 138			} init_instance;
 139			struct {
 140				u32 data_off_size:20;
 141				u32 large_param_id:8;
 142				u32 final_block:1;
 143				u32 init_block:1;
 144			} large_config;
 145			struct {
 146				u32 dst_module_id:16;
 147				u32 dst_instance_id:8;
 148				u32 dst_queue:3;
 149				u32 src_queue:3;
 150			} bind_unbind;
 151			struct {
 152				/* pre-IceLake */
 153				u32 wake:1;
 154				u32 streaming:1;
 155				/* IceLake and onwards */
 156				u32 prevent_pg:1;
 157				u32 prevent_local_cg:1;
 158			} set_d0ix;
 159		} ext;
 160	};
 161} __packed;
 162static_assert(sizeof(union avs_module_msg) == 8);
 163
 164#define AVS_IPC_NOT_SUPPORTED 15
 165
 166union avs_reply_msg {
 167	u64 val;
 168	struct {
 169		union {
 170			u32 primary;
 171			struct {
 172				u32 status:24;
 173				u32 global_msg_type:5;
 174				u32 msg_direction:1;
 175				u32 msg_target:1;
 176			};
 177		};
 178		union {
 179			u32 val;
 180			/* module loading */
 181			struct {
 182				u32 err_mod_id:16;
 183			} load_multi_mods;
 184			/* pipeline management */
 185			struct {
 186				u32 state:5;
 187			} get_ppl_state;
 188			/* module management */
 189			struct {
 190				u32 data_off_size:20;
 191				u32 large_param_id:8;
 192				u32 final_block:1;
 193				u32 init_block:1;
 194			} large_config;
 195		} ext;
 196	};
 197} __packed;
 198static_assert(sizeof(union avs_reply_msg) == 8);
 199
 200enum avs_notify_msg_type {
 201	AVS_NOTIFY_PHRASE_DETECTED = 4,
 202	AVS_NOTIFY_RESOURCE_EVENT = 5,
 203	AVS_NOTIFY_LOG_BUFFER_STATUS = 6,
 204	AVS_NOTIFY_FW_READY = 8,
 205	AVS_NOTIFY_EXCEPTION_CAUGHT = 10,
 206	AVS_NOTIFY_MODULE_EVENT = 12,
 207};
 208
 209union avs_notify_msg {
 210	u64 val;
 211	struct {
 212		union {
 213			u32 primary;
 214			struct {
 215				u32 rsvd:16;
 216				u32 notify_msg_type:8;
 217				u32 global_msg_type:5;
 218				u32 msg_direction:1;
 219				u32 msg_target:1;
 220			};
 221			struct {
 222				u16 rsvd:12;
 223				u16 core:4;
 224			} log;
 225		};
 226		union {
 227			u32 val;
 228			struct {
 229				u32 core_id:2;
 230				u32 stack_dump_size:16;
 231			} coredump;
 232		} ext;
 233	};
 234} __packed;
 235static_assert(sizeof(union avs_notify_msg) == 8);
 236
 237#define AVS_MSG(hdr) { .val = hdr }
 238
 239#define AVS_GLOBAL_REQUEST(msg_type)		\
 240{						\
 241	.global_msg_type = AVS_GLB_##msg_type,	\
 242	.msg_direction = AVS_MSG_REQUEST,	\
 243	.msg_target = AVS_FW_GEN_MSG,		\
 244}
 245
 246#define AVS_MODULE_REQUEST(msg_type)		\
 247{						\
 248	.module_msg_type = AVS_MOD_##msg_type,	\
 249	.msg_direction = AVS_MSG_REQUEST,	\
 250	.msg_target = AVS_MOD_MSG,		\
 251}
 252
 253#define AVS_NOTIFICATION(msg_type)		\
 254{						\
 255	.notify_msg_type = AVS_NOTIFY_##msg_type,\
 256	.global_msg_type = AVS_GLB_NOTIFICATION,\
 257	.msg_direction = AVS_MSG_REPLY,		\
 258	.msg_target = AVS_FW_GEN_MSG,		\
 259}
 260
 261#define avs_msg_is_reply(hdr) \
 262({ \
 263	union avs_reply_msg __msg = AVS_MSG(hdr); \
 264	__msg.msg_direction == AVS_MSG_REPLY && \
 265	__msg.global_msg_type != AVS_GLB_NOTIFICATION; \
 266})
 267
 268/* Notification types */
 269
 270struct avs_notify_voice_data {
 271	u16 kpd_score;
 272	u16 reserved;
 273} __packed;
 274static_assert(sizeof(struct avs_notify_voice_data) == 4);
 275
 276struct avs_notify_res_data {
 277	u32 resource_type;
 278	u32 resource_id;
 279	u32 event_type;
 280	u32 reserved;
 281	u32 data[6];
 282} __packed;
 283static_assert(sizeof(struct avs_notify_res_data) == 40);
 284
 285struct avs_notify_mod_data {
 286	u32 module_instance_id;
 287	u32 event_id;
 288	u32 data_size;
 289	u32 data[];
 290} __packed;
 291static_assert(sizeof(struct avs_notify_mod_data) == 12);
 292
 293/* ROM messages */
 294enum avs_rom_control_msg_type {
 295	AVS_ROM_SET_BOOT_CONFIG = 0,
 296};
 297
 298int avs_ipc_set_boot_config(struct avs_dev *adev, u32 dma_id, u32 purge);
 299
 300/* Code loading messages */
 301int avs_ipc_load_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids);
 302int avs_ipc_unload_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids);
 303int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id);
 304
 305/* Pipeline management messages */
 306enum avs_pipeline_state {
 307	AVS_PPL_STATE_INVALID,
 308	AVS_PPL_STATE_UNINITIALIZED,
 309	AVS_PPL_STATE_RESET,
 310	AVS_PPL_STATE_PAUSED,
 311	AVS_PPL_STATE_RUNNING,
 312};
 313
 314int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
 315			    u8 instance_id, bool lp, u16 attributes);
 316int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id);
 317int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id,
 318			       enum avs_pipeline_state state);
 319int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id,
 320			       enum avs_pipeline_state *state);
 321
 322/* Module management messages */
 323int avs_ipc_init_instance(struct avs_dev *adev, u16 module_id, u8 instance_id,
 324			  u8 ppl_id, u8 core_id, u8 domain,
 325			  void *param, u32 param_size);
 326int avs_ipc_delete_instance(struct avs_dev *adev, u16 module_id, u8 instance_id);
 327int avs_ipc_bind(struct avs_dev *adev, u16 module_id, u8 instance_id,
 328		 u16 dst_module_id, u8 dst_instance_id,
 329		 u8 dst_queue, u8 src_queue);
 330int avs_ipc_unbind(struct avs_dev *adev, u16 module_id, u8 instance_id,
 331		   u16 dst_module_id, u8 dst_instance_id,
 332		   u8 dst_queue, u8 src_queue);
 333int avs_ipc_set_large_config(struct avs_dev *adev, u16 module_id,
 334			     u8 instance_id, u8 param_id,
 335			     u8 *request, size_t request_size);
 336int avs_ipc_get_large_config(struct avs_dev *adev, u16 module_id, u8 instance_id,
 337			     u8 param_id, u8 *request_data, size_t request_size,
 338			     u8 **reply_data, size_t *reply_size);
 339
 340/* DSP cores and domains power management messages */
 341struct avs_dxstate_info {
 342	u32 core_mask;	/* which cores are subject for power transition */
 343	u32 dx_mask;	/* bit[n]=1 core n goes to D0, bit[n]=0 it goes to D3 */
 344} __packed;
 345static_assert(sizeof(struct avs_dxstate_info) == 8);
 346
 347int avs_ipc_set_dx(struct avs_dev *adev, u32 core_mask, bool powerup);
 348int avs_ipc_set_d0ix(struct avs_dev *adev, bool enable_pg, bool streaming);
 349
 350/* Base-firmware runtime parameters */
 351
 352#define AVS_BASEFW_MOD_ID	0
 353#define AVS_BASEFW_INST_ID	0
 354
 355enum avs_basefw_runtime_param {
 356	AVS_BASEFW_ENABLE_LOGS = 6,
 357	AVS_BASEFW_FIRMWARE_CONFIG = 7,
 358	AVS_BASEFW_HARDWARE_CONFIG = 8,
 359	AVS_BASEFW_MODULES_INFO = 9,
 360	AVS_BASEFW_LIBRARIES_INFO = 16,
 361	AVS_BASEFW_SYSTEM_TIME = 20,
 362};
 363
 364enum avs_log_enable {
 365	AVS_LOG_DISABLE = 0,
 366	AVS_LOG_ENABLE = 1
 367};
 368
 369enum avs_skl_log_priority {
 370	AVS_SKL_LOG_CRITICAL = 1,
 371	AVS_SKL_LOG_HIGH,
 372	AVS_SKL_LOG_MEDIUM,
 373	AVS_SKL_LOG_LOW,
 374	AVS_SKL_LOG_VERBOSE,
 375};
 376
 377struct avs_skl_log_state {
 378	u32 enable;
 379	u32 min_priority;
 380} __packed;
 381static_assert(sizeof(struct avs_skl_log_state) == 8);
 382
 383struct avs_skl_log_state_info {
 384	u32 core_mask;
 385	struct avs_skl_log_state logs_core[];
 386} __packed;
 387static_assert(sizeof(struct avs_skl_log_state_info) == 4);
 388
 389struct avs_apl_log_state_info {
 390	u32 aging_timer_period;
 391	u32 fifo_full_timer_period;
 392	u32 core_mask;
 393	struct avs_skl_log_state logs_core[];
 394} __packed;
 395static_assert(sizeof(struct avs_apl_log_state_info) == 12);
 396
 397enum avs_icl_log_priority {
 398	AVS_ICL_LOG_CRITICAL = 0,
 399	AVS_ICL_LOG_HIGH,
 400	AVS_ICL_LOG_MEDIUM,
 401	AVS_ICL_LOG_LOW,
 402	AVS_ICL_LOG_VERBOSE,
 403};
 404
 405enum avs_icl_log_source {
 406	AVS_ICL_LOG_INFRA = 0,
 407	AVS_ICL_LOG_HAL,
 408	AVS_ICL_LOG_MODULE,
 409	AVS_ICL_LOG_AUDIO,
 410	AVS_ICL_LOG_SENSING,
 411	AVS_ICL_LOG_ULP_INFRA,
 412};
 413
 414struct avs_icl_log_state_info {
 415	u32 aging_timer_period;
 416	u32 fifo_full_timer_period;
 417	u32 enable;
 418	u32 logs_priorities_mask[];
 419} __packed;
 420static_assert(sizeof(struct avs_icl_log_state_info) == 12);
 421
 422int avs_ipc_set_enable_logs(struct avs_dev *adev, u8 *log_info, size_t size);
 423
 424struct avs_fw_version {
 425	u16 major;
 426	u16 minor;
 427	u16 hotfix;
 428	u16 build;
 429};
 430
 431enum avs_fw_cfg_params {
 432	AVS_FW_CFG_FW_VERSION = 0,
 433	AVS_FW_CFG_MEMORY_RECLAIMED,
 434	AVS_FW_CFG_SLOW_CLOCK_FREQ_HZ,
 435	AVS_FW_CFG_FAST_CLOCK_FREQ_HZ,
 436	AVS_FW_CFG_DMA_BUFFER_CONFIG,
 437	AVS_FW_CFG_ALH_SUPPORT_LEVEL,
 438	AVS_FW_CFG_IPC_DL_MAILBOX_BYTES,
 439	AVS_FW_CFG_IPC_UL_MAILBOX_BYTES,
 440	AVS_FW_CFG_TRACE_LOG_BYTES,
 441	AVS_FW_CFG_MAX_PPL_COUNT,
 442	AVS_FW_CFG_MAX_ASTATE_COUNT,
 443	AVS_FW_CFG_MAX_MODULE_PIN_COUNT,
 444	AVS_FW_CFG_MODULES_COUNT,
 445	AVS_FW_CFG_MAX_MOD_INST_COUNT,
 446	AVS_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT,
 447	AVS_FW_CFG_LL_PRI_COUNT,
 448	AVS_FW_CFG_MAX_DP_TASKS_COUNT,
 449	AVS_FW_CFG_MAX_LIBS_COUNT,
 450	AVS_FW_CFG_SCHEDULER_CONFIG,
 451	AVS_FW_CFG_XTAL_FREQ_HZ,
 452	AVS_FW_CFG_CLOCKS_CONFIG,
 453	AVS_FW_CFG_RESERVED,
 454	AVS_FW_CFG_POWER_GATING_POLICY,
 455	AVS_FW_CFG_ASSERT_MODE,
 456	AVS_FW_CFG_RESERVED2,
 457	AVS_FW_CFG_BUS_HARDWARE_ID,
 458};
 459
 460struct avs_fw_cfg {
 461	struct avs_fw_version fw_version;
 462	u32 memory_reclaimed;
 463	u32 slow_clock_freq_hz;
 464	u32 fast_clock_freq_hz;
 465	u32 alh_support;
 466	u32 ipc_dl_mailbox_bytes;
 467	u32 ipc_ul_mailbox_bytes;
 468	u32 trace_log_bytes;
 469	u32 max_ppl_count;
 470	u32 max_astate_count;
 471	u32 max_module_pin_count;
 472	u32 modules_count;
 473	u32 max_mod_inst_count;
 474	u32 max_ll_tasks_per_pri_count;
 475	u32 ll_pri_count;
 476	u32 max_dp_tasks_count;
 477	u32 max_libs_count;
 478	u32 xtal_freq_hz;
 479	u32 power_gating_policy;
 480};
 481
 482struct avs_bus_hwid {
 483	u32 device;
 484	u32 subsystem;
 485	u8 revision;
 486};
 487
 488int avs_ipc_get_fw_config(struct avs_dev *adev, struct avs_fw_cfg *cfg);
 489int avs_ipc_set_fw_config(struct avs_dev *adev, size_t num_tlvs, ...);
 490
 491enum avs_hw_cfg_params {
 492	AVS_HW_CFG_AVS_VER,
 493	AVS_HW_CFG_DSP_CORES,
 494	AVS_HW_CFG_MEM_PAGE_BYTES,
 495	AVS_HW_CFG_TOTAL_PHYS_MEM_PAGES,
 496	AVS_HW_CFG_I2S_CAPS,
 497	AVS_HW_CFG_GPDMA_CAPS,
 498	AVS_HW_CFG_GATEWAY_COUNT,
 499	AVS_HW_CFG_HP_EBB_COUNT,
 500	AVS_HW_CFG_LP_EBB_COUNT,
 501	AVS_HW_CFG_EBB_SIZE_BYTES,
 502};
 503
 504enum avs_iface_version {
 505	AVS_AVS_VER_1_5 = 0x10005,
 506	AVS_AVS_VER_1_8 = 0x10008,
 507};
 508
 509enum avs_i2s_version {
 510	AVS_I2S_VER_15_SKYLAKE   = 0x00000,
 511	AVS_I2S_VER_15_BROXTON   = 0x10000,
 512	AVS_I2S_VER_15_BROXTON_P = 0x20000,
 513	AVS_I2S_VER_18_KBL_CNL   = 0x30000,
 514};
 515
 516struct avs_i2s_caps {
 517	u32 i2s_version;
 518	u32 ctrl_count;
 519	u32 *ctrl_base_addr;
 520};
 521
 522struct avs_hw_cfg {
 523	u32 avs_version;
 524	u32 dsp_cores;
 525	u32 mem_page_bytes;
 526	u32 total_phys_mem_pages;
 527	struct avs_i2s_caps i2s_caps;
 528	u32 gateway_count;
 529	u32 hp_ebb_count;
 530	u32 lp_ebb_count;
 531	u32 ebb_size_bytes;
 532};
 533
 534int avs_ipc_get_hw_config(struct avs_dev *adev, struct avs_hw_cfg *cfg);
 535
 536#define AVS_MODULE_LOAD_TYPE_BUILTIN	0
 537#define AVS_MODULE_LOAD_TYPE_LOADABLE	1
 538#define AVS_MODULE_STATE_LOADED		BIT(0)
 539
 540struct avs_module_type {
 541	u32 load_type:4;
 542	u32 auto_start:1;
 543	u32 domain_ll:1;
 544	u32 domain_dp:1;
 545	u32 lib_code:1;
 546	u32 rsvd:24;
 547} __packed;
 548static_assert(sizeof(struct avs_module_type) == 4);
 549
 550union avs_segment_flags {
 551	u32 ul;
 552	struct {
 553		u32 contents:1;
 554		u32 alloc:1;
 555		u32 load:1;
 556		u32 readonly:1;
 557		u32 code:1;
 558		u32 data:1;
 559		u32 rsvd_1:2;
 560		u32 type:4;
 561		u32 rsvd_2:4;
 562		u32 length:16;
 563	};
 564} __packed;
 565static_assert(sizeof(union avs_segment_flags) == 4);
 566
 567struct avs_segment_desc {
 568	union avs_segment_flags flags;
 569	u32 v_base_addr;
 570	u32 file_offset;
 571} __packed;
 572static_assert(sizeof(struct avs_segment_desc) == 12);
 573
 574struct avs_module_entry {
 575	u16 module_id;
 576	u16 state_flags;
 577	u8 name[8];
 578	guid_t uuid;
 579	struct avs_module_type type;
 580	u8 hash[32];
 581	u32 entry_point;
 582	u16 cfg_offset;
 583	u16 cfg_count;
 584	u32 affinity_mask;
 585	u16 instance_max_count;
 586	u16 instance_bss_size;
 587	struct avs_segment_desc segments[3];
 588} __packed;
 589static_assert(sizeof(struct avs_module_entry) == 116);
 590
 591struct avs_mods_info {
 592	u32 count;
 593	struct avs_module_entry entries[];
 594} __packed;
 595static_assert(sizeof(struct avs_mods_info) == 4);
 596
 597static inline bool avs_module_entry_is_loaded(struct avs_module_entry *mentry)
 598{
 599	return mentry->type.load_type == AVS_MODULE_LOAD_TYPE_BUILTIN ||
 600	       mentry->state_flags & AVS_MODULE_STATE_LOADED;
 601}
 602
 603int avs_ipc_get_modules_info(struct avs_dev *adev, struct avs_mods_info **info);
 604
 605struct avs_sys_time {
 606	u32 val_l;
 607	u32 val_u;
 608} __packed;
 609static_assert(sizeof(struct avs_sys_time) == 8);
 610
 611int avs_ipc_set_system_time(struct avs_dev *adev);
 612
 613/* Module configuration */
 614
 615#define AVS_MIXIN_MOD_UUID \
 616	GUID_INIT(0x39656EB2, 0x3B71, 0x4049, 0x8D, 0x3F, 0xF9, 0x2C, 0xD5, 0xC4, 0x3C, 0x09)
 617
 618#define AVS_MIXOUT_MOD_UUID \
 619	GUID_INIT(0x3C56505A, 0x24D7, 0x418F, 0xBD, 0xDC, 0xC1, 0xF5, 0xA3, 0xAC, 0x2A, 0xE0)
 620
 621#define AVS_COPIER_MOD_UUID \
 622	GUID_INIT(0x9BA00C83, 0xCA12, 0x4A83, 0x94, 0x3C, 0x1F, 0xA2, 0xE8, 0x2F, 0x9D, 0xDA)
 623
 624#define AVS_PEAKVOL_MOD_UUID \
 625	GUID_INIT(0x8A171323, 0x94A3, 0x4E1D, 0xAF, 0xE9, 0xFE, 0x5D, 0xBA, 0xa4, 0xC3, 0x93)
 626
 627#define AVS_GAIN_MOD_UUID \
 628	GUID_INIT(0x61BCA9A8, 0x18D0, 0x4A18, 0x8E, 0x7B, 0x26, 0x39, 0x21, 0x98, 0x04, 0xB7)
 629
 630#define AVS_KPBUFF_MOD_UUID \
 631	GUID_INIT(0xA8A0CB32, 0x4A77, 0x4DB1, 0x85, 0xC7, 0x53, 0xD7, 0xEE, 0x07, 0xBC, 0xE6)
 632
 633#define AVS_MICSEL_MOD_UUID \
 634	GUID_INIT(0x32FE92C1, 0x1E17, 0x4FC2, 0x97, 0x58, 0xC7, 0xF3, 0x54, 0x2E, 0x98, 0x0A)
 635
 636#define AVS_MUX_MOD_UUID \
 637	GUID_INIT(0x64CE6E35, 0x857A, 0x4878, 0xAC, 0xE8, 0xE2, 0xA2, 0xF4, 0x2e, 0x30, 0x69)
 638
 639#define AVS_UPDWMIX_MOD_UUID \
 640	GUID_INIT(0x42F8060C, 0x832F, 0x4DBF, 0xB2, 0x47, 0x51, 0xE9, 0x61, 0x99, 0x7b, 0x35)
 641
 642#define AVS_SRCINTC_MOD_UUID \
 643	GUID_INIT(0xE61BB28D, 0x149A, 0x4C1F, 0xB7, 0x09, 0x46, 0x82, 0x3E, 0xF5, 0xF5, 0xAE)
 644
 645#define AVS_PROBE_MOD_UUID \
 646	GUID_INIT(0x7CAD0808, 0xAB10, 0xCD23, 0xEF, 0x45, 0x12, 0xAB, 0x34, 0xCD, 0x56, 0xEF)
 647
 648#define AVS_AEC_MOD_UUID \
 649	GUID_INIT(0x46CB87FB, 0xD2C9, 0x4970, 0x96, 0xD2, 0x6D, 0x7E, 0x61, 0x4B, 0xB6, 0x05)
 650
 651#define AVS_ASRC_MOD_UUID \
 652	GUID_INIT(0x66B4402D, 0xB468, 0x42F2, 0x81, 0xA7, 0xB3, 0x71, 0x21, 0x86, 0x3D, 0xD4)
 653
 654#define AVS_INTELWOV_MOD_UUID \
 655	GUID_INIT(0xEC774FA9, 0x28D3, 0x424A, 0x90, 0xE4, 0x69, 0xF9, 0x84, 0xF1, 0xEE, 0xB7)
 656
 657#define AVS_WOVHOSTM_MOD_UUID \
 658	GUID_INIT(0xF9ED62B7, 0x092E, 0x4A90, 0x8F, 0x4D, 0x82, 0xDA, 0xA8, 0xB3, 0x8F, 0x3B)
 659
 660/* channel map */
 661enum avs_channel_index {
 662	AVS_CHANNEL_LEFT = 0,
 663	AVS_CHANNEL_RIGHT = 1,
 664	AVS_CHANNEL_CENTER = 2,
 665	AVS_CHANNEL_LEFT_SURROUND = 3,
 666	AVS_CHANNEL_CENTER_SURROUND = 3,
 667	AVS_CHANNEL_RIGHT_SURROUND = 4,
 668	AVS_CHANNEL_LFE = 7,
 669	AVS_CHANNEL_INVALID = 0xF,
 670};
 671
 672enum avs_channel_config {
 673	AVS_CHANNEL_CONFIG_MONO = 0,
 674	AVS_CHANNEL_CONFIG_STEREO = 1,
 675	AVS_CHANNEL_CONFIG_2_1 = 2,
 676	AVS_CHANNEL_CONFIG_3_0 = 3,
 677	AVS_CHANNEL_CONFIG_3_1 = 4,
 678	AVS_CHANNEL_CONFIG_QUATRO = 5,
 679	AVS_CHANNEL_CONFIG_4_0 = 6,
 680	AVS_CHANNEL_CONFIG_5_0 = 7,
 681	AVS_CHANNEL_CONFIG_5_1 = 8,
 682	AVS_CHANNEL_CONFIG_DUAL_MONO = 9,
 683	AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_0 = 10,
 684	AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_1 = 11,
 685	AVS_CHANNEL_CONFIG_7_1 = 12,
 686	AVS_CHANNEL_CONFIG_INVALID
 687};
 688
 689enum avs_interleaving {
 690	AVS_INTERLEAVING_PER_CHANNEL = 0,
 691	AVS_INTERLEAVING_PER_SAMPLE = 1,
 692};
 693
 694enum avs_sample_type {
 695	AVS_SAMPLE_TYPE_INT_MSB = 0,
 696	AVS_SAMPLE_TYPE_INT_LSB = 1,
 697	AVS_SAMPLE_TYPE_INT_SIGNED = 2,
 698	AVS_SAMPLE_TYPE_INT_UNSIGNED = 3,
 699	AVS_SAMPLE_TYPE_FLOAT = 4,
 700};
 701
 702#define AVS_COEFF_CHANNELS_MAX	8
 703#define AVS_ALL_CHANNELS_MASK	UINT_MAX
 704#define AVS_CHANNELS_MAX	16
 705
 706struct avs_audio_format {
 707	u32 sampling_freq;
 708	u32 bit_depth;
 709	u32 channel_map;
 710	u32 channel_config;
 711	u32 interleaving;
 712	u32 num_channels:8;
 713	u32 valid_bit_depth:8;
 714	u32 sample_type:8;
 715	u32 reserved:8;
 716} __packed;
 717static_assert(sizeof(struct avs_audio_format) == 24);
 718
 719struct avs_modcfg_base {
 720	u32 cpc;
 721	u32 ibs;
 722	u32 obs;
 723	u32 is_pages;
 724	struct avs_audio_format audio_fmt;
 725} __packed;
 726static_assert(sizeof(struct avs_modcfg_base) == 40);
 727
 728struct avs_pin_format {
 729	u32 pin_index;
 730	u32 iobs;
 731	struct avs_audio_format audio_fmt;
 732} __packed;
 733static_assert(sizeof(struct avs_pin_format) == 32);
 734
 735struct avs_modcfg_ext {
 736	struct avs_modcfg_base base;
 737	u16 num_input_pins;
 738	u16 num_output_pins;
 739	u8 reserved[12];
 740	/* input pin formats followed by output ones */
 741	struct avs_pin_format pin_fmts[];
 742} __packed;
 743static_assert(sizeof(struct avs_modcfg_ext) == 56);
 744
 745enum avs_dma_type {
 746	AVS_DMA_HDA_HOST_OUTPUT = 0,
 747	AVS_DMA_HDA_HOST_INPUT = 1,
 748	AVS_DMA_HDA_LINK_OUTPUT = 8,
 749	AVS_DMA_HDA_LINK_INPUT = 9,
 750	AVS_DMA_DMIC_LINK_INPUT = 11,
 751	AVS_DMA_I2S_LINK_OUTPUT = 12,
 752	AVS_DMA_I2S_LINK_INPUT = 13,
 753};
 754
 755union avs_virtual_index {
 756	u8 val;
 757	struct {
 758		u8 time_slot:4;
 759		u8 instance:4;
 760	} i2s;
 761	struct {
 762		u8 queue_id:3;
 763		u8 time_slot:2;
 764		u8 instance:3;
 765	} dmic;
 766} __packed;
 767static_assert(sizeof(union avs_virtual_index) == 1);
 768
 769union avs_connector_node_id {
 770	u32 val;
 771	struct {
 772		u32 vindex:8;
 773		u32 dma_type:5;
 774		u32 rsvd:19;
 775	};
 776} __packed;
 777static_assert(sizeof(union avs_connector_node_id) == 4);
 778
 779#define INVALID_PIPELINE_ID	0xFF
 780#define INVALID_NODE_ID \
 781	((union avs_connector_node_id) { UINT_MAX })
 782
 783union avs_gtw_attributes {
 784	u32 val;
 785	struct {
 786		u32 lp_buffer_alloc:1;
 787		u32 rsvd:31;
 788	};
 789} __packed;
 790static_assert(sizeof(union avs_gtw_attributes) == 4);
 791
 792#define AVS_GTW_DMA_CONFIG_ID	0x1000
 793#define AVS_DMA_METHOD_HDA	1
 794
 795struct avs_dma_device_stream_channel_map {
 796	u32 device_address;
 797	u32 channel_map;
 798} __packed;
 799static_assert(sizeof(struct avs_dma_device_stream_channel_map) == 8);
 800
 801struct avs_dma_stream_channel_map {
 802	u32 device_count;
 803	struct avs_dma_device_stream_channel_map map[16];
 804} __packed;
 805static_assert(sizeof(struct avs_dma_stream_channel_map) == 132);
 806
 807struct avs_dma_cfg {
 808	u8 dma_method;
 809	u8 pre_allocated;
 810	u16 rsvd;
 811	u32 dma_channel_id;
 812	u32 stream_id;
 813	struct avs_dma_stream_channel_map map;
 814	u32 config_size;
 815	u8 config[] __counted_by(config_size);
 816} __packed;
 817static_assert(sizeof(struct avs_dma_cfg) == 148);
 818
 819struct avs_copier_gtw_cfg {
 820	union avs_connector_node_id node_id;
 821	u32 dma_buffer_size;
 822	u32 config_length;
 823	union {
 824		union avs_gtw_attributes attrs;
 825		DECLARE_FLEX_ARRAY(u32, blob);
 826	} config;
 827} __packed;
 828static_assert(sizeof(struct avs_copier_gtw_cfg) == 16);
 829
 830struct avs_copier_cfg {
 831	struct avs_modcfg_base base;
 832	struct avs_audio_format out_fmt;
 833	u32 feature_mask;
 834	struct avs_copier_gtw_cfg gtw_cfg;
 835} __packed;
 836static_assert(sizeof(struct avs_copier_cfg) == 84);
 837
 838struct avs_volume_cfg {
 839	u32 channel_id;
 840	u32 target_volume;
 841	u32 curve_type;
 842	u32 reserved; /* alignment */
 843	u64 curve_duration;
 844} __packed;
 845static_assert(sizeof(struct avs_volume_cfg) == 24);
 846
 847struct avs_mute_cfg {
 848	u32 channel_id;
 849	u32 mute;
 850	u32 curve_type;
 851	u32 reserved; /* alignment */
 852	u64 curve_duration;
 853} __packed;
 854static_assert(sizeof(struct avs_mute_cfg) == 24);
 855
 856struct avs_peakvol_cfg {
 857	struct avs_modcfg_base base;
 858	struct avs_volume_cfg vols[];
 859} __packed;
 860static_assert(sizeof(struct avs_peakvol_cfg) == 40);
 861
 862struct avs_micsel_cfg {
 863	struct avs_modcfg_base base;
 864	struct avs_audio_format out_fmt;
 865} __packed;
 866static_assert(sizeof(struct avs_micsel_cfg) == 64);
 867
 868struct avs_mux_cfg {
 869	struct avs_modcfg_base base;
 870	struct avs_audio_format ref_fmt;
 871	struct avs_audio_format out_fmt;
 872} __packed;
 873static_assert(sizeof(struct avs_mux_cfg) == 88);
 874
 875struct avs_updown_mixer_cfg {
 876	struct avs_modcfg_base base;
 877	u32 out_channel_config;
 878	u32 coefficients_select;
 879	s32 coefficients[AVS_COEFF_CHANNELS_MAX];
 880	u32 channel_map;
 881} __packed;
 882static_assert(sizeof(struct avs_updown_mixer_cfg) == 84);
 883
 884struct avs_src_cfg {
 885	struct avs_modcfg_base base;
 886	u32 out_freq;
 887} __packed;
 888static_assert(sizeof(struct avs_src_cfg) == 44);
 889
 890struct avs_probe_gtw_cfg {
 891	union avs_connector_node_id node_id;
 892	u32 dma_buffer_size;
 893} __packed;
 894static_assert(sizeof(struct avs_probe_gtw_cfg) == 8);
 895
 896struct avs_probe_cfg {
 897	struct avs_modcfg_base base;
 898	struct avs_probe_gtw_cfg gtw_cfg;
 899} __packed;
 900static_assert(sizeof(struct avs_probe_cfg) == 48);
 901
 902struct avs_aec_cfg {
 903	struct avs_modcfg_base base;
 904	struct avs_audio_format ref_fmt;
 905	struct avs_audio_format out_fmt;
 906	u32 cpc_lp_mode;
 907} __packed;
 908static_assert(sizeof(struct avs_aec_cfg) == 92);
 909
 910struct avs_asrc_cfg {
 911	struct avs_modcfg_base base;
 912	u32 out_freq;
 913	u32 mode:2;
 914	u32 rsvd2:2;
 915	u32 disable_jitter_buffer:1;
 916	u32 rsvd3:27;
 917} __packed;
 918static_assert(sizeof(struct avs_asrc_cfg) == 48);
 919
 920struct avs_wov_cfg {
 921	struct avs_modcfg_base base;
 922	u32 cpc_lp_mode;
 923} __packed;
 924static_assert(sizeof(struct avs_wov_cfg) == 44);
 925
 926struct avs_whm_cfg {
 927	struct avs_modcfg_base base;
 928	/* Audio format for output pin 0 */
 929	struct avs_audio_format ref_fmt;
 930	struct avs_audio_format out_fmt;
 931	u32 wake_tick_period;
 932	struct avs_copier_gtw_cfg gtw_cfg;
 933} __packed;
 934static_assert(sizeof(struct avs_whm_cfg) == 108);
 935
 936/* Module runtime parameters */
 937
 938#define AVS_VENDOR_CONFIG	0xFF
 939
 940enum avs_copier_runtime_param {
 941	AVS_COPIER_SET_SINK_FORMAT = 2,
 942};
 943
 944struct avs_copier_sink_format {
 945	u32 sink_id;
 946	struct avs_audio_format src_fmt;
 947	struct avs_audio_format sink_fmt;
 948} __packed;
 949static_assert(sizeof(struct avs_copier_sink_format) == 52);
 950
 951int avs_ipc_copier_set_sink_format(struct avs_dev *adev, u16 module_id,
 952				   u8 instance_id, u32 sink_id,
 953				   const struct avs_audio_format *src_fmt,
 954				   const struct avs_audio_format *sink_fmt);
 955
 956enum avs_peakvol_runtime_param {
 957	AVS_PEAKVOL_VOLUME = 0,
 958	AVS_PEAKVOL_MUTE = 3,
 959};
 960
 961enum avs_audio_curve_type {
 962	AVS_AUDIO_CURVE_NONE = 0,
 963	AVS_AUDIO_CURVE_WINDOWS_FADE = 1,
 964};
 965
 966int avs_ipc_peakvol_get_volume(struct avs_dev *adev, u16 module_id, u8 instance_id,
 967			       struct avs_volume_cfg **vols, size_t *num_vols);
 968int avs_ipc_peakvol_set_volume(struct avs_dev *adev, u16 module_id, u8 instance_id,
 969			       struct avs_volume_cfg *vol);
 970int avs_ipc_peakvol_set_volumes(struct avs_dev *adev, u16 module_id, u8 instance_id,
 971				struct avs_volume_cfg *vols, size_t num_vols);
 972int avs_ipc_peakvol_get_mute(struct avs_dev *adev, u16 module_id, u8 instance_id,
 973			     struct avs_mute_cfg **mutes, size_t *num_mutes);
 974int avs_ipc_peakvol_set_mute(struct avs_dev *adev, u16 module_id, u8 instance_id,
 975			     struct avs_mute_cfg *mute);
 976int avs_ipc_peakvol_set_mutes(struct avs_dev *adev, u16 module_id, u8 instance_id,
 977			      struct avs_mute_cfg *mutes, size_t num_mutes);
 978
 979#define AVS_PROBE_INST_ID	0
 980
 981enum avs_probe_runtime_param {
 982	AVS_PROBE_INJECTION_DMA = 1,
 983	AVS_PROBE_INJECTION_DMA_DETACH,
 984	AVS_PROBE_POINTS,
 985	AVS_PROBE_POINTS_DISCONNECT,
 986};
 987
 988struct avs_probe_dma {
 989	union avs_connector_node_id node_id;
 990	u32 dma_buffer_size;
 991} __packed;
 992static_assert(sizeof(struct avs_probe_dma) == 8);
 993
 994enum avs_probe_type {
 995	AVS_PROBE_TYPE_INPUT = 0,
 996	AVS_PROBE_TYPE_OUTPUT,
 997	AVS_PROBE_TYPE_INTERNAL
 998};
 999
1000union avs_probe_point_id {
1001	u32 value;
1002	struct {
1003		u32 module_id:16;
1004		u32 instance_id:8;
1005		u32 type:2;
1006		u32 index:6;
1007	} id;
1008} __packed;
1009static_assert(sizeof(union avs_probe_point_id) == 4);
1010
1011enum avs_connection_purpose {
1012	AVS_CONNECTION_PURPOSE_EXTRACT = 0,
1013	AVS_CONNECTION_PURPOSE_INJECT,
1014	AVS_CONNECTION_PURPOSE_INJECT_REEXTRACT,
1015};
1016
1017struct avs_probe_point_desc {
1018	union avs_probe_point_id id;
1019	u32 purpose;
1020	union avs_connector_node_id node_id;
1021} __packed;
1022static_assert(sizeof(struct avs_probe_point_desc) == 12);
1023
1024int avs_ipc_probe_get_dma(struct avs_dev *adev, struct avs_probe_dma **dmas, size_t *num_dmas);
1025int avs_ipc_probe_attach_dma(struct avs_dev *adev, struct avs_probe_dma *dmas, size_t num_dmas);
1026int avs_ipc_probe_detach_dma(struct avs_dev *adev, union avs_connector_node_id *node_ids,
1027			     size_t num_node_ids);
1028int avs_ipc_probe_get_points(struct avs_dev *adev, struct avs_probe_point_desc **descs,
1029			     size_t *num_descs);
1030int avs_ipc_probe_connect_points(struct avs_dev *adev, struct avs_probe_point_desc *descs,
1031				 size_t num_descs);
1032int avs_ipc_probe_disconnect_points(struct avs_dev *adev, union avs_probe_point_id *ids,
1033				    size_t num_ids);
1034
1035#endif /* __SOUND_SOC_INTEL_AVS_MSGS_H */