cnl.c

 1// SPDX-License-Identifier: GPL-2.0-only
 2//
 3// Copyright(c) 2021-2024 Intel Corporation
 4//
 5// Authors: Cezary Rojewski <cezary.rojewski@intel.com>
 6//          Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
 7//
 8
 9#include <sound/hdaudio_ext.h>
10#include "avs.h"
11#include "debug.h"
12#include "messages.h"
13#include "registers.h"
14
15static void avs_cnl_ipc_interrupt(struct avs_dev *adev)
16{
17	const struct avs_spec *spec = adev->spec;
18	u32 hipc_ack, hipc_rsp;
19
20	snd_hdac_adsp_updatel(adev, spec->hipc->ctl_offset,
21			      AVS_ADSP_HIPCCTL_DONE | AVS_ADSP_HIPCCTL_BUSY, 0);
22
23	hipc_ack = snd_hdac_adsp_readl(adev, spec->hipc->ack_offset);
24	hipc_rsp = snd_hdac_adsp_readl(adev, spec->hipc->rsp_offset);
25
26	/* DSP acked host's request. */
27	if (hipc_ack & spec->hipc->ack_done_mask) {
28		complete(&adev->ipc->done_completion);
29
30		/* Tell DSP it has our attention. */
31		snd_hdac_adsp_updatel(adev, spec->hipc->ack_offset, spec->hipc->ack_done_mask,
32				      spec->hipc->ack_done_mask);
33	}
34
35	/* DSP sent new response to process. */
36	if (hipc_rsp & spec->hipc->rsp_busy_mask) {
37		union avs_reply_msg msg;
38		u32 hipctda;
39
40		msg.primary = snd_hdac_adsp_readl(adev, CNL_ADSP_REG_HIPCTDR);
41		msg.ext.val = snd_hdac_adsp_readl(adev, CNL_ADSP_REG_HIPCTDD);
42
43		avs_dsp_process_response(adev, msg.val);
44
45		/* Tell DSP we accepted its message. */
46		snd_hdac_adsp_updatel(adev, CNL_ADSP_REG_HIPCTDR,
47				      CNL_ADSP_HIPCTDR_BUSY, CNL_ADSP_HIPCTDR_BUSY);
48		/* Ack this response. */
49		snd_hdac_adsp_updatel(adev, CNL_ADSP_REG_HIPCTDA,
50				      CNL_ADSP_HIPCTDA_DONE, CNL_ADSP_HIPCTDA_DONE);
51		/* HW might have been clock gated, give some time for change to propagate. */
52		snd_hdac_adsp_readl_poll(adev, CNL_ADSP_REG_HIPCTDA, hipctda,
53					 !(hipctda & CNL_ADSP_HIPCTDA_DONE), 10, 1000);
54	}
55
56	snd_hdac_adsp_updatel(adev, spec->hipc->ctl_offset,
57			      AVS_ADSP_HIPCCTL_DONE | AVS_ADSP_HIPCCTL_BUSY,
58			      AVS_ADSP_HIPCCTL_DONE | AVS_ADSP_HIPCCTL_BUSY);
59}
60
61irqreturn_t avs_cnl_dsp_interrupt(struct avs_dev *adev)
62{
63	u32 adspis = snd_hdac_adsp_readl(adev, AVS_ADSP_REG_ADSPIS);
64	irqreturn_t ret = IRQ_NONE;
65
66	if (adspis == UINT_MAX)
67		return ret;
68
69	if (adspis & AVS_ADSP_ADSPIS_IPC) {
70		avs_cnl_ipc_interrupt(adev);
71		ret = IRQ_HANDLED;
72	}
73
74	return ret;
75}
76
77const struct avs_dsp_ops avs_cnl_dsp_ops = {
78	.power = avs_dsp_core_power,
79	.reset = avs_dsp_core_reset,
80	.stall = avs_dsp_core_stall,
81	.dsp_interrupt = avs_cnl_dsp_interrupt,
82	.int_control = avs_dsp_interrupt_control,
83	.load_basefw = avs_hda_load_basefw,
84	.load_lib = avs_hda_load_library,
85	.transfer_mods = avs_hda_transfer_modules,
86	.log_buffer_offset = avs_skl_log_buffer_offset,
87	.log_buffer_status = avs_apl_log_buffer_status,
88	.coredump = avs_apl_coredump,
89	.d0ix_toggle = avs_apl_d0ix_toggle,
90	.set_d0ix = avs_apl_set_d0ix,
91	AVS_SET_ENABLE_LOGS_OP(apl)
92};