fsl_rpmsg.c

  1// SPDX-License-Identifier: GPL-2.0+
  2// Copyright 2018-2021 NXP
  3
  4#include <linux/clk.h>
  5#include <linux/clk-provider.h>
  6#include <linux/delay.h>
  7#include <linux/dmaengine.h>
  8#include <linux/module.h>
  9#include <linux/of.h>
 10#include <linux/pm_runtime.h>
 11#include <linux/rpmsg.h>
 12#include <linux/slab.h>
 13#include <sound/core.h>
 14#include <sound/dmaengine_pcm.h>
 15#include <sound/pcm_params.h>
 16
 17#include "fsl_rpmsg.h"
 18#include "imx-pcm.h"
 19
 20#define FSL_RPMSG_RATES        (SNDRV_PCM_RATE_8000 | \
 21				SNDRV_PCM_RATE_16000 | \
 22				SNDRV_PCM_RATE_48000)
 23#define FSL_RPMSG_FORMATS	SNDRV_PCM_FMTBIT_S16_LE
 24
 25/* 192kHz/32bit/2ch/60s size is 0x574e00 */
 26#define LPA_LARGE_BUFFER_SIZE  (0x6000000)
 27/* 16kHz/32bit/8ch/1s size is 0x7D000 */
 28#define LPA_CAPTURE_BUFFER_SIZE (0x100000)
 29
 30static const unsigned int fsl_rpmsg_rates[] = {
 31	8000, 11025, 16000, 22050, 44100,
 32	32000, 48000, 96000, 88200, 176400, 192000,
 33	352800, 384000, 705600, 768000, 1411200, 2822400,
 34};
 35
 36static const struct snd_pcm_hw_constraint_list fsl_rpmsg_rate_constraints = {
 37	.count = ARRAY_SIZE(fsl_rpmsg_rates),
 38	.list = fsl_rpmsg_rates,
 39};
 40
 41static int fsl_rpmsg_hw_params(struct snd_pcm_substream *substream,
 42			       struct snd_pcm_hw_params *params,
 43			       struct snd_soc_dai *dai)
 44{
 45	struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai);
 46	struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL;
 47	u64 rate = params_rate(params);
 48	int ret = 0;
 49
 50	/* Get current pll parent */
 51	while (p && rpmsg->pll8k && rpmsg->pll11k) {
 52		struct clk *pp = clk_get_parent(p);
 53
 54		if (clk_is_match(pp, rpmsg->pll8k) ||
 55		    clk_is_match(pp, rpmsg->pll11k)) {
 56			pll = pp;
 57			break;
 58		}
 59		p = pp;
 60	}
 61
 62	/* Switch to another pll parent if needed. */
 63	if (pll) {
 64		npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k);
 65		if (!clk_is_match(pll, npll)) {
 66			ret = clk_set_parent(p, npll);
 67			if (ret < 0)
 68				dev_warn(dai->dev, "failed to set parent %s: %d\n",
 69					 __clk_get_name(npll), ret);
 70		}
 71	}
 72
 73	if (!(rpmsg->mclk_streams & BIT(substream->stream))) {
 74		ret = clk_prepare_enable(rpmsg->mclk);
 75		if (ret) {
 76			dev_err(dai->dev, "failed to enable mclk: %d\n", ret);
 77			return ret;
 78		}
 79
 80		rpmsg->mclk_streams |= BIT(substream->stream);
 81	}
 82
 83	return ret;
 84}
 85
 86static int fsl_rpmsg_hw_free(struct snd_pcm_substream *substream,
 87			     struct snd_soc_dai *dai)
 88{
 89	struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai);
 90
 91	if (rpmsg->mclk_streams & BIT(substream->stream)) {
 92		clk_disable_unprepare(rpmsg->mclk);
 93		rpmsg->mclk_streams &= ~BIT(substream->stream);
 94	}
 95
 96	return 0;
 97}
 98
 99static int fsl_rpmsg_startup(struct snd_pcm_substream *substream,
100			     struct snd_soc_dai *cpu_dai)
101{
102	return snd_pcm_hw_constraint_list(substream->runtime, 0,
103					  SNDRV_PCM_HW_PARAM_RATE,
104					  &fsl_rpmsg_rate_constraints);
105}
106
107static const struct snd_soc_dai_ops fsl_rpmsg_dai_ops = {
108	.startup	= fsl_rpmsg_startup,
109	.hw_params      = fsl_rpmsg_hw_params,
110	.hw_free        = fsl_rpmsg_hw_free,
111};
112
113static struct snd_soc_dai_driver fsl_rpmsg_dai = {
114	.playback = {
115		.stream_name = "CPU-Playback",
116		.channels_min = 2,
117		.channels_max = 32,
118		.rates = SNDRV_PCM_RATE_KNOT,
119		.formats = FSL_RPMSG_FORMATS,
120	},
121	.capture = {
122		.stream_name = "CPU-Capture",
123		.channels_min = 2,
124		.channels_max = 32,
125		.rates = SNDRV_PCM_RATE_KNOT,
126		.formats = FSL_RPMSG_FORMATS,
127	},
128	.symmetric_rate        = 1,
129	.symmetric_channels    = 1,
130	.symmetric_sample_bits = 1,
131	.ops = &fsl_rpmsg_dai_ops,
132};
133
134static const struct snd_soc_component_driver fsl_component = {
135	.name			= "fsl-rpmsg",
136};
137
138static const struct fsl_rpmsg_soc_data imx7ulp_data = {
139	.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
140		 SNDRV_PCM_RATE_48000,
141	.formats = SNDRV_PCM_FMTBIT_S16_LE,
142};
143
144static const struct fsl_rpmsg_soc_data imx8mm_data = {
145	.rates = SNDRV_PCM_RATE_KNOT,
146	.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
147		   SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U8 |
148		   SNDRV_PCM_FMTBIT_DSD_U16_LE | SNDRV_PCM_FMTBIT_DSD_U32_LE,
149};
150
151static const struct fsl_rpmsg_soc_data imx8mn_data = {
152	.rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
153		 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
154		 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
155		 SNDRV_PCM_RATE_192000,
156	.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
157		   SNDRV_PCM_FMTBIT_S32_LE,
158};
159
160static const struct fsl_rpmsg_soc_data imx8mp_data = {
161	.rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
162		 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
163		 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
164		 SNDRV_PCM_RATE_192000,
165	.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
166		   SNDRV_PCM_FMTBIT_S32_LE,
167};
168
169static const struct fsl_rpmsg_soc_data imx93_data = {
170	.rates = SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 |
171		 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000,
172	.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
173		   SNDRV_PCM_FMTBIT_S32_LE,
174};
175
176static const struct fsl_rpmsg_soc_data imx95_data = {
177	.rates = SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 |
178		 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
179		 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000,
180	.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
181		   SNDRV_PCM_FMTBIT_S32_LE,
182};
183
184static const struct of_device_id fsl_rpmsg_ids[] = {
185	{ .compatible = "fsl,imx7ulp-rpmsg-audio", .data = &imx7ulp_data},
186	{ .compatible = "fsl,imx8mm-rpmsg-audio", .data = &imx8mm_data},
187	{ .compatible = "fsl,imx8mn-rpmsg-audio", .data = &imx8mn_data},
188	{ .compatible = "fsl,imx8mp-rpmsg-audio", .data = &imx8mp_data},
189	{ .compatible = "fsl,imx8ulp-rpmsg-audio", .data = &imx7ulp_data},
190	{ .compatible = "fsl,imx93-rpmsg-audio", .data = &imx93_data},
191	{ .compatible = "fsl,imx95-rpmsg-audio", .data = &imx95_data},
192	{ /* sentinel */ }
193};
194MODULE_DEVICE_TABLE(of, fsl_rpmsg_ids);
195
196static int fsl_rpmsg_probe(struct platform_device *pdev)
197{
198	struct device_node *np = pdev->dev.of_node;
199	struct snd_soc_dai_driver *dai_drv;
200	const char *dai_name;
201	struct fsl_rpmsg *rpmsg;
202	int ret;
203
204	dai_drv = devm_kzalloc(&pdev->dev, sizeof(struct snd_soc_dai_driver), GFP_KERNEL);
205	if (!dai_drv)
206		return -ENOMEM;
207	memcpy(dai_drv, &fsl_rpmsg_dai, sizeof(fsl_rpmsg_dai));
208
209	rpmsg = devm_kzalloc(&pdev->dev, sizeof(struct fsl_rpmsg), GFP_KERNEL);
210	if (!rpmsg)
211		return -ENOMEM;
212
213	rpmsg->soc_data = of_device_get_match_data(&pdev->dev);
214
215	if (rpmsg->soc_data) {
216		dai_drv->playback.rates = rpmsg->soc_data->rates;
217		dai_drv->capture.rates = rpmsg->soc_data->rates;
218		dai_drv->playback.formats = rpmsg->soc_data->formats;
219		dai_drv->capture.formats = rpmsg->soc_data->formats;
220	}
221
222	/* Use rpmsg channel name as cpu dai name */
223	ret = of_property_read_string(np, "fsl,rpmsg-channel-name", &dai_name);
224	if (ret) {
225		if (ret == -EINVAL) {
226			dai_name = "rpmsg-audio-channel";
227		} else {
228			dev_err(&pdev->dev, "Failed to get rpmsg channel name: %d!\n", ret);
229			return ret;
230		}
231	}
232	dai_drv->name = dai_name;
233
234	/* Setup cpu dai for sound card that sits on rpmsg-micfil-channel */
235	if (!strcmp(dai_name, "rpmsg-micfil-channel")) {
236		dai_drv->capture.channels_min = 1;
237		dai_drv->capture.channels_max = 8;
238		dai_drv->capture.rates = SNDRV_PCM_RATE_8000_48000;
239		dai_drv->capture.formats = SNDRV_PCM_FMTBIT_S32_LE;
240		if (of_device_is_compatible(np, "fsl,imx8mm-rpmsg-audio"))
241			dai_drv->capture.formats = SNDRV_PCM_FMTBIT_S16_LE;
242	}
243
244	if (of_property_read_bool(np, "fsl,enable-lpa")) {
245		rpmsg->enable_lpa = 1;
246		rpmsg->buffer_size[SNDRV_PCM_STREAM_PLAYBACK] = LPA_LARGE_BUFFER_SIZE;
247		rpmsg->buffer_size[SNDRV_PCM_STREAM_CAPTURE] = LPA_CAPTURE_BUFFER_SIZE;
248	} else {
249		rpmsg->buffer_size[SNDRV_PCM_STREAM_PLAYBACK] = IMX_DEFAULT_DMABUF_SIZE;
250		rpmsg->buffer_size[SNDRV_PCM_STREAM_CAPTURE] = IMX_DEFAULT_DMABUF_SIZE;
251	}
252
253	/* Get the optional clocks */
254	rpmsg->ipg = devm_clk_get_optional(&pdev->dev, "ipg");
255	if (IS_ERR(rpmsg->ipg))
256		return PTR_ERR(rpmsg->ipg);
257
258	rpmsg->mclk = devm_clk_get_optional(&pdev->dev, "mclk");
259	if (IS_ERR(rpmsg->mclk))
260		return PTR_ERR(rpmsg->mclk);
261
262	rpmsg->dma = devm_clk_get_optional(&pdev->dev, "dma");
263	if (IS_ERR(rpmsg->dma))
264		return PTR_ERR(rpmsg->dma);
265
266	rpmsg->pll8k = devm_clk_get_optional(&pdev->dev, "pll8k");
267	if (IS_ERR(rpmsg->pll8k))
268		return PTR_ERR(rpmsg->pll8k);
269
270	rpmsg->pll11k = devm_clk_get_optional(&pdev->dev, "pll11k");
271	if (IS_ERR(rpmsg->pll11k))
272		return PTR_ERR(rpmsg->pll11k);
273
274	platform_set_drvdata(pdev, rpmsg);
275	pm_runtime_enable(&pdev->dev);
276
277	ret = devm_snd_soc_register_component(&pdev->dev, &fsl_component,
278					      dai_drv, 1);
279	if (ret)
280		goto err_pm_disable;
281
282	return 0;
283
284err_pm_disable:
285	pm_runtime_disable(&pdev->dev);
286	return ret;
287}
288
289static void fsl_rpmsg_remove(struct platform_device *pdev)
290{
291	struct fsl_rpmsg *rpmsg = platform_get_drvdata(pdev);
292
293	pm_runtime_disable(&pdev->dev);
294
295	if (rpmsg->card_pdev)
296		platform_device_unregister(rpmsg->card_pdev);
297}
298
299static int fsl_rpmsg_runtime_resume(struct device *dev)
300{
301	struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev);
302	int ret;
303
304	ret = clk_prepare_enable(rpmsg->ipg);
305	if (ret) {
306		dev_err(dev, "failed to enable ipg clock: %d\n", ret);
307		goto ipg_err;
308	}
309
310	ret = clk_prepare_enable(rpmsg->dma);
311	if (ret) {
312		dev_err(dev, "Failed to enable dma clock %d\n", ret);
313		goto dma_err;
314	}
315
316	return 0;
317
318dma_err:
319	clk_disable_unprepare(rpmsg->ipg);
320ipg_err:
321	return ret;
322}
323
324static int fsl_rpmsg_runtime_suspend(struct device *dev)
325{
326	struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev);
327
328	clk_disable_unprepare(rpmsg->dma);
329	clk_disable_unprepare(rpmsg->ipg);
330
331	return 0;
332}
333
334static const struct dev_pm_ops fsl_rpmsg_pm_ops = {
335	RUNTIME_PM_OPS(fsl_rpmsg_runtime_suspend, fsl_rpmsg_runtime_resume,
336		       NULL)
337};
338
339static struct platform_driver fsl_rpmsg_driver = {
340	.probe  = fsl_rpmsg_probe,
341	.remove = fsl_rpmsg_remove,
342	.driver = {
343		.name = "fsl_rpmsg",
344		.pm = pm_ptr(&fsl_rpmsg_pm_ops),
345		.of_match_table = fsl_rpmsg_ids,
346	},
347};
348module_platform_driver(fsl_rpmsg_driver);
349
350MODULE_DESCRIPTION("Freescale SoC Audio PRMSG CPU Interface");
351MODULE_AUTHOR("Shengjiu Wang <shengjiu.wang@nxp.com>");
352MODULE_ALIAS("platform:fsl_rpmsg");
353MODULE_LICENSE("GPL");