twl4030.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * ALSA SoC TWL4030 codec driver
   4 *
   5 * Author:      Steve Sakoman, <steve@sakoman.com>
   6 */
   7
   8#include <linux/delay.h>
   9#include <linux/gpio/consumer.h>
  10#include <linux/i2c.h>
  11#include <linux/init.h>
  12#include <linux/mfd/twl.h>
  13#include <linux/mfd/twl4030-audio.h>
  14#include <linux/module.h>
  15#include <linux/moduleparam.h>
  16#include <linux/of.h>
  17#include <linux/pm.h>
  18#include <linux/platform_device.h>
  19#include <linux/slab.h>
  20#include <sound/core.h>
  21#include <sound/initval.h>
  22#include <sound/pcm.h>
  23#include <sound/pcm_params.h>
  24#include <sound/soc.h>
  25#include <sound/tlv.h>
  26
  27/* TWL4030 PMBR1 Register */
  28#define TWL4030_PMBR1_REG		0x0D
  29/* TWL4030 PMBR1 Register GPIO6 mux bits */
  30#define TWL4030_GPIO6_PWM0_MUTE(value)	((value & 0x03) << 2)
  31
  32#define TWL4030_CACHEREGNUM	(TWL4030_REG_MISC_SET_2 + 1)
  33
  34struct twl4030_board_params {
  35	unsigned int digimic_delay; /* in ms */
  36	unsigned int ramp_delay_value;
  37	unsigned int offset_cncl_path;
  38	unsigned int hs_extmute:1;
  39	struct gpio_desc *hs_extmute_gpio;
  40};
  41
  42/* codec private data */
  43struct twl4030_priv {
  44	unsigned int codec_powered;
  45
  46	/* reference counts of AIF/APLL users */
  47	unsigned int apll_enabled;
  48
  49	struct snd_pcm_substream *master_substream;
  50	struct snd_pcm_substream *slave_substream;
  51
  52	unsigned int configured;
  53	unsigned int rate;
  54	unsigned int sample_bits;
  55	unsigned int channels;
  56
  57	unsigned int sysclk;
  58
  59	/* Output (with associated amp) states */
  60	u8 hsl_enabled, hsr_enabled;
  61	u8 earpiece_enabled;
  62	u8 predrivel_enabled, predriver_enabled;
  63	u8 carkitl_enabled, carkitr_enabled;
  64	u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
  65
  66	struct twl4030_board_params *board_params;
  67};
  68
  69static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
  70{
  71	int i;
  72	u8 byte;
  73
  74	for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
  75		twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
  76		twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
  77	}
  78}
  79
  80static unsigned int twl4030_read(struct snd_soc_component *component, unsigned int reg)
  81{
  82	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  83	u8 value = 0;
  84
  85	if (reg >= TWL4030_CACHEREGNUM)
  86		return -EIO;
  87
  88	switch (reg) {
  89	case TWL4030_REG_EAR_CTL:
  90	case TWL4030_REG_PREDL_CTL:
  91	case TWL4030_REG_PREDR_CTL:
  92	case TWL4030_REG_PRECKL_CTL:
  93	case TWL4030_REG_PRECKR_CTL:
  94	case TWL4030_REG_HS_GAIN_SET:
  95		value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
  96		break;
  97	default:
  98		twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
  99		break;
 100	}
 101
 102	return value;
 103}
 104
 105static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
 106				      unsigned int reg)
 107{
 108	bool write_to_reg = false;
 109
 110	/* Decide if the given register can be written */
 111	switch (reg) {
 112	case TWL4030_REG_EAR_CTL:
 113		if (twl4030->earpiece_enabled)
 114			write_to_reg = true;
 115		break;
 116	case TWL4030_REG_PREDL_CTL:
 117		if (twl4030->predrivel_enabled)
 118			write_to_reg = true;
 119		break;
 120	case TWL4030_REG_PREDR_CTL:
 121		if (twl4030->predriver_enabled)
 122			write_to_reg = true;
 123		break;
 124	case TWL4030_REG_PRECKL_CTL:
 125		if (twl4030->carkitl_enabled)
 126			write_to_reg = true;
 127		break;
 128	case TWL4030_REG_PRECKR_CTL:
 129		if (twl4030->carkitr_enabled)
 130			write_to_reg = true;
 131		break;
 132	case TWL4030_REG_HS_GAIN_SET:
 133		if (twl4030->hsl_enabled || twl4030->hsr_enabled)
 134			write_to_reg = true;
 135		break;
 136	default:
 137		/* All other register can be written */
 138		write_to_reg = true;
 139		break;
 140	}
 141
 142	return write_to_reg;
 143}
 144
 145static int twl4030_write(struct snd_soc_component *component, unsigned int reg,
 146			 unsigned int value)
 147{
 148	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
 149
 150	/* Update the ctl cache */
 151	switch (reg) {
 152	case TWL4030_REG_EAR_CTL:
 153	case TWL4030_REG_PREDL_CTL:
 154	case TWL4030_REG_PREDR_CTL:
 155	case TWL4030_REG_PRECKL_CTL:
 156	case TWL4030_REG_PRECKR_CTL:
 157	case TWL4030_REG_HS_GAIN_SET:
 158		twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
 159		break;
 160	default:
 161		break;
 162	}
 163
 164	if (twl4030_can_write_to_chip(twl4030, reg))
 165		return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
 166
 167	return 0;
 168}
 169
 170static inline void twl4030_wait_ms(int time)
 171{
 172	if (time < 60) {
 173		time *= 1000;
 174		usleep_range(time, time + 500);
 175	} else {
 176		msleep(time);
 177	}
 178}
 179
 180static void twl4030_codec_enable(struct snd_soc_component *component, int enable)
 181{
 182	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
 183	int mode;
 184
 185	if (enable == twl4030->codec_powered)
 186		return;
 187
 188	if (enable)
 189		mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
 190	else
 191		mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
 192
 193	if (mode >= 0)
 194		twl4030->codec_powered = enable;
 195
 196	/* REVISIT: this delay is present in TI sample drivers */
 197	/* but there seems to be no TRM requirement for it     */
 198	udelay(10);
 199}
 200
 201static void
 202twl4030_get_board_param_values(struct twl4030_board_params *board_params,
 203			       struct device_node *node)
 204{
 205	int value;
 206
 207	of_property_read_u32(node, "ti,digimic_delay", &board_params->digimic_delay);
 208	of_property_read_u32(node, "ti,ramp_delay_value", &board_params->ramp_delay_value);
 209	of_property_read_u32(node, "ti,offset_cncl_path", &board_params->offset_cncl_path);
 210	if (!of_property_read_u32(node, "ti,hs_extmute", &value))
 211		board_params->hs_extmute = value;
 212
 213	if (of_property_present(node, "ti,hs_extmute_gpio"))
 214		board_params->hs_extmute = 1;
 215}
 216
 217static struct twl4030_board_params*
 218twl4030_get_board_params(struct snd_soc_component *component)
 219{
 220	struct twl4030_board_params *board_params = NULL;
 221	struct device_node *twl4030_codec_node = NULL;
 222
 223	twl4030_codec_node = of_get_child_by_name(component->dev->parent->of_node,
 224						  "codec");
 225
 226	if (twl4030_codec_node) {
 227		board_params = devm_kzalloc(component->dev,
 228					    sizeof(struct twl4030_board_params),
 229					    GFP_KERNEL);
 230		if (!board_params) {
 231			of_node_put(twl4030_codec_node);
 232			return NULL;
 233		}
 234		twl4030_get_board_param_values(board_params, twl4030_codec_node);
 235		of_node_put(twl4030_codec_node);
 236	}
 237
 238	return board_params;
 239}
 240
 241static int twl4030_init_chip(struct snd_soc_component *component)
 242{
 243	struct twl4030_board_params *board_params;
 244	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
 245	u8 reg, byte;
 246	int i = 0;
 247
 248	board_params = twl4030_get_board_params(component);
 249
 250	if (board_params && board_params->hs_extmute) {
 251		board_params->hs_extmute_gpio = devm_gpiod_get_optional(component->dev,
 252									"ti,hs_extmute",
 253									GPIOD_OUT_LOW);
 254		if (IS_ERR(board_params->hs_extmute_gpio))
 255			return dev_err_probe(component->dev, PTR_ERR(board_params->hs_extmute_gpio),
 256					     "Failed to get hs_extmute GPIO\n");
 257
 258		if (board_params->hs_extmute_gpio) {
 259			gpiod_set_consumer_name(board_params->hs_extmute_gpio, "hs_extmute");
 260		} else {
 261			u8 pin_mux;
 262
 263			dev_info(component->dev, "use TWL4030 GPIO6\n");
 264
 265			/* Set TWL4030 GPIO6 as EXTMUTE signal */
 266			twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
 267					TWL4030_PMBR1_REG);
 268			pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
 269			pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
 270			twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
 271					 TWL4030_PMBR1_REG);
 272		}
 273	}
 274
 275	/* Initialize the local ctl register cache */
 276	tw4030_init_ctl_cache(twl4030);
 277
 278	/* anti-pop when changing analog gain */
 279	reg = twl4030_read(component, TWL4030_REG_MISC_SET_1);
 280	twl4030_write(component, TWL4030_REG_MISC_SET_1,
 281		      reg | TWL4030_SMOOTH_ANAVOL_EN);
 282
 283	twl4030_write(component, TWL4030_REG_OPTION,
 284		      TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
 285		      TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
 286
 287	/* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
 288	twl4030_write(component, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
 289
 290	/* Machine dependent setup */
 291	if (!board_params)
 292		return 0;
 293
 294	twl4030->board_params = board_params;
 295
 296	reg = twl4030_read(component, TWL4030_REG_HS_POPN_SET);
 297	reg &= ~TWL4030_RAMP_DELAY;
 298	reg |= (board_params->ramp_delay_value << 2);
 299	twl4030_write(component, TWL4030_REG_HS_POPN_SET, reg);
 300
 301	/* initiate offset cancellation */
 302	twl4030_codec_enable(component, 1);
 303
 304	reg = twl4030_read(component, TWL4030_REG_ANAMICL);
 305	reg &= ~TWL4030_OFFSET_CNCL_SEL;
 306	reg |= board_params->offset_cncl_path;
 307	twl4030_write(component, TWL4030_REG_ANAMICL,
 308		      reg | TWL4030_CNCL_OFFSET_START);
 309
 310	/*
 311	 * Wait for offset cancellation to complete.
 312	 * Since this takes a while, do not slam the i2c.
 313	 * Start polling the status after ~20ms.
 314	 */
 315	msleep(20);
 316	do {
 317		usleep_range(1000, 2000);
 318		twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
 319		twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
 320				TWL4030_REG_ANAMICL);
 321		twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
 322	} while ((i++ < 100) &&
 323		 ((byte & TWL4030_CNCL_OFFSET_START) ==
 324		  TWL4030_CNCL_OFFSET_START));
 325
 326	twl4030_codec_enable(component, 0);
 327
 328	return 0;
 329}
 330
 331static void twl4030_apll_enable(struct snd_soc_component *component, int enable)
 332{
 333	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
 334
 335	if (enable) {
 336		twl4030->apll_enabled++;
 337		if (twl4030->apll_enabled == 1)
 338			twl4030_audio_enable_resource(
 339							TWL4030_AUDIO_RES_APLL);
 340	} else {
 341		twl4030->apll_enabled--;
 342		if (!twl4030->apll_enabled)
 343			twl4030_audio_disable_resource(
 344							TWL4030_AUDIO_RES_APLL);
 345	}
 346}
 347
 348/* Earpiece */
 349static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
 350	SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
 351	SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
 352	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
 353	SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
 354};
 355
 356/* PreDrive Left */
 357static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
 358	SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
 359	SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
 360	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
 361	SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
 362};
 363
 364/* PreDrive Right */
 365static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
 366	SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
 367	SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
 368	SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
 369	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
 370};
 371
 372/* Headset Left */
 373static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
 374	SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
 375	SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
 376	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
 377};
 378
 379/* Headset Right */
 380static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
 381	SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
 382	SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
 383	SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
 384};
 385
 386/* Carkit Left */
 387static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
 388	SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
 389	SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
 390	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
 391};
 392
 393/* Carkit Right */
 394static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
 395	SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
 396	SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
 397	SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
 398};
 399
 400/* Handsfree Left */
 401static const char *twl4030_handsfreel_texts[] =
 402		{"Voice", "AudioL1", "AudioL2", "AudioR2"};
 403
 404static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
 405			    TWL4030_REG_HFL_CTL, 0,
 406			    twl4030_handsfreel_texts);
 407
 408static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
 409SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
 410
 411/* Handsfree Left virtual mute */
 412static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
 413	SOC_DAPM_SINGLE_VIRT("Switch", 1);
 414
 415/* Handsfree Right */
 416static const char *twl4030_handsfreer_texts[] =
 417		{"Voice", "AudioR1", "AudioR2", "AudioL2"};
 418
 419static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
 420			    TWL4030_REG_HFR_CTL, 0,
 421			    twl4030_handsfreer_texts);
 422
 423static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
 424SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
 425
 426/* Handsfree Right virtual mute */
 427static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
 428	SOC_DAPM_SINGLE_VIRT("Switch", 1);
 429
 430/* Vibra */
 431/* Vibra audio path selection */
 432static const char *twl4030_vibra_texts[] =
 433		{"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
 434
 435static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
 436			    TWL4030_REG_VIBRA_CTL, 2,
 437			    twl4030_vibra_texts);
 438
 439static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
 440SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
 441
 442/* Vibra path selection: local vibrator (PWM) or audio driven */
 443static const char *twl4030_vibrapath_texts[] =
 444		{"Local vibrator", "Audio"};
 445
 446static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
 447			    TWL4030_REG_VIBRA_CTL, 4,
 448			    twl4030_vibrapath_texts);
 449
 450static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
 451SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
 452
 453/* Left analog microphone selection */
 454static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
 455	SOC_DAPM_SINGLE("Main Mic Capture Switch",
 456			TWL4030_REG_ANAMICL, 0, 1, 0),
 457	SOC_DAPM_SINGLE("Headset Mic Capture Switch",
 458			TWL4030_REG_ANAMICL, 1, 1, 0),
 459	SOC_DAPM_SINGLE("AUXL Capture Switch",
 460			TWL4030_REG_ANAMICL, 2, 1, 0),
 461	SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
 462			TWL4030_REG_ANAMICL, 3, 1, 0),
 463};
 464
 465/* Right analog microphone selection */
 466static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
 467	SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
 468	SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
 469};
 470
 471/* TX1 L/R Analog/Digital microphone selection */
 472static const char *twl4030_micpathtx1_texts[] =
 473		{"Analog", "Digimic0"};
 474
 475static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
 476			    TWL4030_REG_ADCMICSEL, 0,
 477			    twl4030_micpathtx1_texts);
 478
 479static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
 480SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
 481
 482/* TX2 L/R Analog/Digital microphone selection */
 483static const char *twl4030_micpathtx2_texts[] =
 484		{"Analog", "Digimic1"};
 485
 486static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
 487			    TWL4030_REG_ADCMICSEL, 2,
 488			    twl4030_micpathtx2_texts);
 489
 490static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
 491SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
 492
 493/* Analog bypass for AudioR1 */
 494static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
 495	SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
 496
 497/* Analog bypass for AudioL1 */
 498static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
 499	SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
 500
 501/* Analog bypass for AudioR2 */
 502static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
 503	SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
 504
 505/* Analog bypass for AudioL2 */
 506static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
 507	SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
 508
 509/* Analog bypass for Voice */
 510static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
 511	SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
 512
 513/* Digital bypass gain, mute instead of -30dB */
 514static const DECLARE_TLV_DB_RANGE(twl4030_dapm_dbypass_tlv,
 515	0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
 516	2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
 517	4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0)
 518);
 519
 520/* Digital bypass left (TX1L -> RX2L) */
 521static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
 522	SOC_DAPM_SINGLE_TLV("Volume",
 523			TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
 524			twl4030_dapm_dbypass_tlv);
 525
 526/* Digital bypass right (TX1R -> RX2R) */
 527static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
 528	SOC_DAPM_SINGLE_TLV("Volume",
 529			TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
 530			twl4030_dapm_dbypass_tlv);
 531
 532/*
 533 * Voice Sidetone GAIN volume control:
 534 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
 535 */
 536static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
 537
 538/* Digital bypass voice: sidetone (VUL -> VDL)*/
 539static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
 540	SOC_DAPM_SINGLE_TLV("Volume",
 541			TWL4030_REG_VSTPGA, 0, 0x29, 0,
 542			twl4030_dapm_dbypassv_tlv);
 543
 544/*
 545 * Output PGA builder:
 546 * Handle the muting and unmuting of the given output (turning off the
 547 * amplifier associated with the output pin)
 548 * On mute bypass the reg_cache and write 0 to the register
 549 * On unmute: restore the register content from the reg_cache
 550 * Outputs handled in this way:  Earpiece, PreDrivL/R, CarkitL/R
 551 */
 552#define TWL4030_OUTPUT_PGA(pin_name, reg)				\
 553static int pin_name##pga_event(struct snd_soc_dapm_widget *w,		\
 554			       struct snd_kcontrol *kcontrol, int event) \
 555{									\
 556	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);	\
 557	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); \
 558									\
 559	switch (event) {						\
 560	case SND_SOC_DAPM_POST_PMU:					\
 561		twl4030->pin_name##_enabled = 1;			\
 562		twl4030_write(component, reg, twl4030_read(component, reg));	\
 563		break;							\
 564	case SND_SOC_DAPM_POST_PMD:					\
 565		twl4030->pin_name##_enabled = 0;			\
 566		twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg);	\
 567		break;							\
 568	}								\
 569	return 0;							\
 570}
 571
 572TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL);
 573TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL);
 574TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL);
 575TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL);
 576TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL);
 577
 578static void handsfree_ramp(struct snd_soc_component *component, int reg, int ramp)
 579{
 580	unsigned char hs_ctl;
 581
 582	hs_ctl = twl4030_read(component, reg);
 583
 584	if (ramp) {
 585		/* HF ramp-up */
 586		hs_ctl |= TWL4030_HF_CTL_REF_EN;
 587		twl4030_write(component, reg, hs_ctl);
 588		udelay(10);
 589		hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
 590		twl4030_write(component, reg, hs_ctl);
 591		udelay(40);
 592		hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
 593		hs_ctl |= TWL4030_HF_CTL_HB_EN;
 594		twl4030_write(component, reg, hs_ctl);
 595	} else {
 596		/* HF ramp-down */
 597		hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
 598		hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
 599		twl4030_write(component, reg, hs_ctl);
 600		hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
 601		twl4030_write(component, reg, hs_ctl);
 602		udelay(40);
 603		hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
 604		twl4030_write(component, reg, hs_ctl);
 605	}
 606}
 607
 608static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
 609			       struct snd_kcontrol *kcontrol, int event)
 610{
 611	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 612
 613	switch (event) {
 614	case SND_SOC_DAPM_POST_PMU:
 615		handsfree_ramp(component, TWL4030_REG_HFL_CTL, 1);
 616		break;
 617	case SND_SOC_DAPM_POST_PMD:
 618		handsfree_ramp(component, TWL4030_REG_HFL_CTL, 0);
 619		break;
 620	}
 621	return 0;
 622}
 623
 624static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
 625			       struct snd_kcontrol *kcontrol, int event)
 626{
 627	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 628
 629	switch (event) {
 630	case SND_SOC_DAPM_POST_PMU:
 631		handsfree_ramp(component, TWL4030_REG_HFR_CTL, 1);
 632		break;
 633	case SND_SOC_DAPM_POST_PMD:
 634		handsfree_ramp(component, TWL4030_REG_HFR_CTL, 0);
 635		break;
 636	}
 637	return 0;
 638}
 639
 640static int vibramux_event(struct snd_soc_dapm_widget *w,
 641			  struct snd_kcontrol *kcontrol, int event)
 642{
 643	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 644
 645	twl4030_write(component, TWL4030_REG_VIBRA_SET, 0xff);
 646	return 0;
 647}
 648
 649static int apll_event(struct snd_soc_dapm_widget *w,
 650		      struct snd_kcontrol *kcontrol, int event)
 651{
 652	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 653
 654	switch (event) {
 655	case SND_SOC_DAPM_PRE_PMU:
 656		twl4030_apll_enable(component, 1);
 657		break;
 658	case SND_SOC_DAPM_POST_PMD:
 659		twl4030_apll_enable(component, 0);
 660		break;
 661	}
 662	return 0;
 663}
 664
 665static int aif_event(struct snd_soc_dapm_widget *w,
 666		     struct snd_kcontrol *kcontrol, int event)
 667{
 668	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 669	u8 audio_if;
 670
 671	audio_if = twl4030_read(component, TWL4030_REG_AUDIO_IF);
 672	switch (event) {
 673	case SND_SOC_DAPM_PRE_PMU:
 674		/* Enable AIF */
 675		/* enable the PLL before we use it to clock the DAI */
 676		twl4030_apll_enable(component, 1);
 677
 678		twl4030_write(component, TWL4030_REG_AUDIO_IF,
 679			      audio_if | TWL4030_AIF_EN);
 680		break;
 681	case SND_SOC_DAPM_POST_PMD:
 682		/* disable the DAI before we stop it's source PLL */
 683		twl4030_write(component, TWL4030_REG_AUDIO_IF,
 684			      audio_if &  ~TWL4030_AIF_EN);
 685		twl4030_apll_enable(component, 0);
 686		break;
 687	}
 688	return 0;
 689}
 690
 691static void headset_ramp(struct snd_soc_component *component, int ramp)
 692{
 693	unsigned char hs_gain, hs_pop;
 694	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
 695	struct twl4030_board_params *board_params = twl4030->board_params;
 696	/* Base values for ramp delay calculation: 2^19 - 2^26 */
 697	static const unsigned int ramp_base[] = {
 698		524288, 1048576, 2097152, 4194304,
 699		8388608, 16777216, 33554432, 67108864
 700	};
 701	unsigned int delay;
 702
 703	hs_gain = twl4030_read(component, TWL4030_REG_HS_GAIN_SET);
 704	hs_pop = twl4030_read(component, TWL4030_REG_HS_POPN_SET);
 705	delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
 706		twl4030->sysclk) + 1;
 707
 708	/* Enable external mute control, this dramatically reduces
 709	 * the pop-noise */
 710	if (board_params && board_params->hs_extmute) {
 711		if (board_params->hs_extmute_gpio) {
 712			gpiod_set_value(board_params->hs_extmute_gpio, 1);
 713		} else {
 714			hs_pop |= TWL4030_EXTMUTE;
 715			twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
 716		}
 717	}
 718
 719	if (ramp) {
 720		/* Headset ramp-up according to the TRM */
 721		hs_pop |= TWL4030_VMID_EN;
 722		twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
 723		/* Actually write to the register */
 724		twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
 725				 TWL4030_REG_HS_GAIN_SET);
 726		hs_pop |= TWL4030_RAMP_EN;
 727		twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
 728		/* Wait ramp delay time + 1, so the VMID can settle */
 729		twl4030_wait_ms(delay);
 730	} else {
 731		/* Headset ramp-down _not_ according to
 732		 * the TRM, but in a way that it is working */
 733		hs_pop &= ~TWL4030_RAMP_EN;
 734		twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
 735		/* Wait ramp delay time + 1, so the VMID can settle */
 736		twl4030_wait_ms(delay);
 737		/* Bypass the reg_cache to mute the headset */
 738		twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
 739				 TWL4030_REG_HS_GAIN_SET);
 740
 741		hs_pop &= ~TWL4030_VMID_EN;
 742		twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
 743	}
 744
 745	/* Disable external mute */
 746	if (board_params && board_params->hs_extmute) {
 747		if (board_params->hs_extmute_gpio) {
 748			gpiod_set_value(board_params->hs_extmute_gpio, 0);
 749		} else {
 750			hs_pop &= ~TWL4030_EXTMUTE;
 751			twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
 752		}
 753	}
 754}
 755
 756static int headsetlpga_event(struct snd_soc_dapm_widget *w,
 757			     struct snd_kcontrol *kcontrol, int event)
 758{
 759	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 760	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
 761
 762	switch (event) {
 763	case SND_SOC_DAPM_POST_PMU:
 764		/* Do the ramp-up only once */
 765		if (!twl4030->hsr_enabled)
 766			headset_ramp(component, 1);
 767
 768		twl4030->hsl_enabled = 1;
 769		break;
 770	case SND_SOC_DAPM_POST_PMD:
 771		/* Do the ramp-down only if both headsetL/R is disabled */
 772		if (!twl4030->hsr_enabled)
 773			headset_ramp(component, 0);
 774
 775		twl4030->hsl_enabled = 0;
 776		break;
 777	}
 778	return 0;
 779}
 780
 781static int headsetrpga_event(struct snd_soc_dapm_widget *w,
 782			     struct snd_kcontrol *kcontrol, int event)
 783{
 784	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 785	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
 786
 787	switch (event) {
 788	case SND_SOC_DAPM_POST_PMU:
 789		/* Do the ramp-up only once */
 790		if (!twl4030->hsl_enabled)
 791			headset_ramp(component, 1);
 792
 793		twl4030->hsr_enabled = 1;
 794		break;
 795	case SND_SOC_DAPM_POST_PMD:
 796		/* Do the ramp-down only if both headsetL/R is disabled */
 797		if (!twl4030->hsl_enabled)
 798			headset_ramp(component, 0);
 799
 800		twl4030->hsr_enabled = 0;
 801		break;
 802	}
 803	return 0;
 804}
 805
 806static int digimic_event(struct snd_soc_dapm_widget *w,
 807			 struct snd_kcontrol *kcontrol, int event)
 808{
 809	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 810	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
 811	struct twl4030_board_params *board_params = twl4030->board_params;
 812
 813	if (board_params && board_params->digimic_delay)
 814		twl4030_wait_ms(board_params->digimic_delay);
 815	return 0;
 816}
 817
 818/*
 819 * Some of the gain controls in TWL (mostly those which are associated with
 820 * the outputs) are implemented in an interesting way:
 821 * 0x0 : Power down (mute)
 822 * 0x1 : 6dB
 823 * 0x2 : 0 dB
 824 * 0x3 : -6 dB
 825 * Inverting not going to help with these.
 826 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
 827 */
 828static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
 829				     struct snd_ctl_elem_value *ucontrol)
 830{
 831	struct soc_mixer_control *mc =
 832		(struct soc_mixer_control *)kcontrol->private_value;
 833	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 834	unsigned int reg = mc->reg;
 835	unsigned int shift = mc->shift;
 836	unsigned int rshift = mc->rshift;
 837	int max = mc->max;
 838	int mask = (1 << fls(max)) - 1;
 839
 840	ucontrol->value.integer.value[0] =
 841		(twl4030_read(component, reg) >> shift) & mask;
 842	if (ucontrol->value.integer.value[0])
 843		ucontrol->value.integer.value[0] =
 844			max + 1 - ucontrol->value.integer.value[0];
 845
 846	if (shift != rshift) {
 847		ucontrol->value.integer.value[1] =
 848			(twl4030_read(component, reg) >> rshift) & mask;
 849		if (ucontrol->value.integer.value[1])
 850			ucontrol->value.integer.value[1] =
 851				max + 1 - ucontrol->value.integer.value[1];
 852	}
 853
 854	return 0;
 855}
 856
 857static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
 858				     struct snd_ctl_elem_value *ucontrol)
 859{
 860	struct soc_mixer_control *mc =
 861		(struct soc_mixer_control *)kcontrol->private_value;
 862	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 863	unsigned int reg = mc->reg;
 864	unsigned int shift = mc->shift;
 865	unsigned int rshift = mc->rshift;
 866	int max = mc->max;
 867	int mask = (1 << fls(max)) - 1;
 868	unsigned short val, val2, val_mask;
 869
 870	val = (ucontrol->value.integer.value[0] & mask);
 871
 872	val_mask = mask << shift;
 873	if (val)
 874		val = max + 1 - val;
 875	val = val << shift;
 876	if (shift != rshift) {
 877		val2 = (ucontrol->value.integer.value[1] & mask);
 878		val_mask |= mask << rshift;
 879		if (val2)
 880			val2 = max + 1 - val2;
 881		val |= val2 << rshift;
 882	}
 883	return snd_soc_component_update_bits(component, reg, val_mask, val);
 884}
 885
 886static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
 887					struct snd_ctl_elem_value *ucontrol)
 888{
 889	struct soc_mixer_control *mc =
 890		(struct soc_mixer_control *)kcontrol->private_value;
 891	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 892	unsigned int reg = mc->reg;
 893	unsigned int reg2 = mc->rreg;
 894	unsigned int shift = mc->shift;
 895	int max = mc->max;
 896	int mask = (1<<fls(max))-1;
 897
 898	ucontrol->value.integer.value[0] =
 899		(twl4030_read(component, reg) >> shift) & mask;
 900	ucontrol->value.integer.value[1] =
 901		(twl4030_read(component, reg2) >> shift) & mask;
 902
 903	if (ucontrol->value.integer.value[0])
 904		ucontrol->value.integer.value[0] =
 905			max + 1 - ucontrol->value.integer.value[0];
 906	if (ucontrol->value.integer.value[1])
 907		ucontrol->value.integer.value[1] =
 908			max + 1 - ucontrol->value.integer.value[1];
 909
 910	return 0;
 911}
 912
 913static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
 914					struct snd_ctl_elem_value *ucontrol)
 915{
 916	struct soc_mixer_control *mc =
 917		(struct soc_mixer_control *)kcontrol->private_value;
 918	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 919	unsigned int reg = mc->reg;
 920	unsigned int reg2 = mc->rreg;
 921	unsigned int shift = mc->shift;
 922	int max = mc->max;
 923	int mask = (1 << fls(max)) - 1;
 924	int err;
 925	unsigned short val, val2, val_mask;
 926
 927	val_mask = mask << shift;
 928	val = (ucontrol->value.integer.value[0] & mask);
 929	val2 = (ucontrol->value.integer.value[1] & mask);
 930
 931	if (val)
 932		val = max + 1 - val;
 933	if (val2)
 934		val2 = max + 1 - val2;
 935
 936	val = val << shift;
 937	val2 = val2 << shift;
 938
 939	err = snd_soc_component_update_bits(component, reg, val_mask, val);
 940	if (err < 0)
 941		return err;
 942
 943	err = snd_soc_component_update_bits(component, reg2, val_mask, val2);
 944	return err;
 945}
 946
 947/* Codec operation modes */
 948static const char *twl4030_op_modes_texts[] = {
 949	"Option 2 (voice/audio)", "Option 1 (audio)"
 950};
 951
 952static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
 953			    TWL4030_REG_CODEC_MODE, 0,
 954			    twl4030_op_modes_texts);
 955
 956static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
 957	struct snd_ctl_elem_value *ucontrol)
 958{
 959	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 960	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
 961
 962	if (twl4030->configured) {
 963		dev_err(component->dev,
 964			"operation mode cannot be changed on-the-fly\n");
 965		return -EBUSY;
 966	}
 967
 968	return snd_soc_put_enum_double(kcontrol, ucontrol);
 969}
 970
 971/*
 972 * FGAIN volume control:
 973 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
 974 */
 975static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
 976
 977/*
 978 * CGAIN volume control:
 979 * 0 dB to 12 dB in 6 dB steps
 980 * value 2 and 3 means 12 dB
 981 */
 982static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
 983
 984/*
 985 * Voice Downlink GAIN volume control:
 986 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
 987 */
 988static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
 989
 990/*
 991 * Analog playback gain
 992 * -24 dB to 12 dB in 2 dB steps
 993 */
 994static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
 995
 996/*
 997 * Gain controls tied to outputs
 998 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
 999 */
1000static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1001
1002/*
1003 * Gain control for earpiece amplifier
1004 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1005 */
1006static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1007
1008/*
1009 * Capture gain after the ADCs
1010 * from 0 dB to 31 dB in 1 dB steps
1011 */
1012static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1013
1014/*
1015 * Gain control for input amplifiers
1016 * 0 dB to 30 dB in 6 dB steps
1017 */
1018static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1019
1020/* AVADC clock priority */
1021static const char *twl4030_avadc_clk_priority_texts[] = {
1022	"Voice high priority", "HiFi high priority"
1023};
1024
1025static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
1026			    TWL4030_REG_AVADC_CTL, 2,
1027			    twl4030_avadc_clk_priority_texts);
1028
1029static const char *twl4030_rampdelay_texts[] = {
1030	"27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1031	"437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1032	"3495/2581/1748 ms"
1033};
1034
1035static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
1036			    TWL4030_REG_HS_POPN_SET, 2,
1037			    twl4030_rampdelay_texts);
1038
1039/* Vibra H-bridge direction mode */
1040static const char *twl4030_vibradirmode_texts[] = {
1041	"Vibra H-bridge direction", "Audio data MSB",
1042};
1043
1044static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
1045			    TWL4030_REG_VIBRA_CTL, 5,
1046			    twl4030_vibradirmode_texts);
1047
1048/* Vibra H-bridge direction */
1049static const char *twl4030_vibradir_texts[] = {
1050	"Positive polarity", "Negative polarity",
1051};
1052
1053static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
1054			    TWL4030_REG_VIBRA_CTL, 1,
1055			    twl4030_vibradir_texts);
1056
1057/* Digimic Left and right swapping */
1058static const char *twl4030_digimicswap_texts[] = {
1059	"Not swapped", "Swapped",
1060};
1061
1062static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
1063			    TWL4030_REG_MISC_SET_1, 0,
1064			    twl4030_digimicswap_texts);
1065
1066static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1067	/* Codec operation mode control */
1068	SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1069		snd_soc_get_enum_double,
1070		snd_soc_put_twl4030_opmode_enum_double),
1071
1072	/* Common playback gain controls */
1073	SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1074		TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1075		0, 0x3f, 0, digital_fine_tlv),
1076	SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1077		TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1078		0, 0x3f, 0, digital_fine_tlv),
1079
1080	SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1081		TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1082		6, 0x2, 0, digital_coarse_tlv),
1083	SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1084		TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1085		6, 0x2, 0, digital_coarse_tlv),
1086
1087	SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1088		TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1089		3, 0x12, 1, analog_tlv),
1090	SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1091		TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1092		3, 0x12, 1, analog_tlv),
1093	SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1094		TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1095		1, 1, 0),
1096	SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1097		TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1098		1, 1, 0),
1099
1100	/* Common voice downlink gain controls */
1101	SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1102		TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1103
1104	SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1105		TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1106
1107	SOC_SINGLE("DAC Voice Analog Downlink Switch",
1108		TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1109
1110	/* Separate output gain controls */
1111	SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
1112		TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1113		4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1114		snd_soc_put_volsw_r2_twl4030, output_tvl),
1115
1116	SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1117		TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1118		snd_soc_put_volsw_twl4030, output_tvl),
1119
1120	SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
1121		TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1122		4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1123		snd_soc_put_volsw_r2_twl4030, output_tvl),
1124
1125	SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1126		TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1127		snd_soc_put_volsw_twl4030, output_ear_tvl),
1128
1129	/* Common capture gain controls */
1130	SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1131		TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1132		0, 0x1f, 0, digital_capture_tlv),
1133	SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1134		TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1135		0, 0x1f, 0, digital_capture_tlv),
1136
1137	SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1138		0, 3, 5, 0, input_gain_tlv),
1139
1140	SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1141
1142	SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1143
1144	SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1145	SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1146
1147	SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1148};
1149
1150static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1151	/* Left channel inputs */
1152	SND_SOC_DAPM_INPUT("MAINMIC"),
1153	SND_SOC_DAPM_INPUT("HSMIC"),
1154	SND_SOC_DAPM_INPUT("AUXL"),
1155	SND_SOC_DAPM_INPUT("CARKITMIC"),
1156	/* Right channel inputs */
1157	SND_SOC_DAPM_INPUT("SUBMIC"),
1158	SND_SOC_DAPM_INPUT("AUXR"),
1159	/* Digital microphones (Stereo) */
1160	SND_SOC_DAPM_INPUT("DIGIMIC0"),
1161	SND_SOC_DAPM_INPUT("DIGIMIC1"),
1162
1163	/* Outputs */
1164	SND_SOC_DAPM_OUTPUT("EARPIECE"),
1165	SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1166	SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1167	SND_SOC_DAPM_OUTPUT("HSOL"),
1168	SND_SOC_DAPM_OUTPUT("HSOR"),
1169	SND_SOC_DAPM_OUTPUT("CARKITL"),
1170	SND_SOC_DAPM_OUTPUT("CARKITR"),
1171	SND_SOC_DAPM_OUTPUT("HFL"),
1172	SND_SOC_DAPM_OUTPUT("HFR"),
1173	SND_SOC_DAPM_OUTPUT("VIBRA"),
1174
1175	/* AIF and APLL clocks for running DAIs (including loopback) */
1176	SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1177	SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1178	SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1179
1180	/* DACs */
1181	SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1182	SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1183	SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1184	SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1185	SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
1186
1187	SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1188			    TWL4030_REG_VOICE_IF, 6, 0),
1189
1190	/* Analog bypasses */
1191	SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1192			&twl4030_dapm_abypassr1_control),
1193	SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1194			&twl4030_dapm_abypassl1_control),
1195	SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1196			&twl4030_dapm_abypassr2_control),
1197	SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1198			&twl4030_dapm_abypassl2_control),
1199	SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1200			&twl4030_dapm_abypassv_control),
1201
1202	/* Master analog loopback switch */
1203	SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1204			    NULL, 0),
1205
1206	/* Digital bypasses */
1207	SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1208			&twl4030_dapm_dbypassl_control),
1209	SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1210			&twl4030_dapm_dbypassr_control),
1211	SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1212			&twl4030_dapm_dbypassv_control),
1213
1214	/* Digital mixers, power control for the physical DACs */
1215	SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1216			TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1217	SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1218			TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1219	SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1220			TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1221	SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1222			TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1223	SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1224			TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1225
1226	/* Analog mixers, power control for the physical PGAs */
1227	SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1228			TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1229	SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1230			TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1231	SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1232			TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1233	SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1234			TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1235	SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1236			TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1237
1238	SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1239			    SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1240
1241	SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1242			    SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1243
1244	/* Output MIXER controls */
1245	/* Earpiece */
1246	SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1247			&twl4030_dapm_earpiece_controls[0],
1248			ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1249	SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1250			0, 0, NULL, 0, earpiecepga_event,
1251			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1252	/* PreDrivL/R */
1253	SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1254			&twl4030_dapm_predrivel_controls[0],
1255			ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1256	SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1257			0, 0, NULL, 0, predrivelpga_event,
1258			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1259	SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1260			&twl4030_dapm_predriver_controls[0],
1261			ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1262	SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1263			0, 0, NULL, 0, predriverpga_event,
1264			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1265	/* HeadsetL/R */
1266	SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1267			&twl4030_dapm_hsol_controls[0],
1268			ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1269	SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1270			0, 0, NULL, 0, headsetlpga_event,
1271			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1272	SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1273			&twl4030_dapm_hsor_controls[0],
1274			ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1275	SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1276			0, 0, NULL, 0, headsetrpga_event,
1277			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1278	/* CarkitL/R */
1279	SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1280			&twl4030_dapm_carkitl_controls[0],
1281			ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1282	SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1283			0, 0, NULL, 0, carkitlpga_event,
1284			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1285	SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1286			&twl4030_dapm_carkitr_controls[0],
1287			ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1288	SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1289			0, 0, NULL, 0, carkitrpga_event,
1290			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1291
1292	/* Output MUX controls */
1293	/* HandsfreeL/R */
1294	SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1295		&twl4030_dapm_handsfreel_control),
1296	SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1297			&twl4030_dapm_handsfreelmute_control),
1298	SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1299			0, 0, NULL, 0, handsfreelpga_event,
1300			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1301	SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1302		&twl4030_dapm_handsfreer_control),
1303	SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1304			&twl4030_dapm_handsfreermute_control),
1305	SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1306			0, 0, NULL, 0, handsfreerpga_event,
1307			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1308	/* Vibra */
1309	SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1310			   &twl4030_dapm_vibra_control, vibramux_event,
1311			   SND_SOC_DAPM_PRE_PMU),
1312	SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1313		&twl4030_dapm_vibrapath_control),
1314
1315	/* Introducing four virtual ADC, since TWL4030 have four channel for
1316	   capture */
1317	SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1318	SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1319	SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1320	SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
1321
1322	SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1323			     TWL4030_REG_VOICE_IF, 5, 0),
1324
1325	/* Analog/Digital mic path selection.
1326	   TX1 Left/Right: either analog Left/Right or Digimic0
1327	   TX2 Left/Right: either analog Left/Right or Digimic1 */
1328	SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1329		&twl4030_dapm_micpathtx1_control),
1330	SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1331		&twl4030_dapm_micpathtx2_control),
1332
1333	/* Analog input mixers for the capture amplifiers */
1334	SND_SOC_DAPM_MIXER("Analog Left",
1335		TWL4030_REG_ANAMICL, 4, 0,
1336		&twl4030_dapm_analoglmic_controls[0],
1337		ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1338	SND_SOC_DAPM_MIXER("Analog Right",
1339		TWL4030_REG_ANAMICR, 4, 0,
1340		&twl4030_dapm_analogrmic_controls[0],
1341		ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1342
1343	SND_SOC_DAPM_PGA("ADC Physical Left",
1344		TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1345	SND_SOC_DAPM_PGA("ADC Physical Right",
1346		TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1347
1348	SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1349		TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1350		digimic_event, SND_SOC_DAPM_POST_PMU),
1351	SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1352		TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1353		digimic_event, SND_SOC_DAPM_POST_PMU),
1354
1355	SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1356			    NULL, 0),
1357	SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1358			    NULL, 0),
1359
1360	/* Microphone bias */
1361	SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1362			    TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1363	SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1364			    TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1365	SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1366			    TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
1367
1368	SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
1369};
1370
1371static const struct snd_soc_dapm_route intercon[] = {
1372	/* Stream -> DAC mapping */
1373	{"DAC Right1", NULL, "HiFi Playback"},
1374	{"DAC Left1", NULL, "HiFi Playback"},
1375	{"DAC Right2", NULL, "HiFi Playback"},
1376	{"DAC Left2", NULL, "HiFi Playback"},
1377	{"DAC Voice", NULL, "VAIFIN"},
1378
1379	/* ADC -> Stream mapping */
1380	{"HiFi Capture", NULL, "ADC Virtual Left1"},
1381	{"HiFi Capture", NULL, "ADC Virtual Right1"},
1382	{"HiFi Capture", NULL, "ADC Virtual Left2"},
1383	{"HiFi Capture", NULL, "ADC Virtual Right2"},
1384	{"VAIFOUT", NULL, "ADC Virtual Left2"},
1385	{"VAIFOUT", NULL, "ADC Virtual Right2"},
1386	{"VAIFOUT", NULL, "VIF Enable"},
1387
1388	{"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1389	{"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1390	{"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1391	{"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1392	{"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1393
1394	/* Supply for the digital part (APLL) */
1395	{"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1396
1397	{"DAC Left1", NULL, "AIF Enable"},
1398	{"DAC Right1", NULL, "AIF Enable"},
1399	{"DAC Left2", NULL, "AIF Enable"},
1400	{"DAC Right1", NULL, "AIF Enable"},
1401	{"DAC Voice", NULL, "VIF Enable"},
1402
1403	{"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1404	{"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1405
1406	{"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1407	{"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1408	{"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1409	{"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1410	{"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1411
1412	/* Internal playback routings */
1413	/* Earpiece */
1414	{"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1415	{"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1416	{"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1417	{"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1418	{"Earpiece PGA", NULL, "Earpiece Mixer"},
1419	/* PreDrivL */
1420	{"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1421	{"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1422	{"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1423	{"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1424	{"PredriveL PGA", NULL, "PredriveL Mixer"},
1425	/* PreDrivR */
1426	{"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1427	{"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1428	{"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1429	{"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1430	{"PredriveR PGA", NULL, "PredriveR Mixer"},
1431	/* HeadsetL */
1432	{"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1433	{"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1434	{"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1435	{"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1436	/* HeadsetR */
1437	{"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1438	{"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1439	{"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1440	{"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1441	/* CarkitL */
1442	{"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1443	{"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1444	{"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1445	{"CarkitL PGA", NULL, "CarkitL Mixer"},
1446	/* CarkitR */
1447	{"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1448	{"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1449	{"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1450	{"CarkitR PGA", NULL, "CarkitR Mixer"},
1451	/* HandsfreeL */
1452	{"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1453	{"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1454	{"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1455	{"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1456	{"HandsfreeL", "Switch", "HandsfreeL Mux"},
1457	{"HandsfreeL PGA", NULL, "HandsfreeL"},
1458	/* HandsfreeR */
1459	{"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1460	{"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1461	{"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1462	{"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1463	{"HandsfreeR", "Switch", "HandsfreeR Mux"},
1464	{"HandsfreeR PGA", NULL, "HandsfreeR"},
1465	/* Vibra */
1466	{"Vibra Mux", "AudioL1", "DAC Left1"},
1467	{"Vibra Mux", "AudioR1", "DAC Right1"},
1468	{"Vibra Mux", "AudioL2", "DAC Left2"},
1469	{"Vibra Mux", "AudioR2", "DAC Right2"},
1470
1471	/* outputs */
1472	/* Must be always connected (for AIF and APLL) */
1473	{"Virtual HiFi OUT", NULL, "DAC Left1"},
1474	{"Virtual HiFi OUT", NULL, "DAC Right1"},
1475	{"Virtual HiFi OUT", NULL, "DAC Left2"},
1476	{"Virtual HiFi OUT", NULL, "DAC Right2"},
1477	/* Must be always connected (for APLL) */
1478	{"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1479	/* Physical outputs */
1480	{"EARPIECE", NULL, "Earpiece PGA"},
1481	{"PREDRIVEL", NULL, "PredriveL PGA"},
1482	{"PREDRIVER", NULL, "PredriveR PGA"},
1483	{"HSOL", NULL, "HeadsetL PGA"},
1484	{"HSOR", NULL, "HeadsetR PGA"},
1485	{"CARKITL", NULL, "CarkitL PGA"},
1486	{"CARKITR", NULL, "CarkitR PGA"},
1487	{"HFL", NULL, "HandsfreeL PGA"},
1488	{"HFR", NULL, "HandsfreeR PGA"},
1489	{"Vibra Route", "Audio", "Vibra Mux"},
1490	{"VIBRA", NULL, "Vibra Route"},
1491
1492	/* Capture path */
1493	/* Must be always connected (for AIF and APLL) */
1494	{"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1495	{"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1496	{"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1497	{"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1498	/* Physical inputs */
1499	{"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1500	{"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1501	{"Analog Left", "AUXL Capture Switch", "AUXL"},
1502	{"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1503
1504	{"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1505	{"Analog Right", "AUXR Capture Switch", "AUXR"},
1506
1507	{"ADC Physical Left", NULL, "Analog Left"},
1508	{"ADC Physical Right", NULL, "Analog Right"},
1509
1510	{"Digimic0 Enable", NULL, "DIGIMIC0"},
1511	{"Digimic1 Enable", NULL, "DIGIMIC1"},
1512
1513	{"DIGIMIC0", NULL, "micbias1 select"},
1514	{"DIGIMIC1", NULL, "micbias2 select"},
1515
1516	/* TX1 Left capture path */
1517	{"TX1 Capture Route", "Analog", "ADC Physical Left"},
1518	{"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1519	/* TX1 Right capture path */
1520	{"TX1 Capture Route", "Analog", "ADC Physical Right"},
1521	{"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1522	/* TX2 Left capture path */
1523	{"TX2 Capture Route", "Analog", "ADC Physical Left"},
1524	{"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1525	/* TX2 Right capture path */
1526	{"TX2 Capture Route", "Analog", "ADC Physical Right"},
1527	{"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1528
1529	{"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1530	{"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1531	{"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1532	{"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1533
1534	{"ADC Virtual Left1", NULL, "AIF Enable"},
1535	{"ADC Virtual Right1", NULL, "AIF Enable"},
1536	{"ADC Virtual Left2", NULL, "AIF Enable"},
1537	{"ADC Virtual Right2", NULL, "AIF Enable"},
1538
1539	/* Analog bypass routes */
1540	{"Right1 Analog Loopback", "Switch", "Analog Right"},
1541	{"Left1 Analog Loopback", "Switch", "Analog Left"},
1542	{"Right2 Analog Loopback", "Switch", "Analog Right"},
1543	{"Left2 Analog Loopback", "Switch", "Analog Left"},
1544	{"Voice Analog Loopback", "Switch", "Analog Left"},
1545
1546	/* Supply for the Analog loopbacks */
1547	{"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1548	{"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1549	{"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1550	{"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1551	{"Voice Analog Loopback", NULL, "FM Loop Enable"},
1552
1553	{"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1554	{"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1555	{"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1556	{"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1557	{"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1558
1559	/* Digital bypass routes */
1560	{"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1561	{"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1562	{"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1563
1564	{"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1565	{"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1566	{"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1567
1568};
1569
1570static int twl4030_set_bias_level(struct snd_soc_component *component,
1571				  enum snd_soc_bias_level level)
1572{
1573	struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component);
1574
1575	switch (level) {
1576	case SND_SOC_BIAS_ON:
1577		break;
1578	case SND_SOC_BIAS_PREPARE:
1579		break;
1580	case SND_SOC_BIAS_STANDBY:
1581		if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_OFF)
1582			twl4030_codec_enable(component, 1);
1583		break;
1584	case SND_SOC_BIAS_OFF:
1585		twl4030_codec_enable(component, 0);
1586		break;
1587	}
1588
1589	return 0;
1590}
1591
1592static void twl4030_constraints(struct twl4030_priv *twl4030,
1593				struct snd_pcm_substream *mst_substream)
1594{
1595	struct snd_pcm_substream *slv_substream;
1596
1597	/* Pick the stream, which need to be constrained */
1598	if (mst_substream == twl4030->master_substream)
1599		slv_substream = twl4030->slave_substream;
1600	else if (mst_substream == twl4030->slave_substream)
1601		slv_substream = twl4030->master_substream;
1602	else /* This should not happen.. */
1603		return;
1604
1605	/* Set the constraints according to the already configured stream */
1606	snd_pcm_hw_constraint_single(slv_substream->runtime,
1607				SNDRV_PCM_HW_PARAM_RATE,
1608				twl4030->rate);
1609
1610	snd_pcm_hw_constraint_single(slv_substream->runtime,
1611				SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1612				twl4030->sample_bits);
1613
1614	snd_pcm_hw_constraint_single(slv_substream->runtime,
1615				SNDRV_PCM_HW_PARAM_CHANNELS,
1616				twl4030->channels);
1617}
1618
1619/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1620 * capture has to be enabled/disabled. */
1621static void twl4030_tdm_enable(struct snd_soc_component *component, int direction,
1622			       int enable)
1623{
1624	u8 reg, mask;
1625
1626	reg = twl4030_read(component, TWL4030_REG_OPTION);
1627
1628	if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1629		mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1630	else
1631		mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1632
1633	if (enable)
1634		reg |= mask;
1635	else
1636		reg &= ~mask;
1637
1638	twl4030_write(component, TWL4030_REG_OPTION, reg);
1639}
1640
1641static int twl4030_startup(struct snd_pcm_substream *substream,
1642			   struct snd_soc_dai *dai)
1643{
1644	struct snd_soc_component *component = dai->component;
1645	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1646
1647	if (twl4030->master_substream) {
1648		twl4030->slave_substream = substream;
1649		/* The DAI has one configuration for playback and capture, so
1650		 * if the DAI has been already configured then constrain this
1651		 * substream to match it. */
1652		if (twl4030->configured)
1653			twl4030_constraints(twl4030, twl4030->master_substream);
1654	} else {
1655		if (!(twl4030_read(component, TWL4030_REG_CODEC_MODE) &
1656			TWL4030_OPTION_1)) {
1657			/* In option2 4 channel is not supported, set the
1658			 * constraint for the first stream for channels, the
1659			 * second stream will 'inherit' this cosntraint */
1660			snd_pcm_hw_constraint_single(substream->runtime,
1661						     SNDRV_PCM_HW_PARAM_CHANNELS,
1662						     2);
1663		}
1664		twl4030->master_substream = substream;
1665	}
1666
1667	return 0;
1668}
1669
1670static void twl4030_shutdown(struct snd_pcm_substream *substream,
1671			     struct snd_soc_dai *dai)
1672{
1673	struct snd_soc_component *component = dai->component;
1674	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1675
1676	if (twl4030->master_substream == substream)
1677		twl4030->master_substream = twl4030->slave_substream;
1678
1679	twl4030->slave_substream = NULL;
1680
1681	/* If all streams are closed, or the remaining stream has not yet
1682	 * been configured than set the DAI as not configured. */
1683	if (!twl4030->master_substream)
1684		twl4030->configured = 0;
1685	 else if (!twl4030->master_substream->runtime->channels)
1686		twl4030->configured = 0;
1687
1688	 /* If the closing substream had 4 channel, do the necessary cleanup */
1689	if (substream->runtime->channels == 4)
1690		twl4030_tdm_enable(component, substream->stream, 0);
1691}
1692
1693static int twl4030_hw_params(struct snd_pcm_substream *substream,
1694			     struct snd_pcm_hw_params *params,
1695			     struct snd_soc_dai *dai)
1696{
1697	struct snd_soc_component *component = dai->component;
1698	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1699	u8 mode, old_mode, format, old_format;
1700
1701	 /* If the substream has 4 channel, do the necessary setup */
1702	if (params_channels(params) == 4) {
1703		format = twl4030_read(component, TWL4030_REG_AUDIO_IF);
1704		mode = twl4030_read(component, TWL4030_REG_CODEC_MODE);
1705
1706		/* Safety check: are we in the correct operating mode and
1707		 * the interface is in TDM mode? */
1708		if ((mode & TWL4030_OPTION_1) &&
1709		    ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1710			twl4030_tdm_enable(component, substream->stream, 1);
1711		else
1712			return -EINVAL;
1713	}
1714
1715	if (twl4030->configured)
1716		/* Ignoring hw_params for already configured DAI */
1717		return 0;
1718
1719	/* bit rate */
1720	old_mode = twl4030_read(component,
1721				TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1722	mode = old_mode & ~TWL4030_APLL_RATE;
1723
1724	switch (params_rate(params)) {
1725	case 8000:
1726		mode |= TWL4030_APLL_RATE_8000;
1727		break;
1728	case 11025:
1729		mode |= TWL4030_APLL_RATE_11025;
1730		break;
1731	case 12000:
1732		mode |= TWL4030_APLL_RATE_12000;
1733		break;
1734	case 16000:
1735		mode |= TWL4030_APLL_RATE_16000;
1736		break;
1737	case 22050:
1738		mode |= TWL4030_APLL_RATE_22050;
1739		break;
1740	case 24000:
1741		mode |= TWL4030_APLL_RATE_24000;
1742		break;
1743	case 32000:
1744		mode |= TWL4030_APLL_RATE_32000;
1745		break;
1746	case 44100:
1747		mode |= TWL4030_APLL_RATE_44100;
1748		break;
1749	case 48000:
1750		mode |= TWL4030_APLL_RATE_48000;
1751		break;
1752	case 96000:
1753		mode |= TWL4030_APLL_RATE_96000;
1754		break;
1755	default:
1756		dev_err(component->dev, "%s: unknown rate %d\n", __func__,
1757			params_rate(params));
1758		return -EINVAL;
1759	}
1760
1761	/* sample size */
1762	old_format = twl4030_read(component, TWL4030_REG_AUDIO_IF);
1763	format = old_format;
1764	format &= ~TWL4030_DATA_WIDTH;
1765	switch (params_width(params)) {
1766	case 16:
1767		format |= TWL4030_DATA_WIDTH_16S_16W;
1768		break;
1769	case 32:
1770		format |= TWL4030_DATA_WIDTH_32S_24W;
1771		break;
1772	default:
1773		dev_err(component->dev, "%s: unsupported bits/sample %d\n",
1774			__func__, params_width(params));
1775		return -EINVAL;
1776	}
1777
1778	if (format != old_format || mode != old_mode) {
1779		if (twl4030->codec_powered) {
1780			/*
1781			 * If the codec is powered, than we need to toggle the
1782			 * codec power.
1783			 */
1784			twl4030_codec_enable(component, 0);
1785			twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
1786			twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
1787			twl4030_codec_enable(component, 1);
1788		} else {
1789			twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
1790			twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
1791		}
1792	}
1793
1794	/* Store the important parameters for the DAI configuration and set
1795	 * the DAI as configured */
1796	twl4030->configured = 1;
1797	twl4030->rate = params_rate(params);
1798	twl4030->sample_bits = hw_param_interval(params,
1799					SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1800	twl4030->channels = params_channels(params);
1801
1802	/* If both playback and capture streams are open, and one of them
1803	 * is setting the hw parameters right now (since we are here), set
1804	 * constraints to the other stream to match the current one. */
1805	if (twl4030->slave_substream)
1806		twl4030_constraints(twl4030, substream);
1807
1808	return 0;
1809}
1810
1811static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1812				  unsigned int freq, int dir)
1813{
1814	struct snd_soc_component *component = codec_dai->component;
1815	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1816
1817	switch (freq) {
1818	case 19200000:
1819	case 26000000:
1820	case 38400000:
1821		break;
1822	default:
1823		dev_err(component->dev, "Unsupported HFCLKIN: %u\n", freq);
1824		return -EINVAL;
1825	}
1826
1827	if ((freq / 1000) != twl4030->sysclk) {
1828		dev_err(component->dev,
1829			"Mismatch in HFCLKIN: %u (configured: %u)\n",
1830			freq, twl4030->sysclk * 1000);
1831		return -EINVAL;
1832	}
1833
1834	return 0;
1835}
1836
1837static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1838{
1839	struct snd_soc_component *component = codec_dai->component;
1840	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1841	u8 old_format, format;
1842
1843	/* get format */
1844	old_format = twl4030_read(component, TWL4030_REG_AUDIO_IF);
1845	format = old_format;
1846
1847	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
1848	case SND_SOC_DAIFMT_CBP_CFP:
1849		format &= ~(TWL4030_AIF_SLAVE_EN);
1850		format &= ~(TWL4030_CLK256FS_EN);
1851		break;
1852	case SND_SOC_DAIFMT_CBC_CFC:
1853		format |= TWL4030_AIF_SLAVE_EN;
1854		format |= TWL4030_CLK256FS_EN;
1855		break;
1856	default:
1857		return -EINVAL;
1858	}
1859
1860	/* interface format */
1861	format &= ~TWL4030_AIF_FORMAT;
1862	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1863	case SND_SOC_DAIFMT_I2S:
1864		format |= TWL4030_AIF_FORMAT_CODEC;
1865		break;
1866	case SND_SOC_DAIFMT_DSP_A:
1867		format |= TWL4030_AIF_FORMAT_TDM;
1868		break;
1869	default:
1870		return -EINVAL;
1871	}
1872
1873	if (format != old_format) {
1874		if (twl4030->codec_powered) {
1875			/*
1876			 * If the codec is powered, than we need to toggle the
1877			 * codec power.
1878			 */
1879			twl4030_codec_enable(component, 0);
1880			twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
1881			twl4030_codec_enable(component, 1);
1882		} else {
1883			twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
1884		}
1885	}
1886
1887	return 0;
1888}
1889
1890static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1891{
1892	struct snd_soc_component *component = dai->component;
1893	u8 reg = twl4030_read(component, TWL4030_REG_AUDIO_IF);
1894
1895	if (tristate)
1896		reg |= TWL4030_AIF_TRI_EN;
1897	else
1898		reg &= ~TWL4030_AIF_TRI_EN;
1899
1900	return twl4030_write(component, TWL4030_REG_AUDIO_IF, reg);
1901}
1902
1903/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1904 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1905static void twl4030_voice_enable(struct snd_soc_component *component, int direction,
1906				 int enable)
1907{
1908	u8 reg, mask;
1909
1910	reg = twl4030_read(component, TWL4030_REG_OPTION);
1911
1912	if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1913		mask = TWL4030_ARXL1_VRX_EN;
1914	else
1915		mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1916
1917	if (enable)
1918		reg |= mask;
1919	else
1920		reg &= ~mask;
1921
1922	twl4030_write(component, TWL4030_REG_OPTION, reg);
1923}
1924
1925static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1926				 struct snd_soc_dai *dai)
1927{
1928	struct snd_soc_component *component = dai->component;
1929	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1930	u8 mode;
1931
1932	/* If the system master clock is not 26MHz, the voice PCM interface is
1933	 * not available.
1934	 */
1935	if (twl4030->sysclk != 26000) {
1936		dev_err(component->dev,
1937			"%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1938			__func__, twl4030->sysclk);
1939		return -EINVAL;
1940	}
1941
1942	/* If the codec mode is not option2, the voice PCM interface is not
1943	 * available.
1944	 */
1945	mode = twl4030_read(component, TWL4030_REG_CODEC_MODE)
1946		& TWL4030_OPT_MODE;
1947
1948	if (mode != TWL4030_OPTION_2) {
1949		dev_err(component->dev, "%s: the codec mode is not option2\n",
1950			__func__);
1951		return -EINVAL;
1952	}
1953
1954	return 0;
1955}
1956
1957static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1958				   struct snd_soc_dai *dai)
1959{
1960	struct snd_soc_component *component = dai->component;
1961
1962	/* Enable voice digital filters */
1963	twl4030_voice_enable(component, substream->stream, 0);
1964}
1965
1966static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
1967				   struct snd_pcm_hw_params *params,
1968				   struct snd_soc_dai *dai)
1969{
1970	struct snd_soc_component *component = dai->component;
1971	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1972	u8 old_mode, mode;
1973
1974	/* Enable voice digital filters */
1975	twl4030_voice_enable(component, substream->stream, 1);
1976
1977	/* bit rate */
1978	old_mode = twl4030_read(component,
1979				TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1980	mode = old_mode;
1981
1982	switch (params_rate(params)) {
1983	case 8000:
1984		mode &= ~(TWL4030_SEL_16K);
1985		break;
1986	case 16000:
1987		mode |= TWL4030_SEL_16K;
1988		break;
1989	default:
1990		dev_err(component->dev, "%s: unknown rate %d\n", __func__,
1991			params_rate(params));
1992		return -EINVAL;
1993	}
1994
1995	if (mode != old_mode) {
1996		if (twl4030->codec_powered) {
1997			/*
1998			 * If the codec is powered, than we need to toggle the
1999			 * codec power.
2000			 */
2001			twl4030_codec_enable(component, 0);
2002			twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
2003			twl4030_codec_enable(component, 1);
2004		} else {
2005			twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
2006		}
2007	}
2008
2009	return 0;
2010}
2011
2012static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2013					int clk_id, unsigned int freq, int dir)
2014{
2015	struct snd_soc_component *component = codec_dai->component;
2016	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
2017
2018	if (freq != 26000000) {
2019		dev_err(component->dev,
2020			"%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2021			__func__, freq / 1000);
2022		return -EINVAL;
2023	}
2024	if ((freq / 1000) != twl4030->sysclk) {
2025		dev_err(component->dev,
2026			"Mismatch in HFCLKIN: %u (configured: %u)\n",
2027			freq, twl4030->sysclk * 1000);
2028		return -EINVAL;
2029	}
2030	return 0;
2031}
2032
2033static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2034				     unsigned int fmt)
2035{
2036	struct snd_soc_component *component = codec_dai->component;
2037	struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
2038	u8 old_format, format;
2039
2040	/* get format */
2041	old_format = twl4030_read(component, TWL4030_REG_VOICE_IF);
2042	format = old_format;
2043
2044	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
2045	case SND_SOC_DAIFMT_CBP_CFP:
2046		format &= ~(TWL4030_VIF_SLAVE_EN);
2047		break;
2048	case SND_SOC_DAIFMT_CBC_CFC:
2049		format |= TWL4030_VIF_SLAVE_EN;
2050		break;
2051	default:
2052		return -EINVAL;
2053	}
2054
2055	/* clock inversion */
2056	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2057	case SND_SOC_DAIFMT_IB_NF:
2058		format &= ~(TWL4030_VIF_FORMAT);
2059		break;
2060	case SND_SOC_DAIFMT_NB_IF:
2061		format |= TWL4030_VIF_FORMAT;
2062		break;
2063	default:
2064		return -EINVAL;
2065	}
2066
2067	if (format != old_format) {
2068		if (twl4030->codec_powered) {
2069			/*
2070			 * If the codec is powered, than we need to toggle the
2071			 * codec power.
2072			 */
2073			twl4030_codec_enable(component, 0);
2074			twl4030_write(component, TWL4030_REG_VOICE_IF, format);
2075			twl4030_codec_enable(component, 1);
2076		} else {
2077			twl4030_write(component, TWL4030_REG_VOICE_IF, format);
2078		}
2079	}
2080
2081	return 0;
2082}
2083
2084static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2085{
2086	struct snd_soc_component *component = dai->component;
2087	u8 reg = twl4030_read(component, TWL4030_REG_VOICE_IF);
2088
2089	if (tristate)
2090		reg |= TWL4030_VIF_TRI_EN;
2091	else
2092		reg &= ~TWL4030_VIF_TRI_EN;
2093
2094	return twl4030_write(component, TWL4030_REG_VOICE_IF, reg);
2095}
2096
2097#define TWL4030_RATES	 (SNDRV_PCM_RATE_8000_48000)
2098#define TWL4030_FORMATS	 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2099
2100static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
2101	.startup	= twl4030_startup,
2102	.shutdown	= twl4030_shutdown,
2103	.hw_params	= twl4030_hw_params,
2104	.set_sysclk	= twl4030_set_dai_sysclk,
2105	.set_fmt	= twl4030_set_dai_fmt,
2106	.set_tristate	= twl4030_set_tristate,
2107};
2108
2109static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2110	.startup	= twl4030_voice_startup,
2111	.shutdown	= twl4030_voice_shutdown,
2112	.hw_params	= twl4030_voice_hw_params,
2113	.set_sysclk	= twl4030_voice_set_dai_sysclk,
2114	.set_fmt	= twl4030_voice_set_dai_fmt,
2115	.set_tristate	= twl4030_voice_set_tristate,
2116};
2117
2118static struct snd_soc_dai_driver twl4030_dai[] = {
2119{
2120	.name = "twl4030-hifi",
2121	.playback = {
2122		.stream_name = "HiFi Playback",
2123		.channels_min = 2,
2124		.channels_max = 4,
2125		.rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2126		.formats = TWL4030_FORMATS,
2127		.sig_bits = 24,},
2128	.capture = {
2129		.stream_name = "HiFi Capture",
2130		.channels_min = 2,
2131		.channels_max = 4,
2132		.rates = TWL4030_RATES,
2133		.formats = TWL4030_FORMATS,
2134		.sig_bits = 24,},
2135	.ops = &twl4030_dai_hifi_ops,
2136},
2137{
2138	.name = "twl4030-voice",
2139	.playback = {
2140		.stream_name = "Voice Playback",
2141		.channels_min = 1,
2142		.channels_max = 1,
2143		.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2144		.formats = SNDRV_PCM_FMTBIT_S16_LE,},
2145	.capture = {
2146		.stream_name = "Voice Capture",
2147		.channels_min = 1,
2148		.channels_max = 2,
2149		.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2150		.formats = SNDRV_PCM_FMTBIT_S16_LE,},
2151	.ops = &twl4030_dai_voice_ops,
2152},
2153};
2154
2155static int twl4030_soc_probe(struct snd_soc_component *component)
2156{
2157	struct twl4030_priv *twl4030;
2158
2159	twl4030 = devm_kzalloc(component->dev, sizeof(struct twl4030_priv),
2160			       GFP_KERNEL);
2161	if (!twl4030)
2162		return -ENOMEM;
2163	snd_soc_component_set_drvdata(component, twl4030);
2164	/* Set the defaults, and power up the codec */
2165	twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
2166
2167	return twl4030_init_chip(component);
2168}
2169
2170static const struct snd_soc_component_driver soc_component_dev_twl4030 = {
2171	.probe			= twl4030_soc_probe,
2172	.read			= twl4030_read,
2173	.write			= twl4030_write,
2174	.set_bias_level		= twl4030_set_bias_level,
2175	.controls		= twl4030_snd_controls,
2176	.num_controls		= ARRAY_SIZE(twl4030_snd_controls),
2177	.dapm_widgets		= twl4030_dapm_widgets,
2178	.num_dapm_widgets	= ARRAY_SIZE(twl4030_dapm_widgets),
2179	.dapm_routes		= intercon,
2180	.num_dapm_routes	= ARRAY_SIZE(intercon),
2181	.use_pmdown_time	= 1,
2182	.endianness		= 1,
2183};
2184
2185static int twl4030_codec_probe(struct platform_device *pdev)
2186{
2187	return devm_snd_soc_register_component(&pdev->dev,
2188				      &soc_component_dev_twl4030,
2189				      twl4030_dai, ARRAY_SIZE(twl4030_dai));
2190}
2191
2192MODULE_ALIAS("platform:twl4030-codec");
2193
2194static struct platform_driver twl4030_codec_driver = {
2195	.probe		= twl4030_codec_probe,
2196	.driver		= {
2197		.name	= "twl4030-codec",
2198	},
2199};
2200
2201module_platform_driver(twl4030_codec_driver);
2202
2203MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2204MODULE_AUTHOR("Steve Sakoman");
2205MODULE_LICENSE("GPL");