tas2764.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * tas2764.h - ALSA SoC Texas Instruments TAS2764 Mono Audio Amplifier
  4 *
  5 * Copyright (C) 2020 Texas Instruments Incorporated -  https://www.ti.com
  6 *
  7 * Author: Dan Murphy <dmurphy@ti.com>
  8 */
  9
 10#ifndef __TAS2764__
 11#define __TAS2764__
 12
 13/* Book Control Register */
 14#define TAS2764_BOOKCTL_PAGE	0
 15#define TAS2764_BOOKCTL_REG	127
 16#define TAS2764_REG(page, reg)	((page * 128) + reg)
 17
 18/* Page */
 19#define TAS2764_PAGE		TAS2764_REG(0X0, 0x00)
 20#define TAS2764_PAGE_PAGE_MASK	255
 21
 22/* Software Reset */
 23#define TAS2764_SW_RST	TAS2764_REG(0X0, 0x01)
 24#define TAS2764_RST	BIT(0)
 25
 26/* Power Control */
 27#define TAS2764_PWR_CTRL		TAS2764_REG(0X0, 0x02)
 28#define TAS2764_PWR_CTRL_MASK		GENMASK(2, 0)
 29#define TAS2764_PWR_CTRL_ACTIVE		0x0
 30#define TAS2764_PWR_CTRL_MUTE		BIT(0)
 31#define TAS2764_PWR_CTRL_SHUTDOWN	BIT(1)
 32#define TAS2764_PWR_CTRL_BOP_SRC	BIT(7)
 33
 34#define TAS2764_VSENSE_POWER_EN		3
 35#define TAS2764_ISENSE_POWER_EN		4
 36
 37/* DC Blocker Control */
 38#define TAS2764_DC_BLK0			TAS2764_REG(0x0, 0x04)
 39#define TAS2764_DC_BLK0_HPF_FREQ_PB_SHIFT  0
 40
 41/* Digital Volume Control */
 42#define TAS2764_DVC	TAS2764_REG(0X0, 0x1a)
 43#define TAS2764_DVC_MAX	0xc9
 44
 45#define TAS2764_CHNL_0  TAS2764_REG(0X0, 0x03)
 46
 47/* Miscellaneous */
 48#define TAS2764_MISC_CFG1		TAS2764_REG(0x0, 0x06)
 49#define TAS2764_MISC_CFG1_OCE_RETRY_SHIFT  5
 50
 51/* TDM Configuration Reg0 */
 52#define TAS2764_TDM_CFG0		TAS2764_REG(0X0, 0x08)
 53#define TAS2764_TDM_CFG0_SMP_MASK	BIT(5)
 54#define TAS2764_TDM_CFG0_SMP_48KHZ	0x0
 55#define TAS2764_TDM_CFG0_SMP_44_1KHZ	BIT(5)
 56#define TAS2764_TDM_CFG0_MASK		GENMASK(3, 1)
 57#define TAS2764_TDM_CFG0_44_1_48KHZ	BIT(3)
 58#define TAS2764_TDM_CFG0_88_2_96KHZ	(BIT(3) | BIT(1))
 59#define TAS2764_TDM_CFG0_FRAME_START	BIT(0)
 60
 61/* TDM Configuration Reg1 */
 62#define TAS2764_TDM_CFG1		TAS2764_REG(0X0, 0x09)
 63#define TAS2764_TDM_CFG1_MASK		GENMASK(5, 1)
 64#define TAS2764_TDM_CFG1_51_SHIFT	1
 65#define TAS2764_TDM_CFG1_RX_MASK	BIT(0)
 66#define TAS2764_TDM_CFG1_RX_RISING	0x0
 67#define TAS2764_TDM_CFG1_RX_FALLING	BIT(0)
 68
 69/* TDM Configuration Reg2 */
 70#define TAS2764_TDM_CFG2		TAS2764_REG(0X0, 0x0a)
 71#define TAS2764_TDM_CFG2_RXW_MASK	GENMASK(3, 2)
 72#define TAS2764_TDM_CFG2_RXW_16BITS	0x0
 73#define TAS2764_TDM_CFG2_RXW_24BITS	BIT(3)
 74#define TAS2764_TDM_CFG2_RXW_32BITS	(BIT(3) | BIT(2))
 75#define TAS2764_TDM_CFG2_RXS_MASK	GENMASK(1, 0)
 76#define TAS2764_TDM_CFG2_RXS_16BITS	0x0
 77#define TAS2764_TDM_CFG2_RXS_24BITS	BIT(0)
 78#define TAS2764_TDM_CFG2_RXS_32BITS	BIT(1)
 79#define TAS2764_TDM_CFG2_SCFG_SHIFT	4
 80
 81/* TDM Configuration Reg3 */
 82#define TAS2764_TDM_CFG3		TAS2764_REG(0X0, 0x0c)
 83#define TAS2764_TDM_CFG3_RXS_MASK	GENMASK(7, 4)
 84#define TAS2764_TDM_CFG3_RXS_SHIFT	0x4
 85#define TAS2764_TDM_CFG3_MASK		GENMASK(3, 0)
 86
 87/* TDM Configuration Reg4 */
 88#define TAS2764_TDM_CFG4		TAS2764_REG(0X0, 0x0d)
 89#define TAS2764_TDM_CFG4_TX_MASK	BIT(0)
 90#define TAS2764_TDM_CFG4_TX_RISING	0x0
 91#define TAS2764_TDM_CFG4_TX_FALLING	BIT(0)
 92
 93/* TDM Configuration Reg5 */
 94#define TAS2764_TDM_CFG5		TAS2764_REG(0X0, 0x0e)
 95#define TAS2764_TDM_CFG5_VSNS_MASK	BIT(6)
 96#define TAS2764_TDM_CFG5_VSNS_ENABLE	BIT(6)
 97#define TAS2764_TDM_CFG5_50_MASK	GENMASK(5, 0)
 98
 99/* TDM Configuration Reg6 */
100#define TAS2764_TDM_CFG6		TAS2764_REG(0X0, 0x0f)
101#define TAS2764_TDM_CFG6_ISNS_MASK	BIT(6)
102#define TAS2764_TDM_CFG6_ISNS_ENABLE	BIT(6)
103#define TAS2764_TDM_CFG6_50_MASK	GENMASK(5, 0)
104
105/* Interrupt Masks */
106#define TAS2764_INT_MASK0               TAS2764_REG(0x0, 0x3b)
107#define TAS2764_INT_MASK1               TAS2764_REG(0x0, 0x3c)
108#define TAS2764_INT_MASK2               TAS2764_REG(0x0, 0x40)
109#define TAS2764_INT_MASK3               TAS2764_REG(0x0, 0x41)
110#define TAS2764_INT_MASK4               TAS2764_REG(0x0, 0x3d)
111
112/* Latched Fault Registers */
113#define TAS2764_INT_LTCH0               TAS2764_REG(0x0, 0x49)
114#define TAS2764_INT_LTCH1               TAS2764_REG(0x0, 0x4a)
115#define TAS2764_INT_LTCH1_0             TAS2764_REG(0x0, 0x4b)
116#define TAS2764_INT_LTCH2               TAS2764_REG(0x0, 0x4f)
117#define TAS2764_INT_LTCH3               TAS2764_REG(0x0, 0x50)
118#define TAS2764_INT_LTCH4               TAS2764_REG(0x0, 0x51)
119
120/* Readout Registers */
121#define TAS2764_TEMP                    TAS2764_REG(0x0, 0x56)
122
123/* Clock/IRQ Settings */
124#define TAS2764_INT_CLK_CFG             TAS2764_REG(0x0, 0x5c)
125#define TAS2764_INT_CLK_CFG_IRQZ_CLR    BIT(2)
126
127#define TAS2764_BOP_CFG0                TAS2764_REG(0X0, 0x1d)
128
129#endif /* __TAS2764__ */