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rt5670.c
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linux-6.19.14/sound/soc/codecs/rt5670.c
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * rt5670.c -- RT5670 ALSA SoC audio codec driver 4 * 5 * Copyright 2014 Realtek Semiconductor Corp. 6 * Author: Bard Liao <bardliao@realtek.com> 7 */ 8 9#include <linux/module.h> 10#include <linux/moduleparam.h> 11#include <linux/init.h> 12#include <linux/delay.h> 13#include <linux/pm.h> 14#include <linux/pm_runtime.h> 15#include <linux/i2c.h> 16#include <linux/platform_device.h> 17#include <linux/acpi.h> 18#include <linux/spi/spi.h> 19#include <linux/dmi.h> 20#include <sound/core.h> 21#include <sound/pcm.h> 22#include <sound/pcm_params.h> 23#include <sound/jack.h> 24#include <sound/soc.h> 25#include <sound/soc-dapm.h> 26#include <sound/initval.h> 27#include <sound/tlv.h> 28 29#include "rl6231.h" 30#include "rt5670.h" 31#include "rt5670-dsp.h" 32 33#define RT5670_GPIO1_IS_IRQ BIT(0) 34#define RT5670_IN2_DIFF BIT(1) 35#define RT5670_DMIC_EN BIT(2) 36#define RT5670_DMIC1_IN2P BIT(3) 37#define RT5670_DMIC1_GPIO6 BIT(4) 38#define RT5670_DMIC1_GPIO7 BIT(5) 39#define RT5670_DMIC2_INR BIT(6) 40#define RT5670_DMIC2_GPIO8 BIT(7) 41#define RT5670_DMIC3_GPIO5 BIT(8) 42#define RT5670_JD_MODE1 BIT(9) 43#define RT5670_JD_MODE2 BIT(10) 44#define RT5670_JD_MODE3 BIT(11) 45#define RT5670_GPIO1_IS_EXT_SPK_EN BIT(12) 46 47static unsigned long rt5670_quirk; 48static unsigned int quirk_override; 49module_param_named(quirk, quirk_override, uint, 0444); 50MODULE_PARM_DESC(quirk, "Board-specific quirk override"); 51 52#define RT5670_DEVICE_ID 0x6271 53 54#define RT5670_PR_RANGE_BASE (0xff + 1) 55#define RT5670_PR_SPACING 0x100 56 57#define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING)) 58 59static const struct regmap_range_cfg rt5670_ranges[] = { 60 { .name = "PR", .range_min = RT5670_PR_BASE, 61 .range_max = RT5670_PR_BASE + 0xf8, 62 .selector_reg = RT5670_PRIV_INDEX, 63 .selector_mask = 0xff, 64 .selector_shift = 0x0, 65 .window_start = RT5670_PRIV_DATA, 66 .window_len = 0x1, }, 67}; 68 69static const struct reg_sequence init_list[] = { 70 { RT5670_PR_BASE + 0x14, 0x9a8a }, 71 { RT5670_PR_BASE + 0x38, 0x1fe1 }, 72 { RT5670_PR_BASE + 0x3d, 0x3640 }, 73 { 0x8a, 0x0123 }, 74}; 75 76static const struct reg_default rt5670_reg[] = { 77 { 0x00, 0x0000 }, 78 { 0x02, 0x8888 }, 79 { 0x03, 0x8888 }, 80 { 0x0a, 0x0001 }, 81 { 0x0b, 0x0827 }, 82 { 0x0c, 0x0000 }, 83 { 0x0d, 0x0008 }, 84 { 0x0e, 0x0000 }, 85 { 0x0f, 0x0808 }, 86 { 0x19, 0xafaf }, 87 { 0x1a, 0xafaf }, 88 { 0x1b, 0x0011 }, 89 { 0x1c, 0x2f2f }, 90 { 0x1d, 0x2f2f }, 91 { 0x1e, 0x0000 }, 92 { 0x1f, 0x2f2f }, 93 { 0x20, 0x0000 }, 94 { 0x26, 0x7860 }, 95 { 0x27, 0x7860 }, 96 { 0x28, 0x7871 }, 97 { 0x29, 0x8080 }, 98 { 0x2a, 0x5656 }, 99 { 0x2b, 0x5454 }, 100 { 0x2c, 0xaaa0 }, 101 { 0x2d, 0x0000 }, 102 { 0x2e, 0x2f2f }, 103 { 0x2f, 0x1002 }, 104 { 0x30, 0x0000 }, 105 { 0x31, 0x5f00 }, 106 { 0x32, 0x0000 }, 107 { 0x33, 0x0000 }, 108 { 0x34, 0x0000 }, 109 { 0x35, 0x0000 }, 110 { 0x36, 0x0000 }, 111 { 0x37, 0x0000 }, 112 { 0x38, 0x0000 }, 113 { 0x3b, 0x0000 }, 114 { 0x3c, 0x007f }, 115 { 0x3d, 0x0000 }, 116 { 0x3e, 0x007f }, 117 { 0x45, 0xe00f }, 118 { 0x4c, 0x5380 }, 119 { 0x4f, 0x0073 }, 120 { 0x52, 0x00d3 }, 121 { 0x53, 0xf000 }, 122 { 0x61, 0x0000 }, 123 { 0x62, 0x0001 }, 124 { 0x63, 0x00c3 }, 125 { 0x64, 0x0000 }, 126 { 0x65, 0x0001 }, 127 { 0x66, 0x0000 }, 128 { 0x6f, 0x8000 }, 129 { 0x70, 0x8000 }, 130 { 0x71, 0x8000 }, 131 { 0x72, 0x8000 }, 132 { 0x73, 0x7770 }, 133 { 0x74, 0x0e00 }, 134 { 0x75, 0x1505 }, 135 { 0x76, 0x0015 }, 136 { 0x77, 0x0c00 }, 137 { 0x78, 0x4000 }, 138 { 0x79, 0x0123 }, 139 { 0x7f, 0x1100 }, 140 { 0x80, 0x0000 }, 141 { 0x81, 0x0000 }, 142 { 0x82, 0x0000 }, 143 { 0x83, 0x0000 }, 144 { 0x84, 0x0000 }, 145 { 0x85, 0x0000 }, 146 { 0x86, 0x0004 }, 147 { 0x87, 0x0000 }, 148 { 0x88, 0x0000 }, 149 { 0x89, 0x0000 }, 150 { 0x8a, 0x0123 }, 151 { 0x8b, 0x0000 }, 152 { 0x8c, 0x0003 }, 153 { 0x8d, 0x0000 }, 154 { 0x8e, 0x0004 }, 155 { 0x8f, 0x1100 }, 156 { 0x90, 0x0646 }, 157 { 0x91, 0x0c06 }, 158 { 0x93, 0x0000 }, 159 { 0x94, 0x1270 }, 160 { 0x95, 0x1000 }, 161 { 0x97, 0x0000 }, 162 { 0x98, 0x0000 }, 163 { 0x99, 0x0000 }, 164 { 0x9a, 0x2184 }, 165 { 0x9b, 0x010a }, 166 { 0x9c, 0x0aea }, 167 { 0x9d, 0x000c }, 168 { 0x9e, 0x0400 }, 169 { 0xae, 0x7000 }, 170 { 0xaf, 0x0000 }, 171 { 0xb0, 0x7000 }, 172 { 0xb1, 0x0000 }, 173 { 0xb2, 0x0000 }, 174 { 0xb3, 0x001f }, 175 { 0xb4, 0x220c }, 176 { 0xb5, 0x1f00 }, 177 { 0xb6, 0x0000 }, 178 { 0xb7, 0x0000 }, 179 { 0xbb, 0x0000 }, 180 { 0xbc, 0x0000 }, 181 { 0xbd, 0x0000 }, 182 { 0xbe, 0x0000 }, 183 { 0xbf, 0x0000 }, 184 { 0xc0, 0x0000 }, 185 { 0xc1, 0x0000 }, 186 { 0xc2, 0x0000 }, 187 { 0xcd, 0x0000 }, 188 { 0xce, 0x0000 }, 189 { 0xcf, 0x1813 }, 190 { 0xd0, 0x0690 }, 191 { 0xd1, 0x1c17 }, 192 { 0xd3, 0xa220 }, 193 { 0xd4, 0x0000 }, 194 { 0xd6, 0x0400 }, 195 { 0xd9, 0x0809 }, 196 { 0xda, 0x0000 }, 197 { 0xdb, 0x0001 }, 198 { 0xdc, 0x0049 }, 199 { 0xdd, 0x0024 }, 200 { 0xe6, 0x8000 }, 201 { 0xe7, 0x0000 }, 202 { 0xec, 0xa200 }, 203 { 0xed, 0x0000 }, 204 { 0xee, 0xa200 }, 205 { 0xef, 0x0000 }, 206 { 0xf8, 0x0000 }, 207 { 0xf9, 0x0000 }, 208 { 0xfa, 0x8010 }, 209 { 0xfb, 0x0033 }, 210 { 0xfc, 0x0100 }, 211}; 212 213static bool rt5670_volatile_register(struct device *dev, unsigned int reg) 214{ 215 int i; 216 217 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 218 if ((reg >= rt5670_ranges[i].window_start && 219 reg <= rt5670_ranges[i].window_start + 220 rt5670_ranges[i].window_len) || 221 (reg >= rt5670_ranges[i].range_min && 222 reg <= rt5670_ranges[i].range_max)) { 223 return true; 224 } 225 } 226 227 switch (reg) { 228 case RT5670_RESET: 229 case RT5670_PDM_DATA_CTRL1: 230 case RT5670_PDM1_DATA_CTRL4: 231 case RT5670_PDM2_DATA_CTRL4: 232 case RT5670_PRIV_DATA: 233 case RT5670_ASRC_5: 234 case RT5670_CJ_CTRL1: 235 case RT5670_CJ_CTRL2: 236 case RT5670_CJ_CTRL3: 237 case RT5670_A_JD_CTRL1: 238 case RT5670_A_JD_CTRL2: 239 case RT5670_VAD_CTRL5: 240 case RT5670_ADC_EQ_CTRL1: 241 case RT5670_EQ_CTRL1: 242 case RT5670_ALC_CTRL_1: 243 case RT5670_IRQ_CTRL2: 244 case RT5670_INT_IRQ_ST: 245 case RT5670_IL_CMD: 246 case RT5670_DSP_CTRL1: 247 case RT5670_DSP_CTRL2: 248 case RT5670_DSP_CTRL3: 249 case RT5670_DSP_CTRL4: 250 case RT5670_DSP_CTRL5: 251 case RT5670_VENDOR_ID: 252 case RT5670_VENDOR_ID1: 253 case RT5670_VENDOR_ID2: 254 return true; 255 default: 256 return false; 257 } 258} 259 260static bool rt5670_readable_register(struct device *dev, unsigned int reg) 261{ 262 int i; 263 264 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 265 if ((reg >= rt5670_ranges[i].window_start && 266 reg <= rt5670_ranges[i].window_start + 267 rt5670_ranges[i].window_len) || 268 (reg >= rt5670_ranges[i].range_min && 269 reg <= rt5670_ranges[i].range_max)) { 270 return true; 271 } 272 } 273 274 switch (reg) { 275 case RT5670_RESET: 276 case RT5670_HP_VOL: 277 case RT5670_LOUT1: 278 case RT5670_CJ_CTRL1: 279 case RT5670_CJ_CTRL2: 280 case RT5670_CJ_CTRL3: 281 case RT5670_IN2: 282 case RT5670_INL1_INR1_VOL: 283 case RT5670_DAC1_DIG_VOL: 284 case RT5670_DAC2_DIG_VOL: 285 case RT5670_DAC_CTRL: 286 case RT5670_STO1_ADC_DIG_VOL: 287 case RT5670_MONO_ADC_DIG_VOL: 288 case RT5670_STO2_ADC_DIG_VOL: 289 case RT5670_ADC_BST_VOL1: 290 case RT5670_ADC_BST_VOL2: 291 case RT5670_STO2_ADC_MIXER: 292 case RT5670_STO1_ADC_MIXER: 293 case RT5670_MONO_ADC_MIXER: 294 case RT5670_AD_DA_MIXER: 295 case RT5670_STO_DAC_MIXER: 296 case RT5670_DD_MIXER: 297 case RT5670_DIG_MIXER: 298 case RT5670_DSP_PATH1: 299 case RT5670_DSP_PATH2: 300 case RT5670_DIG_INF1_DATA: 301 case RT5670_DIG_INF2_DATA: 302 case RT5670_PDM_OUT_CTRL: 303 case RT5670_PDM_DATA_CTRL1: 304 case RT5670_PDM1_DATA_CTRL2: 305 case RT5670_PDM1_DATA_CTRL3: 306 case RT5670_PDM1_DATA_CTRL4: 307 case RT5670_PDM2_DATA_CTRL2: 308 case RT5670_PDM2_DATA_CTRL3: 309 case RT5670_PDM2_DATA_CTRL4: 310 case RT5670_REC_L1_MIXER: 311 case RT5670_REC_L2_MIXER: 312 case RT5670_REC_R1_MIXER: 313 case RT5670_REC_R2_MIXER: 314 case RT5670_HPO_MIXER: 315 case RT5670_MONO_MIXER: 316 case RT5670_OUT_L1_MIXER: 317 case RT5670_OUT_R1_MIXER: 318 case RT5670_LOUT_MIXER: 319 case RT5670_PWR_DIG1: 320 case RT5670_PWR_DIG2: 321 case RT5670_PWR_ANLG1: 322 case RT5670_PWR_ANLG2: 323 case RT5670_PWR_MIXER: 324 case RT5670_PWR_VOL: 325 case RT5670_PRIV_INDEX: 326 case RT5670_PRIV_DATA: 327 case RT5670_I2S4_SDP: 328 case RT5670_I2S1_SDP: 329 case RT5670_I2S2_SDP: 330 case RT5670_I2S3_SDP: 331 case RT5670_ADDA_CLK1: 332 case RT5670_ADDA_CLK2: 333 case RT5670_DMIC_CTRL1: 334 case RT5670_DMIC_CTRL2: 335 case RT5670_TDM_CTRL_1: 336 case RT5670_TDM_CTRL_2: 337 case RT5670_TDM_CTRL_3: 338 case RT5670_DSP_CLK: 339 case RT5670_GLB_CLK: 340 case RT5670_PLL_CTRL1: 341 case RT5670_PLL_CTRL2: 342 case RT5670_ASRC_1: 343 case RT5670_ASRC_2: 344 case RT5670_ASRC_3: 345 case RT5670_ASRC_4: 346 case RT5670_ASRC_5: 347 case RT5670_ASRC_7: 348 case RT5670_ASRC_8: 349 case RT5670_ASRC_9: 350 case RT5670_ASRC_10: 351 case RT5670_ASRC_11: 352 case RT5670_ASRC_12: 353 case RT5670_ASRC_13: 354 case RT5670_ASRC_14: 355 case RT5670_DEPOP_M1: 356 case RT5670_DEPOP_M2: 357 case RT5670_DEPOP_M3: 358 case RT5670_CHARGE_PUMP: 359 case RT5670_MICBIAS: 360 case RT5670_A_JD_CTRL1: 361 case RT5670_A_JD_CTRL2: 362 case RT5670_VAD_CTRL1: 363 case RT5670_VAD_CTRL2: 364 case RT5670_VAD_CTRL3: 365 case RT5670_VAD_CTRL4: 366 case RT5670_VAD_CTRL5: 367 case RT5670_ADC_EQ_CTRL1: 368 case RT5670_ADC_EQ_CTRL2: 369 case RT5670_EQ_CTRL1: 370 case RT5670_EQ_CTRL2: 371 case RT5670_ALC_DRC_CTRL1: 372 case RT5670_ALC_DRC_CTRL2: 373 case RT5670_ALC_CTRL_1: 374 case RT5670_ALC_CTRL_2: 375 case RT5670_ALC_CTRL_3: 376 case RT5670_JD_CTRL: 377 case RT5670_IRQ_CTRL1: 378 case RT5670_IRQ_CTRL2: 379 case RT5670_INT_IRQ_ST: 380 case RT5670_GPIO_CTRL1: 381 case RT5670_GPIO_CTRL2: 382 case RT5670_GPIO_CTRL3: 383 case RT5670_SCRABBLE_FUN: 384 case RT5670_SCRABBLE_CTRL: 385 case RT5670_BASE_BACK: 386 case RT5670_MP3_PLUS1: 387 case RT5670_MP3_PLUS2: 388 case RT5670_ADJ_HPF1: 389 case RT5670_ADJ_HPF2: 390 case RT5670_HP_CALIB_AMP_DET: 391 case RT5670_SV_ZCD1: 392 case RT5670_SV_ZCD2: 393 case RT5670_IL_CMD: 394 case RT5670_IL_CMD2: 395 case RT5670_IL_CMD3: 396 case RT5670_DRC_HL_CTRL1: 397 case RT5670_DRC_HL_CTRL2: 398 case RT5670_ADC_MONO_HP_CTRL1: 399 case RT5670_ADC_MONO_HP_CTRL2: 400 case RT5670_ADC_STO2_HP_CTRL1: 401 case RT5670_ADC_STO2_HP_CTRL2: 402 case RT5670_JD_CTRL3: 403 case RT5670_JD_CTRL4: 404 case RT5670_DIG_MISC: 405 case RT5670_DSP_CTRL1: 406 case RT5670_DSP_CTRL2: 407 case RT5670_DSP_CTRL3: 408 case RT5670_DSP_CTRL4: 409 case RT5670_DSP_CTRL5: 410 case RT5670_GEN_CTRL2: 411 case RT5670_GEN_CTRL3: 412 case RT5670_VENDOR_ID: 413 case RT5670_VENDOR_ID1: 414 case RT5670_VENDOR_ID2: 415 return true; 416 default: 417 return false; 418 } 419} 420 421/** 422 * rt5670_headset_detect - Detect headset. 423 * @component: SoC audio component device. 424 * @jack_insert: Jack insert or not. 425 * 426 * Detect whether is headset or not when jack inserted. 427 * 428 * Returns detect status. 429 */ 430 431static int rt5670_headset_detect(struct snd_soc_component *component, int jack_insert) 432{ 433 int val; 434 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component); 435 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 436 437 if (jack_insert) { 438 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power"); 439 snd_soc_dapm_sync(dapm); 440 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x0); 441 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2, 442 RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD, 443 RT5670_CBJ_MN_JD); 444 snd_soc_component_write(component, RT5670_GPIO_CTRL2, 0x0004); 445 snd_soc_component_update_bits(component, RT5670_GPIO_CTRL1, 446 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); 447 snd_soc_component_update_bits(component, RT5670_CJ_CTRL1, 448 RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN); 449 snd_soc_component_write(component, RT5670_JD_CTRL3, 0x00f0); 450 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2, 451 RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD); 452 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2, 453 RT5670_CBJ_MN_JD, 0); 454 msleep(300); 455 val = snd_soc_component_read(component, RT5670_CJ_CTRL3) & 0x7; 456 if (val == 0x1 || val == 0x2) { 457 rt5670->jack_type = SND_JACK_HEADSET; 458 /* for push button */ 459 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x8); 460 snd_soc_component_update_bits(component, RT5670_IL_CMD, 0x40, 0x40); 461 snd_soc_component_read(component, RT5670_IL_CMD); 462 } else { 463 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4); 464 rt5670->jack_type = SND_JACK_HEADPHONE; 465 snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); 466 snd_soc_dapm_sync(dapm); 467 } 468 } else { 469 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x0); 470 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4); 471 rt5670->jack_type = 0; 472 snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); 473 snd_soc_dapm_sync(dapm); 474 } 475 476 return rt5670->jack_type; 477} 478 479void rt5670_jack_suspend(struct snd_soc_component *component) 480{ 481 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 482 483 rt5670->jack_type_saved = rt5670->jack_type; 484 rt5670_headset_detect(component, 0); 485} 486EXPORT_SYMBOL_GPL(rt5670_jack_suspend); 487 488void rt5670_jack_resume(struct snd_soc_component *component) 489{ 490 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 491 492 if (rt5670->jack_type_saved) 493 rt5670_headset_detect(component, 1); 494} 495EXPORT_SYMBOL_GPL(rt5670_jack_resume); 496 497static int rt5670_button_detect(struct snd_soc_component *component) 498{ 499 int btn_type, val; 500 501 val = snd_soc_component_read(component, RT5670_IL_CMD); 502 btn_type = val & 0xff80; 503 snd_soc_component_write(component, RT5670_IL_CMD, val); 504 if (btn_type != 0) { 505 msleep(20); 506 val = snd_soc_component_read(component, RT5670_IL_CMD); 507 snd_soc_component_write(component, RT5670_IL_CMD, val); 508 } 509 510 return btn_type; 511} 512 513static int rt5670_irq_detection(void *data) 514{ 515 struct rt5670_priv *rt5670 = (struct rt5670_priv *)data; 516 struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio; 517 struct snd_soc_jack *jack = rt5670->jack; 518 int val, btn_type, report = jack->status; 519 520 if (rt5670->jd_mode == 1) /* 2 port */ 521 val = snd_soc_component_read(rt5670->component, RT5670_A_JD_CTRL1) & 0x0070; 522 else 523 val = snd_soc_component_read(rt5670->component, RT5670_A_JD_CTRL1) & 0x0020; 524 525 switch (val) { 526 /* jack in */ 527 case 0x30: /* 2 port */ 528 case 0x0: /* 1 port or 2 port */ 529 if (rt5670->jack_type == 0) { 530 report = rt5670_headset_detect(rt5670->component, 1); 531 /* for push button and jack out */ 532 gpio->debounce_time = 25; 533 break; 534 } 535 btn_type = 0; 536 if (snd_soc_component_read(rt5670->component, RT5670_INT_IRQ_ST) & 0x4) { 537 /* button pressed */ 538 report = SND_JACK_HEADSET; 539 btn_type = rt5670_button_detect(rt5670->component); 540 switch (btn_type) { 541 case 0x2000: /* up */ 542 report |= SND_JACK_BTN_1; 543 break; 544 case 0x0400: /* center */ 545 report |= SND_JACK_BTN_0; 546 break; 547 case 0x0080: /* down */ 548 report |= SND_JACK_BTN_2; 549 break; 550 default: 551 dev_err(rt5670->component->dev, 552 "Unexpected button code 0x%04x\n", 553 btn_type); 554 break; 555 } 556 } 557 if (btn_type == 0)/* button release */ 558 report = rt5670->jack_type; 559 560 break; 561 /* jack out */ 562 case 0x70: /* 2 port */ 563 case 0x10: /* 2 port */ 564 case 0x20: /* 1 port */ 565 report = 0; 566 snd_soc_component_update_bits(rt5670->component, RT5670_INT_IRQ_ST, 0x1, 0x0); 567 rt5670_headset_detect(rt5670->component, 0); 568 gpio->debounce_time = 150; /* for jack in */ 569 break; 570 default: 571 break; 572 } 573 574 return report; 575} 576 577int rt5670_set_jack_detect(struct snd_soc_component *component, 578 struct snd_soc_jack *jack) 579{ 580 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 581 int ret; 582 583 rt5670->jack = jack; 584 rt5670->hp_gpio.gpiod_dev = component->dev; 585 rt5670->hp_gpio.name = "headset"; 586 rt5670->hp_gpio.report = SND_JACK_HEADSET | 587 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2; 588 rt5670->hp_gpio.debounce_time = 150; 589 rt5670->hp_gpio.wake = true; 590 rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670; 591 rt5670->hp_gpio.jack_status_check = rt5670_irq_detection; 592 593 ret = snd_soc_jack_add_gpios(rt5670->jack, 1, 594 &rt5670->hp_gpio); 595 if (ret) { 596 dev_err(component->dev, "Adding jack GPIO failed\n"); 597 return ret; 598 } 599 600 return 0; 601} 602EXPORT_SYMBOL_GPL(rt5670_set_jack_detect); 603 604static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 605static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0); 606static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 607static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000); 608static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); 609 610/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ 611static const DECLARE_TLV_DB_RANGE(bst_tlv, 612 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 613 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 614 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 615 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), 616 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), 617 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), 618 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) 619); 620 621/* Interface data select */ 622static const char * const rt5670_data_select[] = { 623 "Normal", "Swap", "left copy to right", "right copy to left" 624}; 625 626static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA, 627 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select); 628 629static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA, 630 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select); 631 632/* 633 * For reliable output-mute LED control we need a "DAC1 Playback Switch" control. 634 * We emulate this by only clearing the RT5670_M_DAC1_L/_R AD_DA_MIXER register 635 * bits when both our emulated DAC1 Playback Switch control and the DAC1 MIXL/R 636 * DAPM-mixer DAC1 input are enabled. 637 */ 638static void rt5670_update_ad_da_mixer_dac1_m_bits(struct rt5670_priv *rt5670) 639{ 640 int val = RT5670_M_DAC1_L | RT5670_M_DAC1_R; 641 642 if (rt5670->dac1_mixl_dac1_switch && rt5670->dac1_playback_switch_l) 643 val &= ~RT5670_M_DAC1_L; 644 645 if (rt5670->dac1_mixr_dac1_switch && rt5670->dac1_playback_switch_r) 646 val &= ~RT5670_M_DAC1_R; 647 648 regmap_update_bits(rt5670->regmap, RT5670_AD_DA_MIXER, 649 RT5670_M_DAC1_L | RT5670_M_DAC1_R, val); 650} 651 652static int rt5670_dac1_playback_switch_get(struct snd_kcontrol *kcontrol, 653 struct snd_ctl_elem_value *ucontrol) 654{ 655 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 656 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 657 658 ucontrol->value.integer.value[0] = rt5670->dac1_playback_switch_l; 659 ucontrol->value.integer.value[1] = rt5670->dac1_playback_switch_r; 660 661 return 0; 662} 663 664static int rt5670_dac1_playback_switch_put(struct snd_kcontrol *kcontrol, 665 struct snd_ctl_elem_value *ucontrol) 666{ 667 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 668 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 669 670 if (rt5670->dac1_playback_switch_l == ucontrol->value.integer.value[0] && 671 rt5670->dac1_playback_switch_r == ucontrol->value.integer.value[1]) 672 return 0; 673 674 rt5670->dac1_playback_switch_l = ucontrol->value.integer.value[0]; 675 rt5670->dac1_playback_switch_r = ucontrol->value.integer.value[1]; 676 677 rt5670_update_ad_da_mixer_dac1_m_bits(rt5670); 678 679 return 1; 680} 681 682static const struct snd_kcontrol_new rt5670_snd_controls[] = { 683 /* Headphone Output Volume */ 684 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL, 685 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 686 39, 1, out_vol_tlv), 687 /* OUTPUT Control */ 688 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1, 689 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv), 690 /* DAC Digital Volume */ 691 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL, 692 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1), 693 SOC_DOUBLE_EXT("DAC1 Playback Switch", SND_SOC_NOPM, 0, 1, 1, 0, 694 rt5670_dac1_playback_switch_get, rt5670_dac1_playback_switch_put), 695 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL, 696 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 697 175, 0, dac_vol_tlv), 698 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL, 699 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 700 175, 0, dac_vol_tlv), 701 /* IN1/IN2 Control */ 702 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1, 703 RT5670_BST_SFT1, 8, 0, bst_tlv), 704 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2, 705 RT5670_BST_SFT1, 8, 0, bst_tlv), 706 /* INL/INR Volume Control */ 707 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL, 708 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT, 709 31, 1, in_vol_tlv), 710 /* ADC Digital Volume Control */ 711 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL, 712 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), 713 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL, 714 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 715 127, 0, adc_vol_tlv), 716 717 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL, 718 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 719 127, 0, adc_vol_tlv), 720 721 /* ADC Boost Volume Control */ 722 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 723 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT, 724 3, 0, adc_bst_tlv), 725 726 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 727 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT, 728 3, 0, adc_bst_tlv), 729 730 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum), 731 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum), 732}; 733 734/** 735 * set_dmic_clk - Set parameter of dmic. 736 * 737 * @w: DAPM widget. 738 * @kcontrol: The kcontrol of this widget. 739 * @event: Event id. 740 * 741 * Choose dmic clock between 1MHz and 3MHz. 742 * It is better for clock to approximate 3MHz. 743 */ 744static int set_dmic_clk(struct snd_soc_dapm_widget *w, 745 struct snd_kcontrol *kcontrol, int event) 746{ 747 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 748 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 749 int idx, rate; 750 751 rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap, 752 RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT); 753 idx = rl6231_calc_dmic_clk(rate); 754 if (idx < 0) 755 dev_err(component->dev, "Failed to set DMIC clock\n"); 756 else 757 snd_soc_component_update_bits(component, RT5670_DMIC_CTRL1, 758 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT); 759 return idx; 760} 761 762static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, 763 struct snd_soc_dapm_widget *sink) 764{ 765 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); 766 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 767 768 if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1) 769 return 1; 770 else 771 return 0; 772} 773 774static int is_using_asrc(struct snd_soc_dapm_widget *source, 775 struct snd_soc_dapm_widget *sink) 776{ 777 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); 778 unsigned int reg, shift, val; 779 780 switch (source->shift) { 781 case 0: 782 reg = RT5670_ASRC_3; 783 shift = 0; 784 break; 785 case 1: 786 reg = RT5670_ASRC_3; 787 shift = 4; 788 break; 789 case 2: 790 reg = RT5670_ASRC_5; 791 shift = 12; 792 break; 793 case 3: 794 reg = RT5670_ASRC_2; 795 shift = 0; 796 break; 797 case 8: 798 reg = RT5670_ASRC_2; 799 shift = 4; 800 break; 801 case 9: 802 reg = RT5670_ASRC_2; 803 shift = 8; 804 break; 805 case 10: 806 reg = RT5670_ASRC_2; 807 shift = 12; 808 break; 809 default: 810 return 0; 811 } 812 813 val = (snd_soc_component_read(component, reg) >> shift) & 0xf; 814 switch (val) { 815 case 1: 816 case 2: 817 case 3: 818 case 4: 819 return 1; 820 default: 821 return 0; 822 } 823 824} 825 826static int can_use_asrc(struct snd_soc_dapm_widget *source, 827 struct snd_soc_dapm_widget *sink) 828{ 829 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); 830 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 831 832 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384) 833 return 1; 834 835 return 0; 836} 837 838 839/** 840 * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters 841 * @component: SoC audio component device. 842 * @filter_mask: mask of filters. 843 * @clk_src: clock source 844 * 845 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can 846 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to 847 * support special i2s clock format such as Intel's 100fs(100 * sampling rate). 848 * ASRC function will track i2s clock and generate a corresponding system clock 849 * for codec. This function provides an API to select the clock source for a 850 * set of filters specified by the mask. And the codec driver will turn on ASRC 851 * for these filters if ASRC is selected as their clock source. 852 */ 853int rt5670_sel_asrc_clk_src(struct snd_soc_component *component, 854 unsigned int filter_mask, unsigned int clk_src) 855{ 856 unsigned int asrc2_mask = 0, asrc2_value = 0; 857 unsigned int asrc3_mask = 0, asrc3_value = 0; 858 859 if (clk_src > RT5670_CLK_SEL_SYS3) 860 return -EINVAL; 861 862 if (filter_mask & RT5670_DA_STEREO_FILTER) { 863 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK; 864 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK) 865 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT); 866 } 867 868 if (filter_mask & RT5670_DA_MONO_L_FILTER) { 869 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK; 870 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK) 871 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT); 872 } 873 874 if (filter_mask & RT5670_DA_MONO_R_FILTER) { 875 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK; 876 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK) 877 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT); 878 } 879 880 if (filter_mask & RT5670_AD_STEREO_FILTER) { 881 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK; 882 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK) 883 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT); 884 } 885 886 if (filter_mask & RT5670_AD_MONO_L_FILTER) { 887 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK; 888 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK) 889 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT); 890 } 891 892 if (filter_mask & RT5670_AD_MONO_R_FILTER) { 893 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK; 894 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK) 895 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT); 896 } 897 898 if (filter_mask & RT5670_UP_RATE_FILTER) { 899 asrc3_mask |= RT5670_UP_CLK_SEL_MASK; 900 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK) 901 | (clk_src << RT5670_UP_CLK_SEL_SFT); 902 } 903 904 if (filter_mask & RT5670_DOWN_RATE_FILTER) { 905 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK; 906 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK) 907 | (clk_src << RT5670_DOWN_CLK_SEL_SFT); 908 } 909 910 if (asrc2_mask) 911 snd_soc_component_update_bits(component, RT5670_ASRC_2, 912 asrc2_mask, asrc2_value); 913 914 if (asrc3_mask) 915 snd_soc_component_update_bits(component, RT5670_ASRC_3, 916 asrc3_mask, asrc3_value); 917 return 0; 918} 919EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src); 920 921/* Digital Mixer */ 922static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = { 923 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 924 RT5670_M_ADC_L1_SFT, 1, 1), 925 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 926 RT5670_M_ADC_L2_SFT, 1, 1), 927}; 928 929static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = { 930 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 931 RT5670_M_ADC_R1_SFT, 1, 1), 932 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 933 RT5670_M_ADC_R2_SFT, 1, 1), 934}; 935 936static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = { 937 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 938 RT5670_M_ADC_L1_SFT, 1, 1), 939 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 940 RT5670_M_ADC_L2_SFT, 1, 1), 941}; 942 943static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = { 944 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 945 RT5670_M_ADC_R1_SFT, 1, 1), 946 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 947 RT5670_M_ADC_R2_SFT, 1, 1), 948}; 949 950static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = { 951 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 952 RT5670_M_MONO_ADC_L1_SFT, 1, 1), 953 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 954 RT5670_M_MONO_ADC_L2_SFT, 1, 1), 955}; 956 957static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = { 958 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 959 RT5670_M_MONO_ADC_R1_SFT, 1, 1), 960 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 961 RT5670_M_MONO_ADC_R2_SFT, 1, 1), 962}; 963 964/* See comment above rt5670_update_ad_da_mixer_dac1_m_bits() */ 965static int rt5670_put_dac1_mix_dac1_switch(struct snd_kcontrol *kcontrol, 966 struct snd_ctl_elem_value *ucontrol) 967{ 968 struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; 969 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol); 970 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 971 int ret; 972 973 if (mc->shift == 0) 974 rt5670->dac1_mixl_dac1_switch = ucontrol->value.integer.value[0]; 975 else 976 rt5670->dac1_mixr_dac1_switch = ucontrol->value.integer.value[0]; 977 978 /* Apply the update (if any) */ 979 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol); 980 if (ret == 0) 981 return 0; 982 983 rt5670_update_ad_da_mixer_dac1_m_bits(rt5670); 984 985 return 1; 986} 987 988#define SOC_DAPM_SINGLE_RT5670_DAC1_SW(name, shift) \ 989 SOC_SINGLE_EXT(name, SND_SOC_NOPM, shift, 1, 0, \ 990 snd_soc_dapm_get_volsw, rt5670_put_dac1_mix_dac1_switch) 991 992static const struct snd_kcontrol_new rt5670_dac_l_mix[] = { 993 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 994 RT5670_M_ADCMIX_L_SFT, 1, 1), 995 SOC_DAPM_SINGLE_RT5670_DAC1_SW("DAC1 Switch", 0), 996}; 997 998static const struct snd_kcontrol_new rt5670_dac_r_mix[] = { 999 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 1000 RT5670_M_ADCMIX_R_SFT, 1, 1), 1001 SOC_DAPM_SINGLE_RT5670_DAC1_SW("DAC1 Switch", 1), 1002}; 1003 1004static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = { 1005 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 1006 RT5670_M_DAC_L1_SFT, 1, 1), 1007 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER, 1008 RT5670_M_DAC_L2_SFT, 1, 1), 1009 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 1010 RT5670_M_DAC_R1_STO_L_SFT, 1, 1), 1011}; 1012 1013static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = { 1014 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 1015 RT5670_M_DAC_R1_SFT, 1, 1), 1016 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER, 1017 RT5670_M_DAC_R2_SFT, 1, 1), 1018 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 1019 RT5670_M_DAC_L1_STO_R_SFT, 1, 1), 1020}; 1021 1022static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = { 1023 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER, 1024 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1), 1025 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 1026 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1), 1027 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 1028 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1), 1029}; 1030 1031static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = { 1032 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER, 1033 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1), 1034 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 1035 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1), 1036 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 1037 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1), 1038}; 1039 1040static const struct snd_kcontrol_new rt5670_dig_l_mix[] = { 1041 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER, 1042 RT5670_M_STO_L_DAC_L_SFT, 1, 1), 1043 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 1044 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1), 1045 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 1046 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1), 1047}; 1048 1049static const struct snd_kcontrol_new rt5670_dig_r_mix[] = { 1050 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER, 1051 RT5670_M_STO_R_DAC_R_SFT, 1, 1), 1052 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 1053 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1), 1054 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 1055 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1), 1056}; 1057 1058/* Analog Input Mixer */ 1059static const struct snd_kcontrol_new rt5670_rec_l_mix[] = { 1060 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER, 1061 RT5670_M_IN_L_RM_L_SFT, 1, 1), 1062 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER, 1063 RT5670_M_BST2_RM_L_SFT, 1, 1), 1064 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER, 1065 RT5670_M_BST1_RM_L_SFT, 1, 1), 1066}; 1067 1068static const struct snd_kcontrol_new rt5670_rec_r_mix[] = { 1069 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER, 1070 RT5670_M_IN_R_RM_R_SFT, 1, 1), 1071 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER, 1072 RT5670_M_BST2_RM_R_SFT, 1, 1), 1073 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER, 1074 RT5670_M_BST1_RM_R_SFT, 1, 1), 1075}; 1076 1077static const struct snd_kcontrol_new rt5670_out_l_mix[] = { 1078 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER, 1079 RT5670_M_BST1_OM_L_SFT, 1, 1), 1080 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER, 1081 RT5670_M_IN_L_OM_L_SFT, 1, 1), 1082 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER, 1083 RT5670_M_DAC_L2_OM_L_SFT, 1, 1), 1084 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER, 1085 RT5670_M_DAC_L1_OM_L_SFT, 1, 1), 1086}; 1087 1088static const struct snd_kcontrol_new rt5670_out_r_mix[] = { 1089 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER, 1090 RT5670_M_BST2_OM_R_SFT, 1, 1), 1091 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER, 1092 RT5670_M_IN_R_OM_R_SFT, 1, 1), 1093 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER, 1094 RT5670_M_DAC_R2_OM_R_SFT, 1, 1), 1095 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER, 1096 RT5670_M_DAC_R1_OM_R_SFT, 1, 1), 1097}; 1098 1099static const struct snd_kcontrol_new rt5670_hpo_mix[] = { 1100 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1101 RT5670_M_DAC1_HM_SFT, 1, 1), 1102 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER, 1103 RT5670_M_HPVOL_HM_SFT, 1, 1), 1104}; 1105 1106static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = { 1107 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1108 RT5670_M_DACL1_HML_SFT, 1, 1), 1109 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER, 1110 RT5670_M_INL1_HML_SFT, 1, 1), 1111}; 1112 1113static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = { 1114 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1115 RT5670_M_DACR1_HMR_SFT, 1, 1), 1116 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER, 1117 RT5670_M_INR1_HMR_SFT, 1, 1), 1118}; 1119 1120static const struct snd_kcontrol_new rt5670_lout_mix[] = { 1121 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER, 1122 RT5670_M_DAC_L1_LM_SFT, 1, 1), 1123 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER, 1124 RT5670_M_DAC_R1_LM_SFT, 1, 1), 1125 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER, 1126 RT5670_M_OV_L_LM_SFT, 1, 1), 1127 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER, 1128 RT5670_M_OV_R_LM_SFT, 1, 1), 1129}; 1130 1131static const struct snd_kcontrol_new lout_l_enable_control = 1132 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 1133 RT5670_L_MUTE_SFT, 1, 1); 1134 1135static const struct snd_kcontrol_new lout_r_enable_control = 1136 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 1137 RT5670_R_MUTE_SFT, 1, 1); 1138 1139/* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */ 1140static const char * const rt5670_dac1_src[] = { 1141 "IF1 DAC", "IF2 DAC" 1142}; 1143 1144static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER, 1145 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src); 1146 1147static const struct snd_kcontrol_new rt5670_dac1l_mux = 1148 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum); 1149 1150static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER, 1151 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src); 1152 1153static const struct snd_kcontrol_new rt5670_dac1r_mux = 1154 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum); 1155 1156/* DAC2 L source*/ /* MX-1B [6:4] */ 1157static const char *const rt5670_dac12_src[] = { 1158 "IF1 DAC", "IF2 DAC", "TxDC DAC", "VAD_ADC" 1159}; /* VAD_ADC or TxDP_ADC_R */ 1160 1161static const unsigned int rt5670_dac12_values[] = { 0, 1, 3, 5 }; 1162 1163static SOC_VALUE_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL, 1164 RT5670_DAC2_L_SEL_SFT, RT5670_DAC2_L_SEL_MASK, 1165 rt5670_dac12_src, rt5670_dac12_values); 1166 1167static const struct snd_kcontrol_new rt5670_dac_l2_mux = 1168 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum); 1169 1170/*DAC2 R source*/ /* MX-1B [2:0] */ 1171static const char *const rt5670_dacr2_src[] = { "IF1 DAC", "IF2 DAC", 1172 "TxDC DAC", "TxDP ADC" }; 1173 1174static const unsigned int rt5670_dacr2_values[] = { 0, 1, 3, 4 }; 1175 1176static SOC_VALUE_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL, 1177 RT5670_DAC2_R_SEL_SFT, RT5670_DAC2_R_SEL_MASK, 1178 rt5670_dacr2_src, rt5670_dacr2_values); 1179 1180static const struct snd_kcontrol_new rt5670_dac_r2_mux = 1181 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum); 1182 1183/*RxDP source*/ /* MX-2D [15:13] */ 1184static const char * const rt5670_rxdp_src[] = { 1185 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer", 1186 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1" 1187}; 1188 1189static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1, 1190 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src); 1191 1192static const struct snd_kcontrol_new rt5670_rxdp_mux = 1193 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum); 1194 1195/* MX-2D [1] [0] */ 1196static const char * const rt5670_dsp_bypass_src[] = { 1197 "DSP", "Bypass" 1198}; 1199 1200static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1, 1201 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src); 1202 1203static const struct snd_kcontrol_new rt5670_dsp_ul_mux = 1204 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum); 1205 1206static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1, 1207 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src); 1208 1209static const struct snd_kcontrol_new rt5670_dsp_dl_mux = 1210 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum); 1211 1212/* Stereo2 ADC source */ 1213/* MX-26 [15] */ 1214static const char * const rt5670_stereo2_adc_lr_src[] = { 1215 "L", "LR" 1216}; 1217 1218static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER, 1219 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src); 1220 1221static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux = 1222 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum); 1223 1224/* Stereo1 ADC source */ 1225/* MX-27 MX-26 [12] */ 1226static const char * const rt5670_stereo_adc1_src[] = { 1227 "DAC MIX", "ADC" 1228}; 1229 1230static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER, 1231 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 1232 1233static const struct snd_kcontrol_new rt5670_sto_adc_1_mux = 1234 SOC_DAPM_ENUM("Stereo1 ADC 1 Mux", rt5670_stereo1_adc1_enum); 1235 1236static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER, 1237 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 1238 1239static const struct snd_kcontrol_new rt5670_sto2_adc_1_mux = 1240 SOC_DAPM_ENUM("Stereo2 ADC 1 Mux", rt5670_stereo2_adc1_enum); 1241 1242 1243/* MX-27 MX-26 [11] */ 1244static const char * const rt5670_stereo_adc2_src[] = { 1245 "DAC MIX", "DMIC" 1246}; 1247 1248static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER, 1249 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 1250 1251static const struct snd_kcontrol_new rt5670_sto_adc_2_mux = 1252 SOC_DAPM_ENUM("Stereo1 ADC 2 Mux", rt5670_stereo1_adc2_enum); 1253 1254static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER, 1255 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 1256 1257static const struct snd_kcontrol_new rt5670_sto2_adc_2_mux = 1258 SOC_DAPM_ENUM("Stereo2 ADC 2 Mux", rt5670_stereo2_adc2_enum); 1259 1260/* MX-27 MX-26 [9:8] */ 1261static const char * const rt5670_stereo_dmic_src[] = { 1262 "DMIC1", "DMIC2", "DMIC3" 1263}; 1264 1265static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER, 1266 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1267 1268static const struct snd_kcontrol_new rt5670_sto1_dmic_mux = 1269 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum); 1270 1271static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER, 1272 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1273 1274static const struct snd_kcontrol_new rt5670_sto2_dmic_mux = 1275 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum); 1276 1277/* Mono ADC source */ 1278/* MX-28 [12] */ 1279static const char * const rt5670_mono_adc_l1_src[] = { 1280 "Mono DAC MIXL", "ADC1" 1281}; 1282 1283static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER, 1284 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src); 1285 1286static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux = 1287 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum); 1288/* MX-28 [11] */ 1289static const char * const rt5670_mono_adc_l2_src[] = { 1290 "Mono DAC MIXL", "DMIC" 1291}; 1292 1293static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER, 1294 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src); 1295 1296static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux = 1297 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum); 1298 1299/* MX-28 [9:8] */ 1300static const char * const rt5670_mono_dmic_src[] = { 1301 "DMIC1", "DMIC2", "DMIC3" 1302}; 1303 1304static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER, 1305 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src); 1306 1307static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux = 1308 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum); 1309/* MX-28 [1:0] */ 1310static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER, 1311 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src); 1312 1313static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux = 1314 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum); 1315/* MX-28 [4] */ 1316static const char * const rt5670_mono_adc_r1_src[] = { 1317 "Mono DAC MIXR", "ADC2" 1318}; 1319 1320static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER, 1321 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src); 1322 1323static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux = 1324 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum); 1325/* MX-28 [3] */ 1326static const char * const rt5670_mono_adc_r2_src[] = { 1327 "Mono DAC MIXR", "DMIC" 1328}; 1329 1330static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER, 1331 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src); 1332 1333static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux = 1334 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum); 1335 1336/* MX-2D [3:2] */ 1337static const char * const rt5670_txdp_slot_src[] = { 1338 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7" 1339}; 1340 1341static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1, 1342 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src); 1343 1344static const struct snd_kcontrol_new rt5670_txdp_slot_mux = 1345 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum); 1346 1347/* MX-2F [15] */ 1348static const char * const rt5670_if1_adc2_in_src[] = { 1349 "IF_ADC2", "VAD_ADC" 1350}; 1351 1352static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA, 1353 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src); 1354 1355static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux = 1356 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum); 1357 1358/* MX-2F [14:12] */ 1359static const char * const rt5670_if2_adc_in_src[] = { 1360 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC" 1361}; 1362 1363static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA, 1364 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src); 1365 1366static const struct snd_kcontrol_new rt5670_if2_adc_in_mux = 1367 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum); 1368 1369/* MX-31 [15] [13] [11] [9] */ 1370static const char * const rt5670_pdm_src[] = { 1371 "Mono DAC", "Stereo DAC" 1372}; 1373 1374static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL, 1375 RT5670_PDM1_L_SFT, rt5670_pdm_src); 1376 1377static const struct snd_kcontrol_new rt5670_pdm1_l_mux = 1378 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum); 1379 1380static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL, 1381 RT5670_PDM1_R_SFT, rt5670_pdm_src); 1382 1383static const struct snd_kcontrol_new rt5670_pdm1_r_mux = 1384 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum); 1385 1386static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL, 1387 RT5670_PDM2_L_SFT, rt5670_pdm_src); 1388 1389static const struct snd_kcontrol_new rt5670_pdm2_l_mux = 1390 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum); 1391 1392static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL, 1393 RT5670_PDM2_R_SFT, rt5670_pdm_src); 1394 1395static const struct snd_kcontrol_new rt5670_pdm2_r_mux = 1396 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum); 1397 1398/* MX-FA [12] */ 1399static const char * const rt5670_if1_adc1_in1_src[] = { 1400 "IF_ADC1", "IF1_ADC3" 1401}; 1402 1403static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC, 1404 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src); 1405 1406static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux = 1407 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum); 1408 1409/* MX-FA [11] */ 1410static const char * const rt5670_if1_adc1_in2_src[] = { 1411 "IF1_ADC1_IN1", "IF1_ADC4" 1412}; 1413 1414static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC, 1415 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src); 1416 1417static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux = 1418 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum); 1419 1420/* MX-FA [10] */ 1421static const char * const rt5670_if1_adc2_in1_src[] = { 1422 "IF1_ADC2_IN", "IF1_ADC4" 1423}; 1424 1425static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC, 1426 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src); 1427 1428static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux = 1429 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum); 1430 1431/* MX-9D [9:8] */ 1432static const char * const rt5670_vad_adc_src[] = { 1433 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L" 1434}; 1435 1436static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4, 1437 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src); 1438 1439static const struct snd_kcontrol_new rt5670_vad_adc_mux = 1440 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum); 1441 1442static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w, 1443 struct snd_kcontrol *kcontrol, int event) 1444{ 1445 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1446 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 1447 1448 switch (event) { 1449 case SND_SOC_DAPM_POST_PMU: 1450 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP, 1451 RT5670_PM_HP_MASK, RT5670_PM_HP_HV); 1452 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1453 0x0400, 0x0400); 1454 /* headphone amp power on */ 1455 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 1456 RT5670_PWR_HA | RT5670_PWR_FV1 | 1457 RT5670_PWR_FV2, RT5670_PWR_HA | 1458 RT5670_PWR_FV1 | RT5670_PWR_FV2); 1459 /* depop parameters */ 1460 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100); 1461 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009); 1462 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1463 RT5670_HP_DCC_INT1, 0x9f00); 1464 mdelay(20); 1465 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1466 break; 1467 case SND_SOC_DAPM_PRE_PMD: 1468 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004); 1469 msleep(30); 1470 break; 1471 default: 1472 return 0; 1473 } 1474 1475 return 0; 1476} 1477 1478static int rt5670_hp_event(struct snd_soc_dapm_widget *w, 1479 struct snd_kcontrol *kcontrol, int event) 1480{ 1481 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1482 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 1483 1484 switch (event) { 1485 case SND_SOC_DAPM_POST_PMU: 1486 /* headphone unmute sequence */ 1487 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1488 RT5670_MAMP_INT_REG2, 0xb400); 1489 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1490 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d); 1491 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1492 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1493 0x0300, 0x0300); 1494 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1495 RT5670_L_MUTE | RT5670_R_MUTE, 0); 1496 msleep(80); 1497 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1498 break; 1499 1500 case SND_SOC_DAPM_PRE_PMD: 1501 /* headphone mute sequence */ 1502 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1503 RT5670_MAMP_INT_REG2, 0xb400); 1504 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1505 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d); 1506 mdelay(10); 1507 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1508 mdelay(10); 1509 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1510 RT5670_L_MUTE | RT5670_R_MUTE, 1511 RT5670_L_MUTE | RT5670_R_MUTE); 1512 msleep(20); 1513 regmap_update_bits(rt5670->regmap, 1514 RT5670_GEN_CTRL2, 0x0300, 0x0); 1515 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1516 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707); 1517 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1518 RT5670_MAMP_INT_REG2, 0xfc00); 1519 break; 1520 1521 default: 1522 return 0; 1523 } 1524 1525 return 0; 1526} 1527 1528static int rt5670_spk_event(struct snd_soc_dapm_widget *w, 1529 struct snd_kcontrol *kcontrol, int event) 1530{ 1531 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1532 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 1533 1534 if (!rt5670->gpio1_is_ext_spk_en) 1535 return 0; 1536 1537 switch (event) { 1538 case SND_SOC_DAPM_POST_PMU: 1539 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 1540 RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_HI); 1541 break; 1542 1543 case SND_SOC_DAPM_PRE_PMD: 1544 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 1545 RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_LO); 1546 break; 1547 1548 default: 1549 return 0; 1550 } 1551 1552 return 0; 1553} 1554 1555static int rt5670_bst1_event(struct snd_soc_dapm_widget *w, 1556 struct snd_kcontrol *kcontrol, int event) 1557{ 1558 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1559 1560 switch (event) { 1561 case SND_SOC_DAPM_POST_PMU: 1562 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1563 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P); 1564 break; 1565 1566 case SND_SOC_DAPM_PRE_PMD: 1567 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1568 RT5670_PWR_BST1_P, 0); 1569 break; 1570 1571 default: 1572 return 0; 1573 } 1574 1575 return 0; 1576} 1577 1578static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, 1579 struct snd_kcontrol *kcontrol, int event) 1580{ 1581 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1582 1583 switch (event) { 1584 case SND_SOC_DAPM_POST_PMU: 1585 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1586 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P); 1587 break; 1588 1589 case SND_SOC_DAPM_PRE_PMD: 1590 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1591 RT5670_PWR_BST2_P, 0); 1592 break; 1593 1594 default: 1595 return 0; 1596 } 1597 1598 return 0; 1599} 1600 1601static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = { 1602 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2, 1603 RT5670_PWR_PLL_BIT, 0, NULL, 0), 1604 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2, 1605 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0), 1606 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL, 1607 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0), 1608 1609 /* ASRC */ 1610 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1, 1611 11, 0, NULL, 0), 1612 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1, 1613 12, 0, NULL, 0), 1614 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1, 1615 10, 0, NULL, 0), 1616 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1, 1617 9, 0, NULL, 0), 1618 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1, 1619 8, 0, NULL, 0), 1620 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1, 1621 7, 0, NULL, 0), 1622 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1, 1623 6, 0, NULL, 0), 1624 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1, 1625 5, 0, NULL, 0), 1626 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1, 1627 4, 0, NULL, 0), 1628 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1, 1629 3, 0, NULL, 0), 1630 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1, 1631 2, 0, NULL, 0), 1632 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1, 1633 1, 0, NULL, 0), 1634 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1, 1635 0, 0, NULL, 0), 1636 1637 /* Input Side */ 1638 /* micbias */ 1639 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2, 1640 RT5670_PWR_MB1_BIT, 0, NULL, 0), 1641 1642 /* Input Lines */ 1643 SND_SOC_DAPM_INPUT("DMIC L1"), 1644 SND_SOC_DAPM_INPUT("DMIC R1"), 1645 SND_SOC_DAPM_INPUT("DMIC L2"), 1646 SND_SOC_DAPM_INPUT("DMIC R2"), 1647 SND_SOC_DAPM_INPUT("DMIC L3"), 1648 SND_SOC_DAPM_INPUT("DMIC R3"), 1649 1650 SND_SOC_DAPM_INPUT("IN1P"), 1651 SND_SOC_DAPM_INPUT("IN1N"), 1652 SND_SOC_DAPM_INPUT("IN2P"), 1653 SND_SOC_DAPM_INPUT("IN2N"), 1654 1655 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1656 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1657 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1658 1659 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, 1660 set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 1661 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1, 1662 RT5670_DMIC_1_EN_SFT, 0, NULL, 0), 1663 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1, 1664 RT5670_DMIC_2_EN_SFT, 0, NULL, 0), 1665 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1, 1666 RT5670_DMIC_3_EN_SFT, 0, NULL, 0), 1667 /* Boost */ 1668 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT, 1669 0, NULL, 0, rt5670_bst1_event, 1670 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1671 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT, 1672 0, NULL, 0, rt5670_bst2_event, 1673 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1674 /* Input Volume */ 1675 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL, 1676 RT5670_PWR_IN_L_BIT, 0, NULL, 0), 1677 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL, 1678 RT5670_PWR_IN_R_BIT, 0, NULL, 0), 1679 1680 /* REC Mixer */ 1681 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0, 1682 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)), 1683 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0, 1684 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)), 1685 /* ADCs */ 1686 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), 1687 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0), 1688 1689 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0), 1690 1691 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1, 1692 RT5670_PWR_ADC_L_BIT, 0, NULL, 0), 1693 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1, 1694 RT5670_PWR_ADC_R_BIT, 0, NULL, 0), 1695 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE + 1696 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0), 1697 /* ADC Mux */ 1698 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, 1699 &rt5670_sto1_dmic_mux), 1700 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1701 &rt5670_sto_adc_2_mux), 1702 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1703 &rt5670_sto_adc_2_mux), 1704 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1705 &rt5670_sto_adc_1_mux), 1706 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1707 &rt5670_sto_adc_1_mux), 1708 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0, 1709 &rt5670_sto2_dmic_mux), 1710 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1711 &rt5670_sto2_adc_2_mux), 1712 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1713 &rt5670_sto2_adc_2_mux), 1714 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1715 &rt5670_sto2_adc_1_mux), 1716 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1717 &rt5670_sto2_adc_1_mux), 1718 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0, 1719 &rt5670_sto2_adc_lr_mux), 1720 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0, 1721 &rt5670_mono_dmic_l_mux), 1722 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0, 1723 &rt5670_mono_dmic_r_mux), 1724 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1725 &rt5670_mono_adc_l2_mux), 1726 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1727 &rt5670_mono_adc_l1_mux), 1728 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1729 &rt5670_mono_adc_r1_mux), 1730 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1731 &rt5670_mono_adc_r2_mux), 1732 /* ADC Mixer */ 1733 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2, 1734 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0), 1735 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2, 1736 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0), 1737 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0, 1738 rt5670_sto1_adc_l_mix, ARRAY_SIZE(rt5670_sto1_adc_l_mix)), 1739 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0, 1740 rt5670_sto1_adc_r_mix, ARRAY_SIZE(rt5670_sto1_adc_r_mix)), 1741 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0, 1742 rt5670_sto2_adc_l_mix, 1743 ARRAY_SIZE(rt5670_sto2_adc_l_mix)), 1744 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0, 1745 rt5670_sto2_adc_r_mix, 1746 ARRAY_SIZE(rt5670_sto2_adc_r_mix)), 1747 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2, 1748 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0), 1749 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL, 1750 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix, 1751 ARRAY_SIZE(rt5670_mono_adc_l_mix)), 1752 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2, 1753 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0), 1754 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL, 1755 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix, 1756 ARRAY_SIZE(rt5670_mono_adc_r_mix)), 1757 1758 /* ADC PGA */ 1759 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1760 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1761 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1762 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1763 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1764 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1765 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1766 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1767 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1768 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1769 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1770 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1771 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1772 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1773 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1774 1775 /* DSP */ 1776 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1777 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0), 1778 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0), 1779 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1780 1781 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0, 1782 &rt5670_txdp_slot_mux), 1783 1784 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0, 1785 &rt5670_dsp_ul_mux), 1786 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0, 1787 &rt5670_dsp_dl_mux), 1788 1789 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0, 1790 &rt5670_rxdp_mux), 1791 1792 /* IF2 Mux */ 1793 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0, 1794 &rt5670_if2_adc_in_mux), 1795 1796 /* Digital Interface */ 1797 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1, 1798 RT5670_PWR_I2S1_BIT, 0, NULL, 0), 1799 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1800 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1801 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1802 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1803 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1804 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1805 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1806 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1807 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1808 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1, 1809 RT5670_PWR_I2S2_BIT, 0, NULL, 0), 1810 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1811 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1812 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1813 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1814 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1815 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1816 1817 /* Digital Interface Select */ 1818 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0, 1819 &rt5670_if1_adc1_in1_mux), 1820 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0, 1821 &rt5670_if1_adc1_in2_mux), 1822 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0, 1823 &rt5670_if1_adc2_in_mux), 1824 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0, 1825 &rt5670_if1_adc2_in1_mux), 1826 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0, 1827 &rt5670_vad_adc_mux), 1828 1829 /* Audio Interface */ 1830 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 1831 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 1832 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 1833 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, 1834 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1), 1835 1836 /* Audio DSP */ 1837 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), 1838 1839 /* Output Side */ 1840 /* DAC mixer before sound effect */ 1841 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0, 1842 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)), 1843 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0, 1844 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)), 1845 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1846 1847 /* DAC2 channel Mux */ 1848 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, 1849 &rt5670_dac_l2_mux), 1850 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, 1851 &rt5670_dac_r2_mux), 1852 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1, 1853 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0), 1854 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1, 1855 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0), 1856 1857 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux), 1858 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux), 1859 1860 /* DAC Mixer */ 1861 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2, 1862 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0), 1863 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2, 1864 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0), 1865 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2, 1866 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0), 1867 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, 1868 rt5670_sto_dac_l_mix, 1869 ARRAY_SIZE(rt5670_sto_dac_l_mix)), 1870 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, 1871 rt5670_sto_dac_r_mix, 1872 ARRAY_SIZE(rt5670_sto_dac_r_mix)), 1873 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, 1874 rt5670_mono_dac_l_mix, 1875 ARRAY_SIZE(rt5670_mono_dac_l_mix)), 1876 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, 1877 rt5670_mono_dac_r_mix, 1878 ARRAY_SIZE(rt5670_mono_dac_r_mix)), 1879 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 1880 rt5670_dig_l_mix, 1881 ARRAY_SIZE(rt5670_dig_l_mix)), 1882 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 1883 rt5670_dig_r_mix, 1884 ARRAY_SIZE(rt5670_dig_r_mix)), 1885 1886 /* DACs */ 1887 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1, 1888 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0), 1889 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1, 1890 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0), 1891 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), 1892 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), 1893 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1, 1894 RT5670_PWR_DAC_L2_BIT, 0), 1895 1896 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1, 1897 RT5670_PWR_DAC_R2_BIT, 0), 1898 /* OUT Mixer */ 1899 1900 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT, 1901 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)), 1902 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT, 1903 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)), 1904 /* Ouput Volume */ 1905 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL, 1906 RT5670_PWR_HV_L_BIT, 0, 1907 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)), 1908 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL, 1909 RT5670_PWR_HV_R_BIT, 0, 1910 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)), 1911 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0), 1912 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0), 1913 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0), 1914 1915 /* HPO/LOUT/Mono Mixer */ 1916 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, 1917 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)), 1918 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT, 1919 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)), 1920 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0, 1921 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU | 1922 SND_SOC_DAPM_PRE_PMD), 1923 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1, 1924 RT5670_PWR_HP_L_BIT, 0, NULL, 0), 1925 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1, 1926 RT5670_PWR_HP_R_BIT, 0, NULL, 0), 1927 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, 1928 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD | 1929 SND_SOC_DAPM_POST_PMU), 1930 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, 1931 &lout_l_enable_control), 1932 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, 1933 &lout_r_enable_control), 1934 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0), 1935 1936 /* PDM */ 1937 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2, 1938 RT5670_PWR_PDM1_BIT, 0, NULL, 0), 1939 1940 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL, 1941 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux), 1942 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL, 1943 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux), 1944 1945 /* Output Lines */ 1946 SND_SOC_DAPM_OUTPUT("HPOL"), 1947 SND_SOC_DAPM_OUTPUT("HPOR"), 1948 SND_SOC_DAPM_OUTPUT("LOUTL"), 1949 SND_SOC_DAPM_OUTPUT("LOUTR"), 1950}; 1951 1952static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = { 1953 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2, 1954 RT5670_PWR_PDM2_BIT, 0, NULL, 0), 1955 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL, 1956 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux), 1957 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL, 1958 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux), 1959 SND_SOC_DAPM_OUTPUT("PDM1L"), 1960 SND_SOC_DAPM_OUTPUT("PDM1R"), 1961 SND_SOC_DAPM_OUTPUT("PDM2L"), 1962 SND_SOC_DAPM_OUTPUT("PDM2R"), 1963}; 1964 1965static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = { 1966 SND_SOC_DAPM_PGA_E("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0, 1967 rt5670_spk_event, SND_SOC_DAPM_PRE_PMD | 1968 SND_SOC_DAPM_POST_PMU), 1969 SND_SOC_DAPM_OUTPUT("SPOLP"), 1970 SND_SOC_DAPM_OUTPUT("SPOLN"), 1971 SND_SOC_DAPM_OUTPUT("SPORP"), 1972 SND_SOC_DAPM_OUTPUT("SPORN"), 1973}; 1974 1975static const struct snd_soc_dapm_route rt5670_dapm_routes[] = { 1976 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc }, 1977 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc }, 1978 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc }, 1979 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc }, 1980 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc }, 1981 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc }, 1982 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc }, 1983 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc }, 1984 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc }, 1985 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc }, 1986 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc }, 1987 1988 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc}, 1989 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc}, 1990 1991 { "DMIC1", NULL, "DMIC L1" }, 1992 { "DMIC1", NULL, "DMIC R1" }, 1993 { "DMIC2", NULL, "DMIC L2" }, 1994 { "DMIC2", NULL, "DMIC R2" }, 1995 { "DMIC3", NULL, "DMIC L3" }, 1996 { "DMIC3", NULL, "DMIC R3" }, 1997 1998 { "BST1", NULL, "IN1P" }, 1999 { "BST1", NULL, "IN1N" }, 2000 { "BST1", NULL, "Mic Det Power" }, 2001 { "BST2", NULL, "IN2P" }, 2002 { "BST2", NULL, "IN2N" }, 2003 2004 { "INL VOL", NULL, "IN2P" }, 2005 { "INR VOL", NULL, "IN2N" }, 2006 2007 { "RECMIXL", "INL Switch", "INL VOL" }, 2008 { "RECMIXL", "BST2 Switch", "BST2" }, 2009 { "RECMIXL", "BST1 Switch", "BST1" }, 2010 2011 { "RECMIXR", "INR Switch", "INR VOL" }, 2012 { "RECMIXR", "BST2 Switch", "BST2" }, 2013 { "RECMIXR", "BST1 Switch", "BST1" }, 2014 2015 { "ADC 1", NULL, "RECMIXL" }, 2016 { "ADC 1", NULL, "ADC 1 power" }, 2017 { "ADC 1", NULL, "ADC clock" }, 2018 { "ADC 2", NULL, "RECMIXR" }, 2019 { "ADC 2", NULL, "ADC 2 power" }, 2020 { "ADC 2", NULL, "ADC clock" }, 2021 2022 { "DMIC L1", NULL, "DMIC CLK" }, 2023 { "DMIC L1", NULL, "DMIC1 Power" }, 2024 { "DMIC R1", NULL, "DMIC CLK" }, 2025 { "DMIC R1", NULL, "DMIC1 Power" }, 2026 { "DMIC L2", NULL, "DMIC CLK" }, 2027 { "DMIC L2", NULL, "DMIC2 Power" }, 2028 { "DMIC R2", NULL, "DMIC CLK" }, 2029 { "DMIC R2", NULL, "DMIC2 Power" }, 2030 { "DMIC L3", NULL, "DMIC CLK" }, 2031 { "DMIC L3", NULL, "DMIC3 Power" }, 2032 { "DMIC R3", NULL, "DMIC CLK" }, 2033 { "DMIC R3", NULL, "DMIC3 Power" }, 2034 2035 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, 2036 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, 2037 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" }, 2038 2039 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" }, 2040 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" }, 2041 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" }, 2042 2043 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" }, 2044 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" }, 2045 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" }, 2046 2047 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" }, 2048 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" }, 2049 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" }, 2050 2051 { "ADC 1_2", NULL, "ADC 1" }, 2052 { "ADC 1_2", NULL, "ADC 2" }, 2053 2054 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 2055 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 2056 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" }, 2057 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 2058 2059 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" }, 2060 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 2061 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 2062 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 2063 2064 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" }, 2065 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 2066 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 2067 { "Mono ADC L1 Mux", "ADC1", "ADC 1" }, 2068 2069 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 2070 { "Mono ADC R1 Mux", "ADC2", "ADC 2" }, 2071 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" }, 2072 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 2073 2074 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" }, 2075 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" }, 2076 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" }, 2077 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" }, 2078 2079 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, 2080 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" }, 2081 2082 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, 2083 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" }, 2084 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2085 2086 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" }, 2087 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" }, 2088 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" }, 2089 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2090 2091 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" }, 2092 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" }, 2093 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" }, 2094 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2095 2096 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 2097 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 2098 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" }, 2099 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 2100 2101 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" }, 2102 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 2103 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 2104 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 2105 2106 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" }, 2107 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" }, 2108 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" }, 2109 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" }, 2110 2111 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" }, 2112 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" }, 2113 2114 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" }, 2115 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" }, 2116 2117 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" }, 2118 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" }, 2119 2120 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" }, 2121 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" }, 2122 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2123 2124 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" }, 2125 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" }, 2126 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" }, 2127 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" }, 2128 2129 { "VAD_ADC", NULL, "VAD ADC Mux" }, 2130 2131 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" }, 2132 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" }, 2133 { "IF_ADC2", NULL, "Mono ADC MIXL" }, 2134 { "IF_ADC2", NULL, "Mono ADC MIXR" }, 2135 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" }, 2136 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" }, 2137 2138 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" }, 2139 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" }, 2140 2141 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" }, 2142 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" }, 2143 2144 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" }, 2145 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" }, 2146 2147 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" }, 2148 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" }, 2149 2150 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" }, 2151 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" }, 2152 2153 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" }, 2154 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" }, 2155 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" }, 2156 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" }, 2157 { "Mono ADC MIX", NULL, "Mono ADC MIXL" }, 2158 { "Mono ADC MIX", NULL, "Mono ADC MIXR" }, 2159 2160 { "RxDP Mux", "IF2 DAC", "IF2 DAC" }, 2161 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" }, 2162 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" }, 2163 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" }, 2164 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" }, 2165 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" }, 2166 { "RxDP Mux", "DAC1", "DAC MIX" }, 2167 2168 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" }, 2169 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" }, 2170 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" }, 2171 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" }, 2172 2173 { "DSP UL Mux", "Bypass", "TDM Data Mux" }, 2174 { "DSP UL Mux", NULL, "I2S DSP" }, 2175 { "DSP DL Mux", "Bypass", "RxDP Mux" }, 2176 { "DSP DL Mux", NULL, "I2S DSP" }, 2177 2178 { "TxDP_ADC_L", NULL, "DSP UL Mux" }, 2179 { "TxDP_ADC_R", NULL, "DSP UL Mux" }, 2180 { "TxDC_DAC", NULL, "DSP DL Mux" }, 2181 2182 { "TxDP_ADC", NULL, "TxDP_ADC_L" }, 2183 { "TxDP_ADC", NULL, "TxDP_ADC_R" }, 2184 2185 { "IF1 ADC", NULL, "I2S1" }, 2186 { "IF1 ADC", NULL, "IF1_ADC1" }, 2187 { "IF1 ADC", NULL, "IF1_ADC2" }, 2188 { "IF1 ADC", NULL, "IF_ADC3" }, 2189 { "IF1 ADC", NULL, "TxDP_ADC" }, 2190 2191 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" }, 2192 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" }, 2193 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" }, 2194 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" }, 2195 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" }, 2196 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" }, 2197 2198 { "IF2 ADC L", NULL, "IF2 ADC Mux" }, 2199 { "IF2 ADC R", NULL, "IF2 ADC Mux" }, 2200 2201 { "IF2 ADC", NULL, "I2S2" }, 2202 { "IF2 ADC", NULL, "IF2 ADC L" }, 2203 { "IF2 ADC", NULL, "IF2 ADC R" }, 2204 2205 { "AIF1TX", NULL, "IF1 ADC" }, 2206 { "AIF2TX", NULL, "IF2 ADC" }, 2207 2208 { "IF1 DAC1", NULL, "AIF1RX" }, 2209 { "IF1 DAC2", NULL, "AIF1RX" }, 2210 { "IF2 DAC", NULL, "AIF2RX" }, 2211 2212 { "IF1 DAC1", NULL, "I2S1" }, 2213 { "IF1 DAC2", NULL, "I2S1" }, 2214 { "IF2 DAC", NULL, "I2S2" }, 2215 2216 { "IF1 DAC2 L", NULL, "IF1 DAC2" }, 2217 { "IF1 DAC2 R", NULL, "IF1 DAC2" }, 2218 { "IF1 DAC1 L", NULL, "IF1 DAC1" }, 2219 { "IF1 DAC1 R", NULL, "IF1 DAC1" }, 2220 { "IF2 DAC L", NULL, "IF2 DAC" }, 2221 { "IF2 DAC R", NULL, "IF2 DAC" }, 2222 2223 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" }, 2224 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" }, 2225 2226 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" }, 2227 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" }, 2228 2229 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" }, 2230 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" }, 2231 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" }, 2232 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" }, 2233 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" }, 2234 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" }, 2235 2236 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2237 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2238 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2239 2240 { "DAC MIX", NULL, "DAC1 MIXL" }, 2241 { "DAC MIX", NULL, "DAC1 MIXR" }, 2242 2243 { "Audio DSP", NULL, "DAC1 MIXL" }, 2244 { "Audio DSP", NULL, "DAC1 MIXR" }, 2245 2246 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" }, 2247 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" }, 2248 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" }, 2249 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" }, 2250 { "DAC L2 Volume", NULL, "DAC L2 Mux" }, 2251 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" }, 2252 2253 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" }, 2254 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" }, 2255 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" }, 2256 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" }, 2257 { "DAC R2 Volume", NULL, "DAC R2 Mux" }, 2258 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" }, 2259 2260 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2261 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" }, 2262 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2263 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" }, 2264 { "Stereo DAC MIXL", NULL, "DAC L1 Power" }, 2265 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2266 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" }, 2267 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2268 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" }, 2269 { "Stereo DAC MIXR", NULL, "DAC R1 Power" }, 2270 2271 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2272 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2273 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2274 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" }, 2275 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2276 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2277 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2278 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" }, 2279 2280 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" }, 2281 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2282 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2283 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" }, 2284 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2285 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2286 2287 { "DAC L1", NULL, "DAC L1 Power" }, 2288 { "DAC L1", NULL, "Stereo DAC MIXL" }, 2289 { "DAC R1", NULL, "DAC R1 Power" }, 2290 { "DAC R1", NULL, "Stereo DAC MIXR" }, 2291 { "DAC L2", NULL, "Mono DAC MIXL" }, 2292 { "DAC R2", NULL, "Mono DAC MIXR" }, 2293 2294 { "OUT MIXL", "BST1 Switch", "BST1" }, 2295 { "OUT MIXL", "INL Switch", "INL VOL" }, 2296 { "OUT MIXL", "DAC L2 Switch", "DAC L2" }, 2297 { "OUT MIXL", "DAC L1 Switch", "DAC L1" }, 2298 2299 { "OUT MIXR", "BST2 Switch", "BST2" }, 2300 { "OUT MIXR", "INR Switch", "INR VOL" }, 2301 { "OUT MIXR", "DAC R2 Switch", "DAC R2" }, 2302 { "OUT MIXR", "DAC R1 Switch", "DAC R1" }, 2303 2304 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" }, 2305 { "HPOVOL MIXL", "INL Switch", "INL VOL" }, 2306 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" }, 2307 { "HPOVOL MIXR", "INR Switch", "INR VOL" }, 2308 2309 { "DAC 2", NULL, "DAC L2" }, 2310 { "DAC 2", NULL, "DAC R2" }, 2311 { "DAC 1", NULL, "DAC L1" }, 2312 { "DAC 1", NULL, "DAC R1" }, 2313 { "HPOVOL", NULL, "HPOVOL MIXL" }, 2314 { "HPOVOL", NULL, "HPOVOL MIXR" }, 2315 { "HPO MIX", "DAC1 Switch", "DAC 1" }, 2316 { "HPO MIX", "HPVOL Switch", "HPOVOL" }, 2317 2318 { "LOUT MIX", "DAC L1 Switch", "DAC L1" }, 2319 { "LOUT MIX", "DAC R1 Switch", "DAC R1" }, 2320 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" }, 2321 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" }, 2322 2323 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2324 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2325 { "PDM1 L Mux", NULL, "PDM1 Power" }, 2326 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2327 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2328 { "PDM1 R Mux", NULL, "PDM1 Power" }, 2329 2330 { "HP Amp", NULL, "HPO MIX" }, 2331 { "HP Amp", NULL, "Mic Det Power" }, 2332 { "HPOL", NULL, "HP Amp" }, 2333 { "HPOL", NULL, "HP L Amp" }, 2334 { "HPOL", NULL, "Improve HP Amp Drv" }, 2335 { "HPOR", NULL, "HP Amp" }, 2336 { "HPOR", NULL, "HP R Amp" }, 2337 { "HPOR", NULL, "Improve HP Amp Drv" }, 2338 2339 { "LOUT Amp", NULL, "LOUT MIX" }, 2340 { "LOUT L Playback", "Switch", "LOUT Amp" }, 2341 { "LOUT R Playback", "Switch", "LOUT Amp" }, 2342 { "LOUTL", NULL, "LOUT L Playback" }, 2343 { "LOUTR", NULL, "LOUT R Playback" }, 2344 { "LOUTL", NULL, "Improve HP Amp Drv" }, 2345 { "LOUTR", NULL, "Improve HP Amp Drv" }, 2346}; 2347 2348static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = { 2349 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2350 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2351 { "PDM2 L Mux", NULL, "PDM2 Power" }, 2352 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2353 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2354 { "PDM2 R Mux", NULL, "PDM2 Power" }, 2355 { "PDM1L", NULL, "PDM1 L Mux" }, 2356 { "PDM1R", NULL, "PDM1 R Mux" }, 2357 { "PDM2L", NULL, "PDM2 L Mux" }, 2358 { "PDM2R", NULL, "PDM2 R Mux" }, 2359}; 2360 2361static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = { 2362 { "SPO Amp", NULL, "PDM1 L Mux" }, 2363 { "SPO Amp", NULL, "PDM1 R Mux" }, 2364 { "SPOLP", NULL, "SPO Amp" }, 2365 { "SPOLN", NULL, "SPO Amp" }, 2366 { "SPORP", NULL, "SPO Amp" }, 2367 { "SPORN", NULL, "SPO Amp" }, 2368}; 2369 2370static int rt5670_hw_params(struct snd_pcm_substream *substream, 2371 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 2372{ 2373 struct snd_soc_component *component = dai->component; 2374 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2375 unsigned int val_len = 0, val_clk, mask_clk; 2376 int pre_div, bclk_ms, frame_size; 2377 2378 rt5670->lrck[dai->id] = params_rate(params); 2379 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]); 2380 if (pre_div < 0) { 2381 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n", 2382 rt5670->lrck[dai->id], dai->id); 2383 return -EINVAL; 2384 } 2385 frame_size = snd_soc_params_to_frame_size(params); 2386 if (frame_size < 0) { 2387 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size); 2388 return -EINVAL; 2389 } 2390 bclk_ms = frame_size > 32; 2391 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms); 2392 2393 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", 2394 rt5670->bclk[dai->id], rt5670->lrck[dai->id]); 2395 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 2396 bclk_ms, pre_div, dai->id); 2397 2398 switch (params_width(params)) { 2399 case 16: 2400 break; 2401 case 20: 2402 val_len |= RT5670_I2S_DL_20; 2403 break; 2404 case 24: 2405 val_len |= RT5670_I2S_DL_24; 2406 break; 2407 case 8: 2408 val_len |= RT5670_I2S_DL_8; 2409 break; 2410 default: 2411 return -EINVAL; 2412 } 2413 2414 switch (dai->id) { 2415 case RT5670_AIF1: 2416 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK; 2417 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT | 2418 pre_div << RT5670_I2S_PD1_SFT; 2419 snd_soc_component_update_bits(component, RT5670_I2S1_SDP, 2420 RT5670_I2S_DL_MASK, val_len); 2421 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk); 2422 break; 2423 case RT5670_AIF2: 2424 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK; 2425 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT | 2426 pre_div << RT5670_I2S_PD2_SFT; 2427 snd_soc_component_update_bits(component, RT5670_I2S2_SDP, 2428 RT5670_I2S_DL_MASK, val_len); 2429 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk); 2430 break; 2431 default: 2432 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); 2433 return -EINVAL; 2434 } 2435 2436 return 0; 2437} 2438 2439static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 2440{ 2441 struct snd_soc_component *component = dai->component; 2442 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2443 unsigned int reg_val = 0; 2444 2445 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2446 case SND_SOC_DAIFMT_CBP_CFP: 2447 rt5670->master[dai->id] = 1; 2448 break; 2449 case SND_SOC_DAIFMT_CBC_CFC: 2450 reg_val |= RT5670_I2S_MS_S; 2451 rt5670->master[dai->id] = 0; 2452 break; 2453 default: 2454 return -EINVAL; 2455 } 2456 2457 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 2458 case SND_SOC_DAIFMT_NB_NF: 2459 break; 2460 case SND_SOC_DAIFMT_IB_NF: 2461 reg_val |= RT5670_I2S_BP_INV; 2462 break; 2463 default: 2464 return -EINVAL; 2465 } 2466 2467 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 2468 case SND_SOC_DAIFMT_I2S: 2469 break; 2470 case SND_SOC_DAIFMT_LEFT_J: 2471 reg_val |= RT5670_I2S_DF_LEFT; 2472 break; 2473 case SND_SOC_DAIFMT_DSP_A: 2474 reg_val |= RT5670_I2S_DF_PCM_A; 2475 break; 2476 case SND_SOC_DAIFMT_DSP_B: 2477 reg_val |= RT5670_I2S_DF_PCM_B; 2478 break; 2479 default: 2480 return -EINVAL; 2481 } 2482 2483 switch (dai->id) { 2484 case RT5670_AIF1: 2485 snd_soc_component_update_bits(component, RT5670_I2S1_SDP, 2486 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2487 RT5670_I2S_DF_MASK, reg_val); 2488 break; 2489 case RT5670_AIF2: 2490 snd_soc_component_update_bits(component, RT5670_I2S2_SDP, 2491 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2492 RT5670_I2S_DF_MASK, reg_val); 2493 break; 2494 default: 2495 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); 2496 return -EINVAL; 2497 } 2498 return 0; 2499} 2500 2501static int rt5670_set_codec_sysclk(struct snd_soc_component *component, int clk_id, 2502 int source, unsigned int freq, int dir) 2503{ 2504 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2505 unsigned int reg_val = 0; 2506 2507 switch (clk_id) { 2508 case RT5670_SCLK_S_MCLK: 2509 reg_val |= RT5670_SCLK_SRC_MCLK; 2510 break; 2511 case RT5670_SCLK_S_PLL1: 2512 reg_val |= RT5670_SCLK_SRC_PLL1; 2513 break; 2514 case RT5670_SCLK_S_RCCLK: 2515 reg_val |= RT5670_SCLK_SRC_RCCLK; 2516 break; 2517 default: 2518 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); 2519 return -EINVAL; 2520 } 2521 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2522 RT5670_SCLK_SRC_MASK, reg_val); 2523 rt5670->sysclk = freq; 2524 if (clk_id != RT5670_SCLK_S_RCCLK) 2525 rt5670->sysclk_src = clk_id; 2526 2527 dev_dbg(component->dev, "Sysclk : %dHz clock id : %d\n", freq, clk_id); 2528 2529 return 0; 2530} 2531 2532static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 2533 unsigned int freq_in, unsigned int freq_out) 2534{ 2535 struct snd_soc_component *component = dai->component; 2536 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2537 struct rl6231_pll_code pll_code; 2538 int ret; 2539 2540 if (source == rt5670->pll_src && freq_in == rt5670->pll_in && 2541 freq_out == rt5670->pll_out) 2542 return 0; 2543 2544 if (!freq_in || !freq_out) { 2545 dev_dbg(component->dev, "PLL disabled\n"); 2546 2547 rt5670->pll_in = 0; 2548 rt5670->pll_out = 0; 2549 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2550 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK); 2551 return 0; 2552 } 2553 2554 switch (source) { 2555 case RT5670_PLL1_S_MCLK: 2556 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2557 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK); 2558 break; 2559 case RT5670_PLL1_S_BCLK1: 2560 case RT5670_PLL1_S_BCLK2: 2561 case RT5670_PLL1_S_BCLK3: 2562 case RT5670_PLL1_S_BCLK4: 2563 switch (dai->id) { 2564 case RT5670_AIF1: 2565 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2566 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1); 2567 break; 2568 case RT5670_AIF2: 2569 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2570 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2); 2571 break; 2572 default: 2573 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); 2574 return -EINVAL; 2575 } 2576 break; 2577 default: 2578 dev_err(component->dev, "Unknown PLL source %d\n", source); 2579 return -EINVAL; 2580 } 2581 2582 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); 2583 if (ret < 0) { 2584 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); 2585 return ret; 2586 } 2587 2588 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", 2589 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), 2590 pll_code.n_code, pll_code.k_code); 2591 2592 snd_soc_component_write(component, RT5670_PLL_CTRL1, 2593 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code); 2594 snd_soc_component_write(component, RT5670_PLL_CTRL2, 2595 ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT) | 2596 (pll_code.m_bp << RT5670_PLL_M_BP_SFT)); 2597 2598 rt5670->pll_in = freq_in; 2599 rt5670->pll_out = freq_out; 2600 rt5670->pll_src = source; 2601 2602 return 0; 2603} 2604 2605static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 2606 unsigned int rx_mask, int slots, int slot_width) 2607{ 2608 struct snd_soc_component *component = dai->component; 2609 unsigned int val = 0; 2610 2611 if (rx_mask || tx_mask) 2612 val |= (1 << 14); 2613 2614 switch (slots) { 2615 case 4: 2616 val |= (1 << 12); 2617 break; 2618 case 6: 2619 val |= (2 << 12); 2620 break; 2621 case 8: 2622 val |= (3 << 12); 2623 break; 2624 case 2: 2625 break; 2626 default: 2627 return -EINVAL; 2628 } 2629 2630 switch (slot_width) { 2631 case 20: 2632 val |= (1 << 10); 2633 break; 2634 case 24: 2635 val |= (2 << 10); 2636 break; 2637 case 32: 2638 val |= (3 << 10); 2639 break; 2640 case 16: 2641 break; 2642 default: 2643 return -EINVAL; 2644 } 2645 2646 snd_soc_component_update_bits(component, RT5670_TDM_CTRL_1, 0x7c00, val); 2647 2648 return 0; 2649} 2650 2651static int rt5670_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) 2652{ 2653 struct snd_soc_component *component = dai->component; 2654 2655 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio); 2656 if (dai->id != RT5670_AIF1) 2657 return 0; 2658 2659 if ((ratio % 50) == 0) 2660 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 2661 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_50FS); 2662 else 2663 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 2664 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_NOR); 2665 2666 return 0; 2667} 2668 2669static int rt5670_set_bias_level(struct snd_soc_component *component, 2670 enum snd_soc_bias_level level) 2671{ 2672 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2673 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component); 2674 2675 switch (level) { 2676 case SND_SOC_BIAS_PREPARE: 2677 if (SND_SOC_BIAS_STANDBY == snd_soc_dapm_get_bias_level(dapm)) { 2678 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2679 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2680 RT5670_PWR_BG | RT5670_PWR_VREF2, 2681 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2682 RT5670_PWR_BG | RT5670_PWR_VREF2); 2683 mdelay(10); 2684 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2685 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2686 RT5670_PWR_FV1 | RT5670_PWR_FV2); 2687 snd_soc_component_update_bits(component, RT5670_CHARGE_PUMP, 2688 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK, 2689 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS); 2690 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x1); 2691 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2692 RT5670_LDO_SEL_MASK, 0x5); 2693 } 2694 break; 2695 case SND_SOC_BIAS_STANDBY: 2696 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2697 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 | 2698 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2699 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2700 RT5670_LDO_SEL_MASK, 0x3); 2701 break; 2702 case SND_SOC_BIAS_OFF: 2703 if (rt5670->jd_mode) 2704 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2705 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2706 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2707 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2708 RT5670_PWR_MB | RT5670_PWR_BG); 2709 else 2710 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2711 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2712 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2713 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2714 2715 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x0); 2716 break; 2717 2718 default: 2719 break; 2720 } 2721 2722 return 0; 2723} 2724 2725static int rt5670_probe(struct snd_soc_component *component) 2726{ 2727 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component); 2728 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2729 2730 switch (snd_soc_component_read(component, RT5670_RESET) & RT5670_ID_MASK) { 2731 case RT5670_ID_5670: 2732 case RT5670_ID_5671: 2733 snd_soc_dapm_new_controls(dapm, 2734 rt5670_specific_dapm_widgets, 2735 ARRAY_SIZE(rt5670_specific_dapm_widgets)); 2736 snd_soc_dapm_add_routes(dapm, 2737 rt5670_specific_dapm_routes, 2738 ARRAY_SIZE(rt5670_specific_dapm_routes)); 2739 break; 2740 case RT5670_ID_5672: 2741 snd_soc_dapm_new_controls(dapm, 2742 rt5672_specific_dapm_widgets, 2743 ARRAY_SIZE(rt5672_specific_dapm_widgets)); 2744 snd_soc_dapm_add_routes(dapm, 2745 rt5672_specific_dapm_routes, 2746 ARRAY_SIZE(rt5672_specific_dapm_routes)); 2747 break; 2748 default: 2749 dev_err(component->dev, 2750 "The driver is for RT5670 RT5671 or RT5672 only\n"); 2751 return -ENODEV; 2752 } 2753 rt5670->component = component; 2754 2755 return 0; 2756} 2757 2758static void rt5670_remove(struct snd_soc_component *component) 2759{ 2760 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2761 2762 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2763 snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio); 2764} 2765 2766#ifdef CONFIG_PM 2767static int rt5670_suspend(struct snd_soc_component *component) 2768{ 2769 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2770 2771 regcache_cache_only(rt5670->regmap, true); 2772 regcache_mark_dirty(rt5670->regmap); 2773 return 0; 2774} 2775 2776static int rt5670_resume(struct snd_soc_component *component) 2777{ 2778 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2779 2780 regcache_cache_only(rt5670->regmap, false); 2781 regcache_sync(rt5670->regmap); 2782 2783 return 0; 2784} 2785#else 2786#define rt5670_suspend NULL 2787#define rt5670_resume NULL 2788#endif 2789 2790#define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000 2791#define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 2792 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 2793 2794static const struct snd_soc_dai_ops rt5670_aif_dai_ops = { 2795 .hw_params = rt5670_hw_params, 2796 .set_fmt = rt5670_set_dai_fmt, 2797 .set_tdm_slot = rt5670_set_tdm_slot, 2798 .set_pll = rt5670_set_dai_pll, 2799 .set_bclk_ratio = rt5670_set_bclk_ratio, 2800}; 2801 2802static struct snd_soc_dai_driver rt5670_dai[] = { 2803 { 2804 .name = "rt5670-aif1", 2805 .id = RT5670_AIF1, 2806 .playback = { 2807 .stream_name = "AIF1 Playback", 2808 .channels_min = 1, 2809 .channels_max = 2, 2810 .rates = RT5670_STEREO_RATES, 2811 .formats = RT5670_FORMATS, 2812 }, 2813 .capture = { 2814 .stream_name = "AIF1 Capture", 2815 .channels_min = 1, 2816 .channels_max = 2, 2817 .rates = RT5670_STEREO_RATES, 2818 .formats = RT5670_FORMATS, 2819 }, 2820 .ops = &rt5670_aif_dai_ops, 2821 .symmetric_rate = 1, 2822 }, 2823 { 2824 .name = "rt5670-aif2", 2825 .id = RT5670_AIF2, 2826 .playback = { 2827 .stream_name = "AIF2 Playback", 2828 .channels_min = 1, 2829 .channels_max = 2, 2830 .rates = RT5670_STEREO_RATES, 2831 .formats = RT5670_FORMATS, 2832 }, 2833 .capture = { 2834 .stream_name = "AIF2 Capture", 2835 .channels_min = 1, 2836 .channels_max = 2, 2837 .rates = RT5670_STEREO_RATES, 2838 .formats = RT5670_FORMATS, 2839 }, 2840 .ops = &rt5670_aif_dai_ops, 2841 .symmetric_rate = 1, 2842 }, 2843}; 2844 2845static const struct snd_soc_component_driver soc_component_dev_rt5670 = { 2846 .probe = rt5670_probe, 2847 .remove = rt5670_remove, 2848 .suspend = rt5670_suspend, 2849 .resume = rt5670_resume, 2850 .set_bias_level = rt5670_set_bias_level, 2851 .set_sysclk = rt5670_set_codec_sysclk, 2852 .controls = rt5670_snd_controls, 2853 .num_controls = ARRAY_SIZE(rt5670_snd_controls), 2854 .dapm_widgets = rt5670_dapm_widgets, 2855 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets), 2856 .dapm_routes = rt5670_dapm_routes, 2857 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes), 2858 .use_pmdown_time = 1, 2859 .endianness = 1, 2860}; 2861 2862static const struct regmap_config rt5670_regmap = { 2863 .reg_bits = 8, 2864 .val_bits = 16, 2865 .use_single_read = true, 2866 .use_single_write = true, 2867 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) * 2868 RT5670_PR_SPACING), 2869 .volatile_reg = rt5670_volatile_register, 2870 .readable_reg = rt5670_readable_register, 2871 .cache_type = REGCACHE_MAPLE, 2872 .reg_defaults = rt5670_reg, 2873 .num_reg_defaults = ARRAY_SIZE(rt5670_reg), 2874 .ranges = rt5670_ranges, 2875 .num_ranges = ARRAY_SIZE(rt5670_ranges), 2876}; 2877 2878static const struct i2c_device_id rt5670_i2c_id[] = { 2879 { "rt5670" }, 2880 { "rt5671" }, 2881 { "rt5672" }, 2882 { } 2883}; 2884MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id); 2885 2886#ifdef CONFIG_ACPI 2887static const struct acpi_device_id rt5670_acpi_match[] = { 2888 { "10EC5640" }, /* quirk */ 2889 { "10EC5670" }, 2890 { "10EC5672" }, 2891 { } 2892}; 2893MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match); 2894#endif 2895 2896static int rt5670_quirk_cb(const struct dmi_system_id *id) 2897{ 2898 rt5670_quirk = (unsigned long)id->driver_data; 2899 return 1; 2900} 2901 2902static const struct dmi_system_id dmi_platform_intel_quirks[] = { 2903 { 2904 .callback = rt5670_quirk_cb, 2905 .ident = "Intel Braswell", 2906 .matches = { 2907 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), 2908 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"), 2909 }, 2910 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2911 RT5670_DMIC1_IN2P | 2912 RT5670_GPIO1_IS_IRQ | 2913 RT5670_JD_MODE1), 2914 }, 2915 { 2916 .callback = rt5670_quirk_cb, 2917 .ident = "Dell Wyse 3040", 2918 .matches = { 2919 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 2920 DMI_MATCH(DMI_PRODUCT_NAME, "Wyse 3040"), 2921 }, 2922 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2923 RT5670_DMIC1_IN2P | 2924 RT5670_GPIO1_IS_IRQ | 2925 RT5670_JD_MODE1), 2926 }, 2927 { 2928 .callback = rt5670_quirk_cb, 2929 .ident = "Lenovo Thinkpad Tablet 8", 2930 .matches = { 2931 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2932 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 8"), 2933 }, 2934 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2935 RT5670_DMIC2_INR | 2936 RT5670_GPIO1_IS_IRQ | 2937 RT5670_JD_MODE1), 2938 }, 2939 { 2940 .callback = rt5670_quirk_cb, 2941 .ident = "Lenovo Thinkpad Tablet 10", 2942 .matches = { 2943 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2944 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"), 2945 }, 2946 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2947 RT5670_DMIC1_IN2P | 2948 RT5670_GPIO1_IS_IRQ | 2949 RT5670_JD_MODE1), 2950 }, 2951 { 2952 .callback = rt5670_quirk_cb, 2953 .ident = "Lenovo Thinkpad Tablet 10", 2954 .matches = { 2955 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2956 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"), 2957 }, 2958 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2959 RT5670_DMIC1_IN2P | 2960 RT5670_GPIO1_IS_IRQ | 2961 RT5670_JD_MODE1), 2962 }, 2963 { 2964 .callback = rt5670_quirk_cb, 2965 .ident = "Lenovo Miix 2 10", 2966 .matches = { 2967 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2968 DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"), 2969 }, 2970 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2971 RT5670_DMIC1_IN2P | 2972 RT5670_GPIO1_IS_EXT_SPK_EN | 2973 RT5670_JD_MODE2), 2974 }, 2975 { 2976 .callback = rt5670_quirk_cb, 2977 .ident = "Dell Venue 8 Pro 5855", 2978 .matches = { 2979 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 2980 DMI_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5855"), 2981 }, 2982 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2983 RT5670_DMIC2_INR | 2984 RT5670_GPIO1_IS_IRQ | 2985 RT5670_JD_MODE3), 2986 }, 2987 { 2988 .callback = rt5670_quirk_cb, 2989 .ident = "Dell Venue 10 Pro 5055", 2990 .matches = { 2991 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 2992 DMI_MATCH(DMI_PRODUCT_NAME, "Venue 10 Pro 5055"), 2993 }, 2994 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2995 RT5670_DMIC2_INR | 2996 RT5670_GPIO1_IS_IRQ | 2997 RT5670_JD_MODE1), 2998 }, 2999 { 3000 .callback = rt5670_quirk_cb, 3001 .ident = "Aegex 10 tablet (RU2)", 3002 .matches = { 3003 DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"), 3004 DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"), 3005 }, 3006 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 3007 RT5670_DMIC2_INR | 3008 RT5670_GPIO1_IS_IRQ | 3009 RT5670_JD_MODE3), 3010 }, 3011 {} 3012}; 3013 3014const char *rt5670_components(void) 3015{ 3016 unsigned long quirk; 3017 bool dmic1 = false; 3018 bool dmic2 = false; 3019 bool dmic3 = false; 3020 3021 if (quirk_override) { 3022 quirk = quirk_override; 3023 } else { 3024 dmi_check_system(dmi_platform_intel_quirks); 3025 quirk = rt5670_quirk; 3026 } 3027 3028 if ((quirk & RT5670_DMIC1_IN2P) || 3029 (quirk & RT5670_DMIC1_GPIO6) || 3030 (quirk & RT5670_DMIC1_GPIO7)) 3031 dmic1 = true; 3032 3033 if ((quirk & RT5670_DMIC2_INR) || 3034 (quirk & RT5670_DMIC2_GPIO8)) 3035 dmic2 = true; 3036 3037 if (quirk & RT5670_DMIC3_GPIO5) 3038 dmic3 = true; 3039 3040 if (dmic1 && dmic2) 3041 return "cfg-spk:2 cfg-mic:dmics12"; 3042 else if (dmic1) 3043 return "cfg-spk:2 cfg-mic:dmic1"; 3044 else if (dmic2) 3045 return "cfg-spk:2 cfg-mic:dmic2"; 3046 else if (dmic3) 3047 return "cfg-spk:2 cfg-mic:dmic3"; 3048 3049 return NULL; 3050} 3051EXPORT_SYMBOL_GPL(rt5670_components); 3052 3053static int rt5670_i2c_probe(struct i2c_client *i2c) 3054{ 3055 struct rt5670_priv *rt5670; 3056 int ret; 3057 unsigned int val; 3058 3059 rt5670 = devm_kzalloc(&i2c->dev, 3060 sizeof(struct rt5670_priv), 3061 GFP_KERNEL); 3062 if (NULL == rt5670) 3063 return -ENOMEM; 3064 3065 i2c_set_clientdata(i2c, rt5670); 3066 3067 dmi_check_system(dmi_platform_intel_quirks); 3068 if (quirk_override) { 3069 dev_info(&i2c->dev, "Overriding quirk 0x%x => 0x%x\n", 3070 (unsigned int)rt5670_quirk, quirk_override); 3071 rt5670_quirk = quirk_override; 3072 } 3073 3074 if (rt5670_quirk & RT5670_GPIO1_IS_IRQ) { 3075 rt5670->gpio1_is_irq = true; 3076 dev_info(&i2c->dev, "quirk GPIO1 is IRQ\n"); 3077 } 3078 if (rt5670_quirk & RT5670_GPIO1_IS_EXT_SPK_EN) { 3079 rt5670->gpio1_is_ext_spk_en = true; 3080 dev_info(&i2c->dev, "quirk GPIO1 is external speaker enable\n"); 3081 } 3082 if (rt5670_quirk & RT5670_IN2_DIFF) { 3083 rt5670->in2_diff = true; 3084 dev_info(&i2c->dev, "quirk IN2_DIFF\n"); 3085 } 3086 if (rt5670_quirk & RT5670_DMIC_EN) { 3087 rt5670->dmic_en = true; 3088 dev_info(&i2c->dev, "quirk DMIC enabled\n"); 3089 } 3090 if (rt5670_quirk & RT5670_DMIC1_IN2P) { 3091 rt5670->dmic1_data_pin = RT5670_DMIC_DATA_IN2P; 3092 dev_info(&i2c->dev, "quirk DMIC1 on IN2P pin\n"); 3093 } 3094 if (rt5670_quirk & RT5670_DMIC1_GPIO6) { 3095 rt5670->dmic1_data_pin = RT5670_DMIC_DATA_GPIO6; 3096 dev_info(&i2c->dev, "quirk DMIC1 on GPIO6 pin\n"); 3097 } 3098 if (rt5670_quirk & RT5670_DMIC1_GPIO7) { 3099 rt5670->dmic1_data_pin = RT5670_DMIC_DATA_GPIO7; 3100 dev_info(&i2c->dev, "quirk DMIC1 on GPIO7 pin\n"); 3101 } 3102 if (rt5670_quirk & RT5670_DMIC2_INR) { 3103 rt5670->dmic2_data_pin = RT5670_DMIC_DATA_IN3N; 3104 dev_info(&i2c->dev, "quirk DMIC2 on INR pin\n"); 3105 } 3106 if (rt5670_quirk & RT5670_DMIC2_GPIO8) { 3107 rt5670->dmic2_data_pin = RT5670_DMIC_DATA_GPIO8; 3108 dev_info(&i2c->dev, "quirk DMIC2 on GPIO8 pin\n"); 3109 } 3110 if (rt5670_quirk & RT5670_DMIC3_GPIO5) { 3111 rt5670->dmic3_data_pin = RT5670_DMIC_DATA_GPIO5; 3112 dev_info(&i2c->dev, "quirk DMIC3 on GPIO5 pin\n"); 3113 } 3114 3115 if (rt5670_quirk & RT5670_JD_MODE1) { 3116 rt5670->jd_mode = 1; 3117 dev_info(&i2c->dev, "quirk JD mode 1\n"); 3118 } 3119 if (rt5670_quirk & RT5670_JD_MODE2) { 3120 rt5670->jd_mode = 2; 3121 dev_info(&i2c->dev, "quirk JD mode 2\n"); 3122 } 3123 if (rt5670_quirk & RT5670_JD_MODE3) { 3124 rt5670->jd_mode = 3; 3125 dev_info(&i2c->dev, "quirk JD mode 3\n"); 3126 } 3127 3128 /* 3129 * Enable the emulated "DAC1 Playback Switch" by default to avoid 3130 * muting the output with older UCM profiles. 3131 */ 3132 rt5670->dac1_playback_switch_l = true; 3133 rt5670->dac1_playback_switch_r = true; 3134 /* The Power-On-Reset values for the DAC1 mixer have the DAC1 input enabled. */ 3135 rt5670->dac1_mixl_dac1_switch = true; 3136 rt5670->dac1_mixr_dac1_switch = true; 3137 3138 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap); 3139 if (IS_ERR(rt5670->regmap)) { 3140 ret = PTR_ERR(rt5670->regmap); 3141 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 3142 ret); 3143 return ret; 3144 } 3145 3146 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val); 3147 if (val != RT5670_DEVICE_ID) { 3148 dev_err(&i2c->dev, 3149 "Device with ID register %#x is not rt5670/72\n", val); 3150 return -ENODEV; 3151 } 3152 3153 regmap_write(rt5670->regmap, RT5670_RESET, 0); 3154 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 3155 RT5670_PWR_HP_L | RT5670_PWR_HP_R | 3156 RT5670_PWR_VREF2, RT5670_PWR_VREF2); 3157 msleep(100); 3158 3159 regmap_write(rt5670->regmap, RT5670_RESET, 0); 3160 3161 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val); 3162 if (val >= 4) 3163 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980); 3164 else 3165 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00); 3166 3167 ret = regmap_register_patch(rt5670->regmap, init_list, 3168 ARRAY_SIZE(init_list)); 3169 if (ret != 0) 3170 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 3171 3172 regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC, 3173 RT5670_MCLK_DET, RT5670_MCLK_DET); 3174 3175 if (rt5670->in2_diff) 3176 regmap_update_bits(rt5670->regmap, RT5670_IN2, 3177 RT5670_IN_DF2, RT5670_IN_DF2); 3178 3179 if (rt5670->gpio1_is_irq) { 3180 /* for push button */ 3181 regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000); 3182 regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010); 3183 regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014); 3184 /* for irq */ 3185 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3186 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); 3187 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 3188 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT); 3189 } 3190 3191 if (rt5670->gpio1_is_ext_spk_en) { 3192 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3193 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_GPIO1); 3194 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 3195 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT); 3196 } 3197 3198 if (rt5670->jd_mode) { 3199 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK, 3200 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK); 3201 rt5670->sysclk = 0; 3202 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK; 3203 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 3204 RT5670_PWR_MB, RT5670_PWR_MB); 3205 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2, 3206 RT5670_PWR_JD1, RT5670_PWR_JD1); 3207 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1, 3208 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN); 3209 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3, 3210 RT5670_JD_TRI_CBJ_SEL_MASK | 3211 RT5670_JD_TRI_HPO_SEL_MASK, 3212 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1); 3213 switch (rt5670->jd_mode) { 3214 case 1: 3215 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 3216 RT5670_JD1_MODE_MASK, 3217 RT5670_JD1_MODE_0); 3218 break; 3219 case 2: 3220 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 3221 RT5670_JD1_MODE_MASK, 3222 RT5670_JD1_MODE_1); 3223 break; 3224 case 3: 3225 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 3226 RT5670_JD1_MODE_MASK, 3227 RT5670_JD1_MODE_2); 3228 break; 3229 default: 3230 break; 3231 } 3232 } 3233 3234 if (rt5670->dmic_en) { 3235 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3236 RT5670_GP2_PIN_MASK, 3237 RT5670_GP2_PIN_DMIC1_SCL); 3238 3239 switch (rt5670->dmic1_data_pin) { 3240 case RT5670_DMIC_DATA_IN2P: 3241 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3242 RT5670_DMIC_1_DP_MASK, 3243 RT5670_DMIC_1_DP_IN2P); 3244 break; 3245 3246 case RT5670_DMIC_DATA_GPIO6: 3247 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3248 RT5670_DMIC_1_DP_MASK, 3249 RT5670_DMIC_1_DP_GPIO6); 3250 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3251 RT5670_GP6_PIN_MASK, 3252 RT5670_GP6_PIN_DMIC1_SDA); 3253 break; 3254 3255 case RT5670_DMIC_DATA_GPIO7: 3256 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3257 RT5670_DMIC_1_DP_MASK, 3258 RT5670_DMIC_1_DP_GPIO7); 3259 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3260 RT5670_GP7_PIN_MASK, 3261 RT5670_GP7_PIN_DMIC1_SDA); 3262 break; 3263 3264 default: 3265 break; 3266 } 3267 3268 switch (rt5670->dmic2_data_pin) { 3269 case RT5670_DMIC_DATA_IN3N: 3270 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3271 RT5670_DMIC_2_DP_MASK, 3272 RT5670_DMIC_2_DP_IN3N); 3273 break; 3274 3275 case RT5670_DMIC_DATA_GPIO8: 3276 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3277 RT5670_DMIC_2_DP_MASK, 3278 RT5670_DMIC_2_DP_GPIO8); 3279 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3280 RT5670_GP8_PIN_MASK, 3281 RT5670_GP8_PIN_DMIC2_SDA); 3282 break; 3283 3284 default: 3285 break; 3286 } 3287 3288 switch (rt5670->dmic3_data_pin) { 3289 case RT5670_DMIC_DATA_GPIO5: 3290 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2, 3291 RT5670_DMIC_3_DP_MASK, 3292 RT5670_DMIC_3_DP_GPIO5); 3293 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3294 RT5670_GP5_PIN_MASK, 3295 RT5670_GP5_PIN_DMIC3_SDA); 3296 break; 3297 3298 case RT5670_DMIC_DATA_GPIO9: 3299 case RT5670_DMIC_DATA_GPIO10: 3300 dev_err(&i2c->dev, 3301 "Always use GPIO5 as DMIC3 data pin\n"); 3302 break; 3303 3304 default: 3305 break; 3306 } 3307 3308 } 3309 3310 pm_runtime_enable(&i2c->dev); 3311 pm_request_idle(&i2c->dev); 3312 3313 ret = devm_snd_soc_register_component(&i2c->dev, 3314 &soc_component_dev_rt5670, 3315 rt5670_dai, ARRAY_SIZE(rt5670_dai)); 3316 if (ret < 0) 3317 goto err; 3318 3319 return 0; 3320err: 3321 pm_runtime_disable(&i2c->dev); 3322 3323 return ret; 3324} 3325 3326static void rt5670_i2c_remove(struct i2c_client *i2c) 3327{ 3328 pm_runtime_disable(&i2c->dev); 3329} 3330 3331static struct i2c_driver rt5670_i2c_driver = { 3332 .driver = { 3333 .name = "rt5670", 3334 .acpi_match_table = ACPI_PTR(rt5670_acpi_match), 3335 }, 3336 .probe = rt5670_i2c_probe, 3337 .remove = rt5670_i2c_remove, 3338 .id_table = rt5670_i2c_id, 3339}; 3340 3341module_i2c_driver(rt5670_i2c_driver); 3342 3343MODULE_DESCRIPTION("ASoC RT5670 driver"); 3344MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 3345MODULE_LICENSE("GPL v2");
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