rt1017-sdca-sdw.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2//
  3// rt1017-sdca-sdw.c -- rt1017 SDCA ALSA SoC amplifier audio driver
  4//
  5// Copyright(c) 2023 Realtek Semiconductor Corp.
  6//
  7//
  8#include <linux/delay.h>
  9#include <linux/device.h>
 10#include <linux/pm_runtime.h>
 11#include <linux/mod_devicetable.h>
 12#include <linux/module.h>
 13#include <linux/regmap.h>
 14#include <sound/core.h>
 15#include <sound/pcm.h>
 16#include <sound/pcm_params.h>
 17#include <sound/soc.h>
 18#include <sound/soc-dapm.h>
 19#include <sound/initval.h>
 20#include <sound/tlv.h>
 21
 22#include "rt1017-sdca-sdw.h"
 23
 24static bool rt1017_sdca_readable_register(struct device *dev, unsigned int reg)
 25{
 26	switch (reg) {
 27	case 0x2f55:
 28	case 0x3206:
 29	case 0xc000:
 30	case 0xc001:
 31	case 0xc022:
 32	case 0xc030:
 33	case 0xc104:
 34	case 0xc10b:
 35	case 0xc10c:
 36	case 0xc110:
 37	case 0xc112:
 38	case 0xc300:
 39	case 0xc301:
 40	case 0xc318:
 41	case 0xc325 ... 0xc328:
 42	case 0xc331:
 43	case 0xc340:
 44	case 0xc350 ... 0xc351:
 45	case 0xc500:
 46	case 0xc502:
 47	case 0xc504:
 48	case 0xc507:
 49	case 0xc509:
 50	case 0xc510:
 51	case 0xc512:
 52	case 0xc518:
 53	case 0xc51b:
 54	case 0xc51d:
 55	case 0xc520:
 56	case 0xc540 ... 0xc542:
 57	case 0xc550 ... 0xc552:
 58	case 0xc600:
 59	case 0xc602:
 60	case 0xc612:
 61	case 0xc622:
 62	case 0xc632:
 63	case 0xc642:
 64	case 0xc651:
 65	case 0xca00:
 66	case 0xca09 ... 0xca0c:
 67	case 0xca0e ... 0xca0f:
 68	case 0xca10 ... 0xca11:
 69	case 0xca16 ... 0xca17:
 70	case 0xcb00:
 71	case 0xcc00:
 72	case 0xcc02:
 73	case 0xd017:
 74	case 0xd01a ... 0xd01c:
 75	case 0xd101:
 76	case 0xd20c:
 77	case 0xd300:
 78	case 0xd370:
 79	case 0xd500:
 80	case 0xd545 ... 0xd548:
 81	case 0xd5a5 ... 0xd5a8:
 82	case 0xd5aa ... 0xd5ad:
 83	case 0xda04 ... 0xda07:
 84	case 0xda09 ... 0xda0a:
 85	case 0xda0c ... 0xda0f:
 86	case 0xda11 ... 0xda14:
 87	case 0xda16 ... 0xda19:
 88	case 0xdab6 ... 0xdabb:
 89	case 0xdb09 ... 0xdb0a:
 90	case 0xdb14:
 91
 92	case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_UDMPU21,
 93			RT1017_SDCA_CTL_UDMPU_CLUSTER, 0):
 94	case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_FU,
 95			RT1017_SDCA_CTL_FU_MUTE, 0x01):
 96	case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_XU22,
 97			RT1017_SDCA_CTL_BYPASS, 0):
 98	case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_SAPU29,
 99			RT1017_SDCA_CTL_PROT_STAT, 0):
100	case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_CS21,
101			RT1017_SDCA_CTL_FS_INDEX, 0):
102	case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE23,
103			RT1017_SDCA_CTL_REQ_POWER_STATE, 0):
104	case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE22,
105			RT1017_SDCA_CTL_REQ_POWER_STATE, 0):
106		return true;
107	default:
108		return false;
109	}
110}
111
112static bool rt1017_sdca_volatile_register(struct device *dev, unsigned int reg)
113{
114	switch (reg) {
115	case 0x2f55:
116	case 0xc000:
117	case 0xc022:
118	case 0xc351:
119	case 0xc518:
120	case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_SAPU29,
121			RT1017_SDCA_CTL_PROT_STAT, 0):
122		return true;
123	default:
124		return false;
125	}
126}
127
128static const struct reg_sequence rt1017_blind_write[] = {
129	{ 0xc001, 0x43 },
130	{ 0x2f55, 0x02 },
131	{ 0x3206, 0x80 },
132	{ 0x005f, 0x7f },
133	{ 0xd101, 0xa0 },
134	{ 0xc112, 0xc0 },
135	{ 0xc104, 0xaa },
136	{ 0xc110, 0x59 },
137	{ 0xc112, 0xc0 },
138	{ 0xc340, 0x80 },
139	{ 0xd017, 0x2c },
140	{ 0xd01a, 0xc8 },
141	{ 0xd01b, 0xcf },
142	{ 0xd01c, 0x0c },
143	{ 0xd20c, 0x14 },
144	{ 0xdb09, 0x0f },
145	{ 0xdb0a, 0x7f },
146	{ 0xdb14, 0x03 },
147	{ 0xcb00, 0x31 },
148	{ 0xc318, 0x44 },
149	{ 0xc325, 0xce },
150	{ 0xc326, 0x13 },
151	{ 0xc327, 0x5f },
152	{ 0xc328, 0xf3 },
153	{ 0xc350, 0xe1 },
154	{ 0xc351, 0x88 },
155	{ 0xc030, 0x14 },
156	{ 0xc331, 0xf2 },
157	{ 0xc551, 0x0f },
158	{ 0xc552, 0xff },
159	{ 0xc651, 0xc0 },
160	{ 0xc550, 0xd0 },
161	{ 0xc612, 0x00 },
162	{ 0xc622, 0x00 },
163	{ 0xc632, 0x00 },
164	{ 0xc642, 0x00 },
165	{ 0xc602, 0xf0 },
166	{ 0xc600, 0xd0 },
167	{ 0xcc02, 0x78 },
168	{ 0xcc00, 0x90 },
169	{ 0xc300, 0x3f },
170	{ 0xc301, 0x1d },
171	{ 0xc10b, 0x2e },
172	{ 0xc10c, 0x36 },
173
174	{ 0xd5a5, 0x00 },
175	{ 0xd5a6, 0x6a },
176	{ 0xd5a7, 0xaa },
177	{ 0xd5a8, 0xaa },
178	{ 0xd5aa, 0x00 },
179	{ 0xd5ab, 0x16 },
180	{ 0xd5ac, 0xdb },
181	{ 0xd5ad, 0x6d },
182	{ 0xd545, 0x09 },
183	{ 0xd546, 0x30 },
184	{ 0xd547, 0xf0 },
185	{ 0xd548, 0xf0 },
186	{ 0xd500, 0x20 },
187	{ 0xc504, 0x3f },
188	{ 0xc540, 0x00 },
189	{ 0xc541, 0x0a },
190	{ 0xc542, 0x1a },
191	{ 0xc512, 0x00 },
192	{ 0xc520, 0x40 },
193	{ 0xc51b, 0x7f },
194	{ 0xc51d, 0x0f },
195	{ 0xc500, 0x40 },
196	{ 0xc502, 0xde },
197	{ 0xc507, 0x05 },
198	{ 0xc509, 0x05 },
199	{ 0xc510, 0x40 },
200	{ 0xc518, 0xc0 },
201	{ 0xc500, 0xc0 },
202
203	{ 0xda0c, 0x00 },
204	{ 0xda0d, 0x0b },
205	{ 0xda0e, 0x55 },
206	{ 0xda0f, 0x55 },
207	{ 0xda04, 0x00 },
208	{ 0xda05, 0x51 },
209	{ 0xda06, 0xeb },
210	{ 0xda07, 0x85 },
211	{ 0xca16, 0x0f },
212	{ 0xca17, 0x00 },
213	{ 0xda09, 0x5d },
214	{ 0xda0a, 0xc0 },
215	{ 0xda11, 0x26 },
216	{ 0xda12, 0x66 },
217	{ 0xda13, 0x66 },
218	{ 0xda14, 0x66 },
219	{ 0xda16, 0x79 },
220	{ 0xda17, 0x99 },
221	{ 0xda18, 0x99 },
222	{ 0xda19, 0x99 },
223	{ 0xca09, 0x00 },
224	{ 0xca0a, 0x07 },
225	{ 0xca0b, 0x89 },
226	{ 0xca0c, 0x61 },
227	{ 0xca0e, 0x00 },
228	{ 0xca0f, 0x03 },
229	{ 0xca10, 0xc4 },
230	{ 0xca11, 0xb0 },
231	{ 0xdab6, 0x00 },
232	{ 0xdab7, 0x01 },
233	{ 0xdab8, 0x00 },
234	{ 0xdab9, 0x00 },
235	{ 0xdaba, 0x00 },
236	{ 0xdabb, 0x00 },
237	{ 0xd017, 0x0e },
238	{ 0xca00, 0xcd },
239	{ 0xc022, 0x84 },
240};
241
242#define RT1017_MAX_REG_NUM 0x4108ffff
243
244static const struct regmap_config rt1017_sdca_regmap = {
245	.reg_bits = 32,
246	.val_bits = 8,
247	.readable_reg = rt1017_sdca_readable_register,
248	.volatile_reg = rt1017_sdca_volatile_register,
249	.max_register = RT1017_MAX_REG_NUM,
250	.reg_defaults = rt1017_sdca_reg_defaults,
251	.num_reg_defaults = ARRAY_SIZE(rt1017_sdca_reg_defaults),
252	.cache_type = REGCACHE_MAPLE,
253	.use_single_read = true,
254	.use_single_write = true,
255};
256
257static int rt1017_sdca_read_prop(struct sdw_slave *slave)
258{
259	struct sdw_slave_prop *prop = &slave->prop;
260	int nval;
261	int i, j;
262	u32 bit;
263	unsigned long addr;
264	struct sdw_dpn_prop *dpn;
265
266	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
267	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
268
269	prop->paging_support = true;
270
271	/* first we need to allocate memory for set bits in port lists
272	 * port = 1 for AMP playback
273	 * port = 2 for IV capture
274	 */
275	prop->source_ports = BIT(2); /* BITMAP: 00000100 */
276	prop->sink_ports = BIT(1);   /* BITMAP: 00000010 */
277
278	nval = hweight32(prop->source_ports);
279	prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
280		sizeof(*prop->src_dpn_prop), GFP_KERNEL);
281	if (!prop->src_dpn_prop)
282		return -ENOMEM;
283
284	i = 0;
285	dpn = prop->src_dpn_prop;
286	addr = prop->source_ports;
287	for_each_set_bit(bit, &addr, 32) {
288		dpn[i].num = bit;
289		dpn[i].type = SDW_DPN_FULL;
290		dpn[i].simple_ch_prep_sm = true;
291		dpn[i].ch_prep_timeout = 10;
292		i++;
293	}
294
295	/* do this again for sink now */
296	nval = hweight32(prop->sink_ports);
297	prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
298		sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
299	if (!prop->sink_dpn_prop)
300		return -ENOMEM;
301
302	j = 0;
303	dpn = prop->sink_dpn_prop;
304	addr = prop->sink_ports;
305	for_each_set_bit(bit, &addr, 32) {
306		dpn[j].num = bit;
307		dpn[j].type = SDW_DPN_FULL;
308		dpn[j].simple_ch_prep_sm = true;
309		dpn[j].ch_prep_timeout = 10;
310		j++;
311	}
312
313	/* set the timeout values */
314	prop->clk_stop_timeout = 64;
315
316	return 0;
317}
318
319static int rt1017_sdca_io_init(struct device *dev, struct sdw_slave *slave)
320{
321	struct rt1017_sdca_priv *rt1017 = dev_get_drvdata(dev);
322
323	if (rt1017->hw_init)
324		return 0;
325
326	if (rt1017->first_hw_init) {
327		regcache_cache_only(rt1017->regmap, false);
328		regcache_cache_bypass(rt1017->regmap, true);
329	} else {
330		/*
331		 * PM runtime is only enabled when a Slave reports as Attached
332		 */
333
334		/* set autosuspend parameters */
335		pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
336		pm_runtime_use_autosuspend(&slave->dev);
337
338		/* update count of parent 'active' children */
339		pm_runtime_set_active(&slave->dev);
340
341		/* make sure the device does not suspend immediately */
342		pm_runtime_mark_last_busy(&slave->dev);
343
344		pm_runtime_enable(&slave->dev);
345	}
346
347	pm_runtime_get_noresume(&slave->dev);
348
349	/* sw reset */
350	regmap_write(rt1017->regmap, 0xc000, 0x02);
351
352	/* initial settings - blind write */
353	regmap_multi_reg_write(rt1017->regmap, rt1017_blind_write,
354		ARRAY_SIZE(rt1017_blind_write));
355
356	if (rt1017->first_hw_init) {
357		regcache_cache_bypass(rt1017->regmap, false);
358		regcache_mark_dirty(rt1017->regmap);
359	} else
360		rt1017->first_hw_init = true;
361
362	/* Mark Slave initialization complete */
363	rt1017->hw_init = true;
364
365	pm_runtime_put_autosuspend(&slave->dev);
366
367	dev_dbg(&slave->dev, "hw_init complete\n");
368	return 0;
369}
370
371static int rt1017_sdca_update_status(struct sdw_slave *slave,
372				enum sdw_slave_status status)
373{
374	struct  rt1017_sdca_priv *rt1017 = dev_get_drvdata(&slave->dev);
375
376	if (status == SDW_SLAVE_UNATTACHED)
377		rt1017->hw_init = false;
378
379	/*
380	 * Perform initialization only if slave status is present and
381	 * hw_init flag is false
382	 */
383	if (rt1017->hw_init || status != SDW_SLAVE_ATTACHED)
384		return 0;
385
386	/* perform I/O transfers required for Slave initialization */
387	return rt1017_sdca_io_init(&slave->dev, slave);
388}
389
390static const char * const rt1017_rx_data_ch_select[] = {
391	"Bypass",
392	"CN1",
393	"CN2",
394	"CN3",
395	"CN4",
396	"(1+2)/2",
397	"(1+3)/2",
398	"(1+4)/2",
399	"(2+3)/2",
400	"(2+4)/2",
401	"(3+4)/2",
402};
403
404static SOC_ENUM_SINGLE_DECL(rt1017_rx_data_ch_enum,
405			SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_UDMPU21,
406				RT1017_SDCA_CTL_UDMPU_CLUSTER, 0),
407			0, rt1017_rx_data_ch_select);
408
409static const struct snd_kcontrol_new rt1017_sdca_controls[] = {
410	/* UDMPU Cluster Selection */
411	SOC_ENUM("RX Channel Select", rt1017_rx_data_ch_enum),
412};
413
414static const struct snd_kcontrol_new rt1017_sto_dac =
415	SOC_DAPM_SINGLE("Switch",
416		SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_FU, RT1017_SDCA_CTL_FU_MUTE, 0x1),
417		0, 1, 1);
418
419static int rt1017_sdca_pde23_event(struct snd_soc_dapm_widget *w,
420				struct snd_kcontrol *kcontrol, int event)
421{
422	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
423	struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(component);
424	unsigned char ps0 = 0x0, ps3 = 0x3;
425
426	switch (event) {
427	case SND_SOC_DAPM_POST_PMU:
428		regmap_write(rt1017->regmap,
429			SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE23,
430				RT1017_SDCA_CTL_REQ_POWER_STATE, 0),
431				ps0);
432		break;
433	case SND_SOC_DAPM_PRE_PMD:
434		regmap_write(rt1017->regmap,
435			SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE23,
436				RT1017_SDCA_CTL_REQ_POWER_STATE, 0),
437				ps3);
438		break;
439	default:
440		break;
441	}
442	return 0;
443}
444
445static int rt1017_sdca_classd_event(struct snd_soc_dapm_widget *w,
446				struct snd_kcontrol *kcontrol, int event)
447{
448	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
449	struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(component);
450
451	switch (event) {
452	case SND_SOC_DAPM_POST_PMU:
453		regmap_update_bits(rt1017->regmap, RT1017_PWM_TRIM_1,
454			RT1017_PWM_FREQ_CTL_SRC_SEL_MASK, RT1017_PWM_FREQ_CTL_SRC_SEL_REG);
455		regmap_write(rt1017->regmap, RT1017_CLASSD_INT_1, 0x10);
456		break;
457	default:
458		break;
459	}
460
461	return 0;
462}
463
464static int rt1017_sdca_feedback_event(struct snd_soc_dapm_widget *w,
465				struct snd_kcontrol *kcontrol, int event)
466{
467	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
468	struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(component);
469
470	switch (event) {
471	case SND_SOC_DAPM_PRE_PMU:
472		regmap_update_bits(rt1017->regmap, 0xd017, 0x1f, 0x08);
473		break;
474	case SND_SOC_DAPM_POST_PMD:
475		regmap_update_bits(rt1017->regmap, 0xd017, 0x1f, 0x09);
476		break;
477	default:
478		break;
479	}
480
481	return 0;
482}
483
484static const struct snd_soc_dapm_widget rt1017_sdca_dapm_widgets[] = {
485	/* Audio Interface */
486	SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Playback", 0, SND_SOC_NOPM, 0, 0),
487	SND_SOC_DAPM_AIF_OUT_E("DP2TX", "DP2 Capture", 0, SND_SOC_NOPM, 0, 0,
488		rt1017_sdca_feedback_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
489
490	/* Digital Interface */
491	SND_SOC_DAPM_SWITCH("DAC", SND_SOC_NOPM, 0, 0, &rt1017_sto_dac),
492
493	/* Output Lines */
494	SND_SOC_DAPM_PGA_E("CLASS D", SND_SOC_NOPM, 0, 0, NULL, 0,
495		rt1017_sdca_classd_event, SND_SOC_DAPM_POST_PMU),
496	SND_SOC_DAPM_OUTPUT("SPO"),
497
498	SND_SOC_DAPM_SUPPLY("PDE23", SND_SOC_NOPM, 0, 0,
499		rt1017_sdca_pde23_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
500
501	SND_SOC_DAPM_PGA("I Sense", SND_SOC_NOPM, 0, 0, NULL, 0),
502	SND_SOC_DAPM_PGA("V Sense", SND_SOC_NOPM, 0, 0, NULL, 0),
503	SND_SOC_DAPM_SIGGEN("I Gen"),
504	SND_SOC_DAPM_SIGGEN("V Gen"),
505};
506
507static const struct snd_soc_dapm_route rt1017_sdca_dapm_routes[] = {
508
509	{ "DAC", "Switch", "DP1RX" },
510	{ "CLASS D", NULL, "DAC" },
511	{ "CLASS D", NULL, "PDE23" },
512	{ "SPO", NULL, "CLASS D" },
513
514	{ "I Sense", NULL, "I Gen" },
515	{ "V Sense", NULL, "V Gen" },
516	{ "I Sense", NULL, "PDE23" },
517	{ "V Sense", NULL, "PDE23" },
518	{ "DP2TX", NULL, "I Sense" },
519	{ "DP2TX", NULL, "V Sense" },
520};
521
522static const struct sdw_slave_ops rt1017_sdca_slave_ops = {
523	.read_prop = rt1017_sdca_read_prop,
524	.update_status = rt1017_sdca_update_status,
525};
526
527static int rt1017_sdca_component_probe(struct snd_soc_component *component)
528{
529	int ret;
530
531	ret = pm_runtime_resume(component->dev);
532	if (ret < 0 && ret != -EACCES)
533		return ret;
534
535	return 0;
536}
537
538static void rt1017_sdca_component_remove(struct snd_soc_component *component)
539{
540	struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(component);
541
542	regcache_cache_only(rt1017->regmap, true);
543}
544
545static const struct snd_soc_component_driver soc_sdca_component_rt1017 = {
546	.probe = rt1017_sdca_component_probe,
547	.remove = rt1017_sdca_component_remove,
548	.controls = rt1017_sdca_controls,
549	.num_controls = ARRAY_SIZE(rt1017_sdca_controls),
550	.dapm_widgets = rt1017_sdca_dapm_widgets,
551	.num_dapm_widgets = ARRAY_SIZE(rt1017_sdca_dapm_widgets),
552	.dapm_routes = rt1017_sdca_dapm_routes,
553	.num_dapm_routes = ARRAY_SIZE(rt1017_sdca_dapm_routes),
554	.endianness = 1,
555};
556
557static int rt1017_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
558				int direction)
559{
560	snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
561
562	return 0;
563}
564
565static void rt1017_sdca_shutdown(struct snd_pcm_substream *substream,
566				struct snd_soc_dai *dai)
567{
568	snd_soc_dai_set_dma_data(dai, substream, NULL);
569}
570
571static int rt1017_sdca_pcm_hw_params(struct snd_pcm_substream *substream,
572				struct snd_pcm_hw_params *params,
573				struct snd_soc_dai *dai)
574{
575	struct snd_soc_component *component = dai->component;
576	struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(component);
577	struct sdw_stream_config stream_config;
578	struct sdw_port_config port_config;
579	enum sdw_data_direction direction;
580	struct sdw_stream_runtime *sdw_stream;
581	int retval, port, num_channels, ch_mask;
582	unsigned int sampling_rate;
583
584	dev_dbg(dai->dev, "%s %s", __func__, dai->name);
585	sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
586
587	if (!sdw_stream)
588		return -EINVAL;
589
590	if (!rt1017->sdw_slave)
591		return -EINVAL;
592
593	/* SoundWire specific configuration */
594	/* port 1 for playback */
595	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
596		direction = SDW_DATA_DIR_RX;
597		port = 1;
598	} else {
599		direction = SDW_DATA_DIR_TX;
600		port = 2;
601	}
602
603	num_channels = params_channels(params);
604	ch_mask = (1 << num_channels) - 1;
605
606	stream_config.frame_rate = params_rate(params);
607	stream_config.ch_count = num_channels;
608	stream_config.bps = snd_pcm_format_width(params_format(params));
609	stream_config.direction = direction;
610
611	port_config.ch_mask = ch_mask;
612	port_config.num = port;
613
614	dev_dbg(dai->dev, "frame_rate %d, ch_count %d, bps %d, direction %d, ch_mask %d, port: %d\n",
615		params_rate(params), num_channels, snd_pcm_format_width(params_format(params)),
616		direction, ch_mask, port);
617
618	retval = sdw_stream_add_slave(rt1017->sdw_slave, &stream_config,
619				&port_config, 1, sdw_stream);
620	if (retval) {
621		dev_err(dai->dev, "Unable to configure port\n");
622		return retval;
623	}
624
625	/* sampling rate configuration */
626	switch (params_rate(params)) {
627	case 44100:
628		sampling_rate = RT1017_SDCA_RATE_44100HZ;
629		break;
630	case 48000:
631		sampling_rate = RT1017_SDCA_RATE_48000HZ;
632		break;
633	case 96000:
634		sampling_rate = RT1017_SDCA_RATE_96000HZ;
635		break;
636	case 192000:
637		sampling_rate = RT1017_SDCA_RATE_192000HZ;
638		break;
639	default:
640		dev_err(component->dev, "Rate %d is not supported\n",
641			params_rate(params));
642		return -EINVAL;
643	}
644
645	/* set sampling frequency */
646	regmap_write(rt1017->regmap,
647		SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_CS21,
648			RT1017_SDCA_CTL_FS_INDEX, 0),
649		sampling_rate);
650
651	return 0;
652}
653
654static int rt1017_sdca_pcm_hw_free(struct snd_pcm_substream *substream,
655				struct snd_soc_dai *dai)
656{
657	struct snd_soc_component *component = dai->component;
658	struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(component);
659	struct sdw_stream_runtime *sdw_stream =
660		snd_soc_dai_get_dma_data(dai, substream);
661
662	if (!rt1017->sdw_slave)
663		return -EINVAL;
664
665	sdw_stream_remove_slave(rt1017->sdw_slave, sdw_stream);
666	return 0;
667}
668
669static const struct snd_soc_dai_ops rt1017_sdca_ops = {
670	.hw_params	= rt1017_sdca_pcm_hw_params,
671	.hw_free	= rt1017_sdca_pcm_hw_free,
672	.set_stream	= rt1017_sdca_set_sdw_stream,
673	.shutdown	= rt1017_sdca_shutdown,
674};
675
676#define RT1017_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
677			     SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
678#define RT1017_FORMATS (SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S16_LE | \
679			SNDRV_PCM_FMTBIT_S24_LE)
680
681static struct snd_soc_dai_driver rt1017_sdca_dai[] = {
682	{
683		.name = "rt1017-aif",
684		.playback = {
685			.stream_name = "DP1 Playback",
686			.channels_min = 1,
687			.channels_max = 1,
688			.rates = RT1017_STEREO_RATES,
689			.formats = RT1017_FORMATS,
690		},
691		.capture = {
692			.stream_name = "DP2 Capture",
693			.channels_min = 1,
694			.channels_max = 1,
695			.rates = RT1017_STEREO_RATES,
696			.formats = RT1017_FORMATS,
697		},
698		.ops = &rt1017_sdca_ops,
699	},
700};
701
702static int rt1017_sdca_init(struct device *dev, struct regmap *regmap,
703			struct sdw_slave *slave)
704{
705	struct rt1017_sdca_priv *rt1017;
706	int ret;
707
708	rt1017 = devm_kzalloc(dev, sizeof(*rt1017), GFP_KERNEL);
709	if (!rt1017)
710		return -ENOMEM;
711
712	dev_set_drvdata(dev, rt1017);
713	rt1017->sdw_slave = slave;
714	rt1017->regmap = regmap;
715
716	/*
717	 * Mark hw_init to false
718	 * HW init will be performed when device reports present
719	 */
720	rt1017->hw_init = false;
721	rt1017->first_hw_init = false;
722
723	ret =  devm_snd_soc_register_component(dev,
724				&soc_sdca_component_rt1017,
725				rt1017_sdca_dai,
726				ARRAY_SIZE(rt1017_sdca_dai));
727
728	return ret;
729}
730
731static int rt1017_sdca_sdw_probe(struct sdw_slave *slave,
732				const struct sdw_device_id *id)
733{
734	struct regmap *regmap;
735
736	/* Regmap Initialization */
737	regmap = devm_regmap_init_sdw(slave, &rt1017_sdca_regmap);
738	if (IS_ERR(regmap))
739		return PTR_ERR(regmap);
740
741	return rt1017_sdca_init(&slave->dev, regmap, slave);
742}
743
744static int rt1017_sdca_sdw_remove(struct sdw_slave *slave)
745{
746	struct rt1017_sdca_priv *rt1017 = dev_get_drvdata(&slave->dev);
747
748	if (rt1017->first_hw_init)
749		pm_runtime_disable(&slave->dev);
750
751	return 0;
752}
753
754static const struct sdw_device_id rt1017_sdca_id[] = {
755	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1017, 0x3, 0x1, 0),
756	{},
757};
758MODULE_DEVICE_TABLE(sdw, rt1017_sdca_id);
759
760static int rt1017_sdca_dev_suspend(struct device *dev)
761{
762	struct rt1017_sdca_priv *rt1017 = dev_get_drvdata(dev);
763
764	if (!rt1017->hw_init)
765		return 0;
766
767	regcache_cache_only(rt1017->regmap, true);
768
769	return 0;
770}
771
772#define RT1017_PROBE_TIMEOUT 5000
773
774static int rt1017_sdca_dev_resume(struct device *dev)
775{
776	struct sdw_slave *slave = dev_to_sdw_dev(dev);
777	struct rt1017_sdca_priv *rt1017 = dev_get_drvdata(dev);
778	unsigned long time;
779
780	if (!rt1017->first_hw_init)
781		return 0;
782
783	if (!slave->unattach_request)
784		goto regmap_sync;
785
786	time = wait_for_completion_timeout(&slave->initialization_complete,
787				msecs_to_jiffies(RT1017_PROBE_TIMEOUT));
788	if (!time) {
789		dev_err(&slave->dev, "Initialization not complete, timed out\n");
790		sdw_show_ping_status(slave->bus, true);
791
792		return -ETIMEDOUT;
793	}
794
795regmap_sync:
796	slave->unattach_request = 0;
797	regcache_cache_only(rt1017->regmap, false);
798	regcache_sync(rt1017->regmap);
799
800	return 0;
801}
802
803static const struct dev_pm_ops rt1017_sdca_pm = {
804	SYSTEM_SLEEP_PM_OPS(rt1017_sdca_dev_suspend, rt1017_sdca_dev_resume)
805	RUNTIME_PM_OPS(rt1017_sdca_dev_suspend, rt1017_sdca_dev_resume, NULL)
806};
807
808static struct sdw_driver rt1017_sdca_sdw_driver = {
809	.driver = {
810		.name = "rt1017-sdca",
811		.pm = pm_ptr(&rt1017_sdca_pm),
812	},
813	.probe = rt1017_sdca_sdw_probe,
814	.remove = rt1017_sdca_sdw_remove,
815	.ops = &rt1017_sdca_slave_ops,
816	.id_table = rt1017_sdca_id,
817};
818module_sdw_driver(rt1017_sdca_sdw_driver);
819
820MODULE_DESCRIPTION("ASoC RT1017 driver SDCA SDW");
821MODULE_AUTHOR("Derek Fang <derek.fang@realtek.com>");
822MODULE_LICENSE("GPL");