FILE
ice1724.c
File preview with syntax highlighting.
linux-6.19.14/sound/pci/ice1712/ice1724.c
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) 4 * VIA VT1720 (Envy24PT) 5 * 6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 7 * 2002 James Stafford <jstafford@ampltd.com> 8 * 2003 Takashi Iwai <tiwai@suse.de> 9 */ 10 11#include <linux/delay.h> 12#include <linux/interrupt.h> 13#include <linux/init.h> 14#include <linux/pci.h> 15#include <linux/slab.h> 16#include <linux/module.h> 17#include <linux/mutex.h> 18#include <sound/core.h> 19#include <sound/info.h> 20#include <sound/rawmidi.h> 21#include <sound/initval.h> 22 23#include <sound/asoundef.h> 24 25#include "ice1712.h" 26#include "envy24ht.h" 27 28/* lowlevel routines */ 29#include "amp.h" 30#include "revo.h" 31#include "aureon.h" 32#include "vt1720_mobo.h" 33#include "pontis.h" 34#include "prodigy192.h" 35#include "prodigy_hifi.h" 36#include "juli.h" 37#include "maya44.h" 38#include "phase.h" 39#include "wtm.h" 40#include "se.h" 41#include "quartet.h" 42#include "psc724.h" 43 44MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 45MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); 46MODULE_LICENSE("GPL"); 47 48static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 49static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 50static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 51static char *model[SNDRV_CARDS]; 52 53module_param_array(index, int, NULL, 0444); 54MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); 55module_param_array(id, charp, NULL, 0444); 56MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); 57module_param_array(enable, bool, NULL, 0444); 58MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); 59module_param_array(model, charp, NULL, 0444); 60MODULE_PARM_DESC(model, "Use the given board model."); 61 62 63/* Both VT1720 and VT1724 have the same PCI IDs */ 64static const struct pci_device_id snd_vt1724_ids[] = { 65 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 }, 66 { 0, } 67}; 68 69MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); 70 71 72static int PRO_RATE_LOCKED; 73static int PRO_RATE_RESET = 1; 74static unsigned int PRO_RATE_DEFAULT = 44100; 75 76static const char * const ext_clock_names[1] = { "IEC958 In" }; 77 78/* 79 * Basic I/O 80 */ 81 82/* 83 * default rates, default clock routines 84 */ 85 86/* check whether the clock mode is spdif-in */ 87static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice) 88{ 89 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 90} 91 92/* 93 * locking rate makes sense only for internal clock mode 94 */ 95static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 96{ 97 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED; 98} 99 100/* 101 * ac97 section 102 */ 103 104static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) 105{ 106 unsigned char old_cmd; 107 int tm; 108 for (tm = 0; tm < 0x10000; tm++) { 109 old_cmd = inb(ICEMT1724(ice, AC97_CMD)); 110 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) 111 continue; 112 if (!(old_cmd & VT1724_AC97_READY)) 113 continue; 114 return old_cmd; 115 } 116 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n"); 117 return old_cmd; 118} 119 120static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) 121{ 122 int tm; 123 for (tm = 0; tm < 0x10000; tm++) 124 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) 125 return 0; 126 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n"); 127 return -EIO; 128} 129 130static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, 131 unsigned short reg, 132 unsigned short val) 133{ 134 struct snd_ice1712 *ice = ac97->private_data; 135 unsigned char old_cmd; 136 137 old_cmd = snd_vt1724_ac97_ready(ice); 138 old_cmd &= ~VT1724_AC97_ID_MASK; 139 old_cmd |= ac97->num; 140 outb(reg, ICEMT1724(ice, AC97_INDEX)); 141 outw(val, ICEMT1724(ice, AC97_DATA)); 142 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); 143 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); 144} 145 146static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 147{ 148 struct snd_ice1712 *ice = ac97->private_data; 149 unsigned char old_cmd; 150 151 old_cmd = snd_vt1724_ac97_ready(ice); 152 old_cmd &= ~VT1724_AC97_ID_MASK; 153 old_cmd |= ac97->num; 154 outb(reg, ICEMT1724(ice, AC97_INDEX)); 155 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); 156 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) 157 return ~0; 158 return inw(ICEMT1724(ice, AC97_DATA)); 159} 160 161 162/* 163 * GPIO operations 164 */ 165 166/* set gpio direction 0 = read, 1 = write */ 167static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 168{ 169 outl(data, ICEREG1724(ice, GPIO_DIRECTION)); 170 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ 171} 172 173/* get gpio direction 0 = read, 1 = write */ 174static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice) 175{ 176 return inl(ICEREG1724(ice, GPIO_DIRECTION)); 177} 178 179/* set the gpio mask (0 = writable) */ 180static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 181{ 182 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); 183 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */ 184 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); 185 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ 186} 187 188static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice) 189{ 190 unsigned int mask; 191 if (!ice->vt1720) 192 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22)); 193 else 194 mask = 0; 195 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); 196 return mask; 197} 198 199static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) 200{ 201 outw(data, ICEREG1724(ice, GPIO_DATA)); 202 if (!ice->vt1720) 203 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); 204 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ 205} 206 207static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) 208{ 209 unsigned int data; 210 if (!ice->vt1720) 211 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); 212 else 213 data = 0; 214 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); 215 return data; 216} 217 218/* 219 * MIDI 220 */ 221 222static void vt1724_midi_clear_rx(struct snd_ice1712 *ice) 223{ 224 unsigned int count; 225 226 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count) 227 inb(ICEREG1724(ice, MPU_DATA)); 228} 229 230static inline struct snd_rawmidi_substream * 231get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream) 232{ 233 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams, 234 struct snd_rawmidi_substream, list); 235} 236 237static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable); 238 239static void vt1724_midi_write(struct snd_ice1712 *ice) 240{ 241 struct snd_rawmidi_substream *s; 242 int count, i; 243 u8 buffer[32]; 244 245 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT); 246 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO)); 247 if (count > 0) { 248 count = snd_rawmidi_transmit(s, buffer, count); 249 for (i = 0; i < count; ++i) 250 outb(buffer[i], ICEREG1724(ice, MPU_DATA)); 251 } 252 /* mask irq when all bytes have been transmitted. 253 * enabled again in output_trigger when the new data comes in. 254 */ 255 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 256 !snd_rawmidi_transmit_empty(s)); 257} 258 259static void vt1724_midi_read(struct snd_ice1712 *ice) 260{ 261 struct snd_rawmidi_substream *s; 262 int count, i; 263 u8 buffer[32]; 264 265 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT); 266 count = inb(ICEREG1724(ice, MPU_RXFIFO)); 267 if (count > 0) { 268 count = min(count, 32); 269 for (i = 0; i < count; ++i) 270 buffer[i] = inb(ICEREG1724(ice, MPU_DATA)); 271 snd_rawmidi_receive(s, buffer, count); 272 } 273} 274 275/* call with ice->reg_lock */ 276static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable) 277{ 278 u8 mask = inb(ICEREG1724(ice, IRQMASK)); 279 if (enable) 280 mask &= ~flag; 281 else 282 mask |= flag; 283 outb(mask, ICEREG1724(ice, IRQMASK)); 284} 285 286static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream, 287 u8 flag, int enable) 288{ 289 struct snd_ice1712 *ice = substream->rmidi->private_data; 290 291 guard(spinlock_irq)(&ice->reg_lock); 292 enable_midi_irq(ice, flag, enable); 293} 294 295static int vt1724_midi_output_open(struct snd_rawmidi_substream *s) 296{ 297 return 0; 298} 299 300static int vt1724_midi_output_close(struct snd_rawmidi_substream *s) 301{ 302 return 0; 303} 304 305static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up) 306{ 307 struct snd_ice1712 *ice = s->rmidi->private_data; 308 309 guard(spinlock_irqsave)(&ice->reg_lock); 310 if (up) { 311 ice->midi_output = 1; 312 vt1724_midi_write(ice); 313 } else { 314 ice->midi_output = 0; 315 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 316 } 317} 318 319static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s) 320{ 321 struct snd_ice1712 *ice = s->rmidi->private_data; 322 unsigned long timeout; 323 324 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0); 325 /* 32 bytes should be transmitted in less than about 12 ms */ 326 timeout = jiffies + msecs_to_jiffies(15); 327 do { 328 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY) 329 break; 330 schedule_timeout_uninterruptible(1); 331 } while (time_after(timeout, jiffies)); 332} 333 334static const struct snd_rawmidi_ops vt1724_midi_output_ops = { 335 .open = vt1724_midi_output_open, 336 .close = vt1724_midi_output_close, 337 .trigger = vt1724_midi_output_trigger, 338 .drain = vt1724_midi_output_drain, 339}; 340 341static int vt1724_midi_input_open(struct snd_rawmidi_substream *s) 342{ 343 vt1724_midi_clear_rx(s->rmidi->private_data); 344 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1); 345 return 0; 346} 347 348static int vt1724_midi_input_close(struct snd_rawmidi_substream *s) 349{ 350 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0); 351 return 0; 352} 353 354static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up) 355{ 356 struct snd_ice1712 *ice = s->rmidi->private_data; 357 358 guard(spinlock_irqsave)(&ice->reg_lock); 359 if (up) { 360 ice->midi_input = 1; 361 vt1724_midi_read(ice); 362 } else { 363 ice->midi_input = 0; 364 } 365} 366 367static const struct snd_rawmidi_ops vt1724_midi_input_ops = { 368 .open = vt1724_midi_input_open, 369 .close = vt1724_midi_input_close, 370 .trigger = vt1724_midi_input_trigger, 371}; 372 373 374/* 375 * Interrupt handler 376 */ 377 378static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id) 379{ 380 struct snd_ice1712 *ice = dev_id; 381 unsigned char status; 382 unsigned char status_mask = 383 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM; 384 int handled = 0; 385 int timeout = 0; 386 387 while (1) { 388 status = inb(ICEREG1724(ice, IRQSTAT)); 389 status &= status_mask; 390 if (status == 0) 391 break; 392 scoped_guard(spinlock, &ice->reg_lock) { 393 if (++timeout > 10) { 394 status = inb(ICEREG1724(ice, IRQSTAT)); 395 dev_err(ice->card->dev, 396 "Too long irq loop, status = 0x%x\n", status); 397 if (status & VT1724_IRQ_MPU_TX) { 398 dev_err(ice->card->dev, "Disabling MPU_TX\n"); 399 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 400 } 401 goto out; 402 } 403 handled = 1; 404 if (status & VT1724_IRQ_MPU_TX) { 405 if (ice->midi_output) 406 vt1724_midi_write(ice); 407 else 408 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 409 /* Due to mysterical reasons, MPU_TX is always 410 * generated (and can't be cleared) when a PCM 411 * playback is going. So let's ignore at the 412 * next loop. 413 */ 414 status_mask &= ~VT1724_IRQ_MPU_TX; 415 } 416 if (status & VT1724_IRQ_MPU_RX) { 417 if (ice->midi_input) 418 vt1724_midi_read(ice); 419 else 420 vt1724_midi_clear_rx(ice); 421 } 422 /* ack MPU irq */ 423 outb(status, ICEREG1724(ice, IRQSTAT)); 424 } 425 if (status & VT1724_IRQ_MTPCM) { 426 /* 427 * Multi-track PCM 428 * PCM assignment are: 429 * Playback DMA0 (M/C) = playback_pro_substream 430 * Playback DMA1 = playback_con_substream_ds[0] 431 * Playback DMA2 = playback_con_substream_ds[1] 432 * Playback DMA3 = playback_con_substream_ds[2] 433 * Playback DMA4 (SPDIF) = playback_con_substream 434 * Record DMA0 = capture_pro_substream 435 * Record DMA1 = capture_con_substream 436 */ 437 unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); 438 if (mtstat & VT1724_MULTI_PDMA0) { 439 if (ice->playback_pro_substream) 440 snd_pcm_period_elapsed(ice->playback_pro_substream); 441 } 442 if (mtstat & VT1724_MULTI_RDMA0) { 443 if (ice->capture_pro_substream) 444 snd_pcm_period_elapsed(ice->capture_pro_substream); 445 } 446 if (mtstat & VT1724_MULTI_PDMA1) { 447 if (ice->playback_con_substream_ds[0]) 448 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); 449 } 450 if (mtstat & VT1724_MULTI_PDMA2) { 451 if (ice->playback_con_substream_ds[1]) 452 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); 453 } 454 if (mtstat & VT1724_MULTI_PDMA3) { 455 if (ice->playback_con_substream_ds[2]) 456 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); 457 } 458 if (mtstat & VT1724_MULTI_PDMA4) { 459 if (ice->playback_con_substream) 460 snd_pcm_period_elapsed(ice->playback_con_substream); 461 } 462 if (mtstat & VT1724_MULTI_RDMA1) { 463 if (ice->capture_con_substream) 464 snd_pcm_period_elapsed(ice->capture_con_substream); 465 } 466 /* ack anyway to avoid freeze */ 467 outb(mtstat, ICEMT1724(ice, IRQ)); 468 /* ought to really handle this properly */ 469 if (mtstat & VT1724_MULTI_FIFO_ERR) { 470 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); 471 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); 472 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); 473 /* If I don't do this, I get machine lockup due to continual interrupts */ 474 } 475 476 } 477 } 478 out: 479 return IRQ_RETVAL(handled); 480} 481 482/* 483 * PCM code - professional part (multitrack) 484 */ 485 486static const unsigned int rates[] = { 487 8000, 9600, 11025, 12000, 16000, 22050, 24000, 488 32000, 44100, 48000, 64000, 88200, 96000, 489 176400, 192000, 490}; 491 492static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { 493 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ 494 .list = rates, 495 .mask = 0, 496}; 497 498static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { 499 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ 500 .list = rates, 501 .mask = 0, 502}; 503 504static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { 505 .count = ARRAY_SIZE(rates), 506 .list = rates, 507 .mask = 0, 508}; 509 510struct vt1724_pcm_reg { 511 unsigned int addr; /* ADDR register offset */ 512 unsigned int size; /* SIZE register offset */ 513 unsigned int count; /* COUNT register offset */ 514 unsigned int start; /* start & pause bit */ 515}; 516 517static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 518{ 519 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 520 unsigned char what; 521 unsigned char old; 522 struct snd_pcm_substream *s; 523 524 what = 0; 525 snd_pcm_group_for_each_entry(s, substream) { 526 if (snd_pcm_substream_chip(s) == ice) { 527 const struct vt1724_pcm_reg *reg; 528 reg = s->runtime->private_data; 529 what |= reg->start; 530 snd_pcm_trigger_done(s, substream); 531 } 532 } 533 534 switch (cmd) { 535 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 536 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 537 scoped_guard(spinlock, &ice->reg_lock) { 538 old = inb(ICEMT1724(ice, DMA_PAUSE)); 539 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 540 old |= what; 541 else 542 old &= ~what; 543 outb(old, ICEMT1724(ice, DMA_PAUSE)); 544 } 545 break; 546 547 case SNDRV_PCM_TRIGGER_START: 548 case SNDRV_PCM_TRIGGER_STOP: 549 case SNDRV_PCM_TRIGGER_SUSPEND: 550 scoped_guard(spinlock, &ice->reg_lock) { 551 old = inb(ICEMT1724(ice, DMA_CONTROL)); 552 if (cmd == SNDRV_PCM_TRIGGER_START) 553 old |= what; 554 else 555 old &= ~what; 556 outb(old, ICEMT1724(ice, DMA_CONTROL)); 557 } 558 break; 559 560 case SNDRV_PCM_TRIGGER_RESUME: 561 /* apps will have to restart stream */ 562 break; 563 564 default: 565 return -EINVAL; 566 } 567 return 0; 568} 569 570/* 571 */ 572 573#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ 574 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) 575#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 576 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 577 578static const unsigned int stdclock_rate_list[16] = { 579 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100, 580 22050, 11025, 88200, 176400, 0, 192000, 64000 581}; 582 583static unsigned int stdclock_get_rate(struct snd_ice1712 *ice) 584{ 585 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15]; 586} 587 588static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate) 589{ 590 int i; 591 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) { 592 if (stdclock_rate_list[i] == rate) { 593 outb(i, ICEMT1724(ice, RATE)); 594 return; 595 } 596 } 597} 598 599static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice, 600 unsigned int rate) 601{ 602 unsigned char val, old; 603 /* check MT02 */ 604 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 605 val = old = inb(ICEMT1724(ice, I2S_FORMAT)); 606 if (rate > 96000) 607 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ 608 else 609 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ 610 if (val != old) { 611 outb(val, ICEMT1724(ice, I2S_FORMAT)); 612 /* master clock changed */ 613 return 1; 614 } 615 } 616 /* no change in master clock */ 617 return 0; 618} 619 620static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 621 int force) 622{ 623 unsigned char mclk_change; 624 unsigned int i, old_rate; 625 bool call_set_rate = false; 626 627 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1]) 628 return -EINVAL; 629 630 scoped_guard(spinlock_irqsave, &ice->reg_lock) { 631 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 632 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 633 /* running? we cannot change the rate now... */ 634 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY; 635 } 636 if (!force && is_pro_rate_locked(ice)) { 637 /* comparing required and current rate - makes sense for 638 * internal clock only */ 639 return (rate == ice->cur_rate) ? 0 : -EBUSY; 640 } 641 642 if (force || !ice->is_spdif_master(ice)) { 643 /* force means the rate was switched by ucontrol, otherwise 644 * setting clock rate for internal clock mode */ 645 old_rate = ice->get_rate(ice); 646 if (force || (old_rate != rate)) 647 call_set_rate = true; 648 else if (rate == ice->cur_rate) { 649 return 0; 650 } 651 } 652 653 ice->cur_rate = rate; 654 } 655 656 if (call_set_rate) 657 ice->set_rate(ice, rate); 658 659 /* setting master clock */ 660 mclk_change = ice->set_mclk(ice, rate); 661 662 if (mclk_change && ice->gpio.i2s_mclk_changed) 663 ice->gpio.i2s_mclk_changed(ice); 664 if (ice->gpio.set_pro_rate) 665 ice->gpio.set_pro_rate(ice, rate); 666 667 /* set up codecs */ 668 for (i = 0; i < ice->akm_codecs; i++) { 669 if (ice->akm[i].ops.set_rate_val) 670 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 671 } 672 if (ice->spdif.ops.setup_rate) 673 ice->spdif.ops.setup_rate(ice, rate); 674 675 return 0; 676} 677 678static int __snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, 679 struct snd_pcm_hw_params *hw_params) 680{ 681 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 682 int i, chs; 683 684 chs = params_channels(hw_params); 685 /* mark surround channels */ 686 if (substream == ice->playback_pro_substream) { 687 /* PDMA0 can be multi-channel up to 8 */ 688 chs = chs / 2 - 1; 689 for (i = 0; i < chs; i++) { 690 if (ice->pcm_reserved[i] && 691 ice->pcm_reserved[i] != substream) 692 return -EBUSY; 693 ice->pcm_reserved[i] = substream; 694 } 695 for (; i < 3; i++) { 696 if (ice->pcm_reserved[i] == substream) 697 ice->pcm_reserved[i] = NULL; 698 } 699 } else { 700 for (i = 0; i < 3; i++) { 701 /* check individual playback stream */ 702 if (ice->playback_con_substream_ds[i] == substream) { 703 if (ice->pcm_reserved[i] && 704 ice->pcm_reserved[i] != substream) 705 return -EBUSY; 706 ice->pcm_reserved[i] = substream; 707 break; 708 } 709 } 710 } 711 712 return 0; 713} 714 715static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, 716 struct snd_pcm_hw_params *hw_params) 717{ 718 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 719 int err; 720 721 scoped_guard(mutex, &ice->open_mutex) { 722 err = __snd_vt1724_pcm_hw_params(substream, hw_params); 723 if (err < 0) 724 return err; 725 } 726 727 return snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); 728} 729 730static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) 731{ 732 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 733 int i; 734 735 guard(mutex)(&ice->open_mutex); 736 /* unmark surround channels */ 737 for (i = 0; i < 3; i++) 738 if (ice->pcm_reserved[i] == substream) 739 ice->pcm_reserved[i] = NULL; 740 return 0; 741} 742 743static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) 744{ 745 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 746 unsigned char val; 747 unsigned int size; 748 749 guard(spinlock_irq)(&ice->reg_lock); 750 val = (8 - substream->runtime->channels) >> 1; 751 outb(val, ICEMT1724(ice, BURST)); 752 753 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); 754 755 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; 756 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */ 757 outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); 758 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); 759 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 760 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */ 761 outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); 762 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); 763 764 /* 765 dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, " 766 "buffer = 0x%x, period = 0x%x\n", 767 substream->runtime->channels, 768 (unsigned int)substream->runtime->dma_addr, 769 snd_pcm_lib_buffer_bytes(substream), 770 snd_pcm_lib_period_bytes(substream)); 771 */ 772 return 0; 773} 774 775static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) 776{ 777 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 778 size_t ptr; 779 780 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) 781 return 0; 782#if 0 /* read PLAYBACK_ADDR */ 783 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); 784 if (ptr < substream->runtime->dma_addr) { 785 dev_dbg(ice->card->dev, "invalid negative ptr\n"); 786 return 0; 787 } 788 ptr -= substream->runtime->dma_addr; 789 ptr = bytes_to_frames(substream->runtime, ptr); 790 if (ptr >= substream->runtime->buffer_size) { 791 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 792 (int)ptr, (int)substream->runtime->period_size); 793 return 0; 794 } 795#else /* read PLAYBACK_SIZE */ 796 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; 797 ptr = (ptr + 1) << 2; 798 ptr = bytes_to_frames(substream->runtime, ptr); 799 if (!ptr) 800 ; 801 else if (ptr <= substream->runtime->buffer_size) 802 ptr = substream->runtime->buffer_size - ptr; 803 else { 804 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 805 (int)ptr, (int)substream->runtime->buffer_size); 806 ptr = 0; 807 } 808#endif 809 return ptr; 810} 811 812static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) 813{ 814 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 815 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 816 817 guard(spinlock_irq)(&ice->reg_lock); 818 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); 819 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, 820 ice->profi_port + reg->size); 821 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, 822 ice->profi_port + reg->count); 823 return 0; 824} 825 826static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) 827{ 828 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 829 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 830 size_t ptr; 831 832 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) 833 return 0; 834#if 0 /* use ADDR register */ 835 ptr = inl(ice->profi_port + reg->addr); 836 ptr -= substream->runtime->dma_addr; 837 return bytes_to_frames(substream->runtime, ptr); 838#else /* use SIZE register */ 839 ptr = inw(ice->profi_port + reg->size); 840 ptr = (ptr + 1) << 2; 841 ptr = bytes_to_frames(substream->runtime, ptr); 842 if (!ptr) 843 ; 844 else if (ptr <= substream->runtime->buffer_size) 845 ptr = substream->runtime->buffer_size - ptr; 846 else { 847 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 848 (int)ptr, (int)substream->runtime->buffer_size); 849 ptr = 0; 850 } 851 return ptr; 852#endif 853} 854 855static const struct vt1724_pcm_reg vt1724_pdma0_reg = { 856 .addr = VT1724_MT_PLAYBACK_ADDR, 857 .size = VT1724_MT_PLAYBACK_SIZE, 858 .count = VT1724_MT_PLAYBACK_COUNT, 859 .start = VT1724_PDMA0_START, 860}; 861 862static const struct vt1724_pcm_reg vt1724_pdma4_reg = { 863 .addr = VT1724_MT_PDMA4_ADDR, 864 .size = VT1724_MT_PDMA4_SIZE, 865 .count = VT1724_MT_PDMA4_COUNT, 866 .start = VT1724_PDMA4_START, 867}; 868 869static const struct vt1724_pcm_reg vt1724_rdma0_reg = { 870 .addr = VT1724_MT_CAPTURE_ADDR, 871 .size = VT1724_MT_CAPTURE_SIZE, 872 .count = VT1724_MT_CAPTURE_COUNT, 873 .start = VT1724_RDMA0_START, 874}; 875 876static const struct vt1724_pcm_reg vt1724_rdma1_reg = { 877 .addr = VT1724_MT_RDMA1_ADDR, 878 .size = VT1724_MT_RDMA1_SIZE, 879 .count = VT1724_MT_RDMA1_COUNT, 880 .start = VT1724_RDMA1_START, 881}; 882 883#define vt1724_playback_pro_reg vt1724_pdma0_reg 884#define vt1724_playback_spdif_reg vt1724_pdma4_reg 885#define vt1724_capture_pro_reg vt1724_rdma0_reg 886#define vt1724_capture_spdif_reg vt1724_rdma1_reg 887 888static const struct snd_pcm_hardware snd_vt1724_playback_pro = { 889 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 890 SNDRV_PCM_INFO_BLOCK_TRANSFER | 891 SNDRV_PCM_INFO_MMAP_VALID | 892 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 893 .formats = SNDRV_PCM_FMTBIT_S32_LE, 894 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 895 .rate_min = 8000, 896 .rate_max = 192000, 897 .channels_min = 2, 898 .channels_max = 8, 899 .buffer_bytes_max = (1UL << 21), /* 19bits dword */ 900 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ 901 .period_bytes_max = (1UL << 21), 902 .periods_min = 2, 903 .periods_max = 1024, 904}; 905 906static const struct snd_pcm_hardware snd_vt1724_spdif = { 907 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 908 SNDRV_PCM_INFO_BLOCK_TRANSFER | 909 SNDRV_PCM_INFO_MMAP_VALID | 910 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 911 .formats = SNDRV_PCM_FMTBIT_S32_LE, 912 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| 913 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| 914 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| 915 SNDRV_PCM_RATE_192000), 916 .rate_min = 32000, 917 .rate_max = 192000, 918 .channels_min = 2, 919 .channels_max = 2, 920 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 921 .period_bytes_min = 2 * 4 * 2, 922 .period_bytes_max = (1UL << 18), 923 .periods_min = 2, 924 .periods_max = 1024, 925}; 926 927static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = { 928 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 929 SNDRV_PCM_INFO_BLOCK_TRANSFER | 930 SNDRV_PCM_INFO_MMAP_VALID | 931 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 932 .formats = SNDRV_PCM_FMTBIT_S32_LE, 933 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 934 .rate_min = 8000, 935 .rate_max = 192000, 936 .channels_min = 2, 937 .channels_max = 2, 938 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 939 .period_bytes_min = 2 * 4 * 2, 940 .period_bytes_max = (1UL << 18), 941 .periods_min = 2, 942 .periods_max = 1024, 943}; 944 945/* 946 * set rate constraints 947 */ 948static void set_std_hw_rates(struct snd_ice1712 *ice) 949{ 950 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 951 /* I2S */ 952 /* VT1720 doesn't support more than 96kHz */ 953 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 954 ice->hw_rates = &hw_constraints_rates_192; 955 else 956 ice->hw_rates = &hw_constraints_rates_96; 957 } else { 958 /* ACLINK */ 959 ice->hw_rates = &hw_constraints_rates_48; 960 } 961} 962 963static int set_rate_constraints(struct snd_ice1712 *ice, 964 struct snd_pcm_substream *substream) 965{ 966 struct snd_pcm_runtime *runtime = substream->runtime; 967 968 runtime->hw.rate_min = ice->hw_rates->list[0]; 969 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; 970 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 971 return snd_pcm_hw_constraint_list(runtime, 0, 972 SNDRV_PCM_HW_PARAM_RATE, 973 ice->hw_rates); 974} 975 976/* if the card has the internal rate locked (is_pro_locked), limit runtime 977 hw rates to the current internal rate only. 978*/ 979static void constrain_rate_if_locked(struct snd_pcm_substream *substream) 980{ 981 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 982 struct snd_pcm_runtime *runtime = substream->runtime; 983 unsigned int rate; 984 if (is_pro_rate_locked(ice)) { 985 rate = ice->get_rate(ice); 986 if (rate >= runtime->hw.rate_min 987 && rate <= runtime->hw.rate_max) { 988 runtime->hw.rate_min = rate; 989 runtime->hw.rate_max = rate; 990 } 991 } 992} 993 994 995/* multi-channel playback needs alignment 8x32bit regardless of the channels 996 * actually used 997 */ 998#define VT1724_BUFFER_ALIGN 0x20 999 1000static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) 1001{ 1002 struct snd_pcm_runtime *runtime = substream->runtime; 1003 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1004 int chs, num_indeps; 1005 1006 runtime->private_data = (void *)&vt1724_playback_pro_reg; 1007 ice->playback_pro_substream = substream; 1008 runtime->hw = snd_vt1724_playback_pro; 1009 snd_pcm_set_sync(substream); 1010 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1011 set_rate_constraints(ice, substream); 1012 scoped_guard(mutex, &ice->open_mutex) { 1013 /* calculate the currently available channels */ 1014 num_indeps = ice->num_total_dacs / 2 - 1; 1015 for (chs = 0; chs < num_indeps; chs++) { 1016 if (ice->pcm_reserved[chs]) 1017 break; 1018 } 1019 chs = (chs + 1) * 2; 1020 runtime->hw.channels_max = chs; 1021 if (chs > 2) /* channels must be even */ 1022 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1023 } 1024 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1025 VT1724_BUFFER_ALIGN); 1026 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1027 VT1724_BUFFER_ALIGN); 1028 constrain_rate_if_locked(substream); 1029 if (ice->pro_open) 1030 ice->pro_open(ice, substream); 1031 return 0; 1032} 1033 1034static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) 1035{ 1036 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1037 struct snd_pcm_runtime *runtime = substream->runtime; 1038 1039 runtime->private_data = (void *)&vt1724_capture_pro_reg; 1040 ice->capture_pro_substream = substream; 1041 runtime->hw = snd_vt1724_2ch_stereo; 1042 snd_pcm_set_sync(substream); 1043 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1044 set_rate_constraints(ice, substream); 1045 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1046 VT1724_BUFFER_ALIGN); 1047 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1048 VT1724_BUFFER_ALIGN); 1049 constrain_rate_if_locked(substream); 1050 if (ice->pro_open) 1051 ice->pro_open(ice, substream); 1052 return 0; 1053} 1054 1055static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) 1056{ 1057 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1058 1059 if (PRO_RATE_RESET) 1060 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1061 ice->playback_pro_substream = NULL; 1062 1063 return 0; 1064} 1065 1066static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) 1067{ 1068 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1069 1070 if (PRO_RATE_RESET) 1071 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1072 ice->capture_pro_substream = NULL; 1073 return 0; 1074} 1075 1076static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = { 1077 .open = snd_vt1724_playback_pro_open, 1078 .close = snd_vt1724_playback_pro_close, 1079 .hw_params = snd_vt1724_pcm_hw_params, 1080 .hw_free = snd_vt1724_pcm_hw_free, 1081 .prepare = snd_vt1724_playback_pro_prepare, 1082 .trigger = snd_vt1724_pcm_trigger, 1083 .pointer = snd_vt1724_playback_pro_pointer, 1084}; 1085 1086static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = { 1087 .open = snd_vt1724_capture_pro_open, 1088 .close = snd_vt1724_capture_pro_close, 1089 .hw_params = snd_vt1724_pcm_hw_params, 1090 .hw_free = snd_vt1724_pcm_hw_free, 1091 .prepare = snd_vt1724_pcm_prepare, 1092 .trigger = snd_vt1724_pcm_trigger, 1093 .pointer = snd_vt1724_pcm_pointer, 1094}; 1095 1096static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device) 1097{ 1098 struct snd_pcm *pcm; 1099 int capt, err; 1100 1101 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) == 1102 VT1724_CFG_ADC_NONE) 1103 capt = 0; 1104 else 1105 capt = 1; 1106 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm); 1107 if (err < 0) 1108 return err; 1109 1110 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); 1111 if (capt) 1112 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1113 &snd_vt1724_capture_pro_ops); 1114 1115 pcm->private_data = ice; 1116 pcm->info_flags = 0; 1117 strscpy(pcm->name, "ICE1724"); 1118 1119 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1120 &ice->pci->dev, 256*1024, 256*1024); 1121 1122 ice->pcm_pro = pcm; 1123 1124 return 0; 1125} 1126 1127 1128/* 1129 * SPDIF PCM 1130 */ 1131 1132/* update spdif control bits; call with reg_lock */ 1133static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) 1134{ 1135 unsigned char cbit, disabled; 1136 1137 cbit = inb(ICEREG1724(ice, SPDIF_CFG)); 1138 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; 1139 if (cbit != disabled) 1140 outb(disabled, ICEREG1724(ice, SPDIF_CFG)); 1141 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1142 if (cbit != disabled) 1143 outb(cbit, ICEREG1724(ice, SPDIF_CFG)); 1144 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1145} 1146 1147/* update SPDIF control bits according to the given rate */ 1148static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) 1149{ 1150 unsigned int val, nval; 1151 1152 guard(spinlock_irqsave)(&ice->reg_lock); 1153 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1154 nval &= ~(7 << 12); 1155 switch (rate) { 1156 case 44100: break; 1157 case 48000: nval |= 2 << 12; break; 1158 case 32000: nval |= 3 << 12; break; 1159 case 88200: nval |= 4 << 12; break; 1160 case 96000: nval |= 5 << 12; break; 1161 case 192000: nval |= 6 << 12; break; 1162 case 176400: nval |= 7 << 12; break; 1163 } 1164 if (val != nval) 1165 update_spdif_bits(ice, nval); 1166} 1167 1168static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) 1169{ 1170 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1171 if (!ice->force_pdma4) 1172 update_spdif_rate(ice, substream->runtime->rate); 1173 return snd_vt1724_pcm_prepare(substream); 1174} 1175 1176static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) 1177{ 1178 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1179 struct snd_pcm_runtime *runtime = substream->runtime; 1180 1181 runtime->private_data = (void *)&vt1724_playback_spdif_reg; 1182 ice->playback_con_substream = substream; 1183 if (ice->force_pdma4) { 1184 runtime->hw = snd_vt1724_2ch_stereo; 1185 set_rate_constraints(ice, substream); 1186 } else 1187 runtime->hw = snd_vt1724_spdif; 1188 snd_pcm_set_sync(substream); 1189 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1190 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1191 VT1724_BUFFER_ALIGN); 1192 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1193 VT1724_BUFFER_ALIGN); 1194 constrain_rate_if_locked(substream); 1195 if (ice->spdif.ops.open) 1196 ice->spdif.ops.open(ice, substream); 1197 return 0; 1198} 1199 1200static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) 1201{ 1202 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1203 1204 if (PRO_RATE_RESET) 1205 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1206 ice->playback_con_substream = NULL; 1207 if (ice->spdif.ops.close) 1208 ice->spdif.ops.close(ice, substream); 1209 1210 return 0; 1211} 1212 1213static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) 1214{ 1215 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1216 struct snd_pcm_runtime *runtime = substream->runtime; 1217 1218 runtime->private_data = (void *)&vt1724_capture_spdif_reg; 1219 ice->capture_con_substream = substream; 1220 if (ice->force_rdma1) { 1221 runtime->hw = snd_vt1724_2ch_stereo; 1222 set_rate_constraints(ice, substream); 1223 } else 1224 runtime->hw = snd_vt1724_spdif; 1225 snd_pcm_set_sync(substream); 1226 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1227 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1228 VT1724_BUFFER_ALIGN); 1229 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1230 VT1724_BUFFER_ALIGN); 1231 constrain_rate_if_locked(substream); 1232 if (ice->spdif.ops.open) 1233 ice->spdif.ops.open(ice, substream); 1234 return 0; 1235} 1236 1237static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) 1238{ 1239 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1240 1241 if (PRO_RATE_RESET) 1242 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1243 ice->capture_con_substream = NULL; 1244 if (ice->spdif.ops.close) 1245 ice->spdif.ops.close(ice, substream); 1246 1247 return 0; 1248} 1249 1250static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { 1251 .open = snd_vt1724_playback_spdif_open, 1252 .close = snd_vt1724_playback_spdif_close, 1253 .hw_params = snd_vt1724_pcm_hw_params, 1254 .hw_free = snd_vt1724_pcm_hw_free, 1255 .prepare = snd_vt1724_playback_spdif_prepare, 1256 .trigger = snd_vt1724_pcm_trigger, 1257 .pointer = snd_vt1724_pcm_pointer, 1258}; 1259 1260static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { 1261 .open = snd_vt1724_capture_spdif_open, 1262 .close = snd_vt1724_capture_spdif_close, 1263 .hw_params = snd_vt1724_pcm_hw_params, 1264 .hw_free = snd_vt1724_pcm_hw_free, 1265 .prepare = snd_vt1724_pcm_prepare, 1266 .trigger = snd_vt1724_pcm_trigger, 1267 .pointer = snd_vt1724_pcm_pointer, 1268}; 1269 1270 1271static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device) 1272{ 1273 char *name; 1274 struct snd_pcm *pcm; 1275 int play, capt; 1276 int err; 1277 1278 if (ice->force_pdma4 || 1279 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { 1280 play = 1; 1281 ice->has_spdif = 1; 1282 } else 1283 play = 0; 1284 if (ice->force_rdma1 || 1285 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { 1286 capt = 1; 1287 ice->has_spdif = 1; 1288 } else 1289 capt = 0; 1290 if (!play && !capt) 1291 return 0; /* no spdif device */ 1292 1293 if (ice->force_pdma4 || ice->force_rdma1) 1294 name = "ICE1724 Secondary"; 1295 else 1296 name = "ICE1724 IEC958"; 1297 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); 1298 if (err < 0) 1299 return err; 1300 1301 if (play) 1302 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1303 &snd_vt1724_playback_spdif_ops); 1304 if (capt) 1305 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1306 &snd_vt1724_capture_spdif_ops); 1307 1308 pcm->private_data = ice; 1309 pcm->info_flags = 0; 1310 strscpy(pcm->name, name); 1311 1312 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1313 &ice->pci->dev, 256*1024, 256*1024); 1314 1315 ice->pcm = pcm; 1316 1317 return 0; 1318} 1319 1320 1321/* 1322 * independent surround PCMs 1323 */ 1324 1325static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { 1326 { 1327 .addr = VT1724_MT_PDMA1_ADDR, 1328 .size = VT1724_MT_PDMA1_SIZE, 1329 .count = VT1724_MT_PDMA1_COUNT, 1330 .start = VT1724_PDMA1_START, 1331 }, 1332 { 1333 .addr = VT1724_MT_PDMA2_ADDR, 1334 .size = VT1724_MT_PDMA2_SIZE, 1335 .count = VT1724_MT_PDMA2_COUNT, 1336 .start = VT1724_PDMA2_START, 1337 }, 1338 { 1339 .addr = VT1724_MT_PDMA3_ADDR, 1340 .size = VT1724_MT_PDMA3_SIZE, 1341 .count = VT1724_MT_PDMA3_COUNT, 1342 .start = VT1724_PDMA3_START, 1343 }, 1344}; 1345 1346static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) 1347{ 1348 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1349 unsigned char val; 1350 1351 scoped_guard(spinlock_irq, &ice->reg_lock) { 1352 val = 3 - substream->number; 1353 if (inb(ICEMT1724(ice, BURST)) < val) 1354 outb(val, ICEMT1724(ice, BURST)); 1355 } 1356 return snd_vt1724_pcm_prepare(substream); 1357} 1358 1359static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) 1360{ 1361 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1362 struct snd_pcm_runtime *runtime = substream->runtime; 1363 1364 scoped_guard(mutex, &ice->open_mutex) { 1365 /* already used by PDMA0? */ 1366 if (ice->pcm_reserved[substream->number]) 1367 return -EBUSY; /* FIXME: should handle blocking mode properly */ 1368 } 1369 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number]; 1370 ice->playback_con_substream_ds[substream->number] = substream; 1371 runtime->hw = snd_vt1724_2ch_stereo; 1372 snd_pcm_set_sync(substream); 1373 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1374 set_rate_constraints(ice, substream); 1375 return 0; 1376} 1377 1378static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) 1379{ 1380 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1381 1382 if (PRO_RATE_RESET) 1383 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1384 ice->playback_con_substream_ds[substream->number] = NULL; 1385 ice->pcm_reserved[substream->number] = NULL; 1386 1387 return 0; 1388} 1389 1390static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = { 1391 .open = snd_vt1724_playback_indep_open, 1392 .close = snd_vt1724_playback_indep_close, 1393 .hw_params = snd_vt1724_pcm_hw_params, 1394 .hw_free = snd_vt1724_pcm_hw_free, 1395 .prepare = snd_vt1724_playback_indep_prepare, 1396 .trigger = snd_vt1724_pcm_trigger, 1397 .pointer = snd_vt1724_pcm_pointer, 1398}; 1399 1400 1401static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device) 1402{ 1403 struct snd_pcm *pcm; 1404 int play; 1405 int err; 1406 1407 play = ice->num_total_dacs / 2 - 1; 1408 if (play <= 0) 1409 return 0; 1410 1411 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); 1412 if (err < 0) 1413 return err; 1414 1415 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1416 &snd_vt1724_playback_indep_ops); 1417 1418 pcm->private_data = ice; 1419 pcm->info_flags = 0; 1420 strscpy(pcm->name, "ICE1724 Surround PCM"); 1421 1422 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1423 &ice->pci->dev, 256*1024, 256*1024); 1424 1425 ice->pcm_ds = pcm; 1426 1427 return 0; 1428} 1429 1430 1431/* 1432 * Mixer section 1433 */ 1434 1435static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice) 1436{ 1437 int err; 1438 1439 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { 1440 struct snd_ac97_bus *pbus; 1441 struct snd_ac97_template ac97; 1442 static const struct snd_ac97_bus_ops ops = { 1443 .write = snd_vt1724_ac97_write, 1444 .read = snd_vt1724_ac97_read, 1445 }; 1446 1447 /* cold reset */ 1448 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 1449 mdelay(5); /* FIXME */ 1450 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 1451 1452 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus); 1453 if (err < 0) 1454 return err; 1455 memset(&ac97, 0, sizeof(ac97)); 1456 ac97.private_data = ice; 1457 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1458 if (err < 0) 1459 dev_warn(ice->card->dev, 1460 "cannot initialize pro ac97, skipped\n"); 1461 else 1462 return 0; 1463 } 1464 /* I2S mixer only */ 1465 strcat(ice->card->mixername, "ICE1724 - multitrack"); 1466 return 0; 1467} 1468 1469/* 1470 * 1471 */ 1472 1473static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) 1474{ 1475 return (unsigned int)ice->eeprom.data[idx] | \ 1476 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ 1477 ((unsigned int)ice->eeprom.data[idx + 2] << 16); 1478} 1479 1480static void snd_vt1724_proc_read(struct snd_info_entry *entry, 1481 struct snd_info_buffer *buffer) 1482{ 1483 struct snd_ice1712 *ice = entry->private_data; 1484 unsigned int idx; 1485 1486 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1487 snd_iprintf(buffer, "EEPROM:\n"); 1488 1489 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1490 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1491 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1492 snd_iprintf(buffer, " System Config : 0x%x\n", 1493 ice->eeprom.data[ICE_EEP2_SYSCONF]); 1494 snd_iprintf(buffer, " ACLink : 0x%x\n", 1495 ice->eeprom.data[ICE_EEP2_ACLINK]); 1496 snd_iprintf(buffer, " I2S : 0x%x\n", 1497 ice->eeprom.data[ICE_EEP2_I2S]); 1498 snd_iprintf(buffer, " S/PDIF : 0x%x\n", 1499 ice->eeprom.data[ICE_EEP2_SPDIF]); 1500 snd_iprintf(buffer, " GPIO direction : 0x%x\n", 1501 ice->eeprom.gpiodir); 1502 snd_iprintf(buffer, " GPIO mask : 0x%x\n", 1503 ice->eeprom.gpiomask); 1504 snd_iprintf(buffer, " GPIO state : 0x%x\n", 1505 ice->eeprom.gpiostate); 1506 for (idx = 0x12; idx < ice->eeprom.size; idx++) 1507 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", 1508 idx, ice->eeprom.data[idx]); 1509 1510 snd_iprintf(buffer, "\nRegisters:\n"); 1511 1512 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", 1513 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); 1514 for (idx = 0x0; idx < 0x20 ; idx++) 1515 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", 1516 idx, inb(ice->port+idx)); 1517 for (idx = 0x0; idx < 0x30 ; idx++) 1518 snd_iprintf(buffer, " MT%02x : 0x%02x\n", 1519 idx, inb(ice->profi_port+idx)); 1520} 1521 1522static void snd_vt1724_proc_init(struct snd_ice1712 *ice) 1523{ 1524 snd_card_ro_proc_new(ice->card, "ice1724", ice, snd_vt1724_proc_read); 1525} 1526 1527/* 1528 * 1529 */ 1530 1531static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, 1532 struct snd_ctl_elem_info *uinfo) 1533{ 1534 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1535 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1536 return 0; 1537} 1538 1539static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, 1540 struct snd_ctl_elem_value *ucontrol) 1541{ 1542 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1543 1544 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1545 return 0; 1546} 1547 1548static const struct snd_kcontrol_new snd_vt1724_eeprom = { 1549 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1550 .name = "ICE1724 EEPROM", 1551 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1552 .info = snd_vt1724_eeprom_info, 1553 .get = snd_vt1724_eeprom_get 1554}; 1555 1556/* 1557 */ 1558static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, 1559 struct snd_ctl_elem_info *uinfo) 1560{ 1561 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1562 uinfo->count = 1; 1563 return 0; 1564} 1565 1566static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) 1567{ 1568 unsigned int val, rbits; 1569 1570 val = diga->status[0] & 0x03; /* professional, non-audio */ 1571 if (val & 0x01) { 1572 /* professional */ 1573 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == 1574 IEC958_AES0_PRO_EMPHASIS_5015) 1575 val |= 1U << 3; 1576 rbits = (diga->status[4] >> 3) & 0x0f; 1577 if (rbits) { 1578 switch (rbits) { 1579 case 2: val |= 5 << 12; break; /* 96k */ 1580 case 3: val |= 6 << 12; break; /* 192k */ 1581 case 10: val |= 4 << 12; break; /* 88.2k */ 1582 case 11: val |= 7 << 12; break; /* 176.4k */ 1583 } 1584 } else { 1585 switch (diga->status[0] & IEC958_AES0_PRO_FS) { 1586 case IEC958_AES0_PRO_FS_44100: 1587 break; 1588 case IEC958_AES0_PRO_FS_32000: 1589 val |= 3U << 12; 1590 break; 1591 default: 1592 val |= 2U << 12; 1593 break; 1594 } 1595 } 1596 } else { 1597 /* consumer */ 1598 val |= diga->status[1] & 0x04; /* copyright */ 1599 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == 1600 IEC958_AES0_CON_EMPHASIS_5015) 1601 val |= 1U << 3; 1602 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ 1603 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ 1604 } 1605 return val; 1606} 1607 1608static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) 1609{ 1610 memset(diga->status, 0, sizeof(diga->status)); 1611 diga->status[0] = val & 0x03; /* professional, non-audio */ 1612 if (val & 0x01) { 1613 /* professional */ 1614 if (val & (1U << 3)) 1615 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; 1616 switch ((val >> 12) & 0x7) { 1617 case 0: 1618 break; 1619 case 2: 1620 diga->status[0] |= IEC958_AES0_PRO_FS_32000; 1621 break; 1622 default: 1623 diga->status[0] |= IEC958_AES0_PRO_FS_48000; 1624 break; 1625 } 1626 } else { 1627 /* consumer */ 1628 diga->status[0] |= val & (1U << 2); /* copyright */ 1629 if (val & (1U << 3)) 1630 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; 1631 diga->status[1] |= (val >> 4) & 0x3f; /* category */ 1632 diga->status[3] |= (val >> 12) & 0x07; /* fs */ 1633 } 1634} 1635 1636static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, 1637 struct snd_ctl_elem_value *ucontrol) 1638{ 1639 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1640 unsigned int val; 1641 val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1642 decode_spdif_bits(&ucontrol->value.iec958, val); 1643 return 0; 1644} 1645 1646static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, 1647 struct snd_ctl_elem_value *ucontrol) 1648{ 1649 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1650 unsigned int val, old; 1651 1652 val = encode_spdif_bits(&ucontrol->value.iec958); 1653 guard(spinlock_irq)(&ice->reg_lock); 1654 old = inw(ICEMT1724(ice, SPDIF_CTRL)); 1655 if (val != old) 1656 update_spdif_bits(ice, val); 1657 return val != old; 1658} 1659 1660static const struct snd_kcontrol_new snd_vt1724_spdif_default = 1661{ 1662 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1663 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1664 .info = snd_vt1724_spdif_info, 1665 .get = snd_vt1724_spdif_default_get, 1666 .put = snd_vt1724_spdif_default_put 1667}; 1668 1669static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1670 struct snd_ctl_elem_value *ucontrol) 1671{ 1672 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1673 IEC958_AES0_PROFESSIONAL | 1674 IEC958_AES0_CON_NOT_COPYRIGHT | 1675 IEC958_AES0_CON_EMPHASIS; 1676 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1677 IEC958_AES1_CON_CATEGORY; 1678 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1679 return 0; 1680} 1681 1682static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1683 struct snd_ctl_elem_value *ucontrol) 1684{ 1685 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1686 IEC958_AES0_PROFESSIONAL | 1687 IEC958_AES0_PRO_FS | 1688 IEC958_AES0_PRO_EMPHASIS; 1689 return 0; 1690} 1691 1692static const struct snd_kcontrol_new snd_vt1724_spdif_maskc = 1693{ 1694 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1695 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1696 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1697 .info = snd_vt1724_spdif_info, 1698 .get = snd_vt1724_spdif_maskc_get, 1699}; 1700 1701static const struct snd_kcontrol_new snd_vt1724_spdif_maskp = 1702{ 1703 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1704 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1705 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1706 .info = snd_vt1724_spdif_info, 1707 .get = snd_vt1724_spdif_maskp_get, 1708}; 1709 1710#define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info 1711 1712static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, 1713 struct snd_ctl_elem_value *ucontrol) 1714{ 1715 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1716 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & 1717 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; 1718 return 0; 1719} 1720 1721static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, 1722 struct snd_ctl_elem_value *ucontrol) 1723{ 1724 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1725 unsigned char old, val; 1726 1727 guard(spinlock_irq)(&ice->reg_lock); 1728 old = val = inb(ICEREG1724(ice, SPDIF_CFG)); 1729 val &= ~VT1724_CFG_SPDIF_OUT_EN; 1730 if (ucontrol->value.integer.value[0]) 1731 val |= VT1724_CFG_SPDIF_OUT_EN; 1732 if (old != val) 1733 outb(val, ICEREG1724(ice, SPDIF_CFG)); 1734 return old != val; 1735} 1736 1737static const struct snd_kcontrol_new snd_vt1724_spdif_switch = 1738{ 1739 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1740 /* FIXME: the following conflict with IEC958 Playback Route */ 1741 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */ 1742 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH), 1743 .info = snd_vt1724_spdif_sw_info, 1744 .get = snd_vt1724_spdif_sw_get, 1745 .put = snd_vt1724_spdif_sw_put 1746}; 1747 1748 1749#if 0 /* NOT USED YET */ 1750/* 1751 * GPIO access from extern 1752 */ 1753 1754#define snd_vt1724_gpio_info snd_ctl_boolean_mono_info 1755 1756int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, 1757 struct snd_ctl_elem_value *ucontrol) 1758{ 1759 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1760 int shift = kcontrol->private_value & 0xff; 1761 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1762 1763 snd_ice1712_save_gpio_status(ice); 1764 ucontrol->value.integer.value[0] = 1765 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; 1766 snd_ice1712_restore_gpio_status(ice); 1767 return 0; 1768} 1769 1770int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1771 struct snd_ctl_elem_value *ucontrol) 1772{ 1773 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1774 int shift = kcontrol->private_value & 0xff; 1775 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1776 unsigned int val, nval; 1777 1778 if (kcontrol->private_value & (1 << 31)) 1779 return -EPERM; 1780 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; 1781 snd_ice1712_save_gpio_status(ice); 1782 val = snd_ice1712_gpio_read(ice); 1783 nval |= val & ~(1 << shift); 1784 if (val != nval) 1785 snd_ice1712_gpio_write(ice, nval); 1786 snd_ice1712_restore_gpio_status(ice); 1787 return val != nval; 1788} 1789#endif /* NOT USED YET */ 1790 1791/* 1792 * rate 1793 */ 1794static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1795 struct snd_ctl_elem_info *uinfo) 1796{ 1797 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1798 int hw_rates_count = ice->hw_rates->count; 1799 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1800 uinfo->count = 1; 1801 1802 /* internal clocks */ 1803 uinfo->value.enumerated.items = hw_rates_count; 1804 /* external clocks */ 1805 if (ice->force_rdma1 || 1806 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) 1807 uinfo->value.enumerated.items += ice->ext_clock_count; 1808 /* upper limit - keep at top */ 1809 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1810 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1811 if (uinfo->value.enumerated.item >= hw_rates_count) 1812 /* ext_clock items */ 1813 strscpy(uinfo->value.enumerated.name, 1814 ice->ext_clock_names[ 1815 uinfo->value.enumerated.item - hw_rates_count]); 1816 else 1817 /* int clock items */ 1818 sprintf(uinfo->value.enumerated.name, "%d", 1819 ice->hw_rates->list[uinfo->value.enumerated.item]); 1820 return 0; 1821} 1822 1823static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1824 struct snd_ctl_elem_value *ucontrol) 1825{ 1826 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1827 unsigned int i, rate; 1828 1829 guard(spinlock_irq)(&ice->reg_lock); 1830 if (ice->is_spdif_master(ice)) { 1831 ucontrol->value.enumerated.item[0] = ice->hw_rates->count + 1832 ice->get_spdif_master_type(ice); 1833 } else { 1834 rate = ice->get_rate(ice); 1835 ucontrol->value.enumerated.item[0] = 0; 1836 for (i = 0; i < ice->hw_rates->count; i++) { 1837 if (ice->hw_rates->list[i] == rate) { 1838 ucontrol->value.enumerated.item[0] = i; 1839 break; 1840 } 1841 } 1842 } 1843 return 0; 1844} 1845 1846static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice) 1847{ 1848 /* standard external clock - only single type - SPDIF IN */ 1849 return 0; 1850} 1851 1852/* setting clock to external - SPDIF */ 1853static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type) 1854{ 1855 unsigned char oval; 1856 unsigned char i2s_oval; 1857 oval = inb(ICEMT1724(ice, RATE)); 1858 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1859 /* setting 256fs */ 1860 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1861 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT)); 1862 return 0; 1863} 1864 1865 1866static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1867 struct snd_ctl_elem_value *ucontrol) 1868{ 1869 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1870 unsigned int old_rate, new_rate; 1871 unsigned int item = ucontrol->value.enumerated.item[0]; 1872 unsigned int first_ext_clock = ice->hw_rates->count; 1873 bool set_pro_rate = false; 1874 1875 if (item > first_ext_clock + ice->ext_clock_count - 1) 1876 return -EINVAL; 1877 1878 /* if rate = 0 => external clock */ 1879 scoped_guard(spinlock_irq, &ice->reg_lock) { 1880 if (ice->is_spdif_master(ice)) 1881 old_rate = 0; 1882 else 1883 old_rate = ice->get_rate(ice); 1884 if (item >= first_ext_clock) { 1885 /* switching to external clock */ 1886 ice->set_spdif_clock(ice, item - first_ext_clock); 1887 new_rate = 0; 1888 } else { 1889 /* internal on-card clock */ 1890 new_rate = ice->hw_rates->list[item]; 1891 ice->pro_rate_default = new_rate; 1892 set_pro_rate = true; 1893 } 1894 } 1895 1896 if (set_pro_rate) 1897 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 1898 1899 /* the first switch to the ext. clock mode? */ 1900 if (old_rate != new_rate && !new_rate) { 1901 /* notify akm chips as well */ 1902 unsigned int i; 1903 if (ice->gpio.set_pro_rate) 1904 ice->gpio.set_pro_rate(ice, 0); 1905 for (i = 0; i < ice->akm_codecs; i++) { 1906 if (ice->akm[i].ops.set_rate_val) 1907 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1908 } 1909 } 1910 return old_rate != new_rate; 1911} 1912 1913static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = { 1914 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1915 .name = "Multi Track Internal Clock", 1916 .info = snd_vt1724_pro_internal_clock_info, 1917 .get = snd_vt1724_pro_internal_clock_get, 1918 .put = snd_vt1724_pro_internal_clock_put 1919}; 1920 1921#define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info 1922 1923static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1924 struct snd_ctl_elem_value *ucontrol) 1925{ 1926 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1927 return 0; 1928} 1929 1930static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1931 struct snd_ctl_elem_value *ucontrol) 1932{ 1933 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1934 int change = 0, nval; 1935 1936 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1937 guard(spinlock_irq)(&ice->reg_lock); 1938 change = PRO_RATE_LOCKED != nval; 1939 PRO_RATE_LOCKED = nval; 1940 return change; 1941} 1942 1943static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = { 1944 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1945 .name = "Multi Track Rate Locking", 1946 .info = snd_vt1724_pro_rate_locking_info, 1947 .get = snd_vt1724_pro_rate_locking_get, 1948 .put = snd_vt1724_pro_rate_locking_put 1949}; 1950 1951#define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info 1952 1953static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1954 struct snd_ctl_elem_value *ucontrol) 1955{ 1956 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; 1957 return 0; 1958} 1959 1960static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1961 struct snd_ctl_elem_value *ucontrol) 1962{ 1963 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1964 int change = 0, nval; 1965 1966 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1967 guard(spinlock_irq)(&ice->reg_lock); 1968 change = PRO_RATE_RESET != nval; 1969 PRO_RATE_RESET = nval; 1970 return change; 1971} 1972 1973static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = { 1974 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1975 .name = "Multi Track Rate Reset", 1976 .info = snd_vt1724_pro_rate_reset_info, 1977 .get = snd_vt1724_pro_rate_reset_get, 1978 .put = snd_vt1724_pro_rate_reset_put 1979}; 1980 1981 1982/* 1983 * routing 1984 */ 1985static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, 1986 struct snd_ctl_elem_info *uinfo) 1987{ 1988 static const char * const texts[] = { 1989 "PCM Out", /* 0 */ 1990 "H/W In 0", "H/W In 1", /* 1-2 */ 1991 "IEC958 In L", "IEC958 In R", /* 3-4 */ 1992 }; 1993 1994 return snd_ctl_enum_info(uinfo, 1, 5, texts); 1995} 1996 1997static inline int analog_route_shift(int idx) 1998{ 1999 return (idx % 2) * 12 + ((idx / 2) * 3) + 8; 2000} 2001 2002static inline int digital_route_shift(int idx) 2003{ 2004 return idx * 3; 2005} 2006 2007int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift) 2008{ 2009 unsigned long val; 2010 unsigned char eitem; 2011 static const unsigned char xlate[8] = { 2012 0, 255, 1, 2, 255, 255, 3, 4, 2013 }; 2014 2015 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2016 val >>= shift; 2017 val &= 7; /* we now have 3 bits per output */ 2018 eitem = xlate[val]; 2019 if (eitem == 255) { 2020 snd_BUG(); 2021 return 0; 2022 } 2023 return eitem; 2024} 2025 2026int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val, 2027 int shift) 2028{ 2029 unsigned int old_val, nval; 2030 int change; 2031 static const unsigned char xroute[8] = { 2032 0, /* PCM */ 2033 2, /* PSDIN0 Left */ 2034 3, /* PSDIN0 Right */ 2035 6, /* SPDIN Left */ 2036 7, /* SPDIN Right */ 2037 }; 2038 2039 nval = xroute[val % 5]; 2040 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2041 val &= ~(0x07 << shift); 2042 val |= nval << shift; 2043 change = val != old_val; 2044 if (change) 2045 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); 2046 return change; 2047} 2048 2049static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2050 struct snd_ctl_elem_value *ucontrol) 2051{ 2052 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2053 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2054 ucontrol->value.enumerated.item[0] = 2055 snd_ice1724_get_route_val(ice, analog_route_shift(idx)); 2056 return 0; 2057} 2058 2059static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2060 struct snd_ctl_elem_value *ucontrol) 2061{ 2062 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2063 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2064 return snd_ice1724_put_route_val(ice, 2065 ucontrol->value.enumerated.item[0], 2066 analog_route_shift(idx)); 2067} 2068 2069static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2070 struct snd_ctl_elem_value *ucontrol) 2071{ 2072 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2073 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2074 ucontrol->value.enumerated.item[0] = 2075 snd_ice1724_get_route_val(ice, digital_route_shift(idx)); 2076 return 0; 2077} 2078 2079static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2080 struct snd_ctl_elem_value *ucontrol) 2081{ 2082 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2083 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2084 return snd_ice1724_put_route_val(ice, 2085 ucontrol->value.enumerated.item[0], 2086 digital_route_shift(idx)); 2087} 2088 2089static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route = 2090{ 2091 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2092 .name = "H/W Playback Route", 2093 .info = snd_vt1724_pro_route_info, 2094 .get = snd_vt1724_pro_route_analog_get, 2095 .put = snd_vt1724_pro_route_analog_put, 2096}; 2097 2098static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = { 2099 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2100 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2101 .info = snd_vt1724_pro_route_info, 2102 .get = snd_vt1724_pro_route_spdif_get, 2103 .put = snd_vt1724_pro_route_spdif_put, 2104 .count = 2, 2105}; 2106 2107 2108static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, 2109 struct snd_ctl_elem_info *uinfo) 2110{ 2111 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2112 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ 2113 uinfo->value.integer.min = 0; 2114 uinfo->value.integer.max = 255; 2115 return 0; 2116} 2117 2118static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, 2119 struct snd_ctl_elem_value *ucontrol) 2120{ 2121 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2122 int idx; 2123 2124 guard(spinlock_irq)(&ice->reg_lock); 2125 for (idx = 0; idx < 22; idx++) { 2126 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); 2127 ucontrol->value.integer.value[idx] = 2128 inb(ICEMT1724(ice, MONITOR_PEAKDATA)); 2129 } 2130 return 0; 2131} 2132 2133static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = { 2134 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2135 .name = "Multi Track Peak", 2136 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2137 .info = snd_vt1724_pro_peak_info, 2138 .get = snd_vt1724_pro_peak_get 2139}; 2140 2141/* 2142 ooAoo cards with no controls 2143*/ 2144static const unsigned char ooaoo_sq210_eeprom[] = { 2145 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC, 2146 1xDACs */ 2147 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 2148 [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */ 2149 [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */ 2150 [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */ 2151 [ICE_EEP2_GPIO_DIR1] = 0x00, 2152 [ICE_EEP2_GPIO_DIR2] = 0x00, 2153 [ICE_EEP2_GPIO_MASK] = 0xff, 2154 [ICE_EEP2_GPIO_MASK1] = 0xff, 2155 [ICE_EEP2_GPIO_MASK2] = 0xff, 2156 2157 [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */ 2158 [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW 2159 and GPIO15 always zero */ 2160 [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */ 2161}; 2162 2163 2164static const struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = { 2165 { 2166 .name = "ooAoo SQ210a", 2167 .model = "sq210a", 2168 .eeprom_size = sizeof(ooaoo_sq210_eeprom), 2169 .eeprom_data = ooaoo_sq210_eeprom, 2170 }, 2171 { } /* terminator */ 2172}; 2173 2174static const struct snd_ice1712_card_info *card_tables[] = { 2175 snd_vt1724_revo_cards, 2176 snd_vt1724_amp_cards, 2177 snd_vt1724_aureon_cards, 2178 snd_vt1720_mobo_cards, 2179 snd_vt1720_pontis_cards, 2180 snd_vt1724_prodigy_hifi_cards, 2181 snd_vt1724_prodigy192_cards, 2182 snd_vt1724_juli_cards, 2183 snd_vt1724_maya44_cards, 2184 snd_vt1724_phase_cards, 2185 snd_vt1724_wtm_cards, 2186 snd_vt1724_se_cards, 2187 snd_vt1724_qtet_cards, 2188 snd_vt1724_ooaoo_cards, 2189 snd_vt1724_psc724_cards, 2190 NULL, 2191}; 2192 2193 2194/* 2195 */ 2196 2197static void wait_i2c_busy(struct snd_ice1712 *ice) 2198{ 2199 int t = 0x10000; 2200 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) 2201 ; 2202 if (t == -1) 2203 dev_err(ice->card->dev, "i2c busy timeout\n"); 2204} 2205 2206unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, 2207 unsigned char dev, unsigned char addr) 2208{ 2209 unsigned char val; 2210 2211 guard(mutex)(&ice->i2c_mutex); 2212 wait_i2c_busy(ice); 2213 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2214 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2215 wait_i2c_busy(ice); 2216 val = inb(ICEREG1724(ice, I2C_DATA)); 2217 /* 2218 dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); 2219 */ 2220 return val; 2221} 2222 2223void snd_vt1724_write_i2c(struct snd_ice1712 *ice, 2224 unsigned char dev, unsigned char addr, unsigned char data) 2225{ 2226 guard(mutex)(&ice->i2c_mutex); 2227 wait_i2c_busy(ice); 2228 /* 2229 dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); 2230 */ 2231 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2232 outb(data, ICEREG1724(ice, I2C_DATA)); 2233 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2234 wait_i2c_busy(ice); 2235} 2236 2237static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice, 2238 const char *modelname) 2239{ 2240 const int dev = 0xa0; /* EEPROM device address */ 2241 unsigned int i, size; 2242 const struct snd_ice1712_card_info * const *tbl, *c; 2243 2244 if (!modelname || !*modelname) { 2245 ice->eeprom.subvendor = 0; 2246 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) 2247 ice->eeprom.subvendor = 2248 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | 2249 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | 2250 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | 2251 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); 2252 if (ice->eeprom.subvendor == 0 || 2253 ice->eeprom.subvendor == (unsigned int)-1) { 2254 /* invalid subvendor from EEPROM, try the PCI 2255 * subststem ID instead 2256 */ 2257 u16 vendor, device; 2258 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, 2259 &vendor); 2260 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2261 ice->eeprom.subvendor = 2262 ((unsigned int)swab16(vendor) << 16) | swab16(device); 2263 if (ice->eeprom.subvendor == 0 || 2264 ice->eeprom.subvendor == (unsigned int)-1) { 2265 dev_err(ice->card->dev, 2266 "No valid ID is found\n"); 2267 return -ENXIO; 2268 } 2269 } 2270 } 2271 for (tbl = card_tables; *tbl; tbl++) { 2272 for (c = *tbl; c->name; c++) { 2273 if (modelname && c->model && 2274 !strcmp(modelname, c->model)) { 2275 dev_info(ice->card->dev, 2276 "Using board model %s\n", 2277 c->name); 2278 ice->eeprom.subvendor = c->subvendor; 2279 } else if (c->subvendor != ice->eeprom.subvendor) 2280 continue; 2281 ice->card_info = c; 2282 if (!c->eeprom_size || !c->eeprom_data) 2283 goto found; 2284 /* if the EEPROM is given by the driver, use it */ 2285 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2286 ice->eeprom.version = 2; 2287 ice->eeprom.size = c->eeprom_size + 6; 2288 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2289 goto read_skipped; 2290 } 2291 } 2292 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2293 ice->eeprom.subvendor); 2294#ifdef CONFIG_PM_SLEEP 2295 /* assume AC97-only card which can suspend without additional code */ 2296 ice->pm_suspend_enabled = 1; 2297#endif 2298 2299 found: 2300 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); 2301 if (ice->eeprom.size < 6) 2302 ice->eeprom.size = 32; 2303 else if (ice->eeprom.size > 32) { 2304 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n", 2305 ice->eeprom.size); 2306 return -EIO; 2307 } 2308 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); 2309 if (ice->eeprom.version != 1 && ice->eeprom.version != 2) 2310 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n", 2311 ice->eeprom.version); 2312 size = ice->eeprom.size - 6; 2313 for (i = 0; i < size; i++) 2314 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); 2315 2316 read_skipped: 2317 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); 2318 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); 2319 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); 2320 2321 return 0; 2322} 2323 2324 2325 2326static void snd_vt1724_chip_reset(struct snd_ice1712 *ice) 2327{ 2328 outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); 2329 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2330 msleep(10); 2331 outb(0, ICEREG1724(ice, CONTROL)); 2332 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2333 msleep(10); 2334} 2335 2336static int snd_vt1724_chip_init(struct snd_ice1712 *ice) 2337{ 2338 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); 2339 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); 2340 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); 2341 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); 2342 2343 ice->gpio.write_mask = ice->eeprom.gpiomask; 2344 ice->gpio.direction = ice->eeprom.gpiodir; 2345 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); 2346 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); 2347 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); 2348 2349 outb(0, ICEREG1724(ice, POWERDOWN)); 2350 2351 /* MPU_RX and TX irq masks are cleared later dynamically */ 2352 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK)); 2353 2354 /* don't handle FIFO overrun/underruns (just yet), 2355 * since they cause machine lockups 2356 */ 2357 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); 2358 2359 return 0; 2360} 2361 2362static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) 2363{ 2364 int err; 2365 struct snd_kcontrol *kctl; 2366 2367 if (snd_BUG_ON(!ice->pcm)) 2368 return -EIO; 2369 2370 if (!ice->own_routing) { 2371 err = snd_ctl_add(ice->card, 2372 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); 2373 if (err < 0) 2374 return err; 2375 } 2376 2377 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); 2378 if (err < 0) 2379 return err; 2380 2381 kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice); 2382 kctl->id.device = ice->pcm->device; 2383 err = snd_ctl_add(ice->card, kctl); 2384 if (err < 0) 2385 return err; 2386 kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice); 2387 kctl->id.device = ice->pcm->device; 2388 err = snd_ctl_add(ice->card, kctl); 2389 if (err < 0) 2390 return err; 2391 kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice); 2392 kctl->id.device = ice->pcm->device; 2393 err = snd_ctl_add(ice->card, kctl); 2394 if (err < 0) 2395 return err; 2396#if 0 /* use default only */ 2397 kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice); 2398 kctl->id.device = ice->pcm->device; 2399 err = snd_ctl_add(ice->card, kctl); 2400 if (err < 0) 2401 return err; 2402 ice->spdif.stream_ctl = kctl; 2403#endif 2404 return 0; 2405} 2406 2407 2408static int snd_vt1724_build_controls(struct snd_ice1712 *ice) 2409{ 2410 int err; 2411 2412 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); 2413 if (err < 0) 2414 return err; 2415 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); 2416 if (err < 0) 2417 return err; 2418 2419 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); 2420 if (err < 0) 2421 return err; 2422 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); 2423 if (err < 0) 2424 return err; 2425 2426 if (!ice->own_routing && ice->num_total_dacs > 0) { 2427 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; 2428 tmp.count = ice->num_total_dacs; 2429 if (ice->vt1720 && tmp.count > 2) 2430 tmp.count = 2; 2431 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2432 if (err < 0) 2433 return err; 2434 } 2435 2436 return snd_ctl_add(ice->card, 2437 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); 2438} 2439 2440static void snd_vt1724_free(struct snd_card *card) 2441{ 2442 struct snd_ice1712 *ice = card->private_data; 2443 2444 /* mask all interrupts */ 2445 outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); 2446 outb(0xff, ICEREG1724(ice, IRQMASK)); 2447 2448 snd_ice1712_akm4xxx_free(ice); 2449} 2450 2451static int snd_vt1724_create(struct snd_card *card, 2452 struct pci_dev *pci, 2453 const char *modelname) 2454{ 2455 struct snd_ice1712 *ice = card->private_data; 2456 int err; 2457 2458 /* enable PCI device */ 2459 err = pcim_enable_device(pci); 2460 if (err < 0) 2461 return err; 2462 2463 ice->vt1724 = 1; 2464 spin_lock_init(&ice->reg_lock); 2465 mutex_init(&ice->gpio_mutex); 2466 mutex_init(&ice->open_mutex); 2467 mutex_init(&ice->i2c_mutex); 2468 ice->gpio.set_mask = snd_vt1724_set_gpio_mask; 2469 ice->gpio.get_mask = snd_vt1724_get_gpio_mask; 2470 ice->gpio.set_dir = snd_vt1724_set_gpio_dir; 2471 ice->gpio.get_dir = snd_vt1724_get_gpio_dir; 2472 ice->gpio.set_data = snd_vt1724_set_gpio_data; 2473 ice->gpio.get_data = snd_vt1724_get_gpio_data; 2474 ice->card = card; 2475 ice->pci = pci; 2476 ice->irq = -1; 2477 pci_set_master(pci); 2478 snd_vt1724_proc_init(ice); 2479 2480 err = pcim_request_all_regions(pci, "ICE1724"); 2481 if (err < 0) 2482 return err; 2483 ice->port = pci_resource_start(pci, 0); 2484 ice->profi_port = pci_resource_start(pci, 1); 2485 2486 if (devm_request_irq(&pci->dev, pci->irq, snd_vt1724_interrupt, 2487 IRQF_SHARED, KBUILD_MODNAME, ice)) { 2488 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2489 return -EIO; 2490 } 2491 2492 ice->irq = pci->irq; 2493 card->sync_irq = ice->irq; 2494 card->private_free = snd_vt1724_free; 2495 2496 snd_vt1724_chip_reset(ice); 2497 if (snd_vt1724_read_eeprom(ice, modelname) < 0) 2498 return -EIO; 2499 if (snd_vt1724_chip_init(ice) < 0) 2500 return -EIO; 2501 2502 return 0; 2503} 2504 2505 2506/* 2507 * 2508 * Registration 2509 * 2510 */ 2511 2512static int __snd_vt1724_probe(struct pci_dev *pci, 2513 const struct pci_device_id *pci_id) 2514{ 2515 static int dev; 2516 struct snd_card *card; 2517 struct snd_ice1712 *ice; 2518 int pcm_dev = 0, err; 2519 const struct snd_ice1712_card_info *c; 2520 2521 if (dev >= SNDRV_CARDS) 2522 return -ENODEV; 2523 if (!enable[dev]) { 2524 dev++; 2525 return -ENOENT; 2526 } 2527 2528 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2529 sizeof(*ice), &card); 2530 if (err < 0) 2531 return err; 2532 ice = card->private_data; 2533 2534 strscpy(card->driver, "ICE1724"); 2535 strscpy(card->shortname, "ICEnsemble ICE1724"); 2536 2537 err = snd_vt1724_create(card, pci, model[dev]); 2538 if (err < 0) 2539 return err; 2540 2541 /* field init before calling chip_init */ 2542 ice->ext_clock_count = 0; 2543 2544 c = ice->card_info; 2545 if (c) { 2546 strscpy(card->shortname, c->name); 2547 if (c->driver) /* specific driver? */ 2548 strscpy(card->driver, c->driver); 2549 if (c->chip_init) { 2550 err = c->chip_init(ice); 2551 if (err < 0) 2552 return err; 2553 } 2554 } 2555 2556 /* 2557 * VT1724 has separate DMAs for the analog and the SPDIF streams while 2558 * ICE1712 has only one for both (mixed up). 2559 * 2560 * Confusingly the analog PCM is named "professional" here because it 2561 * was called so in ice1712 driver, and vt1724 driver is derived from 2562 * ice1712 driver. 2563 */ 2564 ice->pro_rate_default = PRO_RATE_DEFAULT; 2565 if (!ice->is_spdif_master) 2566 ice->is_spdif_master = stdclock_is_spdif_master; 2567 if (!ice->get_rate) 2568 ice->get_rate = stdclock_get_rate; 2569 if (!ice->set_rate) 2570 ice->set_rate = stdclock_set_rate; 2571 if (!ice->set_mclk) 2572 ice->set_mclk = stdclock_set_mclk; 2573 if (!ice->set_spdif_clock) 2574 ice->set_spdif_clock = stdclock_set_spdif_clock; 2575 if (!ice->get_spdif_master_type) 2576 ice->get_spdif_master_type = stdclock_get_spdif_master_type; 2577 if (!ice->ext_clock_names) 2578 ice->ext_clock_names = ext_clock_names; 2579 if (!ice->ext_clock_count) 2580 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names); 2581 2582 if (!ice->hw_rates) 2583 set_std_hw_rates(ice); 2584 2585 err = snd_vt1724_pcm_profi(ice, pcm_dev++); 2586 if (err < 0) 2587 return err; 2588 2589 err = snd_vt1724_pcm_spdif(ice, pcm_dev++); 2590 if (err < 0) 2591 return err; 2592 2593 err = snd_vt1724_pcm_indep(ice, pcm_dev++); 2594 if (err < 0) 2595 return err; 2596 2597 err = snd_vt1724_ac97_mixer(ice); 2598 if (err < 0) 2599 return err; 2600 2601 err = snd_vt1724_build_controls(ice); 2602 if (err < 0) 2603 return err; 2604 2605 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ 2606 err = snd_vt1724_spdif_build_controls(ice); 2607 if (err < 0) 2608 return err; 2609 } 2610 2611 if (c && c->build_controls) { 2612 err = c->build_controls(ice); 2613 if (err < 0) 2614 return err; 2615 } 2616 2617 if (!c || !c->no_mpu401) { 2618 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { 2619 struct snd_rawmidi *rmidi; 2620 2621 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi); 2622 if (err < 0) 2623 return err; 2624 ice->rmidi[0] = rmidi; 2625 rmidi->private_data = ice; 2626 strscpy(rmidi->name, "ICE1724 MIDI"); 2627 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT | 2628 SNDRV_RAWMIDI_INFO_INPUT | 2629 SNDRV_RAWMIDI_INFO_DUPLEX; 2630 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, 2631 &vt1724_midi_output_ops); 2632 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, 2633 &vt1724_midi_input_ops); 2634 2635 /* set watermarks */ 2636 outb(VT1724_MPU_RX_FIFO | 0x1, 2637 ICEREG1724(ice, MPU_FIFO_WM)); 2638 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM)); 2639 /* set UART mode */ 2640 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL)); 2641 } 2642 } 2643 2644 sprintf(card->longname, "%s at 0x%lx, irq %i", 2645 card->shortname, ice->port, ice->irq); 2646 2647 err = snd_card_register(card); 2648 if (err < 0) 2649 return err; 2650 pci_set_drvdata(pci, card); 2651 dev++; 2652 return 0; 2653} 2654 2655static int snd_vt1724_probe(struct pci_dev *pci, 2656 const struct pci_device_id *pci_id) 2657{ 2658 return snd_card_free_on_error(&pci->dev, __snd_vt1724_probe(pci, pci_id)); 2659} 2660 2661#ifdef CONFIG_PM_SLEEP 2662static int snd_vt1724_suspend(struct device *dev) 2663{ 2664 struct snd_card *card = dev_get_drvdata(dev); 2665 struct snd_ice1712 *ice = card->private_data; 2666 2667 if (!ice->pm_suspend_enabled) 2668 return 0; 2669 2670 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2671 2672 snd_ac97_suspend(ice->ac97); 2673 2674 scoped_guard(spinlock_irq, &ice->reg_lock) { 2675 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice); 2676 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL)); 2677 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG)); 2678 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2679 } 2680 2681 if (ice->pm_suspend) 2682 ice->pm_suspend(ice); 2683 return 0; 2684} 2685 2686static int snd_vt1724_resume(struct device *dev) 2687{ 2688 struct snd_card *card = dev_get_drvdata(dev); 2689 struct snd_ice1712 *ice = card->private_data; 2690 2691 if (!ice->pm_suspend_enabled) 2692 return 0; 2693 2694 snd_vt1724_chip_reset(ice); 2695 2696 if (snd_vt1724_chip_init(ice) < 0) { 2697 snd_card_disconnect(card); 2698 return -EIO; 2699 } 2700 2701 if (ice->pm_resume) 2702 ice->pm_resume(ice); 2703 2704 if (ice->pm_saved_is_spdif_master) { 2705 /* switching to external clock via SPDIF */ 2706 ice->set_spdif_clock(ice, 0); 2707 } else { 2708 /* internal on-card clock */ 2709 int rate; 2710 if (ice->cur_rate) 2711 rate = ice->cur_rate; 2712 else 2713 rate = ice->pro_rate_default; 2714 snd_vt1724_set_pro_rate(ice, rate, 1); 2715 } 2716 2717 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); 2718 2719 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG)); 2720 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK)); 2721 2722 snd_ac97_resume(ice->ac97); 2723 2724 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2725 return 0; 2726} 2727 2728static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume); 2729#define SND_VT1724_PM_OPS &snd_vt1724_pm 2730#else 2731#define SND_VT1724_PM_OPS NULL 2732#endif /* CONFIG_PM_SLEEP */ 2733 2734static struct pci_driver vt1724_driver = { 2735 .name = KBUILD_MODNAME, 2736 .id_table = snd_vt1724_ids, 2737 .probe = snd_vt1724_probe, 2738 .driver = { 2739 .pm = SND_VT1724_PM_OPS, 2740 }, 2741}; 2742 2743module_pci_driver(vt1724_driver);
~/
Read-only file preview.