als4000.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 *  card-als4000.c - driver for Avance Logic ALS4000 based soundcards.
  4 *  Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>,
  5 *			  Jaroslav Kysela <perex@perex.cz>
  6 *  Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
  7 *
  8 *  Framework borrowed from Massimo Piccioni's card-als100.c.
  9 *
 10 * NOTES
 11 *
 12 *  Since Avance does not provide any meaningful documentation, and I
 13 *  bought an ALS4000 based soundcard, I was forced to base this driver
 14 *  on reverse engineering.
 15 *
 16 *  Note: this is no longer true (thank you!):
 17 *  pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site.
 18 *  Page numbers stated anywhere below with the "SPECS_PAGE:" tag
 19 *  refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998.
 20 *
 21 *  The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an
 22 *  ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport 
 23 *  interface. These subsystems can be mapped into ISA io-port space, 
 24 *  using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ 
 25 *  services to the subsystems.
 26 * 
 27 * While ALS4000 is very similar to a SoundBlaster, the differences in
 28 * DMA and capturing require more changes to the SoundBlaster than
 29 * desirable, so I made this separate driver.
 30 * 
 31 * The ALS4000 can do real full duplex playback/capture.
 32 *
 33 * FMDAC:
 34 * - 0x4f -> port 0x14
 35 * - port 0x15 |= 1
 36 *
 37 * Enable/disable 3D sound:
 38 * - 0x50 -> port 0x14
 39 * - change bit 6 (0x40) of port 0x15
 40 *
 41 * Set QSound:
 42 * - 0xdb -> port 0x14
 43 * - set port 0x15:
 44 *   0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0)
 45 *
 46 * Set KSound:
 47 * - value -> some port 0x0c0d
 48 *
 49 * ToDo:
 50 * - by default, don't enable legacy game and use PCI game I/O
 51 * - power management? (card can do voice wakeup according to datasheet!!)
 52 */
 53
 54#include <linux/io.h>
 55#include <linux/init.h>
 56#include <linux/pci.h>
 57#include <linux/gameport.h>
 58#include <linux/module.h>
 59#include <linux/dma-mapping.h>
 60#include <sound/core.h>
 61#include <sound/pcm.h>
 62#include <sound/rawmidi.h>
 63#include <sound/mpu401.h>
 64#include <sound/opl3.h>
 65#include <sound/sb.h>
 66#include <sound/initval.h>
 67
 68MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr");
 69MODULE_DESCRIPTION("Avance Logic ALS4000");
 70MODULE_LICENSE("GPL");
 71
 72#if IS_REACHABLE(CONFIG_GAMEPORT)
 73#define SUPPORT_JOYSTICK 1
 74#endif
 75
 76static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
 77static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
 78static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;	/* Enable this card */
 79#ifdef SUPPORT_JOYSTICK
 80static int joystick_port[SNDRV_CARDS];
 81#endif
 82
 83module_param_array(index, int, NULL, 0444);
 84MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard.");
 85module_param_array(id, charp, NULL, 0444);
 86MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard.");
 87module_param_array(enable, bool, NULL, 0444);
 88MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard.");
 89#ifdef SUPPORT_JOYSTICK
 90module_param_hw_array(joystick_port, int, ioport, NULL, 0444);
 91MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)");
 92#endif
 93
 94struct snd_card_als4000 {
 95	/* most frequent access first */
 96	unsigned long iobase;
 97	struct pci_dev *pci;
 98	struct snd_sb *chip;
 99#ifdef SUPPORT_JOYSTICK
100	struct gameport *gameport;
101#endif
102};
103
104static const struct pci_device_id snd_als4000_ids[] = {
105	{ 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },   /* ALS4000 */
106	{ 0, }
107};
108
109MODULE_DEVICE_TABLE(pci, snd_als4000_ids);
110
111enum als4k_iobase_t {
112	/* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */
113	ALS4K_IOD_00_AC97_ACCESS = 0x00,
114	ALS4K_IOW_04_AC97_READ = 0x04,
115	ALS4K_IOB_06_AC97_STATUS = 0x06,
116	ALS4K_IOB_07_IRQSTATUS = 0x07,
117	ALS4K_IOD_08_GCR_DATA = 0x08,
118	ALS4K_IOB_0C_GCR_INDEX = 0x0c,
119	ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e,
120	ALS4K_IOB_10_ADLIB_ADDR0 = 0x10,
121	ALS4K_IOB_11_ADLIB_ADDR1 = 0x11,
122	ALS4K_IOB_12_ADLIB_ADDR2 = 0x12,
123	ALS4K_IOB_13_ADLIB_ADDR3 = 0x13,
124	ALS4K_IOB_14_MIXER_INDEX = 0x14,
125	ALS4K_IOB_15_MIXER_DATA = 0x15,
126	ALS4K_IOB_16_ESP_RESET = 0x16,
127	ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */
128	ALS4K_IOB_18_OPL_ADDR0 = 0x18,
129	ALS4K_IOB_19_OPL_ADDR1 = 0x19,
130	ALS4K_IOB_1A_ESP_RD_DATA = 0x1a,
131	ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c,
132	ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */
133	ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e,
134	ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f,
135	ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20,
136	ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21,
137	ALS4K_IOB_30_MIDI_DATA = 0x30,
138	ALS4K_IOB_31_MIDI_STATUS = 0x31,
139	ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */
140};
141
142enum als4k_iobase_0e_t {
143	ALS4K_IOB_0E_MPU_IRQ = 0x10,
144	ALS4K_IOB_0E_CR1E_IRQ = 0x40,
145	ALS4K_IOB_0E_SB_DMA_IRQ = 0x80,
146};
147
148enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */
149	ALS4K_GCR8C_MISC_CTRL = 0x8c,
150	ALS4K_GCR90_TEST_MODE_REG = 0x90,
151	ALS4K_GCR91_DMA0_ADDR = 0x91,
152	ALS4K_GCR92_DMA0_MODE_COUNT = 0x92,
153	ALS4K_GCR93_DMA1_ADDR = 0x93,
154	ALS4K_GCR94_DMA1_MODE_COUNT = 0x94,
155	ALS4K_GCR95_DMA3_ADDR = 0x95,
156	ALS4K_GCR96_DMA3_MODE_COUNT = 0x96,
157	ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99,
158	ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0,
159	ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1,
160	ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2,
161	ALS4K_GCRA3_FIFO2_COUNT = 0xa3,
162	ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4,
163	ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5,
164	ALS4K_GCRA6_PM_CTRL = 0xa6,
165	ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7,
166	ALS4K_GCRA8_LEGACY_CFG1 = 0xa8,
167	ALS4K_GCRA9_LEGACY_CFG2 = 0xa9,
168	ALS4K_GCRFF_DUMMY_SCRATCH = 0xff,
169};
170
171enum als4k_gcr8c_t {
172	ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000,
173	ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000
174};
175
176static inline void snd_als4k_iobase_writeb(unsigned long iobase,
177						enum als4k_iobase_t reg,
178						u8 val)
179{
180	outb(val, iobase + reg);
181}
182
183static inline void snd_als4k_iobase_writel(unsigned long iobase,
184						enum als4k_iobase_t reg,
185						u32 val)
186{
187	outl(val, iobase + reg);
188}
189
190static inline u8 snd_als4k_iobase_readb(unsigned long iobase,
191						enum als4k_iobase_t reg)
192{
193	return inb(iobase + reg);
194}
195
196static inline u32 snd_als4k_iobase_readl(unsigned long iobase,
197						enum als4k_iobase_t reg)
198{
199	return inl(iobase + reg);
200}
201
202static inline void snd_als4k_gcr_write_addr(unsigned long iobase,
203						 enum als4k_gcr_t reg,
204						 u32 val)
205{
206	snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
207	snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val);
208}
209
210static inline void snd_als4k_gcr_write(struct snd_sb *sb,
211					 enum als4k_gcr_t reg,
212					 u32 val)
213{
214	snd_als4k_gcr_write_addr(sb->alt_port, reg, val);
215}	
216
217static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase,
218						 enum als4k_gcr_t reg)
219{
220	/* SPECS_PAGE: 37/38 */
221	snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
222	return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA);
223}
224
225static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg)
226{
227	return snd_als4k_gcr_read_addr(sb->alt_port, reg);
228}
229
230enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */
231	ALS4K_CR0_SB_CONFIG = 0x00,
232	ALS4K_CR2_MISC_CONTROL = 0x02,
233	ALS4K_CR3_CONFIGURATION = 0x03,
234	ALS4K_CR17_FIFO_STATUS = 0x17,
235	ALS4K_CR18_ESP_MAJOR_VERSION = 0x18,
236	ALS4K_CR19_ESP_MINOR_VERSION = 0x19,
237	ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a,
238	ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c,
239	ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d,
240	ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */
241	ALS4K_CR3A_MISC_CONTROL = 0x3a,
242	ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */
243	ALS4K_CR3C_CRC32_BYTE1 = 0x3c,
244	ALS4K_CR3D_CRC32_BYTE2 = 0x3d,
245	ALS4K_CR3E_CRC32_BYTE3 = 0x3e,
246};
247
248enum als4k_cr0_t {
249	ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */
250	ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */
251	ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80,
252};
253
254static inline void snd_als4_cr_write(struct snd_sb *chip,
255					enum als4k_cr_t reg,
256					u8 data)
257{
258	/* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index
259	 * NOTE: assumes chip->mixer_lock to be locked externally already!
260	 * SPECS_PAGE: 6 */
261	snd_sbmixer_write(chip, reg | 0xc0, data);
262}
263
264static inline u8 snd_als4_cr_read(struct snd_sb *chip,
265					enum als4k_cr_t reg)
266{
267	/* NOTE: assumes chip->mixer_lock to be locked externally already! */
268	return snd_sbmixer_read(chip, reg | 0xc0);
269}
270
271
272
273static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate)
274{
275	if (!(chip->mode & SB_RATE_LOCK)) {
276		snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
277		snd_sbdsp_command(chip, rate>>8);
278		snd_sbdsp_command(chip, rate);
279	}
280}
281
282static inline void snd_als4000_set_capture_dma(struct snd_sb *chip,
283					       dma_addr_t addr, unsigned size)
284{
285	/* SPECS_PAGE: 40 */
286	snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr);
287	snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1));
288}
289
290static inline void snd_als4000_set_playback_dma(struct snd_sb *chip,
291						dma_addr_t addr,
292						unsigned size)
293{
294	/* SPECS_PAGE: 38 */
295	snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr);
296	snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT,
297							(size-1)|0x180000);
298}
299
300#define ALS4000_FORMAT_SIGNED	(1<<0)
301#define ALS4000_FORMAT_16BIT	(1<<1)
302#define ALS4000_FORMAT_STEREO	(1<<2)
303
304static int snd_als4000_get_format(struct snd_pcm_runtime *runtime)
305{
306	int result;
307
308	result = 0;
309	if (snd_pcm_format_signed(runtime->format))
310		result |= ALS4000_FORMAT_SIGNED;
311	if (snd_pcm_format_physical_width(runtime->format) == 16)
312		result |= ALS4000_FORMAT_16BIT;
313	if (runtime->channels > 1)
314		result |= ALS4000_FORMAT_STEREO;
315	return result;
316}
317
318/* structure for setting up playback */
319static const struct {
320	unsigned char dsp_cmd, dma_on, dma_off, format;
321} playback_cmd_vals[]={
322/* ALS4000_FORMAT_U8_MONO */
323{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO },
324/* ALS4000_FORMAT_S8_MONO */	
325{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO },
326/* ALS4000_FORMAT_U16L_MONO */
327{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO },
328/* ALS4000_FORMAT_S16L_MONO */
329{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO },
330/* ALS4000_FORMAT_U8_STEREO */
331{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO },
332/* ALS4000_FORMAT_S8_STEREO */	
333{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO },
334/* ALS4000_FORMAT_U16L_STEREO */
335{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO },
336/* ALS4000_FORMAT_S16L_STEREO */
337{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO },
338};
339#define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format])
340
341/* structure for setting up capture */
342enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 };
343static const unsigned char capture_cmd_vals[]=
344{
345CMD_WIDTH8|CMD_MONO,			/* ALS4000_FORMAT_U8_MONO */
346CMD_WIDTH8|CMD_SIGNED|CMD_MONO,		/* ALS4000_FORMAT_S8_MONO */	
347CMD_MONO,				/* ALS4000_FORMAT_U16L_MONO */
348CMD_SIGNED|CMD_MONO,			/* ALS4000_FORMAT_S16L_MONO */
349CMD_WIDTH8|CMD_STEREO,			/* ALS4000_FORMAT_U8_STEREO */
350CMD_WIDTH8|CMD_SIGNED|CMD_STEREO,	/* ALS4000_FORMAT_S8_STEREO */	
351CMD_STEREO,				/* ALS4000_FORMAT_U16L_STEREO */
352CMD_SIGNED|CMD_STEREO,			/* ALS4000_FORMAT_S16L_STEREO */
353};	
354#define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format])
355
356static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream)
357{
358	struct snd_sb *chip = snd_pcm_substream_chip(substream);
359	struct snd_pcm_runtime *runtime = substream->runtime;
360	unsigned long size;
361	unsigned count;
362
363	chip->capture_format = snd_als4000_get_format(runtime);
364		
365	size = snd_pcm_lib_buffer_bytes(substream);
366	count = snd_pcm_lib_period_bytes(substream);
367	
368	if (chip->capture_format & ALS4000_FORMAT_16BIT)
369		count >>= 1;
370	count--;
371
372	scoped_guard(spinlock_irq, &chip->reg_lock) {
373		snd_als4000_set_rate(chip, runtime->rate);
374		snd_als4000_set_capture_dma(chip, runtime->dma_addr, size);
375	}
376	scoped_guard(spinlock_irq, &chip->mixer_lock) {
377		snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff);
378		snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8);
379	}
380	return 0;
381}
382
383static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream)
384{
385	struct snd_sb *chip = snd_pcm_substream_chip(substream);
386	struct snd_pcm_runtime *runtime = substream->runtime;
387	unsigned long size;
388	unsigned count;
389
390	chip->playback_format = snd_als4000_get_format(runtime);
391	
392	size = snd_pcm_lib_buffer_bytes(substream);
393	count = snd_pcm_lib_period_bytes(substream);
394	
395	if (chip->playback_format & ALS4000_FORMAT_16BIT)
396		count >>= 1;
397	count--;
398	
399	/* FIXME: from second playback on, there's a lot more clicks and pops
400	 * involved here than on first playback. Fiddling with
401	 * tons of different settings didn't help (DMA, speaker on/off,
402	 * reordering, ...). Something seems to get enabled on playback
403	 * that I haven't found out how to disable again, which then causes
404	 * the switching pops to reach the speakers the next time here. */
405	guard(spinlock_irq)(&chip->reg_lock);
406	snd_als4000_set_rate(chip, runtime->rate);
407	snd_als4000_set_playback_dma(chip, runtime->dma_addr, size);
408	
409	/* SPEAKER_ON not needed, since dma_on seems to also enable speaker */
410	/* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */
411	snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd);
412	snd_sbdsp_command(chip, playback_cmd(chip).format);
413	snd_sbdsp_command(chip, count & 0xff);
414	snd_sbdsp_command(chip, count >> 8);
415	snd_sbdsp_command(chip, playback_cmd(chip).dma_off);	
416	
417	return 0;
418}
419
420static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd)
421{
422	struct snd_sb *chip = snd_pcm_substream_chip(substream);
423	int result = 0;
424	
425	/* FIXME race condition in here!!!
426	   chip->mode non-atomic update gets consistently protected
427	   by reg_lock always, _except_ for this place!!
428	   Probably need to take reg_lock as outer (or inner??) lock, too.
429	   (or serialize both lock operations? probably not, though... - racy?)
430	*/
431	guard(spinlock)(&chip->mixer_lock);
432	switch (cmd) {
433	case SNDRV_PCM_TRIGGER_START:
434	case SNDRV_PCM_TRIGGER_RESUME:
435		chip->mode |= SB_RATE_LOCK_CAPTURE;
436		snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
437							 capture_cmd(chip));
438		break;
439	case SNDRV_PCM_TRIGGER_STOP:
440	case SNDRV_PCM_TRIGGER_SUSPEND:
441		chip->mode &= ~SB_RATE_LOCK_CAPTURE;
442		snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
443							 capture_cmd(chip));
444		break;
445	default:
446		result = -EINVAL;
447		break;
448	}
449	return result;
450}
451
452static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd)
453{
454	struct snd_sb *chip = snd_pcm_substream_chip(substream);
455	int result = 0;
456
457	guard(spinlock)(&chip->reg_lock);
458	switch (cmd) {
459	case SNDRV_PCM_TRIGGER_START:
460	case SNDRV_PCM_TRIGGER_RESUME:
461		chip->mode |= SB_RATE_LOCK_PLAYBACK;
462		snd_sbdsp_command(chip, playback_cmd(chip).dma_on);
463		break;
464	case SNDRV_PCM_TRIGGER_STOP:
465	case SNDRV_PCM_TRIGGER_SUSPEND:
466		snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
467		chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
468		break;
469	default:
470		result = -EINVAL;
471		break;
472	}
473	return result;
474}
475
476static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream)
477{
478	struct snd_sb *chip = snd_pcm_substream_chip(substream);
479	unsigned int result;
480
481	scoped_guard(spinlock, &chip->reg_lock) {
482		result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR);
483	}
484	result &= 0xffff;
485	return bytes_to_frames( substream->runtime, result );
486}
487
488static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream)
489{
490	struct snd_sb *chip = snd_pcm_substream_chip(substream);
491	unsigned result;
492
493	scoped_guard(spinlock, &chip->reg_lock) {
494		result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR);
495	}
496	result &= 0xffff;
497	return bytes_to_frames( substream->runtime, result );
498}
499
500/* FIXME: this IRQ routine doesn't really support IRQ sharing (we always
501 * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not).
502 * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK
503 * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ
504 * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something
505 * could be optimized here to query/write one register only...
506 * And even if both registers need to be queried, then there's still the
507 * question of whether it's actually correct to ACK PCI IRQ before reading
508 * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear*
509 * SB IRQ status.
510 * (hmm, SPECS_PAGE: 38 mentions it the other way around!)
511 * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS??
512 * */
513static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id)
514{
515	struct snd_sb *chip = dev_id;
516	unsigned pci_irqstatus;
517	unsigned sb_irqstatus;
518
519	/* find out which bit of the ALS4000 PCI block produced the interrupt,
520	   SPECS_PAGE: 38, 5 */
521	pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port,
522				 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU);
523	if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ)
524	 && (chip->playback_substream)) /* playback */
525		snd_pcm_period_elapsed(chip->playback_substream);
526	if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ)
527	 && (chip->capture_substream)) /* capturing */
528		snd_pcm_period_elapsed(chip->capture_substream);
529	if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ)
530	 && (chip->rmidi)) /* MPU401 interrupt */
531		snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
532	/* ACK the PCI block IRQ */
533	snd_als4k_iobase_writeb(chip->alt_port,
534			 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus);
535	
536	scoped_guard(spinlock, &chip->mixer_lock) {
537		/* SPECS_PAGE: 20 */
538		sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
539	}
540	
541	if (sb_irqstatus & SB_IRQTYPE_8BIT)
542		snd_sb_ack_8bit(chip);
543	if (sb_irqstatus & SB_IRQTYPE_16BIT)
544		snd_sb_ack_16bit(chip);
545	if (sb_irqstatus & SB_IRQTYPE_MPUIN)
546		inb(chip->mpu_port);
547	if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA)
548		snd_als4k_iobase_readb(chip->alt_port,
549					ALS4K_IOB_16_ACK_FOR_CR1E);
550
551	/* dev_dbg(chip->card->dev, "als4000: irq 0x%04x 0x%04x\n",
552					 pci_irqstatus, sb_irqstatus); */
553
554	/* only ack the things we actually handled above */
555	return IRQ_RETVAL(
556	     (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ|
557				ALS4K_IOB_0E_MPU_IRQ))
558	  || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT|
559				SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA))
560	);
561}
562
563/*****************************************************************/
564
565static const struct snd_pcm_hardware snd_als4000_playback =
566{
567	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
568				 SNDRV_PCM_INFO_MMAP_VALID),
569	.formats =		SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
570				SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,	/* formats */
571	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
572	.rate_min =		4000,
573	.rate_max =		48000,
574	.channels_min =		1,
575	.channels_max =		2,
576	.buffer_bytes_max =	65536,
577	.period_bytes_min =	64,
578	.period_bytes_max =	65536,
579	.periods_min =		1,
580	.periods_max =		1024,
581	.fifo_size =		0
582};
583
584static const struct snd_pcm_hardware snd_als4000_capture =
585{
586	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
587				 SNDRV_PCM_INFO_MMAP_VALID),
588	.formats =		SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
589				SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,	/* formats */
590	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
591	.rate_min =		4000,
592	.rate_max =		48000,
593	.channels_min =		1,
594	.channels_max =		2,
595	.buffer_bytes_max =	65536,
596	.period_bytes_min =	64,
597	.period_bytes_max =	65536,
598	.periods_min =		1,
599	.periods_max =		1024,
600	.fifo_size =		0
601};
602
603/*****************************************************************/
604
605static int snd_als4000_playback_open(struct snd_pcm_substream *substream)
606{
607	struct snd_sb *chip = snd_pcm_substream_chip(substream);
608	struct snd_pcm_runtime *runtime = substream->runtime;
609
610	chip->playback_substream = substream;
611	runtime->hw = snd_als4000_playback;
612	return 0;
613}
614
615static int snd_als4000_playback_close(struct snd_pcm_substream *substream)
616{
617	struct snd_sb *chip = snd_pcm_substream_chip(substream);
618
619	chip->playback_substream = NULL;
620	return 0;
621}
622
623static int snd_als4000_capture_open(struct snd_pcm_substream *substream)
624{
625	struct snd_sb *chip = snd_pcm_substream_chip(substream);
626	struct snd_pcm_runtime *runtime = substream->runtime;
627
628	chip->capture_substream = substream;
629	runtime->hw = snd_als4000_capture;
630	return 0;
631}
632
633static int snd_als4000_capture_close(struct snd_pcm_substream *substream)
634{
635	struct snd_sb *chip = snd_pcm_substream_chip(substream);
636
637	chip->capture_substream = NULL;
638	return 0;
639}
640
641/******************************************************************/
642
643static const struct snd_pcm_ops snd_als4000_playback_ops = {
644	.open =		snd_als4000_playback_open,
645	.close =	snd_als4000_playback_close,
646	.prepare =	snd_als4000_playback_prepare,
647	.trigger =	snd_als4000_playback_trigger,
648	.pointer =	snd_als4000_playback_pointer
649};
650
651static const struct snd_pcm_ops snd_als4000_capture_ops = {
652	.open =		snd_als4000_capture_open,
653	.close =	snd_als4000_capture_close,
654	.prepare =	snd_als4000_capture_prepare,
655	.trigger =	snd_als4000_capture_trigger,
656	.pointer =	snd_als4000_capture_pointer
657};
658
659static int snd_als4000_pcm(struct snd_sb *chip, int device)
660{
661	struct snd_pcm *pcm;
662	int err;
663
664	err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm);
665	if (err < 0)
666		return err;
667	pcm->private_data = chip;
668	pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
669	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops);
670	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops);
671
672	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
673				       &chip->pci->dev, 64*1024, 64*1024);
674
675	chip->pcm = pcm;
676
677	return 0;
678}
679
680/******************************************************************/
681
682static void snd_als4000_set_addr(unsigned long iobase,
683					unsigned int sb_io,
684					unsigned int mpu_io,
685					unsigned int opl_io,
686					unsigned int game_io)
687{
688	u32 cfg1 = 0;
689	u32 cfg2 = 0;
690
691	if (mpu_io > 0)
692		cfg2 |= (mpu_io | 1) << 16;
693	if (sb_io > 0)
694		cfg2 |= (sb_io | 1);
695	if (game_io > 0)
696		cfg1 |= (game_io | 1) << 16;
697	if (opl_io > 0)
698		cfg1 |= (opl_io | 1);
699	snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1);
700	snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2);
701}
702
703static void snd_als4000_configure(struct snd_sb *chip)
704{
705	u8 tmp;
706	int i;
707
708	/* do some more configuration */
709	scoped_guard(spinlock_irq, &chip->mixer_lock) {
710		tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG);
711		snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
712				  tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
713		/* always select DMA channel 0, since we do not actually use DMA
714		 * SPECS_PAGE: 19/20 */
715		snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0);
716		snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
717				  tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
718	}
719	
720	guard(spinlock_irq)(&chip->reg_lock);
721	/* enable interrupts */
722	snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL,
723					ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE);
724
725	/* SPECS_PAGE: 39 */
726	for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i)
727		snd_als4k_gcr_write(chip, i, 0);
728	/* enable burst mode to prevent dropouts during high PCI bus usage */
729	snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL,
730		(snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04);
731}
732
733#ifdef SUPPORT_JOYSTICK
734static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev)
735{
736	struct gameport *gp;
737	struct resource *r;
738	int io_port;
739
740	if (joystick_port[dev] == 0)
741		return -ENODEV;
742
743	if (joystick_port[dev] == 1) { /* auto-detect */
744		for (io_port = 0x200; io_port <= 0x218; io_port += 8) {
745			r = devm_request_region(&acard->pci->dev, io_port, 8,
746						"ALS4000 gameport");
747			if (r)
748				break;
749		}
750	} else {
751		io_port = joystick_port[dev];
752		r = devm_request_region(&acard->pci->dev, io_port, 8,
753					"ALS4000 gameport");
754	}
755
756	if (!r) {
757		dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n");
758		return -EBUSY;
759	}
760
761	acard->gameport = gp = gameport_allocate_port();
762	if (!gp) {
763		dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n");
764		return -ENOMEM;
765	}
766
767	gameport_set_name(gp, "ALS4000 Gameport");
768	gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci));
769	gameport_set_dev_parent(gp, &acard->pci->dev);
770	gp->io = io_port;
771
772	/* Enable legacy joystick port */
773	snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
774
775	gameport_register_port(acard->gameport);
776
777	return 0;
778}
779
780static void snd_als4000_free_gameport(struct snd_card_als4000 *acard)
781{
782	if (acard->gameport) {
783		gameport_unregister_port(acard->gameport);
784		acard->gameport = NULL;
785
786		/* disable joystick */
787		snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
788	}
789}
790#else
791static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; }
792static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { }
793#endif
794
795static void snd_card_als4000_free( struct snd_card *card )
796{
797	struct snd_card_als4000 *acard = card->private_data;
798
799	/* make sure that interrupts are disabled */
800	snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0);
801	/* free resources */
802	snd_als4000_free_gameport(acard);
803}
804
805static int __snd_card_als4000_probe(struct pci_dev *pci,
806				    const struct pci_device_id *pci_id)
807{
808	static int dev;
809	struct snd_card *card;
810	struct snd_card_als4000 *acard;
811	unsigned long iobase;
812	struct snd_sb *chip;
813	struct snd_opl3 *opl3;
814	unsigned short word;
815	int err;
816
817	if (dev >= SNDRV_CARDS)
818		return -ENODEV;
819	if (!enable[dev]) {
820		dev++;
821		return -ENOENT;
822	}
823
824	/* enable PCI device */
825	err = pcim_enable_device(pci);
826	if (err < 0)
827		return err;
828
829	/* check, if we can restrict PCI DMA transfers to 24 bits */
830	if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
831		dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n");
832		return -ENXIO;
833	}
834
835	err = pcim_request_all_regions(pci, "ALS4000");
836	if (err < 0)
837		return err;
838	iobase = pci_resource_start(pci, 0);
839
840	pci_read_config_word(pci, PCI_COMMAND, &word);
841	pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO);
842	pci_set_master(pci);
843	
844	err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
845				sizeof(*acard) /* private_data: acard */,
846				&card);
847	if (err < 0)
848		return err;
849
850	acard = card->private_data;
851	acard->pci = pci;
852	acard->iobase = iobase;
853	card->private_free = snd_card_als4000_free;
854
855	/* disable all legacy ISA stuff */
856	snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
857
858	err = snd_sbdsp_create(card,
859			       iobase + ALS4K_IOB_10_ADLIB_ADDR0,
860			       pci->irq,
861		/* internally registered as IRQF_SHARED in case of ALS4000 SB */
862			       snd_als4000_interrupt,
863			       -1,
864			       -1,
865			       SB_HW_ALS4000,
866			       &chip);
867	if (err < 0)
868		return err;
869	acard->chip = chip;
870
871	chip->pci = pci;
872	chip->alt_port = iobase;
873
874	snd_als4000_configure(chip);
875
876	strscpy(card->driver, "ALS4000");
877	strscpy(card->shortname, "Avance Logic ALS4000");
878	sprintf(card->longname, "%s at 0x%lx, irq %i",
879		card->shortname, chip->alt_port, chip->irq);
880
881	err = snd_mpu401_uart_new(card, 0, MPU401_HW_ALS4000,
882				  iobase + ALS4K_IOB_30_MIDI_DATA,
883				  MPU401_INFO_INTEGRATED |
884				  MPU401_INFO_IRQ_HOOK,
885				  -1, &chip->rmidi);
886	if (err < 0) {
887		dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n",
888				iobase + ALS4K_IOB_30_MIDI_DATA);
889		return err;
890	}
891	/* FIXME: ALS4000 has interesting MPU401 configuration features
892	 * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL
893	 * (pass-thru / UART switching, fast MIDI clock, etc.),
894	 * however there doesn't seem to be an ALSA API for this...
895	 * SPECS_PAGE: 21 */
896
897	err = snd_als4000_pcm(chip, 0);
898	if (err < 0)
899		return err;
900
901	err = snd_sbmixer_new(chip);
902	if (err < 0)
903		return err;
904
905	if (snd_opl3_create(card,
906				iobase + ALS4K_IOB_10_ADLIB_ADDR0,
907				iobase + ALS4K_IOB_12_ADLIB_ADDR2,
908			    OPL3_HW_AUTO, 1, &opl3) < 0) {
909		dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n",
910			   iobase + ALS4K_IOB_10_ADLIB_ADDR0,
911			   iobase + ALS4K_IOB_12_ADLIB_ADDR2);
912	} else {
913		err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
914		if (err < 0)
915			return err;
916	}
917
918	snd_als4000_create_gameport(acard, dev);
919
920	err = snd_card_register(card);
921	if (err < 0)
922		return err;
923
924	pci_set_drvdata(pci, card);
925	dev++;
926	return 0;
927}
928
929static int snd_card_als4000_probe(struct pci_dev *pci,
930				  const struct pci_device_id *pci_id)
931{
932	return snd_card_free_on_error(&pci->dev, __snd_card_als4000_probe(pci, pci_id));
933}
934
935static int snd_als4000_suspend(struct device *dev)
936{
937	struct snd_card *card = dev_get_drvdata(dev);
938	struct snd_card_als4000 *acard = card->private_data;
939	struct snd_sb *chip = acard->chip;
940
941	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
942	
943	snd_sbmixer_suspend(chip);
944	return 0;
945}
946
947static int snd_als4000_resume(struct device *dev)
948{
949	struct snd_card *card = dev_get_drvdata(dev);
950	struct snd_card_als4000 *acard = card->private_data;
951	struct snd_sb *chip = acard->chip;
952
953	snd_als4000_configure(chip);
954	snd_sbdsp_reset(chip);
955	snd_sbmixer_resume(chip);
956
957#ifdef SUPPORT_JOYSTICK
958	if (acard->gameport)
959		snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
960#endif
961
962	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
963	return 0;
964}
965
966static DEFINE_SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume);
967
968static struct pci_driver als4000_driver = {
969	.name = KBUILD_MODNAME,
970	.id_table = snd_als4000_ids,
971	.probe = snd_card_als4000_probe,
972	.driver = {
973		.pm = &snd_als4000_pm,
974	},
975};
976
977module_pci_driver(als4000_driver);