sb16_main.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  4 *  Routines for control of 16-bit SoundBlaster cards and clones
  5 *  Note: This is very ugly hardware which uses one 8-bit DMA channel and
  6 *        second 16-bit DMA channel. Unfortunately 8-bit DMA channel can't
  7 *        transfer 16-bit samples and 16-bit DMA channels can't transfer
  8 *        8-bit samples. This make full duplex more complicated than
  9 *        can be... People, don't buy these soundcards for full 16-bit
 10 *        duplex!!!
 11 *  Note: 16-bit wide is assigned to first direction which made request.
 12 *        With full duplex - playback is preferred with abstract layer.
 13 *
 14 *  Note: Some chip revisions have hardware bug. Changing capture
 15 *        channel from full-duplex 8bit DMA to 16bit DMA will block
 16 *        16bit DMA transfers from DSP chip (capture) until 8bit transfer
 17 *        to DSP chip (playback) starts. This bug can be avoided with
 18 *        "16bit DMA Allocation" setting set to Playback or Capture.
 19 */
 20
 21#include <linux/io.h>
 22#include <asm/dma.h>
 23#include <linux/init.h>
 24#include <linux/time.h>
 25#include <linux/module.h>
 26#include <sound/core.h>
 27#include <sound/sb.h>
 28#include <sound/sb16_csp.h>
 29#include <sound/mpu401.h>
 30#include <sound/control.h>
 31#include <sound/info.h>
 32
 33MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
 34MODULE_DESCRIPTION("Routines for control of 16-bit SoundBlaster cards and clones");
 35MODULE_LICENSE("GPL");
 36
 37#define runtime_format_bits(runtime) \
 38	((unsigned int)pcm_format_to_bits((runtime)->format))
 39
 40#ifdef CONFIG_SND_SB16_CSP
 41static void snd_sb16_csp_playback_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
 42{
 43	if (chip->hardware == SB_HW_16CSP) {
 44		struct snd_sb_csp *csp = chip->csp;
 45
 46		if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
 47			/* manually loaded codec */
 48			if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) &&
 49			    (runtime_format_bits(runtime) == csp->acc_format)) {
 50				/* Supported runtime PCM format for playback */
 51				if (csp->ops.csp_use(csp) == 0) {
 52					/* If CSP was successfully acquired */
 53					goto __start_CSP;
 54				}
 55			} else if ((csp->mode & SNDRV_SB_CSP_MODE_QSOUND) && (csp->q_enabled)) {
 56				/* QSound decoder is loaded and enabled */
 57				if (runtime_format_bits(runtime) & (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
 58							      SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE)) {
 59					/* Only for simple PCM formats */
 60					if (csp->ops.csp_use(csp) == 0) {
 61						/* If CSP was successfully acquired */
 62						goto __start_CSP;
 63					}
 64				}
 65			}
 66		} else if (csp->ops.csp_use(csp) == 0) {
 67			/* Acquire CSP and try to autoload hardware codec */
 68			if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_WRITE)) {
 69				/* Unsupported format, release CSP */
 70				csp->ops.csp_unuse(csp);
 71			} else {
 72		      __start_CSP:
 73				/* Try to start CSP */
 74				if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_PLAYBACK_16) ?
 75						       SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
 76						       (runtime->channels > 1) ?
 77						       SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
 78					/* Failed, release CSP */
 79					csp->ops.csp_unuse(csp);
 80				} else {
 81					/* Success, CSP acquired and running */
 82					chip->open = SNDRV_SB_CSP_MODE_DSP_WRITE;
 83				}
 84			}
 85		}
 86	}
 87}
 88
 89static void snd_sb16_csp_capture_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
 90{
 91	if (chip->hardware == SB_HW_16CSP) {
 92		struct snd_sb_csp *csp = chip->csp;
 93
 94		if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
 95			/* manually loaded codec */
 96			if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) &&
 97			    (runtime_format_bits(runtime) == csp->acc_format)) {
 98				/* Supported runtime PCM format for capture */
 99				if (csp->ops.csp_use(csp) == 0) {
100					/* If CSP was successfully acquired */
101					goto __start_CSP;
102				}
103			}
104		} else if (csp->ops.csp_use(csp) == 0) {
105			/* Acquire CSP and try to autoload hardware codec */
106			if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_READ)) {
107				/* Unsupported format, release CSP */
108				csp->ops.csp_unuse(csp);
109			} else {
110		      __start_CSP:
111				/* Try to start CSP */
112				if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_CAPTURE_16) ?
113						       SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
114						       (runtime->channels > 1) ?
115						       SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
116					/* Failed, release CSP */
117					csp->ops.csp_unuse(csp);
118				} else {
119					/* Success, CSP acquired and running */
120					chip->open = SNDRV_SB_CSP_MODE_DSP_READ;
121				}
122			}
123		}
124	}
125}
126
127static void snd_sb16_csp_update(struct snd_sb *chip)
128{
129	if (chip->hardware == SB_HW_16CSP) {
130		struct snd_sb_csp *csp = chip->csp;
131
132		if (csp->qpos_changed) {
133			guard(spinlock)(&chip->reg_lock);
134			csp->ops.csp_qsound_transfer (csp);
135		}
136	}
137}
138
139static void snd_sb16_csp_playback_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
140{
141	/* CSP decoders (QSound excluded) support only 16bit transfers */
142	if (chip->hardware == SB_HW_16CSP) {
143		struct snd_sb_csp *csp = chip->csp;
144
145		if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
146			/* manually loaded codec */
147			if (csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) {
148				runtime->hw.formats |= csp->acc_format;
149			}
150		} else {
151			/* autoloaded codecs */
152			runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
153					       SNDRV_PCM_FMTBIT_IMA_ADPCM;
154		}
155	}
156}
157
158static void snd_sb16_csp_playback_close(struct snd_sb *chip)
159{
160	if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_WRITE)) {
161		struct snd_sb_csp *csp = chip->csp;
162
163		if (csp->ops.csp_stop(csp) == 0) {
164			csp->ops.csp_unuse(csp);
165			chip->open = 0;
166		}
167	}
168}
169
170static void snd_sb16_csp_capture_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
171{
172	/* CSP coders support only 16bit transfers */
173	if (chip->hardware == SB_HW_16CSP) {
174		struct snd_sb_csp *csp = chip->csp;
175
176		if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
177			/* manually loaded codec */
178			if (csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) {
179				runtime->hw.formats |= csp->acc_format;
180			}
181		} else {
182			/* autoloaded codecs */
183			runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
184					       SNDRV_PCM_FMTBIT_IMA_ADPCM;
185		}
186	}
187}
188
189static void snd_sb16_csp_capture_close(struct snd_sb *chip)
190{
191	if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_READ)) {
192		struct snd_sb_csp *csp = chip->csp;
193
194		if (csp->ops.csp_stop(csp) == 0) {
195			csp->ops.csp_unuse(csp);
196			chip->open = 0;
197		}
198	}
199}
200#else
201#define snd_sb16_csp_playback_prepare(chip, runtime)	/*nop*/
202#define snd_sb16_csp_capture_prepare(chip, runtime)	/*nop*/
203#define snd_sb16_csp_update(chip)			/*nop*/
204#define snd_sb16_csp_playback_open(chip, runtime)	/*nop*/
205#define snd_sb16_csp_playback_close(chip)		/*nop*/
206#define snd_sb16_csp_capture_open(chip, runtime)	/*nop*/
207#define snd_sb16_csp_capture_close(chip)      	 	/*nop*/
208#endif
209
210
211static void snd_sb16_setup_rate(struct snd_sb *chip,
212				unsigned short rate,
213				int channel)
214{
215	guard(spinlock_irqsave)(&chip->reg_lock);
216	if (chip->mode & (channel == SNDRV_PCM_STREAM_PLAYBACK ? SB_MODE_PLAYBACK_16 : SB_MODE_CAPTURE_16))
217		snd_sb_ack_16bit(chip);
218	else
219		snd_sb_ack_8bit(chip);
220	if (!(chip->mode & SB_RATE_LOCK)) {
221		chip->locked_rate = rate;
222		snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_IN);
223		snd_sbdsp_command(chip, rate >> 8);
224		snd_sbdsp_command(chip, rate & 0xff);
225		snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
226		snd_sbdsp_command(chip, rate >> 8);
227		snd_sbdsp_command(chip, rate & 0xff);
228	}
229}
230
231static int snd_sb16_playback_prepare(struct snd_pcm_substream *substream)
232{
233	struct snd_sb *chip = snd_pcm_substream_chip(substream);
234	struct snd_pcm_runtime *runtime = substream->runtime;
235	unsigned char format;
236	unsigned int size, count, dma;
237
238	snd_sb16_csp_playback_prepare(chip, runtime);
239	if (snd_pcm_format_unsigned(runtime->format) > 0) {
240		format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
241	} else {
242		format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
243	}
244
245	snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_PLAYBACK);
246	size = chip->p_dma_size = snd_pcm_lib_buffer_bytes(substream);
247	dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
248	snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
249
250	count = snd_pcm_lib_period_bytes(substream);
251	guard(spinlock_irqsave)(&chip->reg_lock);
252	if (chip->mode & SB_MODE_PLAYBACK_16) {
253		count >>= 1;
254		count--;
255		snd_sbdsp_command(chip, SB_DSP4_OUT16_AI);
256		snd_sbdsp_command(chip, format);
257		snd_sbdsp_command(chip, count & 0xff);
258		snd_sbdsp_command(chip, count >> 8);
259		snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
260	} else {
261		count--;
262		snd_sbdsp_command(chip, SB_DSP4_OUT8_AI);
263		snd_sbdsp_command(chip, format);
264		snd_sbdsp_command(chip, count & 0xff);
265		snd_sbdsp_command(chip, count >> 8);
266		snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
267	}
268	return 0;
269}
270
271static int snd_sb16_playback_trigger(struct snd_pcm_substream *substream,
272				     int cmd)
273{
274	struct snd_sb *chip = snd_pcm_substream_chip(substream);
275
276	guard(spinlock)(&chip->reg_lock);
277	switch (cmd) {
278	case SNDRV_PCM_TRIGGER_START:
279	case SNDRV_PCM_TRIGGER_RESUME:
280		chip->mode |= SB_RATE_LOCK_PLAYBACK;
281		snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
282		break;
283	case SNDRV_PCM_TRIGGER_STOP:
284	case SNDRV_PCM_TRIGGER_SUSPEND:
285		snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
286		/* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
287		if (chip->mode & SB_RATE_LOCK_CAPTURE)
288			snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
289		chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
290		break;
291	default:
292		return -EINVAL;
293	}
294	return 0;
295}
296
297static int snd_sb16_capture_prepare(struct snd_pcm_substream *substream)
298{
299	struct snd_sb *chip = snd_pcm_substream_chip(substream);
300	struct snd_pcm_runtime *runtime = substream->runtime;
301	unsigned char format;
302	unsigned int size, count, dma;
303
304	snd_sb16_csp_capture_prepare(chip, runtime);
305	if (snd_pcm_format_unsigned(runtime->format) > 0) {
306		format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
307	} else {
308		format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
309	}
310	snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_CAPTURE);
311	size = chip->c_dma_size = snd_pcm_lib_buffer_bytes(substream);
312	dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
313	snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
314
315	count = snd_pcm_lib_period_bytes(substream);
316	guard(spinlock_irqsave)(&chip->reg_lock);
317	if (chip->mode & SB_MODE_CAPTURE_16) {
318		count >>= 1;
319		count--;
320		snd_sbdsp_command(chip, SB_DSP4_IN16_AI);
321		snd_sbdsp_command(chip, format);
322		snd_sbdsp_command(chip, count & 0xff);
323		snd_sbdsp_command(chip, count >> 8);
324		snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
325	} else {
326		count--;
327		snd_sbdsp_command(chip, SB_DSP4_IN8_AI);
328		snd_sbdsp_command(chip, format);
329		snd_sbdsp_command(chip, count & 0xff);
330		snd_sbdsp_command(chip, count >> 8);
331		snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
332	}
333	return 0;
334}
335
336static int snd_sb16_capture_trigger(struct snd_pcm_substream *substream,
337				    int cmd)
338{
339	struct snd_sb *chip = snd_pcm_substream_chip(substream);
340
341	guard(spinlock)(&chip->reg_lock);
342	switch (cmd) {
343	case SNDRV_PCM_TRIGGER_START:
344	case SNDRV_PCM_TRIGGER_RESUME:
345		chip->mode |= SB_RATE_LOCK_CAPTURE;
346		snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
347		break;
348	case SNDRV_PCM_TRIGGER_STOP:
349	case SNDRV_PCM_TRIGGER_SUSPEND:
350		snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
351		/* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
352		if (chip->mode & SB_RATE_LOCK_PLAYBACK)
353			snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
354		chip->mode &= ~SB_RATE_LOCK_CAPTURE;
355		break;
356	default:
357		return -EINVAL;
358	}
359	return 0;
360}
361
362irqreturn_t snd_sb16dsp_interrupt(int irq, void *dev_id)
363{
364	struct snd_sb *chip = dev_id;
365	unsigned char status;
366	int ok;
367
368	scoped_guard(spinlock, &chip->mixer_lock) {
369		status = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
370	}
371	if ((status & SB_IRQTYPE_MPUIN) && chip->rmidi_callback)
372		chip->rmidi_callback(irq, chip->rmidi->private_data);
373	if (status & SB_IRQTYPE_8BIT) {
374		ok = 0;
375		if (chip->mode & SB_MODE_PLAYBACK_8) {
376			snd_pcm_period_elapsed(chip->playback_substream);
377			snd_sb16_csp_update(chip);
378			ok++;
379		}
380		if (chip->mode & SB_MODE_CAPTURE_8) {
381			snd_pcm_period_elapsed(chip->capture_substream);
382			ok++;
383		}
384		scoped_guard(spinlock, &chip->reg_lock) {
385			if (!ok)
386				snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
387			snd_sb_ack_8bit(chip);
388		}
389	}
390	if (status & SB_IRQTYPE_16BIT) {
391		ok = 0;
392		if (chip->mode & SB_MODE_PLAYBACK_16) {
393			snd_pcm_period_elapsed(chip->playback_substream);
394			snd_sb16_csp_update(chip);
395			ok++;
396		}
397		if (chip->mode & SB_MODE_CAPTURE_16) {
398			snd_pcm_period_elapsed(chip->capture_substream);
399			ok++;
400		}
401		scoped_guard(spinlock, &chip->reg_lock) {
402			if (!ok)
403				snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
404			snd_sb_ack_16bit(chip);
405		}
406	}
407	return IRQ_HANDLED;
408}
409
410/*
411
412 */
413
414static snd_pcm_uframes_t snd_sb16_playback_pointer(struct snd_pcm_substream *substream)
415{
416	struct snd_sb *chip = snd_pcm_substream_chip(substream);
417	unsigned int dma;
418	size_t ptr;
419
420	dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
421	ptr = snd_dma_pointer(dma, chip->p_dma_size);
422	return bytes_to_frames(substream->runtime, ptr);
423}
424
425static snd_pcm_uframes_t snd_sb16_capture_pointer(struct snd_pcm_substream *substream)
426{
427	struct snd_sb *chip = snd_pcm_substream_chip(substream);
428	unsigned int dma;
429	size_t ptr;
430
431	dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
432	ptr = snd_dma_pointer(dma, chip->c_dma_size);
433	return bytes_to_frames(substream->runtime, ptr);
434}
435
436/*
437
438 */
439
440static const struct snd_pcm_hardware snd_sb16_playback =
441{
442	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
443				 SNDRV_PCM_INFO_MMAP_VALID),
444	.formats =		0,
445	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
446	.rate_min =		4000,
447	.rate_max =		44100,
448	.channels_min =		1,
449	.channels_max =		2,
450	.buffer_bytes_max =	(128*1024),
451	.period_bytes_min =	64,
452	.period_bytes_max =	(128*1024),
453	.periods_min =		1,
454	.periods_max =		1024,
455	.fifo_size =		0,
456};
457
458static const struct snd_pcm_hardware snd_sb16_capture =
459{
460	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
461				 SNDRV_PCM_INFO_MMAP_VALID),
462	.formats =		0,
463	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
464	.rate_min =		4000,
465	.rate_max =		44100,
466	.channels_min =		1,
467	.channels_max =		2,
468	.buffer_bytes_max =	(128*1024),
469	.period_bytes_min =	64,
470	.period_bytes_max =	(128*1024),
471	.periods_min =		1,
472	.periods_max =		1024,
473	.fifo_size =		0,
474};
475
476/*
477 *  open/close
478 */
479
480static int snd_sb16_playback_open(struct snd_pcm_substream *substream)
481{
482	struct snd_sb *chip = snd_pcm_substream_chip(substream);
483	struct snd_pcm_runtime *runtime = substream->runtime;
484
485	guard(spinlock_irqsave)(&chip->open_lock);
486	if (chip->mode & SB_MODE_PLAYBACK)
487		return -EAGAIN;
488	runtime->hw = snd_sb16_playback;
489
490	/* skip if 16 bit DMA was reserved for capture */
491	if (chip->force_mode16 & SB_MODE_CAPTURE_16)
492		goto __skip_16bit;
493
494	if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_CAPTURE_16)) {
495		chip->mode |= SB_MODE_PLAYBACK_16;
496		runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
497		/* Vibra16X hack */
498		if (chip->dma16 <= 3) {
499			runtime->hw.buffer_bytes_max =
500			runtime->hw.period_bytes_max = 64 * 1024;
501		} else {
502			snd_sb16_csp_playback_open(chip, runtime);
503		}
504		goto __open_ok;
505	}
506
507      __skip_16bit:
508	if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_CAPTURE_8)) {
509		chip->mode |= SB_MODE_PLAYBACK_8;
510		/* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
511		if (chip->dma16 < 0) {
512			runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
513			chip->mode |= SB_MODE_PLAYBACK_16;
514		} else {
515			runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
516		}
517		runtime->hw.buffer_bytes_max =
518		runtime->hw.period_bytes_max = 64 * 1024;
519		goto __open_ok;
520	}
521	return -EAGAIN;
522
523      __open_ok:
524	if (chip->hardware == SB_HW_ALS100)
525		runtime->hw.rate_max = 48000;
526	if (chip->hardware == SB_HW_CS5530) {
527		runtime->hw.buffer_bytes_max = 32 * 1024;
528		runtime->hw.periods_min = 2;
529		runtime->hw.rate_min = 44100;
530	}
531	if (chip->mode & SB_RATE_LOCK)
532		runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
533	chip->playback_substream = substream;
534	return 0;
535}
536
537static int snd_sb16_playback_close(struct snd_pcm_substream *substream)
538{
539	struct snd_sb *chip = snd_pcm_substream_chip(substream);
540
541	snd_sb16_csp_playback_close(chip);
542	guard(spinlock_irqsave)(&chip->open_lock);
543	chip->playback_substream = NULL;
544	chip->mode &= ~SB_MODE_PLAYBACK;
545	return 0;
546}
547
548static int snd_sb16_capture_open(struct snd_pcm_substream *substream)
549{
550	struct snd_sb *chip = snd_pcm_substream_chip(substream);
551	struct snd_pcm_runtime *runtime = substream->runtime;
552
553	guard(spinlock_irqsave)(&chip->open_lock);
554	if (chip->mode & SB_MODE_CAPTURE)
555		return -EAGAIN;
556	runtime->hw = snd_sb16_capture;
557
558	/* skip if 16 bit DMA was reserved for playback */
559	if (chip->force_mode16 & SB_MODE_PLAYBACK_16)
560		goto __skip_16bit;
561
562	if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_16)) {
563		chip->mode |= SB_MODE_CAPTURE_16;
564		runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
565		/* Vibra16X hack */
566		if (chip->dma16 <= 3) {
567			runtime->hw.buffer_bytes_max =
568			runtime->hw.period_bytes_max = 64 * 1024;
569		} else {
570			snd_sb16_csp_capture_open(chip, runtime);
571		}
572		goto __open_ok;
573	}
574
575      __skip_16bit:
576	if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_8)) {
577		chip->mode |= SB_MODE_CAPTURE_8;
578		/* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
579		if (chip->dma16 < 0) {
580			runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
581			chip->mode |= SB_MODE_CAPTURE_16;
582		} else {
583			runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
584		}
585		runtime->hw.buffer_bytes_max =
586		runtime->hw.period_bytes_max = 64 * 1024;
587		goto __open_ok;
588	}
589	return -EAGAIN;
590
591      __open_ok:
592	if (chip->hardware == SB_HW_ALS100)
593		runtime->hw.rate_max = 48000;
594	if (chip->hardware == SB_HW_CS5530) {
595		runtime->hw.buffer_bytes_max = 32 * 1024;
596		runtime->hw.periods_min = 2;
597		runtime->hw.rate_min = 44100;
598	}
599	if (chip->mode & SB_RATE_LOCK)
600		runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
601	chip->capture_substream = substream;
602	return 0;
603}
604
605static int snd_sb16_capture_close(struct snd_pcm_substream *substream)
606{
607	struct snd_sb *chip = snd_pcm_substream_chip(substream);
608
609	snd_sb16_csp_capture_close(chip);
610	guard(spinlock_irqsave)(&chip->open_lock);
611	chip->capture_substream = NULL;
612	chip->mode &= ~SB_MODE_CAPTURE;
613	return 0;
614}
615
616/*
617 *  DMA control interface
618 */
619
620static int snd_sb16_set_dma_mode(struct snd_sb *chip, int what)
621{
622	if (chip->dma8 < 0 || chip->dma16 < 0) {
623		if (snd_BUG_ON(what))
624			return -EINVAL;
625		return 0;
626	}
627	if (what == 0) {
628		chip->force_mode16 = 0;
629	} else if (what == 1) {
630		chip->force_mode16 = SB_MODE_PLAYBACK_16;
631	} else if (what == 2) {
632		chip->force_mode16 = SB_MODE_CAPTURE_16;
633	} else {
634		return -EINVAL;
635	}
636	return 0;
637}
638
639static int snd_sb16_get_dma_mode(struct snd_sb *chip)
640{
641	if (chip->dma8 < 0 || chip->dma16 < 0)
642		return 0;
643	switch (chip->force_mode16) {
644	case SB_MODE_PLAYBACK_16:
645		return 1;
646	case SB_MODE_CAPTURE_16:
647		return 2;
648	default:
649		return 0;
650	}
651}
652
653static int snd_sb16_dma_control_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
654{
655	static const char * const texts[3] = {
656		"Auto", "Playback", "Capture"
657	};
658
659	return snd_ctl_enum_info(uinfo, 1, 3, texts);
660}
661
662static int snd_sb16_dma_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
663{
664	struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
665	
666	guard(spinlock_irqsave)(&chip->reg_lock);
667	ucontrol->value.enumerated.item[0] = snd_sb16_get_dma_mode(chip);
668	return 0;
669}
670
671static int snd_sb16_dma_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
672{
673	struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
674	unsigned char nval, oval;
675	int change;
676	
677	if (chip->mode & (SB_MODE_PLAYBACK | SB_MODE_CAPTURE))
678		return -EBUSY;
679
680	nval = ucontrol->value.enumerated.item[0];
681	if (nval > 2)
682		return -EINVAL;
683	scoped_guard(spinlock_irqsave, &chip->reg_lock) {
684		oval = snd_sb16_get_dma_mode(chip);
685		change = nval != oval;
686		snd_sb16_set_dma_mode(chip, nval);
687	}
688	if (change) {
689		snd_dma_disable(chip->dma8);
690		snd_dma_disable(chip->dma16);
691	}
692	return change;
693}
694
695static const struct snd_kcontrol_new snd_sb16_dma_control = {
696	.iface = SNDRV_CTL_ELEM_IFACE_CARD,
697	.name = "16-bit DMA Allocation",
698	.info = snd_sb16_dma_control_info,
699	.get = snd_sb16_dma_control_get,
700	.put = snd_sb16_dma_control_put
701};
702
703/*
704 *  Initialization part
705 */
706 
707int snd_sb16dsp_configure(struct snd_sb * chip)
708{
709	unsigned char irqreg = 0, dmareg = 0, mpureg;
710	unsigned char realirq, realdma, realmpureg;
711	/* note: mpu register should be present only on SB16 Vibra soundcards */
712
713	scoped_guard(spinlock_irqsave, &chip->mixer_lock) {
714		mpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP) & ~0x06;
715	}
716	switch (chip->irq) {
717	case 2:
718	case 9:
719		irqreg |= SB_IRQSETUP_IRQ9;
720		break;
721	case 5:
722		irqreg |= SB_IRQSETUP_IRQ5;
723		break;
724	case 7:
725		irqreg |= SB_IRQSETUP_IRQ7;
726		break;
727	case 10:
728		irqreg |= SB_IRQSETUP_IRQ10;
729		break;
730	default:
731		return -EINVAL;
732	}
733	if (chip->dma8 >= 0) {
734		switch (chip->dma8) {
735		case 0:
736			dmareg |= SB_DMASETUP_DMA0;
737			break;
738		case 1:
739			dmareg |= SB_DMASETUP_DMA1;
740			break;
741		case 3:
742			dmareg |= SB_DMASETUP_DMA3;
743			break;
744		default:
745			return -EINVAL;
746		}
747	}
748	if (chip->dma16 >= 0 && chip->dma16 != chip->dma8) {
749		switch (chip->dma16) {
750		case 5:
751			dmareg |= SB_DMASETUP_DMA5;
752			break;
753		case 6:
754			dmareg |= SB_DMASETUP_DMA6;
755			break;
756		case 7:
757			dmareg |= SB_DMASETUP_DMA7;
758			break;
759		default:
760			return -EINVAL;
761		}
762	}
763	switch (chip->mpu_port) {
764	case 0x300:
765		mpureg |= 0x04;
766		break;
767	case 0x330:
768		mpureg |= 0x00;
769		break;
770	default:
771		mpureg |= 0x02;	/* disable MPU */
772	}
773
774	scoped_guard(spinlock_irqsave, &chip->mixer_lock) {
775		snd_sbmixer_write(chip, SB_DSP4_IRQSETUP, irqreg);
776		realirq = snd_sbmixer_read(chip, SB_DSP4_IRQSETUP);
777
778		snd_sbmixer_write(chip, SB_DSP4_DMASETUP, dmareg);
779		realdma = snd_sbmixer_read(chip, SB_DSP4_DMASETUP);
780
781		snd_sbmixer_write(chip, SB_DSP4_MPUSETUP, mpureg);
782		realmpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP);
783	}
784	if ((~realirq) & irqreg || (~realdma) & dmareg) {
785		dev_err(chip->card->dev,
786			"SB16 [0x%lx]: unable to set DMA & IRQ (PnP device?)\n",
787			chip->port);
788		dev_err(chip->card->dev,
789			"SB16 [0x%lx]: wanted: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n",
790			chip->port, realirq, realdma, realmpureg);
791		dev_err(chip->card->dev,
792			"SB16 [0x%lx]:    got: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n",
793			chip->port, irqreg, dmareg, mpureg);
794		return -ENODEV;
795	}
796	return 0;
797}
798
799static const struct snd_pcm_ops snd_sb16_playback_ops = {
800	.open =		snd_sb16_playback_open,
801	.close =	snd_sb16_playback_close,
802	.prepare =	snd_sb16_playback_prepare,
803	.trigger =	snd_sb16_playback_trigger,
804	.pointer =	snd_sb16_playback_pointer,
805};
806
807static const struct snd_pcm_ops snd_sb16_capture_ops = {
808	.open =		snd_sb16_capture_open,
809	.close =	snd_sb16_capture_close,
810	.prepare =	snd_sb16_capture_prepare,
811	.trigger =	snd_sb16_capture_trigger,
812	.pointer =	snd_sb16_capture_pointer,
813};
814
815int snd_sb16dsp_pcm(struct snd_sb *chip, int device)
816{
817	struct snd_card *card = chip->card;
818	struct snd_pcm *pcm;
819	int err;
820
821	err = snd_pcm_new(card, "SB16 DSP", device, 1, 1, &pcm);
822	if (err < 0)
823		return err;
824	sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff);
825	pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
826	pcm->private_data = chip;
827	chip->pcm = pcm;
828
829	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_sb16_playback_ops);
830	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_sb16_capture_ops);
831
832	if (chip->dma16 >= 0 && chip->dma8 != chip->dma16)
833		snd_ctl_add(card, snd_ctl_new1(&snd_sb16_dma_control, chip));
834	else
835		pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
836
837	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
838				       card->dev, 64*1024, 128*1024);
839	return 0;
840}
841
842const struct snd_pcm_ops *snd_sb16dsp_get_pcm_ops(int direction)
843{
844	return direction == SNDRV_PCM_STREAM_PLAYBACK ?
845		&snd_sb16_playback_ops : &snd_sb16_capture_ops;
846}
847
848EXPORT_SYMBOL(snd_sb16dsp_pcm);
849EXPORT_SYMBOL(snd_sb16dsp_get_pcm_ops);
850EXPORT_SYMBOL(snd_sb16dsp_configure);
851EXPORT_SYMBOL(snd_sb16dsp_interrupt);