ak4113.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 *  Routines for control of the AK4113 via I2C/4-wire serial interface
  4 *  IEC958 (S/PDIF) receiver by Asahi Kasei
  5 *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  6 *  Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>
  7 */
  8
  9#include <linux/slab.h>
 10#include <linux/delay.h>
 11#include <linux/module.h>
 12#include <sound/core.h>
 13#include <sound/control.h>
 14#include <sound/pcm.h>
 15#include <sound/ak4113.h>
 16#include <sound/asoundef.h>
 17#include <sound/info.h>
 18
 19MODULE_AUTHOR("Pavel Hofman <pavel.hofman@ivitera.com>");
 20MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei");
 21MODULE_LICENSE("GPL");
 22
 23#define AK4113_ADDR			0x00 /* fixed address */
 24
 25static void ak4113_stats(struct work_struct *work);
 26static void ak4113_init_regs(struct ak4113 *chip);
 27
 28
 29static void reg_write(struct ak4113 *ak4113, unsigned char reg,
 30		unsigned char val)
 31{
 32	ak4113->write(ak4113->private_data, reg, val);
 33	if (reg < sizeof(ak4113->regmap))
 34		ak4113->regmap[reg] = val;
 35}
 36
 37static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg)
 38{
 39	return ak4113->read(ak4113->private_data, reg);
 40}
 41
 42static void snd_ak4113_free(struct ak4113 *chip)
 43{
 44	atomic_inc(&chip->wq_processing);	/* don't schedule new work */
 45	cancel_delayed_work_sync(&chip->work);
 46	kfree(chip);
 47}
 48
 49static int snd_ak4113_dev_free(struct snd_device *device)
 50{
 51	struct ak4113 *chip = device->device_data;
 52	snd_ak4113_free(chip);
 53	return 0;
 54}
 55
 56int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
 57		ak4113_write_t *write, const unsigned char *pgm,
 58		void *private_data, struct ak4113 **r_ak4113)
 59{
 60	struct ak4113 *chip;
 61	int err;
 62	unsigned char reg;
 63	static const struct snd_device_ops ops = {
 64		.dev_free =     snd_ak4113_dev_free,
 65	};
 66
 67	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
 68	if (chip == NULL)
 69		return -ENOMEM;
 70	spin_lock_init(&chip->lock);
 71	chip->card = card;
 72	chip->read = read;
 73	chip->write = write;
 74	chip->private_data = private_data;
 75	INIT_DELAYED_WORK(&chip->work, ak4113_stats);
 76	atomic_set(&chip->wq_processing, 0);
 77	mutex_init(&chip->reinit_mutex);
 78
 79	for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++)
 80		chip->regmap[reg] = pgm[reg];
 81	ak4113_init_regs(chip);
 82
 83	chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT |
 84			AK4113_CINT | AK4113_STC);
 85	chip->rcs1 = reg_read(chip, AK4113_REG_RCS1);
 86	chip->rcs2 = reg_read(chip, AK4113_REG_RCS2);
 87	err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops);
 88	if (err < 0)
 89		goto __fail;
 90
 91	if (r_ak4113)
 92		*r_ak4113 = chip;
 93	return 0;
 94
 95__fail:
 96	snd_ak4113_free(chip);
 97	return err;
 98}
 99EXPORT_SYMBOL_GPL(snd_ak4113_create);
100
101void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg,
102		unsigned char mask, unsigned char val)
103{
104	if (reg >= AK4113_WRITABLE_REGS)
105		return;
106	reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
107}
108EXPORT_SYMBOL_GPL(snd_ak4113_reg_write);
109
110static void ak4113_init_regs(struct ak4113 *chip)
111{
112	unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg;
113
114	/* bring the chip to reset state and powerdown state */
115	reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN));
116	udelay(200);
117	/* release reset, but leave powerdown */
118	reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN);
119	udelay(200);
120	for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++)
121		reg_write(chip, reg, chip->regmap[reg]);
122	/* release powerdown, everything is initialized now */
123	reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN);
124}
125
126void snd_ak4113_reinit(struct ak4113 *chip)
127{
128	if (atomic_inc_return(&chip->wq_processing) == 1)
129		cancel_delayed_work_sync(&chip->work);
130	scoped_guard(mutex, &chip->reinit_mutex) {
131		ak4113_init_regs(chip);
132	}
133	/* bring up statistics / event queing */
134	if (atomic_dec_and_test(&chip->wq_processing))
135		schedule_delayed_work(&chip->work, HZ / 10);
136}
137EXPORT_SYMBOL_GPL(snd_ak4113_reinit);
138
139static unsigned int external_rate(unsigned char rcs1)
140{
141	switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) {
142	case AK4113_FS_8000HZ:
143		return 8000;
144	case AK4113_FS_11025HZ:
145		return 11025;
146	case AK4113_FS_16000HZ:
147		return 16000;
148	case AK4113_FS_22050HZ:
149		return 22050;
150	case AK4113_FS_24000HZ:
151		return 24000;
152	case AK4113_FS_32000HZ:
153		return 32000;
154	case AK4113_FS_44100HZ:
155		return 44100;
156	case AK4113_FS_48000HZ:
157		return 48000;
158	case AK4113_FS_64000HZ:
159		return 64000;
160	case AK4113_FS_88200HZ:
161		return 88200;
162	case AK4113_FS_96000HZ:
163		return 96000;
164	case AK4113_FS_176400HZ:
165		return 176400;
166	case AK4113_FS_192000HZ:
167		return 192000;
168	default:
169		return 0;
170	}
171}
172
173static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol,
174				    struct snd_ctl_elem_info *uinfo)
175{
176	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
177	uinfo->count = 1;
178	uinfo->value.integer.min = 0;
179	uinfo->value.integer.max = LONG_MAX;
180	return 0;
181}
182
183static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol,
184				   struct snd_ctl_elem_value *ucontrol)
185{
186	struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
187
188	guard(spinlock_irq)(&chip->lock);
189	ucontrol->value.integer.value[0] =
190		chip->errors[kcontrol->private_value];
191	chip->errors[kcontrol->private_value] = 0;
192	return 0;
193}
194
195#define snd_ak4113_in_bit_info		snd_ctl_boolean_mono_info
196
197static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol,
198				 struct snd_ctl_elem_value *ucontrol)
199{
200	struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
201	unsigned char reg = kcontrol->private_value & 0xff;
202	unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
203	unsigned char inv = (kcontrol->private_value >> 31) & 1;
204
205	ucontrol->value.integer.value[0] =
206		((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
207	return 0;
208}
209
210static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol,
211			      struct snd_ctl_elem_info *uinfo)
212{
213	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
214	uinfo->count = 1;
215	uinfo->value.integer.min = 0;
216	uinfo->value.integer.max = 5;
217	return 0;
218}
219
220static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol,
221			     struct snd_ctl_elem_value *ucontrol)
222{
223	struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
224
225	ucontrol->value.integer.value[0] =
226		(AK4113_IPS(chip->regmap[AK4113_REG_IO1]));
227	return 0;
228}
229
230static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol,
231			     struct snd_ctl_elem_value *ucontrol)
232{
233	struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
234	int change;
235	u8 old_val;
236
237	guard(spinlock_irq)(&chip->lock);
238	old_val = chip->regmap[AK4113_REG_IO1];
239	change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val);
240	if (change)
241		reg_write(chip, AK4113_REG_IO1,
242				(old_val & (~AK4113_IPS(0xff))) |
243				(AK4113_IPS(ucontrol->value.integer.value[0])));
244	return change;
245}
246
247static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol,
248				struct snd_ctl_elem_info *uinfo)
249{
250	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
251	uinfo->count = 1;
252	uinfo->value.integer.min = 0;
253	uinfo->value.integer.max = 192000;
254	return 0;
255}
256
257static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol,
258			       struct snd_ctl_elem_value *ucontrol)
259{
260	struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
261
262	ucontrol->value.integer.value[0] = external_rate(reg_read(chip,
263				AK4113_REG_RCS1));
264	return 0;
265}
266
267static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol,
268		struct snd_ctl_elem_info *uinfo)
269{
270	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
271	uinfo->count = 1;
272	return 0;
273}
274
275static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol,
276				struct snd_ctl_elem_value *ucontrol)
277{
278	struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
279	unsigned i;
280
281	for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++)
282		ucontrol->value.iec958.status[i] = reg_read(chip,
283				AK4113_REG_RXCSB0 + i);
284	return 0;
285}
286
287static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol,
288		struct snd_ctl_elem_info *uinfo)
289{
290	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
291	uinfo->count = 1;
292	return 0;
293}
294
295static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol,
296				      struct snd_ctl_elem_value *ucontrol)
297{
298	memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE);
299	return 0;
300}
301
302static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol,
303		struct snd_ctl_elem_info *uinfo)
304{
305	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
306	uinfo->value.integer.min = 0;
307	uinfo->value.integer.max = 0xffff;
308	uinfo->count = 4;
309	return 0;
310}
311
312static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol,
313				 struct snd_ctl_elem_value *ucontrol)
314{
315	struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
316	unsigned short tmp;
317
318	ucontrol->value.integer.value[0] = 0xf8f2;
319	ucontrol->value.integer.value[1] = 0x4e1f;
320	tmp = reg_read(chip, AK4113_REG_Pc0) |
321		(reg_read(chip, AK4113_REG_Pc1) << 8);
322	ucontrol->value.integer.value[2] = tmp;
323	tmp = reg_read(chip, AK4113_REG_Pd0) |
324		(reg_read(chip, AK4113_REG_Pd1) << 8);
325	ucontrol->value.integer.value[3] = tmp;
326	return 0;
327}
328
329static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol,
330		struct snd_ctl_elem_info *uinfo)
331{
332	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
333	uinfo->count = AK4113_REG_QSUB_SIZE;
334	return 0;
335}
336
337static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol,
338				 struct snd_ctl_elem_value *ucontrol)
339{
340	struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
341	unsigned i;
342
343	for (i = 0; i < AK4113_REG_QSUB_SIZE; i++)
344		ucontrol->value.bytes.data[i] = reg_read(chip,
345				AK4113_REG_QSUB_ADDR + i);
346	return 0;
347}
348
349/* Don't forget to change AK4113_CONTROLS define!!! */
350static const struct snd_kcontrol_new snd_ak4113_iec958_controls[] = {
351{
352	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
353	.name =		"IEC958 Parity Errors",
354	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
355		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
356	.info =		snd_ak4113_in_error_info,
357	.get =		snd_ak4113_in_error_get,
358	.private_value = AK4113_PARITY_ERRORS,
359},
360{
361	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
362	.name =		"IEC958 V-Bit Errors",
363	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
364		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
365	.info =		snd_ak4113_in_error_info,
366	.get =		snd_ak4113_in_error_get,
367	.private_value = AK4113_V_BIT_ERRORS,
368},
369{
370	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
371	.name =		"IEC958 C-CRC Errors",
372	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
373		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
374	.info =		snd_ak4113_in_error_info,
375	.get =		snd_ak4113_in_error_get,
376	.private_value = AK4113_CCRC_ERRORS,
377},
378{
379	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
380	.name =		"IEC958 Q-CRC Errors",
381	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
382		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
383	.info =		snd_ak4113_in_error_info,
384	.get =		snd_ak4113_in_error_get,
385	.private_value = AK4113_QCRC_ERRORS,
386},
387{
388	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
389	.name =		"IEC958 External Rate",
390	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
391		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
392	.info =		snd_ak4113_rate_info,
393	.get =		snd_ak4113_rate_get,
394},
395{
396	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
397	.name =		SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
398	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
399	.info =		snd_ak4113_spdif_mask_info,
400	.get =		snd_ak4113_spdif_mask_get,
401},
402{
403	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
404	.name =		SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
405	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
406		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
407	.info =		snd_ak4113_spdif_info,
408	.get =		snd_ak4113_spdif_get,
409},
410{
411	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
412	.name =		"IEC958 Preamble Capture Default",
413	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
414		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
415	.info =		snd_ak4113_spdif_pinfo,
416	.get =		snd_ak4113_spdif_pget,
417},
418{
419	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
420	.name =		"IEC958 Q-subcode Capture Default",
421	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
422		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
423	.info =		snd_ak4113_spdif_qinfo,
424	.get =		snd_ak4113_spdif_qget,
425},
426{
427	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
428	.name =		"IEC958 Audio",
429	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
430		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
431	.info =		snd_ak4113_in_bit_info,
432	.get =		snd_ak4113_in_bit_get,
433	.private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0,
434},
435{
436	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
437	.name =		"IEC958 Non-PCM Bitstream",
438	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
439		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
440	.info =		snd_ak4113_in_bit_info,
441	.get =		snd_ak4113_in_bit_get,
442	.private_value = (0<<8) | AK4113_REG_RCS1,
443},
444{
445	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
446	.name =		"IEC958 DTS Bitstream",
447	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
448		SNDRV_CTL_ELEM_ACCESS_VOLATILE,
449	.info =		snd_ak4113_in_bit_info,
450	.get =		snd_ak4113_in_bit_get,
451	.private_value = (1<<8) | AK4113_REG_RCS1,
452},
453{
454	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
455	.name =		"AK4113 Input Select",
456	.access =	SNDRV_CTL_ELEM_ACCESS_READ |
457		SNDRV_CTL_ELEM_ACCESS_WRITE,
458	.info =		snd_ak4113_rx_info,
459	.get =		snd_ak4113_rx_get,
460	.put =		snd_ak4113_rx_put,
461}
462};
463
464static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry,
465		struct snd_info_buffer *buffer)
466{
467	struct ak4113 *ak4113 = entry->private_data;
468	int reg, val;
469	/* all ak4113 registers 0x00 - 0x1c */
470	for (reg = 0; reg < 0x1d; reg++) {
471		val = reg_read(ak4113, reg);
472		snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
473	}
474}
475
476static void snd_ak4113_proc_init(struct ak4113 *ak4113)
477{
478	snd_card_ro_proc_new(ak4113->card, "ak4113", ak4113,
479			     snd_ak4113_proc_regs_read);
480}
481
482int snd_ak4113_build(struct ak4113 *ak4113,
483		struct snd_pcm_substream *cap_substream)
484{
485	struct snd_kcontrol *kctl;
486	unsigned int idx;
487	int err;
488
489	if (snd_BUG_ON(!cap_substream))
490		return -EINVAL;
491	ak4113->substream = cap_substream;
492	for (idx = 0; idx < AK4113_CONTROLS; idx++) {
493		kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113);
494		if (kctl == NULL)
495			return -ENOMEM;
496		kctl->id.device = cap_substream->pcm->device;
497		kctl->id.subdevice = cap_substream->number;
498		err = snd_ctl_add(ak4113->card, kctl);
499		if (err < 0)
500			return err;
501		ak4113->kctls[idx] = kctl;
502	}
503	snd_ak4113_proc_init(ak4113);
504	/* trigger workq */
505	schedule_delayed_work(&ak4113->work, HZ / 10);
506	return 0;
507}
508EXPORT_SYMBOL_GPL(snd_ak4113_build);
509
510int snd_ak4113_external_rate(struct ak4113 *ak4113)
511{
512	unsigned char rcs1;
513
514	rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
515	return external_rate(rcs1);
516}
517EXPORT_SYMBOL_GPL(snd_ak4113_external_rate);
518
519int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags)
520{
521	struct snd_pcm_runtime *runtime =
522		ak4113->substream ? ak4113->substream->runtime : NULL;
523	unsigned long _flags;
524	int res = 0;
525	unsigned char rcs0, rcs1, rcs2;
526	unsigned char c0, c1;
527
528	rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
529	if (flags & AK4113_CHECK_NO_STAT)
530		goto __rate;
531	rcs0 = reg_read(ak4113, AK4113_REG_RCS0);
532	rcs2 = reg_read(ak4113, AK4113_REG_RCS2);
533	scoped_guard(spinlock_irqsave, &ak4113->lock) {
534		if (rcs0 & AK4113_PAR)
535			ak4113->errors[AK4113_PARITY_ERRORS]++;
536		if (rcs0 & AK4113_V)
537			ak4113->errors[AK4113_V_BIT_ERRORS]++;
538		if (rcs2 & AK4113_CCRC)
539			ak4113->errors[AK4113_CCRC_ERRORS]++;
540		if (rcs2 & AK4113_QCRC)
541			ak4113->errors[AK4113_QCRC_ERRORS]++;
542		c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
543				      AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^
544			(rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
545				 AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK));
546		c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
547				      AK4113_DAT | 0xf0)) ^
548			(rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
549				 AK4113_DAT | 0xf0));
550		ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC);
551		ak4113->rcs1 = rcs1;
552		ak4113->rcs2 = rcs2;
553	}
554
555	if (rcs0 & AK4113_PAR)
556		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
557				&ak4113->kctls[0]->id);
558	if (rcs0 & AK4113_V)
559		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
560				&ak4113->kctls[1]->id);
561	if (rcs2 & AK4113_CCRC)
562		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
563				&ak4113->kctls[2]->id);
564	if (rcs2 & AK4113_QCRC)
565		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
566				&ak4113->kctls[3]->id);
567
568	/* rate change */
569	if (c1 & 0xf0)
570		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
571				&ak4113->kctls[4]->id);
572
573	if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT))
574		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
575				&ak4113->kctls[6]->id);
576	if (c0 & AK4113_QINT)
577		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
578				&ak4113->kctls[8]->id);
579
580	if (c0 & AK4113_AUDION)
581		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
582				&ak4113->kctls[9]->id);
583	if (c1 & AK4113_NPCM)
584		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
585				&ak4113->kctls[10]->id);
586	if (c1 & AK4113_DTSCD)
587		snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
588				&ak4113->kctls[11]->id);
589
590	if (ak4113->change_callback && (c0 | c1) != 0)
591		ak4113->change_callback(ak4113, c0, c1);
592
593__rate:
594	/* compare rate */
595	res = external_rate(rcs1);
596	if (!(flags & AK4113_CHECK_NO_RATE) && runtime &&
597			(runtime->rate != res)) {
598		snd_pcm_stream_lock_irqsave(ak4113->substream, _flags);
599		if (snd_pcm_running(ak4113->substream)) {
600			snd_pcm_stop(ak4113->substream,
601					SNDRV_PCM_STATE_DRAINING);
602			wake_up(&runtime->sleep);
603			res = 1;
604		}
605		snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags);
606	}
607	return res;
608}
609EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors);
610
611static void ak4113_stats(struct work_struct *work)
612{
613	struct ak4113 *chip = container_of(work, struct ak4113, work.work);
614
615	if (atomic_inc_return(&chip->wq_processing) == 1)
616		snd_ak4113_check_rate_and_errors(chip, chip->check_flags);
617
618	if (atomic_dec_and_test(&chip->wq_processing))
619		schedule_delayed_work(&chip->work, HZ / 10);
620}
621
622#ifdef CONFIG_PM
623void snd_ak4113_suspend(struct ak4113 *chip)
624{
625	atomic_inc(&chip->wq_processing); /* don't schedule new work */
626	cancel_delayed_work_sync(&chip->work);
627}
628EXPORT_SYMBOL(snd_ak4113_suspend);
629
630void snd_ak4113_resume(struct ak4113 *chip)
631{
632	atomic_dec(&chip->wq_processing);
633	snd_ak4113_reinit(chip);
634}
635EXPORT_SYMBOL(snd_ak4113_resume);
636#endif