hda_controller.h

  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 *  Common functionality for the alsa driver code base for HD Audio.
  4 */
  5
  6#ifndef __SOUND_HDA_CONTROLLER_H
  7#define __SOUND_HDA_CONTROLLER_H
  8
  9#include <linux/timecounter.h>
 10#include <linux/interrupt.h>
 11#include <sound/core.h>
 12#include <sound/pcm.h>
 13#include <sound/initval.h>
 14#include <sound/hda_codec.h>
 15#include <sound/hda_register.h>
 16
 17#define AZX_MAX_CODECS		HDA_MAX_CODECS
 18#define AZX_DEFAULT_CODECS	4
 19
 20/* driver quirks (capabilities) */
 21/* bits 0-7 are used for indicating driver type */
 22#define AZX_DCAPS_NO_TCSEL	(1 << 8)	/* No Intel TCSEL bit */
 23#define AZX_DCAPS_NO_MSI	(1 << 9)	/* No MSI support */
 24#define AZX_DCAPS_SNOOP_MASK	(3 << 10)	/* snoop type mask */
 25#define AZX_DCAPS_SNOOP_OFF	(1 << 12)	/* snoop default off */
 26#ifdef CONFIG_SND_HDA_I915
 27#define AZX_DCAPS_I915_COMPONENT (1 << 13)	/* bind with i915 gfx */
 28#else
 29#define AZX_DCAPS_I915_COMPONENT 0		/* NOP */
 30#endif
 31/* 14 unused */
 32#define AZX_DCAPS_CTX_WORKAROUND (1 << 15)	/* X-Fi workaround */
 33#define AZX_DCAPS_POSFIX_LPIB	(1 << 16)	/* Use LPIB as default */
 34#define AZX_DCAPS_AMD_WORKAROUND (1 << 17)	/* AMD-specific workaround */
 35#define AZX_DCAPS_NO_64BIT	(1 << 18)	/* No 64bit address */
 36/* 19 unused */
 37#define AZX_DCAPS_OLD_SSYNC	(1 << 20)	/* Old SSYNC reg for ICH */
 38#define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21)	/* no buffer size alignment */
 39/* 22 unused */
 40#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23)	/* BDLE in 4k boundary */
 41/* 24 unused */
 42#define AZX_DCAPS_COUNT_LPIB_DELAY  (1 << 25)	/* Take LPIB as delay */
 43#define AZX_DCAPS_PM_RUNTIME	(1 << 26)	/* runtime PM support */
 44#define AZX_DCAPS_RETRY_PROBE	(1 << 27)	/* retry probe if no codec is configured */
 45#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28)	/* CORBRP clears itself after reset */
 46#define AZX_DCAPS_NO_MSI64      (1 << 29)	/* Stick to 32-bit MSIs */
 47#define AZX_DCAPS_SEPARATE_STREAM_TAG	(1 << 30) /* capture and playback use separate stream tag */
 48#define AZX_DCAPS_PIO_COMMANDS (1 << 31)	/* Use PIO instead of CORB for commands */
 49
 50enum {
 51	AZX_SNOOP_TYPE_NONE,
 52	AZX_SNOOP_TYPE_SCH,
 53	AZX_SNOOP_TYPE_ATI,
 54	AZX_SNOOP_TYPE_NVIDIA,
 55};
 56
 57struct azx_dev {
 58	struct hdac_stream core;
 59
 60	unsigned int irq_pending:1;
 61	/*
 62	 * For VIA:
 63	 *  A flag to ensure DMA position is 0
 64	 *  when link position is not greater than FIFO size
 65	 */
 66	unsigned int insufficient:1;
 67};
 68
 69#define azx_stream(dev)		(&(dev)->core)
 70#define stream_to_azx_dev(s)	container_of(s, struct azx_dev, core)
 71
 72struct azx;
 73
 74/* Functions to read/write to hda registers. */
 75struct hda_controller_ops {
 76	/* Disable msi if supported, PCI only */
 77	int (*disable_msi_reset_irq)(struct azx *);
 78	/* Check if current position is acceptable */
 79	int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
 80	/* enable/disable the link power */
 81	int (*link_power)(struct azx *chip, bool enable);
 82};
 83
 84struct azx_pcm {
 85	struct azx *chip;
 86	struct snd_pcm *pcm;
 87	struct hda_codec *codec;
 88	struct hda_pcm *info;
 89	struct list_head list;
 90};
 91
 92typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *);
 93typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos);
 94
 95struct azx {
 96	struct hda_bus bus;
 97
 98	struct snd_card *card;
 99	struct pci_dev *pci;
100	int dev_index;
101
102	/* chip type specific */
103	int driver_type;
104	unsigned int driver_caps;
105	int playback_streams;
106	int playback_index_offset;
107	int capture_streams;
108	int capture_index_offset;
109	int num_streams;
110	int jackpoll_interval; /* jack poll interval in jiffies */
111
112	/* Register interaction. */
113	const struct hda_controller_ops *ops;
114
115	/* position adjustment callbacks */
116	azx_get_pos_callback_t get_position[2];
117	azx_get_delay_callback_t get_delay[2];
118
119	/* locks */
120	struct mutex open_mutex; /* Prevents concurrent open/close operations */
121
122	/* PCM */
123	struct list_head pcm_list; /* azx_pcm list */
124
125	/* HD codec */
126	int  codec_probe_mask; /* copied from probe_mask option */
127	unsigned int beep_mode;
128	bool ctl_dev_id;
129
130#ifdef CONFIG_SND_HDA_PATCH_LOADER
131	const struct firmware *fw;
132#endif
133
134	/* flags */
135	int bdl_pos_adj;
136	unsigned int running:1;
137	unsigned int fallback_to_single_cmd:1;
138	unsigned int single_cmd:1;
139	unsigned int msi:1;
140	unsigned int probing:1; /* codec probing phase */
141	unsigned int snoop:1;
142	unsigned int uc_buffer:1; /* non-cached pages for stream buffers */
143	unsigned int align_buffer_size:1;
144	unsigned int disabled:1; /* disabled by vga_switcheroo */
145	unsigned int pm_prepared:1;
146
147	/* GTS present */
148	unsigned int gts_present:1;
149
150#ifdef CONFIG_SND_HDA_DSP_LOADER
151	struct azx_dev saved_azx_dev;
152#endif
153};
154
155#define azx_bus(chip)	(&(chip)->bus.core)
156#define bus_to_azx(_bus)	container_of(_bus, struct azx, bus.core)
157
158static inline bool azx_snoop(struct azx *chip)
159{
160	return !IS_ENABLED(CONFIG_X86) || chip->snoop;
161}
162
163/*
164 * macros for easy use
165 */
166
167#define azx_writel(chip, reg, value) \
168	snd_hdac_chip_writel(azx_bus(chip), reg, value)
169#define azx_readl(chip, reg) \
170	snd_hdac_chip_readl(azx_bus(chip), reg)
171#define azx_writew(chip, reg, value) \
172	snd_hdac_chip_writew(azx_bus(chip), reg, value)
173#define azx_readw(chip, reg) \
174	snd_hdac_chip_readw(azx_bus(chip), reg)
175#define azx_writeb(chip, reg, value) \
176	snd_hdac_chip_writeb(azx_bus(chip), reg, value)
177#define azx_readb(chip, reg) \
178	snd_hdac_chip_readb(azx_bus(chip), reg)
179
180#define azx_has_pm_runtime(chip) \
181	((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME)
182
183/* PCM setup */
184static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream)
185{
186	return substream->runtime->private_data;
187}
188unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev);
189unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev);
190unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev);
191
192/* Stream control. */
193void azx_stop_all_streams(struct azx *chip);
194
195/* Allocation functions. */
196#define azx_alloc_stream_pages(chip) \
197	snd_hdac_bus_alloc_stream_pages(azx_bus(chip))
198#define azx_free_stream_pages(chip) \
199	snd_hdac_bus_free_stream_pages(azx_bus(chip))
200
201/* Low level azx interface */
202void azx_init_chip(struct azx *chip, bool full_reset);
203void azx_stop_chip(struct azx *chip);
204#define azx_enter_link_reset(chip) \
205	snd_hdac_bus_enter_link_reset(azx_bus(chip))
206irqreturn_t azx_interrupt(int irq, void *dev_id);
207
208/* Codec interface */
209int azx_bus_init(struct azx *chip, const char *model);
210int azx_probe_codecs(struct azx *chip, unsigned int max_slots);
211int azx_codec_configure(struct azx *chip);
212int azx_init_streams(struct azx *chip);
213void azx_free_streams(struct azx *chip);
214
215#endif /* __SOUND_HDA_CONTROLLER_H */