acrn.h

  1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
  2/*
  3 * Userspace interface for /dev/acrn_hsm - ACRN Hypervisor Service Module
  4 *
  5 * This file can be used by applications that need to communicate with the HSM
  6 * via the ioctl interface.
  7 *
  8 * Copyright (C) 2021 Intel Corporation. All rights reserved.
  9 */
 10
 11#ifndef _UAPI_ACRN_H
 12#define _UAPI_ACRN_H
 13
 14#include <linux/types.h>
 15
 16#define ACRN_IO_REQUEST_MAX		16
 17
 18#define ACRN_IOREQ_STATE_PENDING	0
 19#define ACRN_IOREQ_STATE_COMPLETE	1
 20#define ACRN_IOREQ_STATE_PROCESSING	2
 21#define ACRN_IOREQ_STATE_FREE		3
 22
 23#define ACRN_IOREQ_TYPE_PORTIO		0
 24#define ACRN_IOREQ_TYPE_MMIO		1
 25#define ACRN_IOREQ_TYPE_PCICFG		2
 26
 27#define ACRN_IOREQ_DIR_READ		0
 28#define ACRN_IOREQ_DIR_WRITE		1
 29
 30/**
 31 * struct acrn_mmio_request - Info of a MMIO I/O request
 32 * @direction:	Access direction of this request (ACRN_IOREQ_DIR_*)
 33 * @reserved:	Reserved for alignment and should be 0
 34 * @address:	Access address of this MMIO I/O request
 35 * @size:	Access size of this MMIO I/O request
 36 * @value:	Read/write value of this MMIO I/O request
 37 */
 38struct acrn_mmio_request {
 39	__u32	direction;
 40	__u32	reserved;
 41	__u64	address;
 42	__u64	size;
 43	__u64	value;
 44};
 45
 46/**
 47 * struct acrn_pio_request - Info of a PIO I/O request
 48 * @direction:	Access direction of this request (ACRN_IOREQ_DIR_*)
 49 * @reserved:	Reserved for alignment and should be 0
 50 * @address:	Access address of this PIO I/O request
 51 * @size:	Access size of this PIO I/O request
 52 * @value:	Read/write value of this PIO I/O request
 53 */
 54struct acrn_pio_request {
 55	__u32	direction;
 56	__u32	reserved;
 57	__u64	address;
 58	__u64	size;
 59	__u32	value;
 60};
 61
 62/**
 63 * struct acrn_pci_request - Info of a PCI I/O request
 64 * @direction:	Access direction of this request (ACRN_IOREQ_DIR_*)
 65 * @reserved:	Reserved for alignment and should be 0
 66 * @size:	Access size of this PCI I/O request
 67 * @value:	Read/write value of this PIO I/O request
 68 * @bus:	PCI bus value of this PCI I/O request
 69 * @dev:	PCI device value of this PCI I/O request
 70 * @func:	PCI function value of this PCI I/O request
 71 * @reg:	PCI config space offset of this PCI I/O request
 72 *
 73 * Need keep same header layout with &struct acrn_pio_request.
 74 */
 75struct acrn_pci_request {
 76	__u32	direction;
 77	__u32	reserved[3];
 78	__u64	size;
 79	__u32	value;
 80	__u32	bus;
 81	__u32	dev;
 82	__u32	func;
 83	__u32	reg;
 84};
 85
 86/**
 87 * struct acrn_io_request - 256-byte ACRN I/O request
 88 * @type:		Type of this request (ACRN_IOREQ_TYPE_*).
 89 * @completion_polling:	Polling flag. Hypervisor will poll completion of the
 90 *			I/O request if this flag set.
 91 * @reserved0:		Reserved fields.
 92 * @reqs:		Union of different types of request. Byte offset: 64.
 93 * @reqs.pio_request:	PIO request data of the I/O request.
 94 * @reqs.pci_request:	PCI configuration space request data of the I/O request.
 95 * @reqs.mmio_request:	MMIO request data of the I/O request.
 96 * @reqs.data:		Raw data of the I/O request.
 97 * @reserved1:		Reserved fields.
 98 * @kernel_handled:	Flag indicates this request need be handled in kernel.
 99 * @processed:		The status of this request (ACRN_IOREQ_STATE_*).
100 *
101 * The state transitions of ACRN I/O request:
102 *
103 *    FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ...
104 *
105 * An I/O request in COMPLETE or FREE state is owned by the hypervisor. HSM and
106 * ACRN userspace are in charge of processing the others.
107 *
108 * On basis of the states illustrated above, a typical lifecycle of ACRN IO
109 * request would look like:
110 *
111 * Flow                 (assume the initial state is FREE)
112 * |
113 * |   Service VM vCPU 0     Service VM vCPU x      User vCPU y
114 * |
115 * |                                             hypervisor:
116 * |                                               fills in type, addr, etc.
117 * |                                               pauses the User VM vCPU y
118 * |                                               sets the state to PENDING (a)
119 * |                                               fires an upcall to Service VM
120 * |
121 * | HSM:
122 * |  scans for PENDING requests
123 * |  sets the states to PROCESSING (b)
124 * |  assigns the requests to clients (c)
125 * V
126 * |                     client:
127 * |                       scans for the assigned requests
128 * |                       handles the requests (d)
129 * |                     HSM:
130 * |                       sets states to COMPLETE
131 * |                       notifies the hypervisor
132 * |
133 * |                     hypervisor:
134 * |                       resumes User VM vCPU y (e)
135 * |
136 * |                                             hypervisor:
137 * |                                               post handling (f)
138 * V                                               sets states to FREE
139 *
140 * Note that the procedures (a) to (f) in the illustration above require to be
141 * strictly processed in the order.  One vCPU cannot trigger another request of
142 * I/O emulation before completing the previous one.
143 *
144 * Atomic and barriers are required when HSM and hypervisor accessing the state
145 * of &struct acrn_io_request.
146 *
147 */
148struct acrn_io_request {
149	__u32	type;
150	__u32	completion_polling;
151	__u32	reserved0[14];
152	union {
153		struct acrn_pio_request		pio_request;
154		struct acrn_pci_request		pci_request;
155		struct acrn_mmio_request	mmio_request;
156		__u64				data[8];
157	} reqs;
158	__u32	reserved1;
159	__u32	kernel_handled;
160	__u32	processed;
161} __attribute__((aligned(256)));
162
163struct acrn_io_request_buffer {
164	union {
165		struct acrn_io_request	req_slot[ACRN_IO_REQUEST_MAX];
166		__u8			reserved[4096];
167	};
168};
169
170/**
171 * struct acrn_ioreq_notify - The structure of ioreq completion notification
172 * @vmid:	User VM ID
173 * @reserved:	Reserved and should be 0
174 * @vcpu:	vCPU ID
175 */
176struct acrn_ioreq_notify {
177	__u16	vmid;
178	__u16	reserved;
179	__u32	vcpu;
180};
181
182/**
183 * struct acrn_vm_creation - Info to create a User VM
184 * @vmid:		User VM ID returned from the hypervisor
185 * @reserved0:		Reserved and must be 0
186 * @vcpu_num:		Number of vCPU in the VM. Return from hypervisor.
187 * @reserved1:		Reserved and must be 0
188 * @uuid:		Empty space never to be used again (used to be UUID of the VM)
189 * @vm_flag:		Flag of the VM creating. Pass to hypervisor directly.
190 * @ioreq_buf:		Service VM GPA of I/O request buffer. Pass to
191 *			hypervisor directly.
192 * @cpu_affinity:	CPU affinity of the VM. Pass to hypervisor directly.
193 * 			It's a bitmap which indicates CPUs used by the VM.
194 */
195struct acrn_vm_creation {
196	__u16	vmid;
197	__u16	reserved0;
198	__u16	vcpu_num;
199	__u16	reserved1;
200	__u8	uuid[16];
201	__u64	vm_flag;
202	__u64	ioreq_buf;
203	__u64	cpu_affinity;
204};
205
206/**
207 * struct acrn_gp_regs - General registers of a User VM
208 * @rax:	Value of register RAX
209 * @rcx:	Value of register RCX
210 * @rdx:	Value of register RDX
211 * @rbx:	Value of register RBX
212 * @rsp:	Value of register RSP
213 * @rbp:	Value of register RBP
214 * @rsi:	Value of register RSI
215 * @rdi:	Value of register RDI
216 * @r8:		Value of register R8
217 * @r9:		Value of register R9
218 * @r10:	Value of register R10
219 * @r11:	Value of register R11
220 * @r12:	Value of register R12
221 * @r13:	Value of register R13
222 * @r14:	Value of register R14
223 * @r15:	Value of register R15
224 */
225struct acrn_gp_regs {
226	__le64	rax;
227	__le64	rcx;
228	__le64	rdx;
229	__le64	rbx;
230	__le64	rsp;
231	__le64	rbp;
232	__le64	rsi;
233	__le64	rdi;
234	__le64	r8;
235	__le64	r9;
236	__le64	r10;
237	__le64	r11;
238	__le64	r12;
239	__le64	r13;
240	__le64	r14;
241	__le64	r15;
242};
243
244/**
245 * struct acrn_descriptor_ptr - Segment descriptor table of a User VM.
246 * @limit:	Limit field.
247 * @base:	Base field.
248 * @reserved:	Reserved and must be 0.
249 */
250struct acrn_descriptor_ptr {
251	__le16	limit;
252	__le64	base;
253	__le16	reserved[3];
254} __attribute__ ((__packed__));
255
256/**
257 * struct acrn_regs - Registers structure of a User VM
258 * @gprs:		General registers
259 * @gdt:		Global Descriptor Table
260 * @idt:		Interrupt Descriptor Table
261 * @rip:		Value of register RIP
262 * @cs_base:		Base of code segment selector
263 * @cr0:		Value of register CR0
264 * @cr4:		Value of register CR4
265 * @cr3:		Value of register CR3
266 * @ia32_efer:		Value of IA32_EFER MSR
267 * @rflags:		Value of regsiter RFLAGS
268 * @reserved_64:	Reserved and must be 0
269 * @cs_ar:		Attribute field of code segment selector
270 * @cs_limit:		Limit field of code segment selector
271 * @reserved_32:	Reserved and must be 0
272 * @cs_sel:		Value of code segment selector
273 * @ss_sel:		Value of stack segment selector
274 * @ds_sel:		Value of data segment selector
275 * @es_sel:		Value of extra segment selector
276 * @fs_sel:		Value of FS selector
277 * @gs_sel:		Value of GS selector
278 * @ldt_sel:		Value of LDT descriptor selector
279 * @tr_sel:		Value of TSS descriptor selector
280 */
281struct acrn_regs {
282	struct acrn_gp_regs		gprs;
283	struct acrn_descriptor_ptr	gdt;
284	struct acrn_descriptor_ptr	idt;
285
286	__le64				rip;
287	__le64				cs_base;
288	__le64				cr0;
289	__le64				cr4;
290	__le64				cr3;
291	__le64				ia32_efer;
292	__le64				rflags;
293	__le64				reserved_64[4];
294
295	__le32				cs_ar;
296	__le32				cs_limit;
297	__le32				reserved_32[3];
298
299	__le16				cs_sel;
300	__le16				ss_sel;
301	__le16				ds_sel;
302	__le16				es_sel;
303	__le16				fs_sel;
304	__le16				gs_sel;
305	__le16				ldt_sel;
306	__le16				tr_sel;
307};
308
309/**
310 * struct acrn_vcpu_regs - Info of vCPU registers state
311 * @vcpu_id:	vCPU ID
312 * @reserved:	Reserved and must be 0
313 * @vcpu_regs:	vCPU registers state
314 *
315 * This structure will be passed to hypervisor directly.
316 */
317struct acrn_vcpu_regs {
318	__u16			vcpu_id;
319	__u16			reserved[3];
320	struct acrn_regs	vcpu_regs;
321};
322
323#define	ACRN_MEM_ACCESS_RIGHT_MASK	0x00000007U
324#define	ACRN_MEM_ACCESS_READ		0x00000001U
325#define	ACRN_MEM_ACCESS_WRITE		0x00000002U
326#define	ACRN_MEM_ACCESS_EXEC		0x00000004U
327#define	ACRN_MEM_ACCESS_RWX		(ACRN_MEM_ACCESS_READ  | \
328					 ACRN_MEM_ACCESS_WRITE | \
329					 ACRN_MEM_ACCESS_EXEC)
330
331#define	ACRN_MEM_TYPE_MASK		0x000007C0U
332#define	ACRN_MEM_TYPE_WB		0x00000040U
333#define	ACRN_MEM_TYPE_WT		0x00000080U
334#define	ACRN_MEM_TYPE_UC		0x00000100U
335#define	ACRN_MEM_TYPE_WC		0x00000200U
336#define	ACRN_MEM_TYPE_WP		0x00000400U
337
338/* Memory mapping types */
339#define	ACRN_MEMMAP_RAM			0
340#define	ACRN_MEMMAP_MMIO		1
341
342/**
343 * struct acrn_vm_memmap - A EPT memory mapping info for a User VM.
344 * @type:		Type of the memory mapping (ACRM_MEMMAP_*).
345 *			Pass to hypervisor directly.
346 * @attr:		Attribute of the memory mapping.
347 *			Pass to hypervisor directly.
348 * @user_vm_pa:		Physical address of User VM.
349 *			Pass to hypervisor directly.
350 * @service_vm_pa:	Physical address of Service VM.
351 *			Pass to hypervisor directly.
352 * @vma_base:		VMA address of Service VM. Pass to hypervisor directly.
353 * @len:		Length of the memory mapping.
354 *			Pass to hypervisor directly.
355 */
356struct acrn_vm_memmap {
357	__u32	type;
358	__u32	attr;
359	__u64	user_vm_pa;
360	union {
361		__u64	service_vm_pa;
362		__u64	vma_base;
363	};
364	__u64	len;
365};
366
367/* Type of interrupt of a passthrough device */
368#define ACRN_PTDEV_IRQ_INTX	0
369#define ACRN_PTDEV_IRQ_MSI	1
370#define ACRN_PTDEV_IRQ_MSIX	2
371/**
372 * struct acrn_ptdev_irq - Interrupt data of a passthrough device.
373 * @type:		Type (ACRN_PTDEV_IRQ_*)
374 * @virt_bdf:		Virtual Bus/Device/Function
375 * @phys_bdf:		Physical Bus/Device/Function
376 * @intx:		Info of interrupt
377 * @intx.virt_pin:	Virtual IOAPIC pin
378 * @intx.phys_pin:	Physical IOAPIC pin
379 * @intx.is_pic_pin:	Is PIC pin or not
380 *
381 * This structure will be passed to hypervisor directly.
382 */
383struct acrn_ptdev_irq {
384	__u32	type;
385	__u16	virt_bdf;
386	__u16	phys_bdf;
387
388	struct {
389		__u32	virt_pin;
390		__u32	phys_pin;
391		__u32	is_pic_pin;
392	} intx;
393};
394
395/* Type of PCI device assignment */
396#define ACRN_PTDEV_QUIRK_ASSIGN	(1U << 0)
397
398#define ACRN_MMIODEV_RES_NUM	3
399#define ACRN_PCI_NUM_BARS	6
400/**
401 * struct acrn_pcidev - Info for assigning or de-assigning a PCI device
402 * @type:	Type of the assignment
403 * @virt_bdf:	Virtual Bus/Device/Function
404 * @phys_bdf:	Physical Bus/Device/Function
405 * @intr_line:	PCI interrupt line
406 * @intr_pin:	PCI interrupt pin
407 * @bar:	PCI BARs.
408 *
409 * This structure will be passed to hypervisor directly.
410 */
411struct acrn_pcidev {
412	__u32	type;
413	__u16	virt_bdf;
414	__u16	phys_bdf;
415	__u8	intr_line;
416	__u8	intr_pin;
417	__u32	bar[ACRN_PCI_NUM_BARS];
418};
419
420/**
421 * struct acrn_mmio_dev_res - MMIO device resource description
422 * @user_vm_pa:		Physical address of User VM of the MMIO region
423 *			for the MMIO device.
424 * @service_vm_pa:	Physical address of Service VM of the MMIO
425 *			region for the MMIO device.
426 * @size:		Size of the MMIO region for the MMIO device.
427 * @mem_type:		Memory type of the MMIO region for the MMIO
428 *			device.
429 */
430struct acrn_mmio_dev_res {
431	__u64	user_vm_pa;
432	__u64	service_vm_pa;
433	__u64	size;
434	__u64	mem_type;
435};
436
437/**
438 * struct acrn_mmiodev - Info for assigning or de-assigning an MMIO device
439 * @name:	Name of the MMIO device.
440 * @res:	Array of MMIO device descriptions
441 *
442 * This structure will be passed to hypervisor directly.
443 */
444struct acrn_mmiodev {
445	__u8	name[8];
446	struct acrn_mmio_dev_res res[ACRN_MMIODEV_RES_NUM];
447};
448
449/**
450 * struct acrn_vdev - Info for creating or destroying a virtual device
451 * @id:				Union of identifier of the virtual device
452 * @id.value:			Raw data of the identifier
453 * @id.fields.vendor:		Vendor id of the virtual PCI device
454 * @id.fields.device:		Device id of the virtual PCI device
455 * @id.fields.legacy_id:	ID of the virtual device if not a PCI device
456 * @slot:			Virtual Bus/Device/Function of the virtual
457 *				device
458 * @io_base:			IO resource base address of the virtual device
459 * @io_size:			IO resource size of the virtual device
460 * @args:			Arguments for the virtual device creation
461 *
462 * The created virtual device can be a PCI device or a legacy device (e.g.
463 * a virtual UART controller) and it is emulated by the hypervisor. This
464 * structure will be passed to hypervisor directly.
465 */
466struct acrn_vdev {
467	/*
468	 * the identifier of the device, the low 32 bits represent the vendor
469	 * id and device id of PCI device and the high 32 bits represent the
470	 * device number of the legacy device
471	 */
472	union {
473		__u64 value;
474		struct {
475			__le16 vendor;
476			__le16 device;
477			__le32 legacy_id;
478		} fields;
479	} id;
480
481	__u64	slot;
482	__u32	io_addr[ACRN_PCI_NUM_BARS];
483	__u32	io_size[ACRN_PCI_NUM_BARS];
484	__u8	args[128];
485};
486
487/**
488 * struct acrn_msi_entry - Info for injecting a MSI interrupt to a VM
489 * @msi_addr:	MSI addr[19:12] with dest vCPU ID
490 * @msi_data:	MSI data[7:0] with vector
491 */
492struct acrn_msi_entry {
493	__u64	msi_addr;
494	__u64	msi_data;
495};
496
497struct acrn_acpi_generic_address {
498	__u8	space_id;
499	__u8	bit_width;
500	__u8	bit_offset;
501	__u8	access_size;
502	__u64	address;
503} __attribute__ ((__packed__));
504
505/**
506 * struct acrn_cstate_data - A C state package defined in ACPI
507 * @cx_reg:	Register of the C state object
508 * @type:	Type of the C state object
509 * @latency:	The worst-case latency to enter and exit this C state
510 * @power:	The average power consumption when in this C state
511 */
512struct acrn_cstate_data {
513	struct acrn_acpi_generic_address	cx_reg;
514	__u8					type;
515	__u32					latency;
516	__u64					power;
517};
518
519/**
520 * struct acrn_pstate_data - A P state package defined in ACPI
521 * @core_frequency:	CPU frequency (in MHz).
522 * @power:		Power dissipation (in milliwatts).
523 * @transition_latency:	The worst-case latency in microseconds that CPU is
524 * 			unavailable during a transition from any P state to
525 * 			this P state.
526 * @bus_master_latency:	The worst-case latency in microseconds that Bus Masters
527 * 			are prevented from accessing memory during a transition
528 * 			from any P state to this P state.
529 * @control:		The value to be written to Performance Control Register
530 * @status:		Transition status.
531 */
532struct acrn_pstate_data {
533	__u64	core_frequency;
534	__u64	power;
535	__u64	transition_latency;
536	__u64	bus_master_latency;
537	__u64	control;
538	__u64	status;
539};
540
541#define PMCMD_TYPE_MASK		0x000000ff
542enum acrn_pm_cmd_type {
543	ACRN_PMCMD_GET_PX_CNT,
544	ACRN_PMCMD_GET_PX_DATA,
545	ACRN_PMCMD_GET_CX_CNT,
546	ACRN_PMCMD_GET_CX_DATA,
547};
548
549#define ACRN_IOEVENTFD_FLAG_PIO		0x01
550#define ACRN_IOEVENTFD_FLAG_DATAMATCH	0x02
551#define ACRN_IOEVENTFD_FLAG_DEASSIGN	0x04
552/**
553 * struct acrn_ioeventfd - Data to operate a &struct hsm_ioeventfd
554 * @fd:		The fd of eventfd associated with a hsm_ioeventfd
555 * @flags:	Logical-OR of ACRN_IOEVENTFD_FLAG_*
556 * @addr:	The start address of IO range of ioeventfd
557 * @len:	The length of IO range of ioeventfd
558 * @reserved:	Reserved and should be 0
559 * @data:	Data for data matching
560 *
561 * Without flag ACRN_IOEVENTFD_FLAG_DEASSIGN, ioctl ACRN_IOCTL_IOEVENTFD
562 * creates a &struct hsm_ioeventfd with properties originated from &struct
563 * acrn_ioeventfd. With flag ACRN_IOEVENTFD_FLAG_DEASSIGN, ioctl
564 * ACRN_IOCTL_IOEVENTFD destroys the &struct hsm_ioeventfd matching the fd.
565 */
566struct acrn_ioeventfd {
567	__u32	fd;
568	__u32	flags;
569	__u64	addr;
570	__u32	len;
571	__u32	reserved;
572	__u64	data;
573};
574
575#define ACRN_IRQFD_FLAG_DEASSIGN	0x01
576/**
577 * struct acrn_irqfd - Data to operate a &struct hsm_irqfd
578 * @fd:		The fd of eventfd associated with a hsm_irqfd
579 * @flags:	Logical-OR of ACRN_IRQFD_FLAG_*
580 * @msi:	Info of MSI associated with the irqfd
581 */
582struct acrn_irqfd {
583	__s32			fd;
584	__u32			flags;
585	struct acrn_msi_entry	msi;
586};
587
588/* The ioctl type, documented in ioctl-number.rst */
589#define ACRN_IOCTL_TYPE			0xA2
590
591/*
592 * Common IOCTL IDs definition for ACRN userspace
593 */
594#define ACRN_IOCTL_CREATE_VM		\
595	_IOWR(ACRN_IOCTL_TYPE, 0x10, struct acrn_vm_creation)
596#define ACRN_IOCTL_DESTROY_VM		\
597	_IO(ACRN_IOCTL_TYPE, 0x11)
598#define ACRN_IOCTL_START_VM		\
599	_IO(ACRN_IOCTL_TYPE, 0x12)
600#define ACRN_IOCTL_PAUSE_VM		\
601	_IO(ACRN_IOCTL_TYPE, 0x13)
602#define ACRN_IOCTL_RESET_VM		\
603	_IO(ACRN_IOCTL_TYPE, 0x15)
604#define ACRN_IOCTL_SET_VCPU_REGS	\
605	_IOW(ACRN_IOCTL_TYPE, 0x16, struct acrn_vcpu_regs)
606
607#define ACRN_IOCTL_INJECT_MSI		\
608	_IOW(ACRN_IOCTL_TYPE, 0x23, struct acrn_msi_entry)
609#define ACRN_IOCTL_VM_INTR_MONITOR	\
610	_IOW(ACRN_IOCTL_TYPE, 0x24, unsigned long)
611#define ACRN_IOCTL_SET_IRQLINE		\
612	_IOW(ACRN_IOCTL_TYPE, 0x25, __u64)
613
614#define ACRN_IOCTL_NOTIFY_REQUEST_FINISH \
615	_IOW(ACRN_IOCTL_TYPE, 0x31, struct acrn_ioreq_notify)
616#define ACRN_IOCTL_CREATE_IOREQ_CLIENT	\
617	_IO(ACRN_IOCTL_TYPE, 0x32)
618#define ACRN_IOCTL_ATTACH_IOREQ_CLIENT	\
619	_IO(ACRN_IOCTL_TYPE, 0x33)
620#define ACRN_IOCTL_DESTROY_IOREQ_CLIENT	\
621	_IO(ACRN_IOCTL_TYPE, 0x34)
622#define ACRN_IOCTL_CLEAR_VM_IOREQ	\
623	_IO(ACRN_IOCTL_TYPE, 0x35)
624
625#define ACRN_IOCTL_SET_MEMSEG		\
626	_IOW(ACRN_IOCTL_TYPE, 0x41, struct acrn_vm_memmap)
627#define ACRN_IOCTL_UNSET_MEMSEG		\
628	_IOW(ACRN_IOCTL_TYPE, 0x42, struct acrn_vm_memmap)
629
630#define ACRN_IOCTL_SET_PTDEV_INTR	\
631	_IOW(ACRN_IOCTL_TYPE, 0x53, struct acrn_ptdev_irq)
632#define ACRN_IOCTL_RESET_PTDEV_INTR	\
633	_IOW(ACRN_IOCTL_TYPE, 0x54, struct acrn_ptdev_irq)
634#define ACRN_IOCTL_ASSIGN_PCIDEV	\
635	_IOW(ACRN_IOCTL_TYPE, 0x55, struct acrn_pcidev)
636#define ACRN_IOCTL_DEASSIGN_PCIDEV	\
637	_IOW(ACRN_IOCTL_TYPE, 0x56, struct acrn_pcidev)
638#define ACRN_IOCTL_ASSIGN_MMIODEV	\
639	_IOW(ACRN_IOCTL_TYPE, 0x57, struct acrn_mmiodev)
640#define ACRN_IOCTL_DEASSIGN_MMIODEV	\
641	_IOW(ACRN_IOCTL_TYPE, 0x58, struct acrn_mmiodev)
642#define ACRN_IOCTL_CREATE_VDEV	\
643	_IOW(ACRN_IOCTL_TYPE, 0x59, struct acrn_vdev)
644#define ACRN_IOCTL_DESTROY_VDEV	\
645	_IOW(ACRN_IOCTL_TYPE, 0x5A, struct acrn_vdev)
646
647#define ACRN_IOCTL_PM_GET_CPU_STATE	\
648	_IOWR(ACRN_IOCTL_TYPE, 0x60, __u64)
649
650#define ACRN_IOCTL_IOEVENTFD		\
651	_IOW(ACRN_IOCTL_TYPE, 0x70, struct acrn_ioeventfd)
652#define ACRN_IOCTL_IRQFD		\
653	_IOW(ACRN_IOCTL_TYPE, 0x71, struct acrn_irqfd)
654
655#endif /* _UAPI_ACRN_H */