ti-emif-sram.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * TI AM33XX EMIF Routines
  4 *
  5 * Copyright (C) 2016-2017 Texas Instruments Inc.
  6 *	Dave Gerlach
  7 */
  8#ifndef __LINUX_TI_EMIF_H
  9#define __LINUX_TI_EMIF_H
 10
 11#include <linux/kbuild.h>
 12#include <linux/types.h>
 13#ifndef __ASSEMBLY__
 14
 15struct emif_regs_amx3 {
 16	u32 emif_sdcfg_val;
 17	u32 emif_timing1_val;
 18	u32 emif_timing2_val;
 19	u32 emif_timing3_val;
 20	u32 emif_ref_ctrl_val;
 21	u32 emif_zqcfg_val;
 22	u32 emif_pmcr_val;
 23	u32 emif_pmcr_shdw_val;
 24	u32 emif_rd_wr_level_ramp_ctrl;
 25	u32 emif_rd_wr_exec_thresh;
 26	u32 emif_cos_config;
 27	u32 emif_priority_to_cos_mapping;
 28	u32 emif_connect_id_serv_1_map;
 29	u32 emif_connect_id_serv_2_map;
 30	u32 emif_ocp_config_val;
 31	u32 emif_lpddr2_nvm_tim;
 32	u32 emif_lpddr2_nvm_tim_shdw;
 33	u32 emif_dll_calib_ctrl_val;
 34	u32 emif_dll_calib_ctrl_val_shdw;
 35	u32 emif_ddr_phy_ctlr_1;
 36	u32 emif_ext_phy_ctrl_vals[120];
 37};
 38
 39struct ti_emif_pm_data {
 40	void __iomem *ti_emif_base_addr_virt;
 41	phys_addr_t ti_emif_base_addr_phys;
 42	unsigned long ti_emif_sram_config;
 43	struct emif_regs_amx3 *regs_virt;
 44	phys_addr_t regs_phys;
 45} __packed __aligned(8);
 46
 47struct ti_emif_pm_functions {
 48	u32 save_context;
 49	u32 restore_context;
 50	u32 run_hw_leveling;
 51	u32 enter_sr;
 52	u32 exit_sr;
 53	u32 abort_sr;
 54} __packed __aligned(8);
 55
 56static inline void ti_emif_asm_offsets(void)
 57{
 58	DEFINE(EMIF_SDCFG_VAL_OFFSET,
 59	       offsetof(struct emif_regs_amx3, emif_sdcfg_val));
 60	DEFINE(EMIF_TIMING1_VAL_OFFSET,
 61	       offsetof(struct emif_regs_amx3, emif_timing1_val));
 62	DEFINE(EMIF_TIMING2_VAL_OFFSET,
 63	       offsetof(struct emif_regs_amx3, emif_timing2_val));
 64	DEFINE(EMIF_TIMING3_VAL_OFFSET,
 65	       offsetof(struct emif_regs_amx3, emif_timing3_val));
 66	DEFINE(EMIF_REF_CTRL_VAL_OFFSET,
 67	       offsetof(struct emif_regs_amx3, emif_ref_ctrl_val));
 68	DEFINE(EMIF_ZQCFG_VAL_OFFSET,
 69	       offsetof(struct emif_regs_amx3, emif_zqcfg_val));
 70	DEFINE(EMIF_PMCR_VAL_OFFSET,
 71	       offsetof(struct emif_regs_amx3, emif_pmcr_val));
 72	DEFINE(EMIF_PMCR_SHDW_VAL_OFFSET,
 73	       offsetof(struct emif_regs_amx3, emif_pmcr_shdw_val));
 74	DEFINE(EMIF_RD_WR_LEVEL_RAMP_CTRL_OFFSET,
 75	       offsetof(struct emif_regs_amx3, emif_rd_wr_level_ramp_ctrl));
 76	DEFINE(EMIF_RD_WR_EXEC_THRESH_OFFSET,
 77	       offsetof(struct emif_regs_amx3, emif_rd_wr_exec_thresh));
 78	DEFINE(EMIF_COS_CONFIG_OFFSET,
 79	       offsetof(struct emif_regs_amx3, emif_cos_config));
 80	DEFINE(EMIF_PRIORITY_TO_COS_MAPPING_OFFSET,
 81	       offsetof(struct emif_regs_amx3, emif_priority_to_cos_mapping));
 82	DEFINE(EMIF_CONNECT_ID_SERV_1_MAP_OFFSET,
 83	       offsetof(struct emif_regs_amx3, emif_connect_id_serv_1_map));
 84	DEFINE(EMIF_CONNECT_ID_SERV_2_MAP_OFFSET,
 85	       offsetof(struct emif_regs_amx3, emif_connect_id_serv_2_map));
 86	DEFINE(EMIF_OCP_CONFIG_VAL_OFFSET,
 87	       offsetof(struct emif_regs_amx3, emif_ocp_config_val));
 88	DEFINE(EMIF_LPDDR2_NVM_TIM_OFFSET,
 89	       offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim));
 90	DEFINE(EMIF_LPDDR2_NVM_TIM_SHDW_OFFSET,
 91	       offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim_shdw));
 92	DEFINE(EMIF_DLL_CALIB_CTRL_VAL_OFFSET,
 93	       offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val));
 94	DEFINE(EMIF_DLL_CALIB_CTRL_VAL_SHDW_OFFSET,
 95	       offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val_shdw));
 96	DEFINE(EMIF_DDR_PHY_CTLR_1_OFFSET,
 97	       offsetof(struct emif_regs_amx3, emif_ddr_phy_ctlr_1));
 98	DEFINE(EMIF_EXT_PHY_CTRL_VALS_OFFSET,
 99	       offsetof(struct emif_regs_amx3, emif_ext_phy_ctrl_vals));
100	DEFINE(EMIF_REGS_AMX3_SIZE, sizeof(struct emif_regs_amx3));
101
102	BLANK();
103
104	DEFINE(EMIF_PM_BASE_ADDR_VIRT_OFFSET,
105	       offsetof(struct ti_emif_pm_data, ti_emif_base_addr_virt));
106	DEFINE(EMIF_PM_BASE_ADDR_PHYS_OFFSET,
107	       offsetof(struct ti_emif_pm_data, ti_emif_base_addr_phys));
108	DEFINE(EMIF_PM_CONFIG_OFFSET,
109	       offsetof(struct ti_emif_pm_data, ti_emif_sram_config));
110	DEFINE(EMIF_PM_REGS_VIRT_OFFSET,
111	       offsetof(struct ti_emif_pm_data, regs_virt));
112	DEFINE(EMIF_PM_REGS_PHYS_OFFSET,
113	       offsetof(struct ti_emif_pm_data, regs_phys));
114	DEFINE(EMIF_PM_DATA_SIZE, sizeof(struct ti_emif_pm_data));
115
116	BLANK();
117
118	DEFINE(EMIF_PM_SAVE_CONTEXT_OFFSET,
119	       offsetof(struct ti_emif_pm_functions, save_context));
120	DEFINE(EMIF_PM_RESTORE_CONTEXT_OFFSET,
121	       offsetof(struct ti_emif_pm_functions, restore_context));
122	DEFINE(EMIF_PM_RUN_HW_LEVELING,
123	       offsetof(struct ti_emif_pm_functions, run_hw_leveling));
124	DEFINE(EMIF_PM_ENTER_SR_OFFSET,
125	       offsetof(struct ti_emif_pm_functions, enter_sr));
126	DEFINE(EMIF_PM_EXIT_SR_OFFSET,
127	       offsetof(struct ti_emif_pm_functions, exit_sr));
128	DEFINE(EMIF_PM_ABORT_SR_OFFSET,
129	       offsetof(struct ti_emif_pm_functions, abort_sr));
130	DEFINE(EMIF_PM_FUNCTIONS_SIZE, sizeof(struct ti_emif_pm_functions));
131}
132
133struct gen_pool;
134
135int ti_emif_copy_pm_function_table(struct gen_pool *sram_pool, void *dst);
136int ti_emif_get_mem_type(void);
137
138#endif
139#endif /* __LINUX_TI_EMIF_H */