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cros_ec_commands.h
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linux-6.19.14/include/linux/platform_data/cros_ec_commands.h
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Host communication command constants for ChromeOS EC 4 * 5 * Copyright (C) 2012 Google, Inc 6 * 7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 9 */ 10 11/* Host communication command constants for Chrome EC */ 12 13#ifndef __CROS_EC_COMMANDS_H 14#define __CROS_EC_COMMANDS_H 15 16#include <linux/bits.h> 17#include <linux/types.h> 18 19#define BUILD_ASSERT(_cond) 20 21/* 22 * Current version of this protocol 23 * 24 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is 25 * determined in other ways. Remove this once the kernel code no longer 26 * depends on it. 27 */ 28#define EC_PROTO_VERSION 0x00000002 29 30/* Command version mask */ 31#define EC_VER_MASK(version) BIT(version) 32 33/* I/O addresses for ACPI commands */ 34#define EC_LPC_ADDR_ACPI_DATA 0x62 35#define EC_LPC_ADDR_ACPI_CMD 0x66 36 37/* I/O addresses for host command */ 38#define EC_LPC_ADDR_HOST_DATA 0x200 39#define EC_LPC_ADDR_HOST_CMD 0x204 40 41/* I/O addresses for host command args and params */ 42/* Protocol version 2 */ 43#define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 44#define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 45 * EC_PROTO2_MAX_PARAM_SIZE 46 */ 47/* Protocol version 3 */ 48#define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 49#define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 50 51/* 52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 53 * and they tell the kernel that so we have to think of it as two parts. 54 * 55 * Other BIOSes report only the I/O port region spanned by the Microchip 56 * MEC series EC; an attempt to address a larger region may fail. 57 */ 58#define EC_HOST_CMD_REGION0 0x800 59#define EC_HOST_CMD_REGION1 0x880 60#define EC_HOST_CMD_REGION_SIZE 0x80 61#define EC_HOST_CMD_MEC_REGION_SIZE 0x8 62 63/* EC command register bit functions */ 64#define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ 65#define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 66#define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ 67#define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ 68#define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ 69#define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ 70#define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ 71 72#define EC_LPC_ADDR_MEMMAP 0x900 73#define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 74#define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 75 76/* The offset address of each type of data in mapped memory. */ 77#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ 78#define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ 79#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ 80#define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ 81#define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 82#define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 83#define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 84#define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 85#define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 86#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ 87/* Unused 0x28 - 0x2f */ 88#define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 89/* Unused 0x31 - 0x33 */ 90#define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ 91/* Battery values are all 32 bits, unless otherwise noted. */ 92#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 93#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 94#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 95#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ 96#define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ 97#define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ 98/* Unused 0x4f */ 99#define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 100#define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 101#define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 102#define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 103/* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ 104#define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 105#define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 106#define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 107#define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 108#define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ 109/* Unused 0x84 - 0x8f */ 110#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 111/* Unused 0x91 */ 112#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 113/* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 114/* 0x94 - 0x99: 1st Accelerometer */ 115/* 0x9a - 0x9f: 2nd Accelerometer */ 116#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 117/* Unused 0xa6 - 0xdf */ 118 119/* 120 * ACPI is unable to access memory mapped data at or above this offset due to 121 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 122 * which might be needed by ACPI. 123 */ 124#define EC_MEMMAP_NO_ACPI 0xe0 125 126/* Define the format of the accelerometer mapped memory status byte. */ 127#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 128#define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) 129#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) 130 131/* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 132#define EC_TEMP_SENSOR_ENTRIES 16 133/* 134 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 135 * 136 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 137 */ 138#define EC_TEMP_SENSOR_B_ENTRIES 8 139 140/* Special values for mapped temperature sensors */ 141#define EC_TEMP_SENSOR_NOT_PRESENT 0xff 142#define EC_TEMP_SENSOR_ERROR 0xfe 143#define EC_TEMP_SENSOR_NOT_POWERED 0xfd 144#define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 145/* 146 * The offset of temperature value stored in mapped memory. This allows 147 * reporting a temperature range of 200K to 454K = -73C to 181C. 148 */ 149#define EC_TEMP_SENSOR_OFFSET 200 150 151/* 152 * Number of ALS readings at EC_MEMMAP_ALS 153 */ 154#define EC_ALS_ENTRIES 2 155 156/* 157 * The default value a temperature sensor will return when it is present but 158 * has not been read this boot. This is a reasonable number to avoid 159 * triggering alarms on the host. 160 */ 161#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) 162 163#define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 164#define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 165#define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 166 167/* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 168#define EC_BATT_FLAG_AC_PRESENT 0x01 169#define EC_BATT_FLAG_BATT_PRESENT 0x02 170#define EC_BATT_FLAG_DISCHARGING 0x04 171#define EC_BATT_FLAG_CHARGING 0x08 172#define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 173/* Set if some of the static/dynamic data is invalid (or outdated). */ 174#define EC_BATT_FLAG_INVALID_DATA 0x20 175 176/* Switch flags at EC_MEMMAP_SWITCHES */ 177#define EC_SWITCH_LID_OPEN 0x01 178#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 179#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 180/* Was recovery requested via keyboard; now unused. */ 181#define EC_SWITCH_IGNORE1 0x08 182/* Recovery requested via dedicated signal (from servo board) */ 183#define EC_SWITCH_DEDICATED_RECOVERY 0x10 184/* Was fake developer mode switch; now unused. Remove in next refactor. */ 185#define EC_SWITCH_IGNORE0 0x20 186 187/* Host command interface flags */ 188/* Host command interface supports LPC args (LPC interface only) */ 189#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 190/* Host command interface supports version 3 protocol */ 191#define EC_HOST_CMD_FLAG_VERSION_3 0x02 192 193/* Wireless switch flags */ 194#define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ 195#define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ 196#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ 197#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 198#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 199 200/*****************************************************************************/ 201/* 202 * ACPI commands 203 * 204 * These are valid ONLY on the ACPI command/data port. 205 */ 206 207/* 208 * ACPI Read Embedded Controller 209 * 210 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 211 * 212 * Use the following sequence: 213 * 214 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 215 * - Wait for EC_LPC_CMDR_PENDING bit to clear 216 * - Write address to EC_LPC_ADDR_ACPI_DATA 217 * - Wait for EC_LPC_CMDR_DATA bit to set 218 * - Read value from EC_LPC_ADDR_ACPI_DATA 219 */ 220#define EC_CMD_ACPI_READ 0x0080 221 222/* 223 * ACPI Write Embedded Controller 224 * 225 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 226 * 227 * Use the following sequence: 228 * 229 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 230 * - Wait for EC_LPC_CMDR_PENDING bit to clear 231 * - Write address to EC_LPC_ADDR_ACPI_DATA 232 * - Wait for EC_LPC_CMDR_PENDING bit to clear 233 * - Write value to EC_LPC_ADDR_ACPI_DATA 234 */ 235#define EC_CMD_ACPI_WRITE 0x0081 236 237/* 238 * ACPI Burst Enable Embedded Controller 239 * 240 * This enables burst mode on the EC to allow the host to issue several 241 * commands back-to-back. While in this mode, writes to mapped multi-byte 242 * data are locked out to ensure data consistency. 243 */ 244#define EC_CMD_ACPI_BURST_ENABLE 0x0082 245 246/* 247 * ACPI Burst Disable Embedded Controller 248 * 249 * This disables burst mode on the EC and stops preventing EC writes to mapped 250 * multi-byte data. 251 */ 252#define EC_CMD_ACPI_BURST_DISABLE 0x0083 253 254/* 255 * ACPI Query Embedded Controller 256 * 257 * This clears the lowest-order bit in the currently pending host events, and 258 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 259 * event 0x80000000 = 32), or 0 if no event was pending. 260 */ 261#define EC_CMD_ACPI_QUERY_EVENT 0x0084 262 263/* Valid addresses in ACPI memory space, for read/write commands */ 264 265/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 266#define EC_ACPI_MEM_VERSION 0x00 267/* 268 * Test location; writing value here updates test compliment byte to (0xff - 269 * value). 270 */ 271#define EC_ACPI_MEM_TEST 0x01 272/* Test compliment; writes here are ignored. */ 273#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 274 275/* Keyboard backlight brightness percent (0 - 100) */ 276#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 277/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 278#define EC_ACPI_MEM_FAN_DUTY 0x04 279 280/* 281 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 282 * independent thresholds attached to them. The current value of the ID 283 * register determines which sensor is affected by the THRESHOLD and COMMIT 284 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 285 * as the memory-mapped sensors. The COMMIT register applies those settings. 286 * 287 * The spec does not mandate any way to read back the threshold settings 288 * themselves, but when a threshold is crossed the AP needs a way to determine 289 * which sensor(s) are responsible. Each reading of the ID register clears and 290 * returns one sensor ID that has crossed one of its threshold (in either 291 * direction) since the last read. A value of 0xFF means "no new thresholds 292 * have tripped". Setting or enabling the thresholds for a sensor will clear 293 * the unread event count for that sensor. 294 */ 295#define EC_ACPI_MEM_TEMP_ID 0x05 296#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 297#define EC_ACPI_MEM_TEMP_COMMIT 0x07 298/* 299 * Here are the bits for the COMMIT register: 300 * bit 0 selects the threshold index for the chosen sensor (0/1) 301 * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 302 * Each write to the commit register affects one threshold. 303 */ 304#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) 305#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) 306/* 307 * Example: 308 * 309 * Set the thresholds for sensor 2 to 50 C and 60 C: 310 * write 2 to [0x05] -- select temp sensor 2 311 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 312 * write 0x2 to [0x07] -- enable threshold 0 with this value 313 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 314 * write 0x3 to [0x07] -- enable threshold 1 with this value 315 * 316 * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 317 * write 2 to [0x05] -- select temp sensor 2 318 * write 0x1 to [0x07] -- disable threshold 1 319 */ 320 321/* DPTF battery charging current limit */ 322#define EC_ACPI_MEM_CHARGING_LIMIT 0x08 323 324/* Charging limit is specified in 64 mA steps */ 325#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 326/* Value to disable DPTF battery charging limit */ 327#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 328 329/* 330 * Report device orientation 331 * Bits Definition 332 * 3:1 Device DPTF Profile Number (DDPN) 333 * 0 = Reserved for backward compatibility (indicates no valid 334 * profile number. Host should fall back to using TBMD). 335 * 1..7 = DPTF Profile number to indicate to host which table needs 336 * to be loaded. 337 * 0 Tablet Mode Device Indicator (TBMD) 338 */ 339#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 340#define EC_ACPI_MEM_TBMD_SHIFT 0 341#define EC_ACPI_MEM_TBMD_MASK 0x1 342#define EC_ACPI_MEM_DDPN_SHIFT 1 343#define EC_ACPI_MEM_DDPN_MASK 0x7 344 345/* 346 * Report device features. Uses the same format as the host command, except: 347 * 348 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set 349 * of features", which is of limited interest when the system is already 350 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since 351 * these are supported, it defaults to 0. 352 * This allows detecting the presence of this field since older versions of 353 * the EC codebase would simply return 0xff to that unknown address. Check 354 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits 355 * are valid. 356 */ 357#define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a 358#define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b 359#define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c 360#define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d 361#define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e 362#define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f 363#define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 364#define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 365 366#define EC_ACPI_MEM_BATTERY_INDEX 0x12 367 368/* 369 * USB Port Power. Each bit indicates whether the corresponding USB ports' power 370 * is enabled (1) or disabled (0). 371 * bit 0 USB port ID 0 372 * ... 373 * bit 7 USB port ID 7 374 */ 375#define EC_ACPI_MEM_USB_PORT_POWER 0x13 376 377/* 378 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 379 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 380 */ 381#define EC_ACPI_MEM_MAPPED_BEGIN 0x20 382#define EC_ACPI_MEM_MAPPED_SIZE 0xe0 383 384/* Current version of ACPI memory address space */ 385#define EC_ACPI_MEM_VERSION_CURRENT 2 386 387 388/* 389 * This header file is used in coreboot both in C and ACPI code. The ACPI code 390 * is pre-processed to handle constants but the ASL compiler is unable to 391 * handle actual C code so keep it separate. 392 */ 393 394 395/* 396 * Attributes for EC request and response packets. Just defining __packed 397 * results in inefficient assembly code on ARM, if the structure is actually 398 * 32-bit aligned, as it should be for all buffers. 399 * 400 * Be very careful when adding these to existing structures. They will round 401 * up the structure size to the specified boundary. 402 * 403 * Also be very careful to make that if a structure is included in some other 404 * parent structure that the alignment will still be true given the packing of 405 * the parent structure. This is particularly important if the sub-structure 406 * will be passed as a pointer to another function, since that function will 407 * not know about the misaligment caused by the parent structure's packing. 408 * 409 * Also be very careful using __packed - particularly when nesting non-packed 410 * structures inside packed ones. In fact, DO NOT use __packed directly; 411 * always use one of these attributes. 412 * 413 * Once everything is annotated properly, the following search strings should 414 * not return ANY matches in this file other than right here: 415 * 416 * "__packed" - generates inefficient code; all sub-structs must also be packed 417 * 418 * "struct [^_]" - all structs should be annotated, except for structs that are 419 * members of other structs/unions (and their original declarations should be 420 * annotated). 421 */ 422 423/* 424 * Packed structures make no assumption about alignment, so they do inefficient 425 * byte-wise reads. 426 */ 427#define __ec_align1 __packed 428#define __ec_align2 __packed 429#define __ec_align4 __packed 430#define __ec_align_size1 __packed 431#define __ec_align_offset1 __packed 432#define __ec_align_offset2 __packed 433#define __ec_todo_packed __packed 434#define __ec_todo_unpacked 435 436 437/* LPC command status byte masks */ 438/* EC has written a byte in the data register and host hasn't read it yet */ 439#define EC_LPC_STATUS_TO_HOST 0x01 440/* Host has written a command/data byte and the EC hasn't read it yet */ 441#define EC_LPC_STATUS_FROM_HOST 0x02 442/* EC is processing a command */ 443#define EC_LPC_STATUS_PROCESSING 0x04 444/* Last write to EC was a command, not data */ 445#define EC_LPC_STATUS_LAST_CMD 0x08 446/* EC is in burst mode */ 447#define EC_LPC_STATUS_BURST_MODE 0x10 448/* SCI event is pending (requesting SCI query) */ 449#define EC_LPC_STATUS_SCI_PENDING 0x20 450/* SMI event is pending (requesting SMI query) */ 451#define EC_LPC_STATUS_SMI_PENDING 0x40 452/* (reserved) */ 453#define EC_LPC_STATUS_RESERVED 0x80 454 455/* 456 * EC is busy. This covers both the EC processing a command, and the host has 457 * written a new command but the EC hasn't picked it up yet. 458 */ 459#define EC_LPC_STATUS_BUSY_MASK \ 460 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 461 462/* 463 * Host command response codes (16-bit). Note that response codes should be 464 * stored in a uint16_t rather than directly in a value of this type. 465 */ 466enum ec_status { 467 EC_RES_SUCCESS = 0, 468 EC_RES_INVALID_COMMAND = 1, 469 EC_RES_ERROR = 2, 470 EC_RES_INVALID_PARAM = 3, 471 EC_RES_ACCESS_DENIED = 4, 472 EC_RES_INVALID_RESPONSE = 5, 473 EC_RES_INVALID_VERSION = 6, 474 EC_RES_INVALID_CHECKSUM = 7, 475 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 476 EC_RES_UNAVAILABLE = 9, /* No response available */ 477 EC_RES_TIMEOUT = 10, /* We got a timeout */ 478 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 479 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 480 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 481 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 482 EC_RES_BUS_ERROR = 15, /* Communications bus error */ 483 EC_RES_BUSY = 16, /* Up but too busy. Should retry */ 484 EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ 485 EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ 486 EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ 487 EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ 488}; 489 490/* 491 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 492 * EC command uses code 0 to mean "no event pending". We explicitly specify 493 * each value in the enum listing so they won't change if we delete/insert an 494 * item or rearrange the list (it needs to be stable across platforms, not 495 * just within a single compiled instance). 496 */ 497enum host_event_code { 498 EC_HOST_EVENT_LID_CLOSED = 1, 499 EC_HOST_EVENT_LID_OPEN = 2, 500 EC_HOST_EVENT_POWER_BUTTON = 3, 501 EC_HOST_EVENT_AC_CONNECTED = 4, 502 EC_HOST_EVENT_AC_DISCONNECTED = 5, 503 EC_HOST_EVENT_BATTERY_LOW = 6, 504 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 505 EC_HOST_EVENT_BATTERY = 8, 506 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 507 /* Event generated by a device attached to the EC */ 508 EC_HOST_EVENT_DEVICE = 10, 509 EC_HOST_EVENT_THERMAL = 11, 510 EC_HOST_EVENT_USB_CHARGER = 12, 511 EC_HOST_EVENT_KEY_PRESSED = 13, 512 /* 513 * EC has finished initializing the host interface. The host can check 514 * for this event following sending a EC_CMD_REBOOT_EC command to 515 * determine when the EC is ready to accept subsequent commands. 516 */ 517 EC_HOST_EVENT_INTERFACE_READY = 14, 518 /* Keyboard recovery combo has been pressed */ 519 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 520 521 /* Shutdown due to thermal overload */ 522 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 523 /* Shutdown due to battery level too low */ 524 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 525 526 /* Suggest that the AP throttle itself */ 527 EC_HOST_EVENT_THROTTLE_START = 18, 528 /* Suggest that the AP resume normal speed */ 529 EC_HOST_EVENT_THROTTLE_STOP = 19, 530 531 /* Hang detect logic detected a hang and host event timeout expired */ 532 EC_HOST_EVENT_HANG_DETECT = 20, 533 /* Hang detect logic detected a hang and warm rebooted the AP */ 534 EC_HOST_EVENT_HANG_REBOOT = 21, 535 536 /* PD MCU triggering host event */ 537 EC_HOST_EVENT_PD_MCU = 22, 538 539 /* Battery Status flags have changed */ 540 EC_HOST_EVENT_BATTERY_STATUS = 23, 541 542 /* EC encountered a panic, triggering a reset */ 543 EC_HOST_EVENT_PANIC = 24, 544 545 /* Keyboard fastboot combo has been pressed */ 546 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 547 548 /* EC RTC event occurred */ 549 EC_HOST_EVENT_RTC = 26, 550 551 /* Emulate MKBP event */ 552 EC_HOST_EVENT_MKBP = 27, 553 554 /* EC desires to change state of host-controlled USB mux */ 555 EC_HOST_EVENT_USB_MUX = 28, 556 557 /* TABLET/LAPTOP mode or detachable base attach/detach event */ 558 EC_HOST_EVENT_MODE_CHANGE = 29, 559 560 /* Keyboard recovery combo with hardware reinitialization */ 561 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 562 563 /* WoV */ 564 EC_HOST_EVENT_WOV = 31, 565 566 /* 567 * The high bit of the event mask is not used as a host event code. If 568 * it reads back as set, then the entire event mask should be 569 * considered invalid by the host. This can happen when reading the 570 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 571 * not initialized on the EC, or improperly configured on the host. 572 */ 573 EC_HOST_EVENT_INVALID = 32 574}; 575/* Host event mask */ 576#define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) 577 578/** 579 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS 580 * @flags: The host argument flags. 581 * @command_version: Command version. 582 * @data_size: The length of data. 583 * @checksum: Checksum; sum of command + flags + command_version + data_size + 584 * all params/response data bytes. 585 */ 586struct ec_lpc_host_args { 587 uint8_t flags; 588 uint8_t command_version; 589 uint8_t data_size; 590 uint8_t checksum; 591} __ec_align4; 592 593/* Flags for ec_lpc_host_args.flags */ 594/* 595 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 596 * params. 597 * 598 * If EC gets a command and this flag is not set, this is an old-style command. 599 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 600 * unknown length. EC must respond with an old-style response (that is, 601 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 602 */ 603#define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 604/* 605 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 606 * 607 * If EC responds to a command and this flag is not set, this is an old-style 608 * response. Command version is 0 and response data from EC is at 609 * EC_LPC_ADDR_OLD_PARAM with unknown length. 610 */ 611#define EC_HOST_ARGS_FLAG_TO_HOST 0x02 612 613/*****************************************************************************/ 614/* 615 * Byte codes returned by EC over SPI interface. 616 * 617 * These can be used by the AP to debug the EC interface, and to determine 618 * when the EC is not in a state where it will ever get around to responding 619 * to the AP. 620 * 621 * Example of sequence of bytes read from EC for a current good transfer: 622 * 1. - - AP asserts chip select (CS#) 623 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request 624 * 3. - - EC starts handling CS# interrupt 625 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request 626 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in 627 * bytes looking for EC_SPI_FRAME_START 628 * 6. - - EC finishes processing and sets up response 629 * 7. EC_SPI_FRAME_START - AP reads frame byte 630 * 8. (response packet) - AP reads response packet 631 * 9. EC_SPI_PAST_END - Any additional bytes read by AP 632 * 10 - - AP deasserts chip select 633 * 11 - - EC processes CS# interrupt and sets up DMA for 634 * next request 635 * 636 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than 637 * the following byte values: 638 * EC_SPI_OLD_READY 639 * EC_SPI_RX_READY 640 * EC_SPI_RECEIVING 641 * EC_SPI_PROCESSING 642 * 643 * Then the EC found an error in the request, or was not ready for the request 644 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, 645 * because the EC is unable to tell when the AP is done sending its request. 646 */ 647 648/* 649 * Framing byte which precedes a response packet from the EC. After sending a 650 * request, the AP will clock in bytes until it sees the framing byte, then 651 * clock in the response packet. 652 */ 653#define EC_SPI_FRAME_START 0xec 654 655/* 656 * Padding bytes which are clocked out after the end of a response packet. 657 */ 658#define EC_SPI_PAST_END 0xed 659 660/* 661 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects 662 * that the AP will send a valid packet header (starting with 663 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. 664 */ 665#define EC_SPI_RX_READY 0xf8 666 667/* 668 * EC has started receiving the request from the AP, but hasn't started 669 * processing it yet. 670 */ 671#define EC_SPI_RECEIVING 0xf9 672 673/* EC has received the entire request from the AP and is processing it. */ 674#define EC_SPI_PROCESSING 0xfa 675 676/* 677 * EC received bad data from the AP, such as a packet header with an invalid 678 * length. EC will ignore all data until chip select deasserts. 679 */ 680#define EC_SPI_RX_BAD_DATA 0xfb 681 682/* 683 * EC received data from the AP before it was ready. That is, the AP asserted 684 * chip select and started clocking data before the EC was ready to receive it. 685 * EC will ignore all data until chip select deasserts. 686 */ 687#define EC_SPI_NOT_READY 0xfc 688 689/* 690 * EC was ready to receive a request from the AP. EC has treated the byte sent 691 * by the AP as part of a request packet, or (for old-style ECs) is processing 692 * a fully received packet but is not ready to respond yet. 693 */ 694#define EC_SPI_OLD_READY 0xfd 695 696/*****************************************************************************/ 697 698/* 699 * Protocol version 2 for I2C and SPI send a request this way: 700 * 701 * 0 EC_CMD_VERSION0 + (command version) 702 * 1 Command number 703 * 2 Length of params = N 704 * 3..N+2 Params, if any 705 * N+3 8-bit checksum of bytes 0..N+2 706 * 707 * The corresponding response is: 708 * 709 * 0 Result code (EC_RES_*) 710 * 1 Length of params = M 711 * 2..M+1 Params, if any 712 * M+2 8-bit checksum of bytes 0..M+1 713 */ 714#define EC_PROTO2_REQUEST_HEADER_BYTES 3 715#define EC_PROTO2_REQUEST_TRAILER_BYTES 1 716#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ 717 EC_PROTO2_REQUEST_TRAILER_BYTES) 718 719#define EC_PROTO2_RESPONSE_HEADER_BYTES 2 720#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 721#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ 722 EC_PROTO2_RESPONSE_TRAILER_BYTES) 723 724/* Parameter length was limited by the LPC interface */ 725#define EC_PROTO2_MAX_PARAM_SIZE 0xfc 726 727/* Maximum request and response packet sizes for protocol version 2 */ 728#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ 729 EC_PROTO2_MAX_PARAM_SIZE) 730#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ 731 EC_PROTO2_MAX_PARAM_SIZE) 732 733/*****************************************************************************/ 734 735/* 736 * Value written to legacy command port / prefix byte to indicate protocol 737 * 3+ structs are being used. Usage is bus-dependent. 738 */ 739#define EC_COMMAND_PROTOCOL_3 0xda 740 741#define EC_HOST_REQUEST_VERSION 3 742 743/** 744 * struct ec_host_request - Version 3 request from host. 745 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it 746 * receives a header with a version it doesn't know how to 747 * parse. 748 * @checksum: Checksum of request and data; sum of all bytes including checksum 749 * should total to 0. 750 * @command: Command to send (EC_CMD_...) 751 * @command_version: Command version. 752 * @reserved: Unused byte in current protocol version; set to 0. 753 * @data_len: Length of data which follows this header. 754 */ 755struct ec_host_request { 756 uint8_t struct_version; 757 uint8_t checksum; 758 uint16_t command; 759 uint8_t command_version; 760 uint8_t reserved; 761 uint16_t data_len; 762} __ec_align4; 763 764#define EC_HOST_RESPONSE_VERSION 3 765 766/** 767 * struct ec_host_response - Version 3 response from EC. 768 * @struct_version: Struct version (=3). 769 * @checksum: Checksum of response and data; sum of all bytes including 770 * checksum should total to 0. 771 * @result: EC's response to the command (separate from communication failure) 772 * @data_len: Length of data which follows this header. 773 * @reserved: Unused bytes in current protocol version; set to 0. 774 */ 775struct ec_host_response { 776 uint8_t struct_version; 777 uint8_t checksum; 778 uint16_t result; 779 uint16_t data_len; 780 uint16_t reserved; 781} __ec_align4; 782 783/*****************************************************************************/ 784 785/* 786 * Host command protocol V4. 787 * 788 * Packets always start with a request or response header. They are followed 789 * by data_len bytes of data. If the data_crc_present flag is set, the data 790 * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1 791 * polynomial. 792 * 793 * Host algorithm when sending a request q: 794 * 795 * 101) tries_left=(some value, e.g. 3); 796 * 102) q.seq_num++ 797 * 103) q.seq_dup=0 798 * 104) Calculate q.header_crc. 799 * 105) Send request q to EC. 800 * 106) Wait for response r. Go to 201 if received or 301 if timeout. 801 * 802 * 201) If r.struct_version != 4, go to 301. 803 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. 804 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. 805 * 204) If r.seq_num != q.seq_num, go to 301. 806 * 205) If r.seq_dup == q.seq_dup, return success. 807 * 207) If r.seq_dup == 1, go to 301. 808 * 208) Return error. 809 * 810 * 301) If --tries_left <= 0, return error. 811 * 302) If q.seq_dup == 1, go to 105. 812 * 303) q.seq_dup = 1 813 * 304) Go to 104. 814 * 815 * EC algorithm when receiving a request q. 816 * EC has response buffer r, error buffer e. 817 * 818 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION 819 * and go to 301 820 * 102) If q.header_crc mismatches calculated CRC, set e.result = 821 * EC_RES_INVALID_HEADER_CRC and go to 301 822 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC 823 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC 824 * and go to 301. 825 * 104) If q.seq_dup == 0, go to 201. 826 * 105) If q.seq_num != r.seq_num, go to 201. 827 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. 828 * 829 * 201) Process request q into response r. 830 * 202) r.seq_num = q.seq_num 831 * 203) r.seq_dup = q.seq_dup 832 * 204) Calculate r.header_crc 833 * 205) If r.data_len > 0 and data is no longer available, set e.result = 834 * EC_RES_DUP_UNAVAILABLE and go to 301. 835 * 206) Send response r. 836 * 837 * 301) e.seq_num = q.seq_num 838 * 302) e.seq_dup = q.seq_dup 839 * 303) Calculate e.header_crc. 840 * 304) Send error response e. 841 */ 842 843/* Version 4 request from host */ 844struct ec_host_request4 { 845 /* 846 * bits 0-3: struct_version: Structure version (=4) 847 * bit 4: is_response: Is response (=0) 848 * bits 5-6: seq_num: Sequence number 849 * bit 7: seq_dup: Sequence duplicate flag 850 */ 851 uint8_t fields0; 852 853 /* 854 * bits 0-4: command_version: Command version 855 * bits 5-6: Reserved (set 0, ignore on read) 856 * bit 7: data_crc_present: Is data CRC present after data 857 */ 858 uint8_t fields1; 859 860 /* Command code (EC_CMD_*) */ 861 uint16_t command; 862 863 /* Length of data which follows this header (not including data CRC) */ 864 uint16_t data_len; 865 866 /* Reserved (set 0, ignore on read) */ 867 uint8_t reserved; 868 869 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 870 uint8_t header_crc; 871} __ec_align4; 872 873/* Version 4 response from EC */ 874struct ec_host_response4 { 875 /* 876 * bits 0-3: struct_version: Structure version (=4) 877 * bit 4: is_response: Is response (=1) 878 * bits 5-6: seq_num: Sequence number 879 * bit 7: seq_dup: Sequence duplicate flag 880 */ 881 uint8_t fields0; 882 883 /* 884 * bits 0-6: Reserved (set 0, ignore on read) 885 * bit 7: data_crc_present: Is data CRC present after data 886 */ 887 uint8_t fields1; 888 889 /* Result code (EC_RES_*) */ 890 uint16_t result; 891 892 /* Length of data which follows this header (not including data CRC) */ 893 uint16_t data_len; 894 895 /* Reserved (set 0, ignore on read) */ 896 uint8_t reserved; 897 898 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 899 uint8_t header_crc; 900} __ec_align4; 901 902/* Fields in fields0 byte */ 903#define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f 904#define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 905#define EC_PACKET4_0_SEQ_NUM_SHIFT 5 906#define EC_PACKET4_0_SEQ_NUM_MASK 0x60 907#define EC_PACKET4_0_SEQ_DUP_MASK 0x80 908 909/* Fields in fields1 byte */ 910#define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ 911#define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 912 913/*****************************************************************************/ 914/* 915 * Notes on commands: 916 * 917 * Each command is an 16-bit command value. Commands which take params or 918 * return response data specify structures for that data. If no structure is 919 * specified, the command does not input or output data, respectively. 920 * Parameter/response length is implicit in the structs. Some underlying 921 * communication protocols (I2C, SPI) may add length or checksum headers, but 922 * those are implementation-dependent and not defined here. 923 * 924 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 925 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 926 */ 927 928/*****************************************************************************/ 929/* General / test commands */ 930 931/* 932 * Get protocol version, used to deal with non-backward compatible protocol 933 * changes. 934 */ 935#define EC_CMD_PROTO_VERSION 0x0000 936 937/** 938 * struct ec_response_proto_version - Response to the proto version command. 939 * @version: The protocol version. 940 */ 941struct ec_response_proto_version { 942 uint32_t version; 943} __ec_align4; 944 945/* 946 * Hello. This is a simple command to test the EC is responsive to 947 * commands. 948 */ 949#define EC_CMD_HELLO 0x0001 950 951/** 952 * struct ec_params_hello - Parameters to the hello command. 953 * @in_data: Pass anything here. 954 */ 955struct ec_params_hello { 956 uint32_t in_data; 957} __ec_align4; 958 959/** 960 * struct ec_response_hello - Response to the hello command. 961 * @out_data: Output will be in_data + 0x01020304. 962 */ 963struct ec_response_hello { 964 uint32_t out_data; 965} __ec_align4; 966 967/* Get version number */ 968#define EC_CMD_GET_VERSION 0x0002 969 970enum ec_current_image { 971 EC_IMAGE_UNKNOWN = 0, 972 EC_IMAGE_RO, 973 EC_IMAGE_RW 974}; 975 976/** 977 * struct ec_response_get_version - Response to the get version command. 978 * @version_string_ro: Null-terminated RO firmware version string. 979 * @version_string_rw: Null-terminated RW firmware version string. 980 * @reserved: Unused bytes; was previously RW-B firmware version string. 981 * @current_image: One of ec_current_image. 982 */ 983struct ec_response_get_version { 984 char version_string_ro[32]; 985 char version_string_rw[32]; 986 char reserved[32]; 987 uint32_t current_image; 988} __ec_align4; 989 990/* Read test */ 991#define EC_CMD_READ_TEST 0x0003 992 993/** 994 * struct ec_params_read_test - Parameters for the read test command. 995 * @offset: Starting value for read buffer. 996 * @size: Size to read in bytes. 997 */ 998struct ec_params_read_test { 999 uint32_t offset; 1000 uint32_t size; 1001} __ec_align4; 1002 1003/** 1004 * struct ec_response_read_test - Response to the read test command. 1005 * @data: Data returned by the read test command. 1006 */ 1007struct ec_response_read_test { 1008 uint32_t data[32]; 1009} __ec_align4; 1010 1011/* 1012 * Get build information 1013 * 1014 * Response is null-terminated string. 1015 */ 1016#define EC_CMD_GET_BUILD_INFO 0x0004 1017 1018/* Get chip info */ 1019#define EC_CMD_GET_CHIP_INFO 0x0005 1020 1021/** 1022 * struct ec_response_get_chip_info - Response to the get chip info command. 1023 * @vendor: Null-terminated string for chip vendor. 1024 * @name: Null-terminated string for chip name. 1025 * @revision: Null-terminated string for chip mask version. 1026 */ 1027struct ec_response_get_chip_info { 1028 char vendor[32]; 1029 char name[32]; 1030 char revision[32]; 1031} __ec_align4; 1032 1033/* Get board HW version */ 1034#define EC_CMD_GET_BOARD_VERSION 0x0006 1035 1036/** 1037 * struct ec_response_board_version - Response to the board version command. 1038 * @board_version: A monotonously incrementing number. 1039 */ 1040struct ec_response_board_version { 1041 uint16_t board_version; 1042} __ec_align2; 1043 1044/* 1045 * Read memory-mapped data. 1046 * 1047 * This is an alternate interface to memory-mapped data for bus protocols 1048 * which don't support direct-mapped memory - I2C, SPI, etc. 1049 * 1050 * Response is params.size bytes of data. 1051 */ 1052#define EC_CMD_READ_MEMMAP 0x0007 1053 1054/** 1055 * struct ec_params_read_memmap - Parameters for the read memory map command. 1056 * @offset: Offset in memmap (EC_MEMMAP_*). 1057 * @size: Size to read in bytes. 1058 */ 1059struct ec_params_read_memmap { 1060 uint8_t offset; 1061 uint8_t size; 1062} __ec_align1; 1063 1064/* Read versions supported for a command */ 1065#define EC_CMD_GET_CMD_VERSIONS 0x0008 1066 1067/** 1068 * struct ec_params_get_cmd_versions - Parameters for the get command versions. 1069 * @cmd: Command to check. 1070 */ 1071struct ec_params_get_cmd_versions { 1072 uint8_t cmd; 1073} __ec_align1; 1074 1075/** 1076 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command 1077 * versions (v1) 1078 * @cmd: Command to check. 1079 */ 1080struct ec_params_get_cmd_versions_v1 { 1081 uint16_t cmd; 1082} __ec_align2; 1083 1084/** 1085 * struct ec_response_get_cmd_versions - Response to the get command versions. 1086 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with 1087 * a desired version. 1088 */ 1089struct ec_response_get_cmd_versions { 1090 uint32_t version_mask; 1091} __ec_align4; 1092 1093/* 1094 * Check EC communications status (busy). This is needed on i2c/spi but not 1095 * on lpc since it has its own out-of-band busy indicator. 1096 * 1097 * lpc must read the status from the command register. Attempting this on 1098 * lpc will overwrite the args/parameter space and corrupt its data. 1099 */ 1100#define EC_CMD_GET_COMMS_STATUS 0x0009 1101 1102/* Avoid using ec_status which is for return values */ 1103enum ec_comms_status { 1104 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ 1105}; 1106 1107/** 1108 * struct ec_response_get_comms_status - Response to the get comms status 1109 * command. 1110 * @flags: Mask of enum ec_comms_status. 1111 */ 1112struct ec_response_get_comms_status { 1113 uint32_t flags; /* Mask of enum ec_comms_status */ 1114} __ec_align4; 1115 1116/* Fake a variety of responses, purely for testing purposes. */ 1117#define EC_CMD_TEST_PROTOCOL 0x000A 1118 1119/* Tell the EC what to send back to us. */ 1120struct ec_params_test_protocol { 1121 uint32_t ec_result; 1122 uint32_t ret_len; 1123 uint8_t buf[32]; 1124} __ec_align4; 1125 1126/* Here it comes... */ 1127struct ec_response_test_protocol { 1128 uint8_t buf[32]; 1129} __ec_align4; 1130 1131/* Get protocol information */ 1132#define EC_CMD_GET_PROTOCOL_INFO 0x000B 1133 1134/* Flags for ec_response_get_protocol_info.flags */ 1135/* EC_RES_IN_PROGRESS may be returned if a command is slow */ 1136#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) 1137 1138/** 1139 * struct ec_response_get_protocol_info - Response to the get protocol info. 1140 * @protocol_versions: Bitmask of protocol versions supported (1 << n means 1141 * version n). 1142 * @max_request_packet_size: Maximum request packet size in bytes. 1143 * @max_response_packet_size: Maximum response packet size in bytes. 1144 * @flags: see EC_PROTOCOL_INFO_* 1145 */ 1146struct ec_response_get_protocol_info { 1147 /* Fields which exist if at least protocol version 3 supported */ 1148 uint32_t protocol_versions; 1149 uint16_t max_request_packet_size; 1150 uint16_t max_response_packet_size; 1151 uint32_t flags; 1152} __ec_align4; 1153 1154 1155/*****************************************************************************/ 1156/* Get/Set miscellaneous values */ 1157 1158/* The upper byte of .flags tells what to do (nothing means "get") */ 1159#define EC_GSV_SET 0x80000000 1160 1161/* 1162 * The lower three bytes of .flags identifies the parameter, if that has 1163 * meaning for an individual command. 1164 */ 1165#define EC_GSV_PARAM_MASK 0x00ffffff 1166 1167struct ec_params_get_set_value { 1168 uint32_t flags; 1169 uint32_t value; 1170} __ec_align4; 1171 1172struct ec_response_get_set_value { 1173 uint32_t flags; 1174 uint32_t value; 1175} __ec_align4; 1176 1177/* More than one command can use these structs to get/set parameters. */ 1178#define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1179 1180/*****************************************************************************/ 1181/* List the features supported by the firmware */ 1182#define EC_CMD_GET_FEATURES 0x000D 1183 1184/* Supported features */ 1185enum ec_feature_code { 1186 /* 1187 * This image contains a limited set of features. Another image 1188 * in RW partition may support more features. 1189 */ 1190 EC_FEATURE_LIMITED = 0, 1191 /* 1192 * Commands for probing/reading/writing/erasing the flash in the 1193 * EC are present. 1194 */ 1195 EC_FEATURE_FLASH = 1, 1196 /* 1197 * Can control the fan speed directly. 1198 */ 1199 EC_FEATURE_PWM_FAN = 2, 1200 /* 1201 * Can control the intensity of the keyboard backlight. 1202 */ 1203 EC_FEATURE_PWM_KEYB = 3, 1204 /* 1205 * Support Google lightbar, introduced on Pixel. 1206 */ 1207 EC_FEATURE_LIGHTBAR = 4, 1208 /* Control of LEDs */ 1209 EC_FEATURE_LED = 5, 1210 /* Exposes an interface to control gyro and sensors. 1211 * The host goes through the EC to access these sensors. 1212 * In addition, the EC may provide composite sensors, like lid angle. 1213 */ 1214 EC_FEATURE_MOTION_SENSE = 6, 1215 /* The keyboard is controlled by the EC */ 1216 EC_FEATURE_KEYB = 7, 1217 /* The AP can use part of the EC flash as persistent storage. */ 1218 EC_FEATURE_PSTORE = 8, 1219 /* The EC monitors BIOS port 80h, and can return POST codes. */ 1220 EC_FEATURE_PORT80 = 9, 1221 /* 1222 * Thermal management: include TMP specific commands. 1223 * Higher level than direct fan control. 1224 */ 1225 EC_FEATURE_THERMAL = 10, 1226 /* Can switch the screen backlight on/off */ 1227 EC_FEATURE_BKLIGHT_SWITCH = 11, 1228 /* Can switch the wifi module on/off */ 1229 EC_FEATURE_WIFI_SWITCH = 12, 1230 /* Monitor host events, through for example SMI or SCI */ 1231 EC_FEATURE_HOST_EVENTS = 13, 1232 /* The EC exposes GPIO commands to control/monitor connected devices. */ 1233 EC_FEATURE_GPIO = 14, 1234 /* The EC can send i2c messages to downstream devices. */ 1235 EC_FEATURE_I2C = 15, 1236 /* Command to control charger are included */ 1237 EC_FEATURE_CHARGER = 16, 1238 /* Simple battery support. */ 1239 EC_FEATURE_BATTERY = 17, 1240 /* 1241 * Support Smart battery protocol 1242 * (Common Smart Battery System Interface Specification) 1243 */ 1244 EC_FEATURE_SMART_BATTERY = 18, 1245 /* EC can detect when the host hangs. */ 1246 EC_FEATURE_HANG_DETECT = 19, 1247 /* Report power information, for pit only */ 1248 EC_FEATURE_PMU = 20, 1249 /* Another Cros EC device is present downstream of this one */ 1250 EC_FEATURE_SUB_MCU = 21, 1251 /* Support USB Power delivery (PD) commands */ 1252 EC_FEATURE_USB_PD = 22, 1253 /* Control USB multiplexer, for audio through USB port for instance. */ 1254 EC_FEATURE_USB_MUX = 23, 1255 /* Motion Sensor code has an internal software FIFO */ 1256 EC_FEATURE_MOTION_SENSE_FIFO = 24, 1257 /* Support temporary secure vstore */ 1258 EC_FEATURE_VSTORE = 25, 1259 /* EC decides on USB-C SS mux state, muxes configured by host */ 1260 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, 1261 /* EC has RTC feature that can be controlled by host commands */ 1262 EC_FEATURE_RTC = 27, 1263 /* The MCU exposes a Fingerprint sensor */ 1264 EC_FEATURE_FINGERPRINT = 28, 1265 /* The MCU exposes a Touchpad */ 1266 EC_FEATURE_TOUCHPAD = 29, 1267 /* The MCU has RWSIG task enabled */ 1268 EC_FEATURE_RWSIG = 30, 1269 /* EC has device events support */ 1270 EC_FEATURE_DEVICE_EVENT = 31, 1271 /* EC supports the unified wake masks for LPC/eSPI systems */ 1272 EC_FEATURE_UNIFIED_WAKE_MASKS = 32, 1273 /* EC supports 64-bit host events */ 1274 EC_FEATURE_HOST_EVENT64 = 33, 1275 /* EC runs code in RAM (not in place, a.k.a. XIP) */ 1276 EC_FEATURE_EXEC_IN_RAM = 34, 1277 /* EC supports CEC commands */ 1278 EC_FEATURE_CEC = 35, 1279 /* EC supports tight sensor timestamping. */ 1280 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, 1281 /* 1282 * EC supports tablet mode detection aligned to Chrome and allows 1283 * setting of threshold by host command using 1284 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. 1285 */ 1286 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, 1287 /* The MCU is a System Companion Processor (SCP). */ 1288 EC_FEATURE_SCP = 39, 1289 /* The MCU is an Integrated Sensor Hub */ 1290 EC_FEATURE_ISH = 40, 1291 /* New TCPMv2 TYPEC_ prefaced commands supported */ 1292 EC_FEATURE_TYPEC_CMD = 41, 1293 /* 1294 * The EC will wait for direction from the AP to enter Type-C alternate 1295 * modes or USB4. 1296 */ 1297 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, 1298 /* 1299 * The EC will wait for an acknowledge from the AP after setting the 1300 * mux. 1301 */ 1302 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, 1303 /* 1304 * The EC supports entering and residing in S4. 1305 */ 1306 EC_FEATURE_S4_RESIDENCY = 44, 1307 /* 1308 * The EC supports the AP directing mux sets for the board. 1309 */ 1310 EC_FEATURE_TYPEC_AP_MUX_SET = 45, 1311 /* 1312 * The EC supports the AP composing VDMs for us to send. 1313 */ 1314 EC_FEATURE_TYPEC_AP_VDM_SEND = 46, 1315 /* 1316 * The EC supports system safe mode panic recovery. 1317 */ 1318 EC_FEATURE_SYSTEM_SAFE_MODE = 47, 1319 /* 1320 * The EC will reboot on runtime assertion failures. 1321 */ 1322 EC_FEATURE_ASSERT_REBOOTS = 48, 1323 /* 1324 * The EC image is built with tokenized logging enabled. 1325 */ 1326 EC_FEATURE_TOKENIZED_LOGGING = 49, 1327 /* 1328 * The EC supports triggering an STB dump. 1329 */ 1330 EC_FEATURE_AMD_STB_DUMP = 50, 1331 /* 1332 * The EC supports memory dump commands. 1333 */ 1334 EC_FEATURE_MEMORY_DUMP = 51, 1335 /* 1336 * The EC supports DP2.1 capability 1337 */ 1338 EC_FEATURE_TYPEC_DP2_1 = 52, 1339 /* 1340 * The MCU is System Companion Processor Core 1 1341 */ 1342 EC_FEATURE_SCP_C1 = 53, 1343 /* 1344 * The EC supports UCSI PPM. 1345 */ 1346 EC_FEATURE_UCSI_PPM = 54, 1347}; 1348 1349#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) 1350#define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) 1351 1352struct ec_response_get_features { 1353 uint32_t flags[2]; 1354} __ec_align4; 1355 1356/*****************************************************************************/ 1357/* Get the board's SKU ID from EC */ 1358#define EC_CMD_GET_SKU_ID 0x000E 1359 1360/* Set SKU ID from AP */ 1361#define EC_CMD_SET_SKU_ID 0x000F 1362 1363struct ec_sku_id_info { 1364 uint32_t sku_id; 1365} __ec_align4; 1366 1367/*****************************************************************************/ 1368/* Flash commands */ 1369 1370/* Get flash info */ 1371#define EC_CMD_FLASH_INFO 0x0010 1372#define EC_VER_FLASH_INFO 2 1373 1374/** 1375 * struct ec_response_flash_info - Response to the flash info command. 1376 * @flash_size: Usable flash size in bytes. 1377 * @write_block_size: Write block size. Write offset and size must be a 1378 * multiple of this. 1379 * @erase_block_size: Erase block size. Erase offset and size must be a 1380 * multiple of this. 1381 * @protect_block_size: Protection block size. Protection offset and size 1382 * must be a multiple of this. 1383 * 1384 * Version 0 returns these fields. 1385 */ 1386struct ec_response_flash_info { 1387 uint32_t flash_size; 1388 uint32_t write_block_size; 1389 uint32_t erase_block_size; 1390 uint32_t protect_block_size; 1391} __ec_align4; 1392 1393/* 1394 * Flags for version 1+ flash info command 1395 * EC flash erases bits to 0 instead of 1. 1396 */ 1397#define EC_FLASH_INFO_ERASE_TO_0 BIT(0) 1398 1399/* 1400 * Flash must be selected for read/write/erase operations to succeed. This may 1401 * be necessary on a chip where write/erase can be corrupted by other board 1402 * activity, or where the chip needs to enable some sort of programming voltage, 1403 * or where the read/write/erase operations require cleanly suspending other 1404 * chip functionality. 1405 */ 1406#define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) 1407 1408/** 1409 * struct ec_response_flash_info_1 - Response to the flash info v1 command. 1410 * @flash_size: Usable flash size in bytes. 1411 * @write_block_size: Write block size. Write offset and size must be a 1412 * multiple of this. 1413 * @erase_block_size: Erase block size. Erase offset and size must be a 1414 * multiple of this. 1415 * @protect_block_size: Protection block size. Protection offset and size 1416 * must be a multiple of this. 1417 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if 1418 * size is exactly this and offset is a multiple of this. 1419 * For example, an EC may have a write buffer which can do 1420 * half-page operations if data is aligned, and a slower 1421 * word-at-a-time write mode. 1422 * @flags: Flags; see EC_FLASH_INFO_* 1423 * 1424 * Version 1 returns the same initial fields as version 0, with additional 1425 * fields following. 1426 * 1427 * gcc anonymous structs don't seem to get along with the __packed directive; 1428 * if they did we'd define the version 0 structure as a sub-structure of this 1429 * one. 1430 * 1431 * Version 2 supports flash banks of different sizes: 1432 * The caller specified the number of banks it has preallocated 1433 * (num_banks_desc) 1434 * The EC returns the number of banks describing the flash memory. 1435 * It adds banks descriptions up to num_banks_desc. 1436 */ 1437struct ec_response_flash_info_1 { 1438 /* Version 0 fields; see above for description */ 1439 uint32_t flash_size; 1440 uint32_t write_block_size; 1441 uint32_t erase_block_size; 1442 uint32_t protect_block_size; 1443 1444 /* Version 1 adds these fields: */ 1445 uint32_t write_ideal_size; 1446 uint32_t flags; 1447} __ec_align4; 1448 1449struct ec_params_flash_info_2 { 1450 /* Number of banks to describe */ 1451 uint16_t num_banks_desc; 1452 /* Reserved; set 0; ignore on read */ 1453 uint8_t reserved[2]; 1454} __ec_align4; 1455 1456struct ec_flash_bank { 1457 /* Number of sector is in this bank. */ 1458 uint16_t count; 1459 /* Size in power of 2 of each sector (8 --> 256 bytes) */ 1460 uint8_t size_exp; 1461 /* Minimal write size for the sectors in this bank */ 1462 uint8_t write_size_exp; 1463 /* Erase size for the sectors in this bank */ 1464 uint8_t erase_size_exp; 1465 /* Size for write protection, usually identical to erase size. */ 1466 uint8_t protect_size_exp; 1467 /* Reserved; set 0; ignore on read */ 1468 uint8_t reserved[2]; 1469}; 1470 1471struct ec_response_flash_info_2 { 1472 /* Total flash in the EC. */ 1473 uint32_t flash_size; 1474 /* Flags; see EC_FLASH_INFO_* */ 1475 uint32_t flags; 1476 /* Maximum size to use to send data to write to the EC. */ 1477 uint32_t write_ideal_size; 1478 /* Number of banks present in the EC. */ 1479 uint16_t num_banks_total; 1480 /* Number of banks described in banks array. */ 1481 uint16_t num_banks_desc; 1482 struct ec_flash_bank banks[]; 1483} __ec_align4; 1484 1485/* 1486 * Read flash 1487 * 1488 * Response is params.size bytes of data. 1489 */ 1490#define EC_CMD_FLASH_READ 0x0011 1491 1492/** 1493 * struct ec_params_flash_read - Parameters for the flash read command. 1494 * @offset: Byte offset to read. 1495 * @size: Size to read in bytes. 1496 */ 1497struct ec_params_flash_read { 1498 uint32_t offset; 1499 uint32_t size; 1500} __ec_align4; 1501 1502/* Write flash */ 1503#define EC_CMD_FLASH_WRITE 0x0012 1504#define EC_VER_FLASH_WRITE 1 1505 1506/* Version 0 of the flash command supported only 64 bytes of data */ 1507#define EC_FLASH_WRITE_VER0_SIZE 64 1508 1509/** 1510 * struct ec_params_flash_write - Parameters for the flash write command. 1511 * @offset: Byte offset to write. 1512 * @size: Size to write in bytes. 1513 */ 1514struct ec_params_flash_write { 1515 uint32_t offset; 1516 uint32_t size; 1517 /* Followed by data to write */ 1518} __ec_align4; 1519 1520/* Erase flash */ 1521#define EC_CMD_FLASH_ERASE 0x0013 1522 1523/** 1524 * struct ec_params_flash_erase - Parameters for the flash erase command, v0. 1525 * @offset: Byte offset to erase. 1526 * @size: Size to erase in bytes. 1527 */ 1528struct ec_params_flash_erase { 1529 uint32_t offset; 1530 uint32_t size; 1531} __ec_align4; 1532 1533/* 1534 * v1 add async erase: 1535 * subcommands can returns: 1536 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1537 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1538 * EC_RES_ERROR : other errors. 1539 * EC_RES_BUSY : an existing erase operation is in progress. 1540 * EC_RES_ACCESS_DENIED: Trying to erase running image. 1541 * 1542 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1543 * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1544 * the proper result. 1545 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1546 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1547 * ERASE_GET_RESULT command may timeout on EC where flash access is not 1548 * permitted while erasing. (For instance, STM32F4). 1549 */ 1550enum ec_flash_erase_cmd { 1551 FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1552 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1553 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1554}; 1555 1556/** 1557 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. 1558 * @cmd: One of ec_flash_erase_cmd. 1559 * @reserved: Pad byte; currently always contains 0. 1560 * @flag: No flags defined yet; set to 0. 1561 * @params: Same as v0 parameters. 1562 */ 1563struct ec_params_flash_erase_v1 { 1564 uint8_t cmd; 1565 uint8_t reserved; 1566 uint16_t flag; 1567 struct ec_params_flash_erase params; 1568} __ec_align4; 1569 1570/* 1571 * Get/set flash protection. 1572 * 1573 * If mask!=0, sets/clear the requested bits of flags. Depending on the 1574 * firmware write protect GPIO, not all flags will take effect immediately; 1575 * some flags require a subsequent hard reset to take effect. Check the 1576 * returned flags bits to see what actually happened. 1577 * 1578 * If mask=0, simply returns the current flags state. 1579 */ 1580#define EC_CMD_FLASH_PROTECT 0x0015 1581#define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1582 1583/* Flags for flash protection */ 1584/* RO flash code protected when the EC boots */ 1585#define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) 1586/* 1587 * RO flash code protected now. If this bit is set, at-boot status cannot 1588 * be changed. 1589 */ 1590#define EC_FLASH_PROTECT_RO_NOW BIT(1) 1591/* Entire flash code protected now, until reboot. */ 1592#define EC_FLASH_PROTECT_ALL_NOW BIT(2) 1593/* Flash write protect GPIO is asserted now */ 1594#define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) 1595/* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1596#define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) 1597/* 1598 * Error - flash protection is in inconsistent state. At least one bank of 1599 * flash which should be protected is not protected. Usually fixed by 1600 * re-requesting the desired flags, or by a hard reset if that fails. 1601 */ 1602#define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) 1603/* Entire flash code protected when the EC boots */ 1604#define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) 1605/* RW flash code protected when the EC boots */ 1606#define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) 1607/* RW flash code protected now. */ 1608#define EC_FLASH_PROTECT_RW_NOW BIT(8) 1609/* Rollback information flash region protected when the EC boots */ 1610#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) 1611/* Rollback information flash region protected now */ 1612#define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) 1613 1614 1615/** 1616 * struct ec_params_flash_protect - Parameters for the flash protect command. 1617 * @mask: Bits in flags to apply. 1618 * @flags: New flags to apply. 1619 */ 1620struct ec_params_flash_protect { 1621 uint32_t mask; 1622 uint32_t flags; 1623} __ec_align4; 1624 1625/** 1626 * struct ec_response_flash_protect - Response to the flash protect command. 1627 * @flags: Current value of flash protect flags. 1628 * @valid_flags: Flags which are valid on this platform. This allows the 1629 * caller to distinguish between flags which aren't set vs. flags 1630 * which can't be set on this platform. 1631 * @writable_flags: Flags which can be changed given the current protection 1632 * state. 1633 */ 1634struct ec_response_flash_protect { 1635 uint32_t flags; 1636 uint32_t valid_flags; 1637 uint32_t writable_flags; 1638} __ec_align4; 1639 1640/* 1641 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 1642 * write protect. These commands may be reused with version > 0. 1643 */ 1644 1645/* Get the region offset/size */ 1646#define EC_CMD_FLASH_REGION_INFO 0x0016 1647#define EC_VER_FLASH_REGION_INFO 1 1648 1649enum ec_flash_region { 1650 /* Region which holds read-only EC image */ 1651 EC_FLASH_REGION_RO = 0, 1652 /* 1653 * Region which holds active RW image. 'Active' is different from 1654 * 'running'. Active means 'scheduled-to-run'. Since RO image always 1655 * scheduled to run, active/non-active applies only to RW images (for 1656 * the same reason 'update' applies only to RW images. It's a state of 1657 * an image on a flash. Running image can be RO, RW_A, RW_B but active 1658 * image can only be RW_A or RW_B. In recovery mode, an active RW image 1659 * doesn't enter 'running' state but it's still active on a flash. 1660 */ 1661 EC_FLASH_REGION_ACTIVE, 1662 /* 1663 * Region which should be write-protected in the factory (a superset of 1664 * EC_FLASH_REGION_RO) 1665 */ 1666 EC_FLASH_REGION_WP_RO, 1667 /* Region which holds updatable (non-active) RW image */ 1668 EC_FLASH_REGION_UPDATE, 1669 /* Number of regions */ 1670 EC_FLASH_REGION_COUNT, 1671}; 1672/* 1673 * 'RW' is vague if there are multiple RW images; we mean the active one, 1674 * so the old constant is deprecated. 1675 */ 1676#define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE 1677 1678/** 1679 * struct ec_params_flash_region_info - Parameters for the flash region info 1680 * command. 1681 * @region: Flash region; see EC_FLASH_REGION_* 1682 */ 1683struct ec_params_flash_region_info { 1684 uint32_t region; 1685} __ec_align4; 1686 1687struct ec_response_flash_region_info { 1688 uint32_t offset; 1689 uint32_t size; 1690} __ec_align4; 1691 1692/* Read/write VbNvContext */ 1693#define EC_CMD_VBNV_CONTEXT 0x0017 1694#define EC_VER_VBNV_CONTEXT 1 1695#define EC_VBNV_BLOCK_SIZE 16 1696 1697enum ec_vbnvcontext_op { 1698 EC_VBNV_CONTEXT_OP_READ, 1699 EC_VBNV_CONTEXT_OP_WRITE, 1700}; 1701 1702struct ec_params_vbnvcontext { 1703 uint32_t op; 1704 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1705} __ec_align4; 1706 1707struct ec_response_vbnvcontext { 1708 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1709} __ec_align4; 1710 1711 1712/* Get SPI flash information */ 1713#define EC_CMD_FLASH_SPI_INFO 0x0018 1714 1715struct ec_response_flash_spi_info { 1716 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1717 uint8_t jedec[3]; 1718 1719 /* Pad byte; currently always contains 0 */ 1720 uint8_t reserved0; 1721 1722 /* Manufacturer / device ID from command 0x90 */ 1723 uint8_t mfr_dev_id[2]; 1724 1725 /* Status registers from command 0x05 and 0x35 */ 1726 uint8_t sr1, sr2; 1727} __ec_align1; 1728 1729 1730/* Select flash during flash operations */ 1731#define EC_CMD_FLASH_SELECT 0x0019 1732 1733/** 1734 * struct ec_params_flash_select - Parameters for the flash select command. 1735 * @select: 1 to select flash, 0 to deselect flash 1736 */ 1737struct ec_params_flash_select { 1738 uint8_t select; 1739} __ec_align4; 1740 1741 1742/*****************************************************************************/ 1743/* PWM commands */ 1744 1745/* Get fan target RPM */ 1746#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1747 1748struct ec_response_pwm_get_fan_rpm { 1749 uint32_t rpm; 1750} __ec_align4; 1751 1752/* Set target fan RPM */ 1753#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1754 1755/* Version 0 of input params */ 1756struct ec_params_pwm_set_fan_target_rpm_v0 { 1757 uint32_t rpm; 1758} __ec_align4; 1759 1760/* Version 1 of input params */ 1761struct ec_params_pwm_set_fan_target_rpm_v1 { 1762 uint32_t rpm; 1763 uint8_t fan_idx; 1764} __ec_align_size1; 1765 1766/* Get keyboard backlight */ 1767/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1768#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1769 1770struct ec_response_pwm_get_keyboard_backlight { 1771 uint8_t percent; 1772 uint8_t enabled; 1773} __ec_align1; 1774 1775/* Set keyboard backlight */ 1776/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1777#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1778 1779struct ec_params_pwm_set_keyboard_backlight { 1780 uint8_t percent; 1781} __ec_align1; 1782 1783/* Set target fan PWM duty cycle */ 1784#define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1785 1786/* Version 0 of input params */ 1787struct ec_params_pwm_set_fan_duty_v0 { 1788 uint32_t percent; 1789} __ec_align4; 1790 1791/* Version 1 of input params */ 1792struct ec_params_pwm_set_fan_duty_v1 { 1793 uint32_t percent; 1794 uint8_t fan_idx; 1795} __ec_align_size1; 1796 1797#define EC_CMD_PWM_SET_DUTY 0x0025 1798/* 16 bit duty cycle, 0xffff = 100% */ 1799#define EC_PWM_MAX_DUTY 0xffff 1800 1801enum ec_pwm_type { 1802 /* All types, indexed by board-specific enum pwm_channel */ 1803 EC_PWM_TYPE_GENERIC = 0, 1804 /* Keyboard backlight */ 1805 EC_PWM_TYPE_KB_LIGHT, 1806 /* Display backlight */ 1807 EC_PWM_TYPE_DISPLAY_LIGHT, 1808 EC_PWM_TYPE_COUNT, 1809}; 1810 1811struct ec_params_pwm_set_duty { 1812 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1813 uint8_t pwm_type; /* ec_pwm_type */ 1814 uint8_t index; /* Type-specific index, or 0 if unique */ 1815} __ec_align4; 1816 1817#define EC_CMD_PWM_GET_DUTY 0x0026 1818 1819struct ec_params_pwm_get_duty { 1820 uint8_t pwm_type; /* ec_pwm_type */ 1821 uint8_t index; /* Type-specific index, or 0 if unique */ 1822} __ec_align1; 1823 1824struct ec_response_pwm_get_duty { 1825 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1826} __ec_align2; 1827 1828#define EC_CMD_PWM_GET_FAN_DUTY 0x0027 1829 1830struct ec_params_pwm_get_fan_duty { 1831 uint8_t fan_idx; 1832} __ec_align1; 1833 1834struct ec_response_pwm_get_fan_duty { 1835 uint32_t percent; /* Percentage of duty cycle, ranging from 0 ~ 100 */ 1836} __ec_align4; 1837 1838/*****************************************************************************/ 1839/* 1840 * Lightbar commands. This looks worse than it is. Since we only use one HOST 1841 * command to say "talk to the lightbar", we put the "and tell it to do X" part 1842 * into a subcommand. We'll make separate structs for subcommands with 1843 * different input args, so that we know how much to expect. 1844 */ 1845#define EC_CMD_LIGHTBAR_CMD 0x0028 1846 1847struct rgb_s { 1848 uint8_t r, g, b; 1849} __ec_todo_unpacked; 1850 1851#define LB_BATTERY_LEVELS 4 1852 1853/* 1854 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a 1855 * host command, but the alignment is the same regardless. Keep it that way. 1856 */ 1857struct lightbar_params_v0 { 1858 /* Timing */ 1859 int32_t google_ramp_up; 1860 int32_t google_ramp_down; 1861 int32_t s3s0_ramp_up; 1862 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1863 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1864 int32_t s0s3_ramp_down; 1865 int32_t s3_sleep_for; 1866 int32_t s3_ramp_up; 1867 int32_t s3_ramp_down; 1868 1869 /* Oscillation */ 1870 uint8_t new_s0; 1871 uint8_t osc_min[2]; /* AC=0/1 */ 1872 uint8_t osc_max[2]; /* AC=0/1 */ 1873 uint8_t w_ofs[2]; /* AC=0/1 */ 1874 1875 /* Brightness limits based on the backlight and AC. */ 1876 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1877 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1878 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1879 1880 /* Battery level thresholds */ 1881 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1882 1883 /* Map [AC][battery_level] to color index */ 1884 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1885 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1886 1887 /* Color palette */ 1888 struct rgb_s color[8]; /* 0-3 are Google colors */ 1889} __ec_todo_packed; 1890 1891struct lightbar_params_v1 { 1892 /* Timing */ 1893 int32_t google_ramp_up; 1894 int32_t google_ramp_down; 1895 int32_t s3s0_ramp_up; 1896 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1897 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1898 int32_t s0s3_ramp_down; 1899 int32_t s3_sleep_for; 1900 int32_t s3_ramp_up; 1901 int32_t s3_ramp_down; 1902 int32_t s5_ramp_up; 1903 int32_t s5_ramp_down; 1904 int32_t tap_tick_delay; 1905 int32_t tap_gate_delay; 1906 int32_t tap_display_time; 1907 1908 /* Tap-for-battery params */ 1909 uint8_t tap_pct_red; 1910 uint8_t tap_pct_green; 1911 uint8_t tap_seg_min_on; 1912 uint8_t tap_seg_max_on; 1913 uint8_t tap_seg_osc; 1914 uint8_t tap_idx[3]; 1915 1916 /* Oscillation */ 1917 uint8_t osc_min[2]; /* AC=0/1 */ 1918 uint8_t osc_max[2]; /* AC=0/1 */ 1919 uint8_t w_ofs[2]; /* AC=0/1 */ 1920 1921 /* Brightness limits based on the backlight and AC. */ 1922 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1923 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1924 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1925 1926 /* Battery level thresholds */ 1927 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1928 1929 /* Map [AC][battery_level] to color index */ 1930 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1931 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1932 1933 /* s5: single color pulse on inhibited power-up */ 1934 uint8_t s5_idx; 1935 1936 /* Color palette */ 1937 struct rgb_s color[8]; /* 0-3 are Google colors */ 1938} __ec_todo_packed; 1939 1940/* Lightbar command params v2 1941 * crbug.com/467716 1942 * 1943 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1944 * logical groups to make it more manageable ( < 120 bytes). 1945 * 1946 * NOTE: Each of these groups must be less than 120 bytes. 1947 */ 1948 1949struct lightbar_params_v2_timing { 1950 /* Timing */ 1951 int32_t google_ramp_up; 1952 int32_t google_ramp_down; 1953 int32_t s3s0_ramp_up; 1954 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1955 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1956 int32_t s0s3_ramp_down; 1957 int32_t s3_sleep_for; 1958 int32_t s3_ramp_up; 1959 int32_t s3_ramp_down; 1960 int32_t s5_ramp_up; 1961 int32_t s5_ramp_down; 1962 int32_t tap_tick_delay; 1963 int32_t tap_gate_delay; 1964 int32_t tap_display_time; 1965} __ec_todo_packed; 1966 1967struct lightbar_params_v2_tap { 1968 /* Tap-for-battery params */ 1969 uint8_t tap_pct_red; 1970 uint8_t tap_pct_green; 1971 uint8_t tap_seg_min_on; 1972 uint8_t tap_seg_max_on; 1973 uint8_t tap_seg_osc; 1974 uint8_t tap_idx[3]; 1975} __ec_todo_packed; 1976 1977struct lightbar_params_v2_oscillation { 1978 /* Oscillation */ 1979 uint8_t osc_min[2]; /* AC=0/1 */ 1980 uint8_t osc_max[2]; /* AC=0/1 */ 1981 uint8_t w_ofs[2]; /* AC=0/1 */ 1982} __ec_todo_packed; 1983 1984struct lightbar_params_v2_brightness { 1985 /* Brightness limits based on the backlight and AC. */ 1986 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1987 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1988 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1989} __ec_todo_packed; 1990 1991struct lightbar_params_v2_thresholds { 1992 /* Battery level thresholds */ 1993 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1994} __ec_todo_packed; 1995 1996struct lightbar_params_v2_colors { 1997 /* Map [AC][battery_level] to color index */ 1998 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1999 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 2000 2001 /* s5: single color pulse on inhibited power-up */ 2002 uint8_t s5_idx; 2003 2004 /* Color palette */ 2005 struct rgb_s color[8]; /* 0-3 are Google colors */ 2006} __ec_todo_packed; 2007 2008/* Lightbar program. */ 2009#define EC_LB_PROG_LEN 192 2010struct lightbar_program { 2011 uint8_t size; 2012 uint8_t data[EC_LB_PROG_LEN]; 2013} __ec_todo_unpacked; 2014 2015struct ec_params_lightbar { 2016 uint8_t cmd; /* Command (see enum lightbar_command) */ 2017 union { 2018 /* 2019 * The following commands have no args: 2020 * 2021 * dump, off, on, init, get_seq, get_params_v0, get_params_v1, 2022 * version, get_brightness, get_demo, suspend, resume, 2023 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, 2024 * get_params_v2_bright, get_params_v2_thlds, 2025 * get_params_v2_colors 2026 * 2027 * Don't use an empty struct, because C++ hates that. 2028 */ 2029 2030 struct __ec_todo_unpacked { 2031 uint8_t num; 2032 } set_brightness, seq, demo; 2033 2034 struct __ec_todo_unpacked { 2035 uint8_t ctrl, reg, value; 2036 } reg; 2037 2038 struct __ec_todo_unpacked { 2039 uint8_t led, red, green, blue; 2040 } set_rgb; 2041 2042 struct __ec_todo_unpacked { 2043 uint8_t led; 2044 } get_rgb; 2045 2046 struct __ec_todo_unpacked { 2047 uint8_t enable; 2048 } manual_suspend_ctrl; 2049 2050 struct lightbar_params_v0 set_params_v0; 2051 struct lightbar_params_v1 set_params_v1; 2052 2053 struct lightbar_params_v2_timing set_v2par_timing; 2054 struct lightbar_params_v2_tap set_v2par_tap; 2055 struct lightbar_params_v2_oscillation set_v2par_osc; 2056 struct lightbar_params_v2_brightness set_v2par_bright; 2057 struct lightbar_params_v2_thresholds set_v2par_thlds; 2058 struct lightbar_params_v2_colors set_v2par_colors; 2059 2060 struct lightbar_program set_program; 2061 }; 2062} __ec_todo_packed; 2063 2064struct ec_response_lightbar { 2065 union { 2066 struct __ec_todo_unpacked { 2067 struct __ec_todo_unpacked { 2068 uint8_t reg; 2069 uint8_t ic0; 2070 uint8_t ic1; 2071 } vals[23]; 2072 } dump; 2073 2074 struct __ec_todo_unpacked { 2075 uint8_t num; 2076 } get_seq, get_brightness, get_demo; 2077 2078 struct lightbar_params_v0 get_params_v0; 2079 struct lightbar_params_v1 get_params_v1; 2080 2081 2082 struct lightbar_params_v2_timing get_params_v2_timing; 2083 struct lightbar_params_v2_tap get_params_v2_tap; 2084 struct lightbar_params_v2_oscillation get_params_v2_osc; 2085 struct lightbar_params_v2_brightness get_params_v2_bright; 2086 struct lightbar_params_v2_thresholds get_params_v2_thlds; 2087 struct lightbar_params_v2_colors get_params_v2_colors; 2088 2089 struct __ec_todo_unpacked { 2090 uint32_t num; 2091 uint32_t flags; 2092 } version; 2093 2094 struct __ec_todo_unpacked { 2095 uint8_t red, green, blue; 2096 } get_rgb; 2097 2098 /* 2099 * The following commands have no response: 2100 * 2101 * off, on, init, set_brightness, seq, reg, set_rgb, demo, 2102 * set_params_v0, set_params_v1, set_program, 2103 * manual_suspend_ctrl, suspend, resume, set_v2par_timing, 2104 * set_v2par_tap, set_v2par_osc, set_v2par_bright, 2105 * set_v2par_thlds, set_v2par_colors 2106 */ 2107 }; 2108} __ec_todo_packed; 2109 2110/* Lightbar commands */ 2111enum lightbar_command { 2112 LIGHTBAR_CMD_DUMP = 0, 2113 LIGHTBAR_CMD_OFF = 1, 2114 LIGHTBAR_CMD_ON = 2, 2115 LIGHTBAR_CMD_INIT = 3, 2116 LIGHTBAR_CMD_SET_BRIGHTNESS = 4, 2117 LIGHTBAR_CMD_SEQ = 5, 2118 LIGHTBAR_CMD_REG = 6, 2119 LIGHTBAR_CMD_SET_RGB = 7, 2120 LIGHTBAR_CMD_GET_SEQ = 8, 2121 LIGHTBAR_CMD_DEMO = 9, 2122 LIGHTBAR_CMD_GET_PARAMS_V0 = 10, 2123 LIGHTBAR_CMD_SET_PARAMS_V0 = 11, 2124 LIGHTBAR_CMD_VERSION = 12, 2125 LIGHTBAR_CMD_GET_BRIGHTNESS = 13, 2126 LIGHTBAR_CMD_GET_RGB = 14, 2127 LIGHTBAR_CMD_GET_DEMO = 15, 2128 LIGHTBAR_CMD_GET_PARAMS_V1 = 16, 2129 LIGHTBAR_CMD_SET_PARAMS_V1 = 17, 2130 LIGHTBAR_CMD_SET_PROGRAM = 18, 2131 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 2132 LIGHTBAR_CMD_SUSPEND = 20, 2133 LIGHTBAR_CMD_RESUME = 21, 2134 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 2135 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 2136 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 2137 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 2138 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 2139 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 2140 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 2141 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 2142 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 2143 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 2144 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 2145 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 2146 LIGHTBAR_NUM_CMDS 2147}; 2148 2149/*****************************************************************************/ 2150/* LED control commands */ 2151 2152#define EC_CMD_LED_CONTROL 0x0029 2153 2154enum ec_led_id { 2155 /* LED to indicate battery state of charge */ 2156 EC_LED_ID_BATTERY_LED = 0, 2157 /* 2158 * LED to indicate system power state (on or in suspend). 2159 * May be on power button or on C-panel. 2160 */ 2161 EC_LED_ID_POWER_LED, 2162 /* LED on power adapter or its plug */ 2163 EC_LED_ID_ADAPTER_LED, 2164 /* LED to indicate left side */ 2165 EC_LED_ID_LEFT_LED, 2166 /* LED to indicate right side */ 2167 EC_LED_ID_RIGHT_LED, 2168 /* LED to indicate recovery mode with HW_REINIT */ 2169 EC_LED_ID_RECOVERY_HW_REINIT_LED, 2170 /* LED to indicate sysrq debug mode. */ 2171 EC_LED_ID_SYSRQ_DEBUG_LED, 2172 2173 EC_LED_ID_COUNT 2174}; 2175 2176/* LED control flags */ 2177#define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ 2178#define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ 2179 2180enum ec_led_colors { 2181 EC_LED_COLOR_RED = 0, 2182 EC_LED_COLOR_GREEN, 2183 EC_LED_COLOR_BLUE, 2184 EC_LED_COLOR_YELLOW, 2185 EC_LED_COLOR_WHITE, 2186 EC_LED_COLOR_AMBER, 2187 2188 EC_LED_COLOR_COUNT 2189}; 2190 2191struct ec_params_led_control { 2192 uint8_t led_id; /* Which LED to control */ 2193 uint8_t flags; /* Control flags */ 2194 2195 uint8_t brightness[EC_LED_COLOR_COUNT]; 2196} __ec_align1; 2197 2198struct ec_response_led_control { 2199 /* 2200 * Available brightness value range. 2201 * 2202 * Range 0 means color channel not present. 2203 * Range 1 means on/off control. 2204 * Other values means the LED is control by PWM. 2205 */ 2206 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 2207} __ec_align1; 2208 2209/*****************************************************************************/ 2210/* Verified boot commands */ 2211 2212/* 2213 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 2214 * reused for other purposes with version > 0. 2215 */ 2216 2217/* Verified boot hash command */ 2218#define EC_CMD_VBOOT_HASH 0x002A 2219 2220struct ec_params_vboot_hash { 2221 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 2222 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2223 uint8_t nonce_size; /* Nonce size; may be 0 */ 2224 uint8_t reserved0; /* Reserved; set 0 */ 2225 uint32_t offset; /* Offset in flash to hash */ 2226 uint32_t size; /* Number of bytes to hash */ 2227 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 2228} __ec_align4; 2229 2230struct ec_response_vboot_hash { 2231 uint8_t status; /* enum ec_vboot_hash_status */ 2232 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2233 uint8_t digest_size; /* Size of hash digest in bytes */ 2234 uint8_t reserved0; /* Ignore; will be 0 */ 2235 uint32_t offset; /* Offset in flash which was hashed */ 2236 uint32_t size; /* Number of bytes hashed */ 2237 uint8_t hash_digest[64]; /* Hash digest data */ 2238} __ec_align4; 2239 2240enum ec_vboot_hash_cmd { 2241 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 2242 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 2243 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 2244 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 2245}; 2246 2247enum ec_vboot_hash_type { 2248 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 2249}; 2250 2251enum ec_vboot_hash_status { 2252 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 2253 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 2254 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 2255}; 2256 2257/* 2258 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 2259 * If one of these is specified, the EC will automatically update offset and 2260 * size to the correct values for the specified image (RO or RW). 2261 */ 2262#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 2263#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 2264#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 2265 2266/* 2267 * 'RW' is vague if there are multiple RW images; we mean the active one, 2268 * so the old constant is deprecated. 2269 */ 2270#define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE 2271 2272/*****************************************************************************/ 2273/* 2274 * Motion sense commands. We'll make separate structs for sub-commands with 2275 * different input args, so that we know how much to expect. 2276 */ 2277#define EC_CMD_MOTION_SENSE_CMD 0x002B 2278 2279/* Motion sense commands */ 2280enum motionsense_command { 2281 /* 2282 * Dump command returns all motion sensor data including motion sense 2283 * module flags and individual sensor flags. 2284 */ 2285 MOTIONSENSE_CMD_DUMP = 0, 2286 2287 /* 2288 * Info command returns data describing the details of a given sensor, 2289 * including enum motionsensor_type, enum motionsensor_location, and 2290 * enum motionsensor_chip. 2291 */ 2292 MOTIONSENSE_CMD_INFO = 1, 2293 2294 /* 2295 * EC Rate command is a setter/getter command for the EC sampling rate 2296 * in milliseconds. 2297 * It is per sensor, the EC run sample task at the minimum of all 2298 * sensors EC_RATE. 2299 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 2300 * to collect all the sensor samples. 2301 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 2302 * to process of all motion sensors in milliseconds. 2303 */ 2304 MOTIONSENSE_CMD_EC_RATE = 2, 2305 2306 /* 2307 * Sensor ODR command is a setter/getter command for the output data 2308 * rate of a specific motion sensor in millihertz. 2309 */ 2310 MOTIONSENSE_CMD_SENSOR_ODR = 3, 2311 2312 /* 2313 * Sensor range command is a setter/getter command for the range of 2314 * a specified motion sensor in +/-G's or +/- deg/s. 2315 */ 2316 MOTIONSENSE_CMD_SENSOR_RANGE = 4, 2317 2318 /* 2319 * Setter/getter command for the keyboard wake angle. When the lid 2320 * angle is greater than this value, keyboard wake is disabled in S3, 2321 * and when the lid angle goes less than this value, keyboard wake is 2322 * enabled. Note, the lid angle measurement is an approximate, 2323 * un-calibrated value, hence the wake angle isn't exact. 2324 */ 2325 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, 2326 2327 /* 2328 * Returns a single sensor data. 2329 */ 2330 MOTIONSENSE_CMD_DATA = 6, 2331 2332 /* 2333 * Return sensor fifo info. 2334 */ 2335 MOTIONSENSE_CMD_FIFO_INFO = 7, 2336 2337 /* 2338 * Insert a flush element in the fifo and return sensor fifo info. 2339 * The host can use that element to synchronize its operation. 2340 */ 2341 MOTIONSENSE_CMD_FIFO_FLUSH = 8, 2342 2343 /* 2344 * Return a portion of the fifo. 2345 */ 2346 MOTIONSENSE_CMD_FIFO_READ = 9, 2347 2348 /* 2349 * Perform low level calibration. 2350 * On sensors that support it, ask to do offset calibration. 2351 */ 2352 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2353 2354 /* 2355 * Sensor Offset command is a setter/getter command for the offset 2356 * used for calibration. 2357 * The offsets can be calculated by the host, or via 2358 * PERFORM_CALIB command. 2359 */ 2360 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2361 2362 /* 2363 * List available activities for a MOTION sensor. 2364 * Indicates if they are enabled or disabled. 2365 */ 2366 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2367 2368 /* 2369 * Activity management 2370 * Enable/Disable activity recognition. 2371 */ 2372 MOTIONSENSE_CMD_SET_ACTIVITY = 13, 2373 2374 /* 2375 * Lid Angle 2376 */ 2377 MOTIONSENSE_CMD_LID_ANGLE = 14, 2378 2379 /* 2380 * Allow the FIFO to trigger interrupt via MKBP events. 2381 * By default the FIFO does not send interrupt to process the FIFO 2382 * until the AP is ready or it is coming from a wakeup sensor. 2383 */ 2384 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 2385 2386 /* 2387 * Spoof the readings of the sensors. The spoofed readings can be set 2388 * to arbitrary values, or will lock to the last read actual values. 2389 */ 2390 MOTIONSENSE_CMD_SPOOF = 16, 2391 2392 /* Set lid angle for tablet mode detection. */ 2393 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, 2394 2395 /* 2396 * Sensor Scale command is a setter/getter command for the calibration 2397 * scale. 2398 */ 2399 MOTIONSENSE_CMD_SENSOR_SCALE = 18, 2400 2401 /* 2402 * Activity management 2403 * Retrieve current status of given activity. 2404 */ 2405 MOTIONSENSE_CMD_GET_ACTIVITY = 20, 2406 2407 /* Number of motionsense sub-commands. */ 2408 MOTIONSENSE_NUM_CMDS 2409}; 2410 2411/* List of motion sensor types. */ 2412enum motionsensor_type { 2413 MOTIONSENSE_TYPE_ACCEL = 0, 2414 MOTIONSENSE_TYPE_GYRO = 1, 2415 MOTIONSENSE_TYPE_MAG = 2, 2416 MOTIONSENSE_TYPE_PROX = 3, 2417 MOTIONSENSE_TYPE_LIGHT = 4, 2418 MOTIONSENSE_TYPE_ACTIVITY = 5, 2419 MOTIONSENSE_TYPE_BARO = 6, 2420 MOTIONSENSE_TYPE_SYNC = 7, 2421 MOTIONSENSE_TYPE_MAX, 2422}; 2423 2424/* List of motion sensor locations. */ 2425enum motionsensor_location { 2426 MOTIONSENSE_LOC_BASE = 0, 2427 MOTIONSENSE_LOC_LID = 1, 2428 MOTIONSENSE_LOC_CAMERA = 2, 2429 MOTIONSENSE_LOC_MAX, 2430}; 2431 2432/* List of motion sensor chips. */ 2433enum motionsensor_chip { 2434 MOTIONSENSE_CHIP_KXCJ9 = 0, 2435 MOTIONSENSE_CHIP_LSM6DS0 = 1, 2436 MOTIONSENSE_CHIP_BMI160 = 2, 2437 MOTIONSENSE_CHIP_SI1141 = 3, 2438 MOTIONSENSE_CHIP_SI1142 = 4, 2439 MOTIONSENSE_CHIP_SI1143 = 5, 2440 MOTIONSENSE_CHIP_KX022 = 6, 2441 MOTIONSENSE_CHIP_L3GD20H = 7, 2442 MOTIONSENSE_CHIP_BMA255 = 8, 2443 MOTIONSENSE_CHIP_BMP280 = 9, 2444 MOTIONSENSE_CHIP_OPT3001 = 10, 2445 MOTIONSENSE_CHIP_BH1730 = 11, 2446 MOTIONSENSE_CHIP_GPIO = 12, 2447 MOTIONSENSE_CHIP_LIS2DH = 13, 2448 MOTIONSENSE_CHIP_LSM6DSM = 14, 2449 MOTIONSENSE_CHIP_LIS2DE = 15, 2450 MOTIONSENSE_CHIP_LIS2MDL = 16, 2451 MOTIONSENSE_CHIP_LSM6DS3 = 17, 2452 MOTIONSENSE_CHIP_LSM6DSO = 18, 2453 MOTIONSENSE_CHIP_LNG2DM = 19, 2454 MOTIONSENSE_CHIP_MAX, 2455}; 2456 2457/* List of orientation positions */ 2458enum motionsensor_orientation { 2459 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, 2460 MOTIONSENSE_ORIENTATION_PORTRAIT = 1, 2461 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, 2462 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, 2463 MOTIONSENSE_ORIENTATION_UNKNOWN = 4, 2464}; 2465 2466struct ec_response_activity_data { 2467 uint8_t activity; /* motionsensor_activity */ 2468 uint8_t state; 2469} __ec_todo_packed; 2470 2471struct ec_response_motion_sensor_data { 2472 /* Flags for each sensor. */ 2473 uint8_t flags; 2474 /* Sensor number the data comes from. */ 2475 uint8_t sensor_num; 2476 /* Each sensor is up to 3-axis. */ 2477 union { 2478 int16_t data[3]; 2479 struct __ec_todo_packed { 2480 uint16_t reserved; 2481 uint32_t timestamp; 2482 }; 2483 struct __ec_todo_unpacked { 2484 struct ec_response_activity_data activity_data; 2485 int16_t add_info[2]; 2486 }; 2487 }; 2488} __ec_todo_packed; 2489 2490/* Note: used in ec_response_get_next_data */ 2491struct ec_response_motion_sense_fifo_info { 2492 /* Size of the fifo */ 2493 uint16_t size; 2494 /* Amount of space used in the fifo */ 2495 uint16_t count; 2496 /* Timestamp recorded in us. 2497 * aka accurate timestamp when host event was triggered. 2498 */ 2499 uint32_t timestamp; 2500 /* Total amount of vector lost */ 2501 uint16_t total_lost; 2502 /* Lost events since the last fifo_info, per sensors */ 2503 uint16_t lost[]; 2504} __ec_todo_packed; 2505 2506struct ec_response_motion_sense_fifo_data { 2507 uint32_t number_data; 2508 struct ec_response_motion_sensor_data data[]; 2509} __ec_todo_packed; 2510 2511/* List supported activity recognition */ 2512enum motionsensor_activity { 2513 MOTIONSENSE_ACTIVITY_RESERVED = 0, 2514 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 2515 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 2516 MOTIONSENSE_ACTIVITY_ORIENTATION = 3, 2517 MOTIONSENSE_ACTIVITY_BODY_DETECTION = 4, 2518}; 2519 2520struct ec_motion_sense_activity { 2521 uint8_t sensor_num; 2522 uint8_t activity; /* one of enum motionsensor_activity */ 2523 uint8_t enable; /* 1: enable, 0: disable */ 2524 uint8_t reserved; 2525 uint16_t parameters[3]; /* activity dependent parameters */ 2526} __ec_todo_unpacked; 2527 2528/* Module flag masks used for the dump sub-command. */ 2529#define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) 2530 2531/* Sensor flag masks used for the dump sub-command. */ 2532#define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) 2533 2534/* 2535 * Flush entry for synchronization. 2536 * data contains time stamp 2537 */ 2538#define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) 2539#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) 2540#define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) 2541#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) 2542#define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) 2543 2544/* 2545 * Send this value for the data element to only perform a read. If you 2546 * send any other value, the EC will interpret it as data to set and will 2547 * return the actual value set. 2548 */ 2549#define EC_MOTION_SENSE_NO_VALUE -1 2550 2551#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2552 2553/* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2554/* Set Calibration information */ 2555#define MOTION_SENSE_SET_OFFSET BIT(0) 2556 2557/* Default Scale value, factor 1. */ 2558#define MOTION_SENSE_DEFAULT_SCALE BIT(15) 2559 2560#define LID_ANGLE_UNRELIABLE 500 2561 2562enum motionsense_spoof_mode { 2563 /* Disable spoof mode. */ 2564 MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 2565 2566 /* Enable spoof mode, but use provided component values. */ 2567 MOTIONSENSE_SPOOF_MODE_CUSTOM, 2568 2569 /* Enable spoof mode, but use the current sensor values. */ 2570 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 2571 2572 /* Query the current spoof mode status for the sensor. */ 2573 MOTIONSENSE_SPOOF_MODE_QUERY, 2574}; 2575 2576struct ec_params_motion_sense { 2577 uint8_t cmd; 2578 union { 2579 /* Used for MOTIONSENSE_CMD_DUMP. */ 2580 struct __ec_todo_unpacked { 2581 /* 2582 * Maximal number of sensor the host is expecting. 2583 * 0 means the host is only interested in the number 2584 * of sensors controlled by the EC. 2585 */ 2586 uint8_t max_sensor_count; 2587 } dump; 2588 2589 /* 2590 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2591 */ 2592 struct __ec_todo_unpacked { 2593 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 2594 * kb_wake_angle: angle to wakup AP. 2595 */ 2596 int16_t data; 2597 } kb_wake_angle; 2598 2599 /* 2600 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 2601 * and MOTIONSENSE_CMD_PERFORM_CALIB. 2602 */ 2603 struct __ec_todo_unpacked { 2604 uint8_t sensor_num; 2605 } info, info_3, data, fifo_flush, perform_calib, 2606 list_activities; 2607 2608 /* 2609 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 2610 * and MOTIONSENSE_CMD_SENSOR_RANGE. 2611 */ 2612 struct __ec_todo_unpacked { 2613 uint8_t sensor_num; 2614 2615 /* Rounding flag, true for round-up, false for down. */ 2616 uint8_t roundup; 2617 2618 uint16_t reserved; 2619 2620 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2621 int32_t data; 2622 } ec_rate, sensor_odr, sensor_range; 2623 2624 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2625 struct __ec_todo_packed { 2626 uint8_t sensor_num; 2627 2628 /* 2629 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2630 * the calibration information in the EC. 2631 * If unset, just retrieve calibration information. 2632 */ 2633 uint16_t flags; 2634 2635 /* 2636 * Temperature at calibration, in units of 0.01 C 2637 * 0x8000: invalid / unknown. 2638 * 0x0: 0C 2639 * 0x7fff: +327.67C 2640 */ 2641 int16_t temp; 2642 2643 /* 2644 * Offset for calibration. 2645 * Unit: 2646 * Accelerometer: 1/1024 g 2647 * Gyro: 1/1024 deg/s 2648 * Compass: 1/16 uT 2649 */ 2650 int16_t offset[3]; 2651 } sensor_offset; 2652 2653 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2654 struct __ec_todo_packed { 2655 uint8_t sensor_num; 2656 2657 /* 2658 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2659 * the calibration information in the EC. 2660 * If unset, just retrieve calibration information. 2661 */ 2662 uint16_t flags; 2663 2664 /* 2665 * Temperature at calibration, in units of 0.01 C 2666 * 0x8000: invalid / unknown. 2667 * 0x0: 0C 2668 * 0x7fff: +327.67C 2669 */ 2670 int16_t temp; 2671 2672 /* 2673 * Scale for calibration: 2674 * By default scale is 1, it is encoded on 16bits: 2675 * 1 = BIT(15) 2676 * ~2 = 0xFFFF 2677 * ~0 = 0. 2678 */ 2679 uint16_t scale[3]; 2680 } sensor_scale; 2681 2682 2683 /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 2684 /* (no params) */ 2685 2686 /* Used for MOTIONSENSE_CMD_FIFO_READ */ 2687 struct __ec_todo_unpacked { 2688 /* 2689 * Number of expected vector to return. 2690 * EC may return less or 0 if none available. 2691 */ 2692 uint32_t max_data_vector; 2693 } fifo_read; 2694 2695 /* Used for MOTIONSENSE_CMD_SET_ACTIVITY */ 2696 struct ec_motion_sense_activity set_activity; 2697 2698 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2699 /* (no params) */ 2700 2701 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 2702 struct __ec_todo_unpacked { 2703 /* 2704 * 1: enable, 0 disable fifo, 2705 * EC_MOTION_SENSE_NO_VALUE return value. 2706 */ 2707 int8_t enable; 2708 } fifo_int_enable; 2709 2710 /* Used for MOTIONSENSE_CMD_SPOOF */ 2711 struct __ec_todo_packed { 2712 uint8_t sensor_id; 2713 2714 /* See enum motionsense_spoof_mode. */ 2715 uint8_t spoof_enable; 2716 2717 /* Ignored, used for alignment. */ 2718 uint8_t reserved; 2719 2720 /* Individual component values to spoof. */ 2721 int16_t components[3]; 2722 } spoof; 2723 2724 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2725 struct __ec_todo_unpacked { 2726 /* 2727 * Lid angle threshold for switching between tablet and 2728 * clamshell mode. 2729 */ 2730 int16_t lid_angle; 2731 2732 /* 2733 * Hysteresis degree to prevent fluctuations between 2734 * clamshell and tablet mode if lid angle keeps 2735 * changing around the threshold. Lid motion driver will 2736 * use lid_angle + hys_degree to trigger tablet mode and 2737 * lid_angle - hys_degree to trigger clamshell mode. 2738 */ 2739 int16_t hys_degree; 2740 } tablet_mode_threshold; 2741 2742 /* Used for MOTIONSENSE_CMD_GET_ACTIVITY */ 2743 struct __ec_todo_unpacked { 2744 uint8_t sensor_num; 2745 uint8_t activity; /* enum motionsensor_activity */ 2746 } get_activity; 2747 }; 2748} __ec_todo_packed; 2749 2750struct ec_response_motion_sense { 2751 union { 2752 /* Used for MOTIONSENSE_CMD_DUMP */ 2753 struct __ec_todo_unpacked { 2754 /* Flags representing the motion sensor module. */ 2755 uint8_t module_flags; 2756 2757 /* Number of sensors managed directly by the EC. */ 2758 uint8_t sensor_count; 2759 2760 /* 2761 * Sensor data is truncated if response_max is too small 2762 * for holding all the data. 2763 */ 2764 DECLARE_FLEX_ARRAY(struct ec_response_motion_sensor_data, sensor); 2765 } dump; 2766 2767 /* Used for MOTIONSENSE_CMD_INFO. */ 2768 struct __ec_todo_unpacked { 2769 /* Should be element of enum motionsensor_type. */ 2770 uint8_t type; 2771 2772 /* Should be element of enum motionsensor_location. */ 2773 uint8_t location; 2774 2775 /* Should be element of enum motionsensor_chip. */ 2776 uint8_t chip; 2777 } info; 2778 2779 /* Used for MOTIONSENSE_CMD_INFO version 3 */ 2780 struct __ec_todo_unpacked { 2781 /* Should be element of enum motionsensor_type. */ 2782 uint8_t type; 2783 2784 /* Should be element of enum motionsensor_location. */ 2785 uint8_t location; 2786 2787 /* Should be element of enum motionsensor_chip. */ 2788 uint8_t chip; 2789 2790 /* Minimum sensor sampling frequency */ 2791 uint32_t min_frequency; 2792 2793 /* Maximum sensor sampling frequency */ 2794 uint32_t max_frequency; 2795 2796 /* Max number of sensor events that could be in fifo */ 2797 uint32_t fifo_max_event_count; 2798 } info_3; 2799 2800 /* Used for MOTIONSENSE_CMD_DATA */ 2801 struct ec_response_motion_sensor_data data; 2802 2803 /* 2804 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2805 * MOTIONSENSE_CMD_SENSOR_RANGE, 2806 * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 2807 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 2808 * MOTIONSENSE_CMD_SPOOF. 2809 */ 2810 struct __ec_todo_unpacked { 2811 /* Current value of the parameter queried. */ 2812 int32_t ret; 2813 } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 2814 fifo_int_enable, spoof; 2815 2816 /* 2817 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, 2818 * PERFORM_CALIB. 2819 */ 2820 struct __ec_todo_unpacked { 2821 int16_t temp; 2822 int16_t offset[3]; 2823 } sensor_offset, perform_calib; 2824 2825 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2826 struct __ec_todo_unpacked { 2827 int16_t temp; 2828 uint16_t scale[3]; 2829 } sensor_scale; 2830 2831 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 2832 2833 struct ec_response_motion_sense_fifo_data fifo_read; 2834 2835 struct __ec_todo_packed { 2836 uint16_t reserved; 2837 uint32_t enabled; 2838 uint32_t disabled; 2839 } list_activities; 2840 2841 /* No params for set activity */ 2842 2843 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2844 struct __ec_todo_unpacked { 2845 /* 2846 * Angle between 0 and 360 degree if available, 2847 * LID_ANGLE_UNRELIABLE otherwise. 2848 */ 2849 uint16_t value; 2850 } lid_angle; 2851 2852 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2853 struct __ec_todo_unpacked { 2854 /* 2855 * Lid angle threshold for switching between tablet and 2856 * clamshell mode. 2857 */ 2858 uint16_t lid_angle; 2859 2860 /* Hysteresis degree. */ 2861 uint16_t hys_degree; 2862 } tablet_mode_threshold; 2863 2864 /* USED for MOTIONSENSE_CMD_GET_ACTIVITY. */ 2865 struct __ec_todo_unpacked { 2866 uint8_t state; 2867 } get_activity; 2868 }; 2869} __ec_todo_packed; 2870 2871/*****************************************************************************/ 2872/* Force lid open command */ 2873 2874/* Make lid event always open */ 2875#define EC_CMD_FORCE_LID_OPEN 0x002C 2876 2877struct ec_params_force_lid_open { 2878 uint8_t enabled; 2879} __ec_align1; 2880 2881/*****************************************************************************/ 2882/* Configure the behavior of the power button */ 2883#define EC_CMD_CONFIG_POWER_BUTTON 0x002D 2884 2885enum ec_config_power_button_flags { 2886 /* Enable/Disable power button pulses for x86 devices */ 2887 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), 2888}; 2889 2890struct ec_params_config_power_button { 2891 /* See enum ec_config_power_button_flags */ 2892 uint8_t flags; 2893} __ec_align1; 2894 2895/*****************************************************************************/ 2896/* USB charging control commands */ 2897 2898/* Set USB port charging mode */ 2899#define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2900 2901struct ec_params_usb_charge_set_mode { 2902 uint8_t usb_port_id; 2903 uint8_t mode:7; 2904 uint8_t inhibit_charge:1; 2905} __ec_align1; 2906 2907/*****************************************************************************/ 2908/* Persistent storage for host */ 2909 2910/* Maximum bytes that can be read/written in a single command */ 2911#define EC_PSTORE_SIZE_MAX 64 2912 2913/* Get persistent storage info */ 2914#define EC_CMD_PSTORE_INFO 0x0040 2915 2916struct ec_response_pstore_info { 2917 /* Persistent storage size, in bytes */ 2918 uint32_t pstore_size; 2919 /* Access size; read/write offset and size must be a multiple of this */ 2920 uint32_t access_size; 2921} __ec_align4; 2922 2923/* 2924 * Read persistent storage 2925 * 2926 * Response is params.size bytes of data. 2927 */ 2928#define EC_CMD_PSTORE_READ 0x0041 2929 2930struct ec_params_pstore_read { 2931 uint32_t offset; /* Byte offset to read */ 2932 uint32_t size; /* Size to read in bytes */ 2933} __ec_align4; 2934 2935/* Write persistent storage */ 2936#define EC_CMD_PSTORE_WRITE 0x0042 2937 2938struct ec_params_pstore_write { 2939 uint32_t offset; /* Byte offset to write */ 2940 uint32_t size; /* Size to write in bytes */ 2941 uint8_t data[EC_PSTORE_SIZE_MAX]; 2942} __ec_align4; 2943 2944/*****************************************************************************/ 2945/* Real-time clock */ 2946 2947/* RTC params and response structures */ 2948struct ec_params_rtc { 2949 uint32_t time; 2950} __ec_align4; 2951 2952struct ec_response_rtc { 2953 uint32_t time; 2954} __ec_align4; 2955 2956/* These use ec_response_rtc */ 2957#define EC_CMD_RTC_GET_VALUE 0x0044 2958#define EC_CMD_RTC_GET_ALARM 0x0045 2959 2960/* These all use ec_params_rtc */ 2961#define EC_CMD_RTC_SET_VALUE 0x0046 2962#define EC_CMD_RTC_SET_ALARM 0x0047 2963 2964/* Pass as time param to SET_ALARM to clear the current alarm */ 2965#define EC_RTC_ALARM_CLEAR 0 2966 2967/*****************************************************************************/ 2968/* Port80 log access */ 2969 2970/* Maximum entries that can be read/written in a single command */ 2971#define EC_PORT80_SIZE_MAX 32 2972 2973/* Get last port80 code from previous boot */ 2974#define EC_CMD_PORT80_LAST_BOOT 0x0048 2975#define EC_CMD_PORT80_READ 0x0048 2976 2977enum ec_port80_subcmd { 2978 EC_PORT80_GET_INFO = 0, 2979 EC_PORT80_READ_BUFFER, 2980}; 2981 2982struct ec_params_port80_read { 2983 uint16_t subcmd; 2984 union { 2985 struct __ec_todo_unpacked { 2986 uint32_t offset; 2987 uint32_t num_entries; 2988 } read_buffer; 2989 }; 2990} __ec_todo_packed; 2991 2992struct ec_response_port80_read { 2993 union { 2994 struct __ec_todo_unpacked { 2995 uint32_t writes; 2996 uint32_t history_size; 2997 uint32_t last_boot; 2998 } get_info; 2999 struct __ec_todo_unpacked { 3000 uint16_t codes[EC_PORT80_SIZE_MAX]; 3001 } data; 3002 }; 3003} __ec_todo_packed; 3004 3005struct ec_response_port80_last_boot { 3006 uint16_t code; 3007} __ec_align2; 3008 3009/*****************************************************************************/ 3010/* Temporary secure storage for host verified boot use */ 3011 3012/* Number of bytes in a vstore slot */ 3013#define EC_VSTORE_SLOT_SIZE 64 3014 3015/* Maximum number of vstore slots */ 3016#define EC_VSTORE_SLOT_MAX 32 3017 3018/* Get persistent storage info */ 3019#define EC_CMD_VSTORE_INFO 0x0049 3020struct ec_response_vstore_info { 3021 /* Indicates which slots are locked */ 3022 uint32_t slot_locked; 3023 /* Total number of slots available */ 3024 uint8_t slot_count; 3025} __ec_align_size1; 3026 3027/* 3028 * Read temporary secure storage 3029 * 3030 * Response is EC_VSTORE_SLOT_SIZE bytes of data. 3031 */ 3032#define EC_CMD_VSTORE_READ 0x004A 3033 3034struct ec_params_vstore_read { 3035 uint8_t slot; /* Slot to read from */ 3036} __ec_align1; 3037 3038struct ec_response_vstore_read { 3039 uint8_t data[EC_VSTORE_SLOT_SIZE]; 3040} __ec_align1; 3041 3042/* 3043 * Write temporary secure storage and lock it. 3044 */ 3045#define EC_CMD_VSTORE_WRITE 0x004B 3046 3047struct ec_params_vstore_write { 3048 uint8_t slot; /* Slot to write to */ 3049 uint8_t data[EC_VSTORE_SLOT_SIZE]; 3050} __ec_align1; 3051 3052/*****************************************************************************/ 3053/* Thermal engine commands. Note that there are two implementations. We'll 3054 * reuse the command number, but the data and behavior is incompatible. 3055 * Version 0 is what originally shipped on Link. 3056 * Version 1 separates the CPU thermal limits from the fan control. 3057 */ 3058 3059#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 3060#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 3061 3062/* The version 0 structs are opaque. You have to know what they are for 3063 * the get/set commands to make any sense. 3064 */ 3065 3066/* Version 0 - set */ 3067struct ec_params_thermal_set_threshold { 3068 uint8_t sensor_type; 3069 uint8_t threshold_id; 3070 uint16_t value; 3071} __ec_align2; 3072 3073/* Version 0 - get */ 3074struct ec_params_thermal_get_threshold { 3075 uint8_t sensor_type; 3076 uint8_t threshold_id; 3077} __ec_align1; 3078 3079struct ec_response_thermal_get_threshold { 3080 uint16_t value; 3081} __ec_align2; 3082 3083 3084/* The version 1 structs are visible. */ 3085enum ec_temp_thresholds { 3086 EC_TEMP_THRESH_WARN = 0, 3087 EC_TEMP_THRESH_HIGH, 3088 EC_TEMP_THRESH_HALT, 3089 3090 EC_TEMP_THRESH_COUNT 3091}; 3092 3093/* 3094 * Thermal configuration for one temperature sensor. Temps are in degrees K. 3095 * Zero values will be silently ignored by the thermal task. 3096 * 3097 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree 3098 * hysteresis. 3099 * For example, 3100 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3101 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K 3102 * EC will throttle ap when temperature >= 301 K, and release throttling when 3103 * temperature <= 299 K. 3104 * 3105 * Set 'temp_host_release' value allows thermal task has a custom hysteresis. 3106 * For example, 3107 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3108 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K 3109 * EC will throttle ap when temperature >= 301 K, and release throttling when 3110 * temperature <= 294 K. 3111 * 3112 * Note that this structure is a sub-structure of 3113 * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 3114 */ 3115struct ec_thermal_config { 3116 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 3117 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ 3118 uint32_t temp_fan_off; /* no active cooling needed */ 3119 uint32_t temp_fan_max; /* max active cooling needed */ 3120} __ec_align4; 3121 3122/* Version 1 - get config for one sensor. */ 3123struct ec_params_thermal_get_threshold_v1 { 3124 uint32_t sensor_num; 3125} __ec_align4; 3126/* This returns a struct ec_thermal_config */ 3127 3128/* 3129 * Version 1 - set config for one sensor. 3130 * Use read-modify-write for best results! 3131 */ 3132struct ec_params_thermal_set_threshold_v1 { 3133 uint32_t sensor_num; 3134 struct ec_thermal_config cfg; 3135} __ec_align4; 3136/* This returns no data */ 3137 3138/****************************************************************************/ 3139 3140/* Set or get fan control mode */ 3141#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 3142 3143enum ec_auto_fan_ctrl_cmd { 3144 EC_AUTO_FAN_CONTROL_CMD_SET = 0, 3145 EC_AUTO_FAN_CONTROL_CMD_GET, 3146}; 3147 3148/* Version 1 of input params */ 3149struct ec_params_auto_fan_ctrl_v1 { 3150 uint8_t fan_idx; 3151} __ec_align1; 3152 3153/* Version 2 of input params */ 3154struct ec_params_auto_fan_ctrl_v2 { 3155 uint8_t fan_idx; 3156 uint8_t cmd; /* enum ec_auto_fan_ctrl_cmd */ 3157 uint8_t set_auto; /* only used with EC_AUTO_FAN_CONTROL_CMD_SET - bool 3158 */ 3159} __ec_align4; 3160 3161struct ec_response_auto_fan_control { 3162 uint8_t is_auto; /* bool */ 3163} __ec_align1; 3164 3165/* Get/Set TMP006 calibration data */ 3166#define EC_CMD_TMP006_GET_CALIBRATION 0x0053 3167#define EC_CMD_TMP006_SET_CALIBRATION 0x0054 3168 3169/* 3170 * The original TMP006 calibration only needed four params, but now we need 3171 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 3172 * the params opaque. The v1 "get" response will include the algorithm number 3173 * and how many params it requires. That way we can change the EC code without 3174 * needing to update this file. We can also use a different algorithm on each 3175 * sensor. 3176 */ 3177 3178/* This is the same struct for both v0 and v1. */ 3179struct ec_params_tmp006_get_calibration { 3180 uint8_t index; 3181} __ec_align1; 3182 3183/* Version 0 */ 3184struct ec_response_tmp006_get_calibration_v0 { 3185 float s0; 3186 float b0; 3187 float b1; 3188 float b2; 3189} __ec_align4; 3190 3191struct ec_params_tmp006_set_calibration_v0 { 3192 uint8_t index; 3193 uint8_t reserved[3]; 3194 float s0; 3195 float b0; 3196 float b1; 3197 float b2; 3198} __ec_align4; 3199 3200/* Version 1 */ 3201struct ec_response_tmp006_get_calibration_v1 { 3202 uint8_t algorithm; 3203 uint8_t num_params; 3204 uint8_t reserved[2]; 3205 float val[]; 3206} __ec_align4; 3207 3208struct ec_params_tmp006_set_calibration_v1 { 3209 uint8_t index; 3210 uint8_t algorithm; 3211 uint8_t num_params; 3212 uint8_t reserved; 3213 float val[]; 3214} __ec_align4; 3215 3216 3217/* Read raw TMP006 data */ 3218#define EC_CMD_TMP006_GET_RAW 0x0055 3219 3220struct ec_params_tmp006_get_raw { 3221 uint8_t index; 3222} __ec_align1; 3223 3224struct ec_response_tmp006_get_raw { 3225 int32_t t; /* In 1/100 K */ 3226 int32_t v; /* In nV */ 3227} __ec_align4; 3228 3229/*****************************************************************************/ 3230/* MKBP - Matrix KeyBoard Protocol */ 3231 3232/* 3233 * Read key state 3234 * 3235 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for 3236 * expected response size. 3237 * 3238 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish 3239 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 3240 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 3241 */ 3242#define EC_CMD_MKBP_STATE 0x0060 3243 3244/* 3245 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 3246 */ 3247#define EC_CMD_MKBP_INFO 0x0061 3248 3249struct ec_response_mkbp_info { 3250 uint32_t rows; 3251 uint32_t cols; 3252 /* Formerly "switches", which was 0. */ 3253 uint8_t reserved; 3254} __ec_align_size1; 3255 3256struct ec_params_mkbp_info { 3257 uint8_t info_type; 3258 uint8_t event_type; 3259} __ec_align1; 3260 3261enum ec_mkbp_info_type { 3262 /* 3263 * Info about the keyboard matrix: number of rows and columns. 3264 * 3265 * Returns struct ec_response_mkbp_info. 3266 */ 3267 EC_MKBP_INFO_KBD = 0, 3268 3269 /* 3270 * For buttons and switches, info about which specifically are 3271 * supported. event_type must be set to one of the values in enum 3272 * ec_mkbp_event. 3273 * 3274 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte 3275 * bitmask indicating which buttons or switches are present. See the 3276 * bit inidices below. 3277 */ 3278 EC_MKBP_INFO_SUPPORTED = 1, 3279 3280 /* 3281 * Instantaneous state of buttons and switches. 3282 * 3283 * event_type must be set to one of the values in enum ec_mkbp_event. 3284 * 3285 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] 3286 * indicating the current state of the keyboard matrix. 3287 * 3288 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw 3289 * event state. 3290 * 3291 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the 3292 * state of supported buttons. 3293 * 3294 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the 3295 * state of supported switches. 3296 */ 3297 EC_MKBP_INFO_CURRENT = 2, 3298}; 3299 3300/* Simulate key press */ 3301#define EC_CMD_MKBP_SIMULATE_KEY 0x0062 3302 3303struct ec_params_mkbp_simulate_key { 3304 uint8_t col; 3305 uint8_t row; 3306 uint8_t pressed; 3307} __ec_align1; 3308 3309#define EC_CMD_GET_KEYBOARD_ID 0x0063 3310 3311struct ec_response_keyboard_id { 3312 uint32_t keyboard_id; 3313} __ec_align4; 3314 3315enum keyboard_id { 3316 KEYBOARD_ID_UNSUPPORTED = 0, 3317 KEYBOARD_ID_UNREADABLE = 0xffffffff, 3318}; 3319 3320/* Configure keyboard scanning */ 3321#define EC_CMD_MKBP_SET_CONFIG 0x0064 3322#define EC_CMD_MKBP_GET_CONFIG 0x0065 3323 3324/* flags */ 3325enum mkbp_config_flags { 3326 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 3327}; 3328 3329enum mkbp_config_valid { 3330 EC_MKBP_VALID_SCAN_PERIOD = BIT(0), 3331 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), 3332 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), 3333 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), 3334 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), 3335 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), 3336 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), 3337}; 3338 3339/* 3340 * Configuration for our key scanning algorithm. 3341 * 3342 * Note that this is used as a sub-structure of 3343 * ec_{params/response}_mkbp_get_config. 3344 */ 3345struct ec_mkbp_config { 3346 uint32_t valid_mask; /* valid fields */ 3347 uint8_t flags; /* some flags (enum mkbp_config_flags) */ 3348 uint8_t valid_flags; /* which flags are valid */ 3349 uint16_t scan_period_us; /* period between start of scans */ 3350 /* revert to interrupt mode after no activity for this long */ 3351 uint32_t poll_timeout_us; 3352 /* 3353 * minimum post-scan relax time. Once we finish a scan we check 3354 * the time until we are due to start the next one. If this time is 3355 * shorter this field, we use this instead. 3356 */ 3357 uint16_t min_post_scan_delay_us; 3358 /* delay between setting up output and waiting for it to settle */ 3359 uint16_t output_settle_us; 3360 uint16_t debounce_down_us; /* time for debounce on key down */ 3361 uint16_t debounce_up_us; /* time for debounce on key up */ 3362 /* maximum depth to allow for fifo (0 = no keyscan output) */ 3363 uint8_t fifo_max_depth; 3364} __ec_align_size1; 3365 3366struct ec_params_mkbp_set_config { 3367 struct ec_mkbp_config config; 3368} __ec_align_size1; 3369 3370struct ec_response_mkbp_get_config { 3371 struct ec_mkbp_config config; 3372} __ec_align_size1; 3373 3374/* Run the key scan emulation */ 3375#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 3376 3377enum ec_keyscan_seq_cmd { 3378 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 3379 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 3380 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 3381 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 3382 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 3383}; 3384 3385enum ec_collect_flags { 3386 /* 3387 * Indicates this scan was processed by the EC. Due to timing, some 3388 * scans may be skipped. 3389 */ 3390 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), 3391}; 3392 3393struct ec_collect_item { 3394 uint8_t flags; /* some flags (enum ec_collect_flags) */ 3395} __ec_align1; 3396 3397struct ec_params_keyscan_seq_ctrl { 3398 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 3399 union { 3400 struct __ec_align1 { 3401 uint8_t active; /* still active */ 3402 uint8_t num_items; /* number of items */ 3403 /* Current item being presented */ 3404 uint8_t cur_item; 3405 } status; 3406 struct __ec_todo_unpacked { 3407 /* 3408 * Absolute time for this scan, measured from the 3409 * start of the sequence. 3410 */ 3411 uint32_t time_us; 3412 uint8_t scan[0]; /* keyscan data */ 3413 } add; 3414 struct __ec_align1 { 3415 uint8_t start_item; /* First item to return */ 3416 uint8_t num_items; /* Number of items to return */ 3417 } collect; 3418 }; 3419} __ec_todo_packed; 3420 3421struct ec_result_keyscan_seq_ctrl { 3422 union { 3423 struct __ec_todo_unpacked { 3424 uint8_t num_items; /* Number of items */ 3425 /* Data for each item */ 3426 struct ec_collect_item item[0]; 3427 } collect; 3428 }; 3429} __ec_todo_packed; 3430 3431/* 3432 * Get the next pending MKBP event. 3433 * 3434 * Returns EC_RES_UNAVAILABLE if there is no event pending. 3435 */ 3436#define EC_CMD_GET_NEXT_EVENT 0x0067 3437 3438#define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 3439 3440/* 3441 * We use the most significant bit of the event type to indicate to the host 3442 * that the EC has more MKBP events available to provide. 3443 */ 3444#define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) 3445 3446/* The mask to apply to get the raw event type */ 3447#define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) 3448 3449enum ec_mkbp_event { 3450 /* Keyboard matrix changed. The event data is the new matrix state. */ 3451 EC_MKBP_EVENT_KEY_MATRIX = 0, 3452 3453 /* New host event. The event data is 4 bytes of host event flags. */ 3454 EC_MKBP_EVENT_HOST_EVENT = 1, 3455 3456 /* New Sensor FIFO data. The event data is fifo_info structure. */ 3457 EC_MKBP_EVENT_SENSOR_FIFO = 2, 3458 3459 /* The state of the non-matrixed buttons have changed. */ 3460 EC_MKBP_EVENT_BUTTON = 3, 3461 3462 /* The state of the switches have changed. */ 3463 EC_MKBP_EVENT_SWITCH = 4, 3464 3465 /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 3466 EC_MKBP_EVENT_FINGERPRINT = 5, 3467 3468 /* 3469 * Sysrq event: send emulated sysrq. The event data is sysrq, 3470 * corresponding to the key to be pressed. 3471 */ 3472 EC_MKBP_EVENT_SYSRQ = 6, 3473 3474 /* 3475 * New 64-bit host event. 3476 * The event data is 8 bytes of host event flags. 3477 */ 3478 EC_MKBP_EVENT_HOST_EVENT64 = 7, 3479 3480 /* Notify the AP that something happened on CEC */ 3481 EC_MKBP_EVENT_CEC_EVENT = 8, 3482 3483 /* Send an incoming CEC message to the AP */ 3484 EC_MKBP_EVENT_CEC_MESSAGE = 9, 3485 3486 /* Peripheral device charger event */ 3487 EC_MKBP_EVENT_PCHG = 12, 3488 3489 /* Number of MKBP events */ 3490 EC_MKBP_EVENT_COUNT, 3491}; 3492BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); 3493 3494union __ec_align_offset1 ec_response_get_next_data { 3495 uint8_t key_matrix[13]; 3496 3497 /* Unaligned */ 3498 uint32_t host_event; 3499 uint64_t host_event64; 3500 3501 struct __ec_todo_unpacked { 3502 /* For aligning the fifo_info */ 3503 uint8_t reserved[3]; 3504 struct ec_response_motion_sense_fifo_info info; 3505 } sensor_fifo; 3506 3507 uint32_t buttons; 3508 3509 uint32_t switches; 3510 3511 uint32_t fp_events; 3512 3513 uint32_t sysrq; 3514 3515 /* CEC events from enum mkbp_cec_event */ 3516 uint32_t cec_events; 3517}; 3518 3519union __ec_align_offset1 ec_response_get_next_data_v1 { 3520 uint8_t key_matrix[16]; 3521 3522 /* Unaligned */ 3523 uint32_t host_event; 3524 uint64_t host_event64; 3525 3526 struct __ec_todo_unpacked { 3527 /* For aligning the fifo_info */ 3528 uint8_t reserved[3]; 3529 struct ec_response_motion_sense_fifo_info info; 3530 } sensor_fifo; 3531 3532 uint32_t buttons; 3533 3534 uint32_t switches; 3535 3536 uint32_t fp_events; 3537 3538 uint32_t sysrq; 3539 3540 /* CEC events from enum mkbp_cec_event */ 3541 uint32_t cec_events; 3542 3543 uint8_t cec_message[16]; 3544}; 3545BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); 3546 3547union __ec_align_offset1 ec_response_get_next_data_v3 { 3548 uint8_t key_matrix[18]; 3549 3550 /* Unaligned */ 3551 uint32_t host_event; 3552 uint64_t host_event64; 3553 3554 struct __ec_todo_unpacked { 3555 /* For aligning the fifo_info */ 3556 uint8_t reserved[3]; 3557 struct ec_response_motion_sense_fifo_info info; 3558 } sensor_fifo; 3559 3560 uint32_t buttons; 3561 3562 uint32_t switches; 3563 3564 uint32_t fp_events; 3565 3566 uint32_t sysrq; 3567 3568 /* CEC events from enum mkbp_cec_event */ 3569 uint32_t cec_events; 3570 3571 uint8_t cec_message[16]; 3572}; 3573BUILD_ASSERT(sizeof(union ec_response_get_next_data_v3) == 18); 3574 3575struct ec_response_get_next_event { 3576 uint8_t event_type; 3577 /* Followed by event data if any */ 3578 union ec_response_get_next_data data; 3579} __ec_align1; 3580 3581struct ec_response_get_next_event_v1 { 3582 uint8_t event_type; 3583 /* Followed by event data if any */ 3584 union ec_response_get_next_data_v1 data; 3585} __ec_align1; 3586 3587struct ec_response_get_next_event_v3 { 3588 uint8_t event_type; 3589 /* Followed by event data if any */ 3590 union ec_response_get_next_data_v3 data; 3591} __ec_align1; 3592 3593/* Bit indices for buttons and switches.*/ 3594/* Buttons */ 3595#define EC_MKBP_POWER_BUTTON 0 3596#define EC_MKBP_VOL_UP 1 3597#define EC_MKBP_VOL_DOWN 2 3598#define EC_MKBP_RECOVERY 3 3599#define EC_MKBP_BRI_UP 4 3600#define EC_MKBP_BRI_DOWN 5 3601#define EC_MKBP_SCREEN_LOCK 6 3602 3603/* Switches */ 3604#define EC_MKBP_LID_OPEN 0 3605#define EC_MKBP_TABLET_MODE 1 3606#define EC_MKBP_BASE_ATTACHED 2 3607#define EC_MKBP_FRONT_PROXIMITY 3 3608 3609/* Run keyboard factory test scanning */ 3610#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 3611 3612struct ec_response_keyboard_factory_test { 3613 uint16_t shorted; /* Keyboard pins are shorted */ 3614} __ec_align2; 3615 3616/* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 3617#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 3618#define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) 3619#define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 3620#define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ 3621 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) 3622#define EC_MKBP_FP_MATCH_IDX_OFFSET 12 3623#define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 3624#define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ 3625 >> EC_MKBP_FP_MATCH_IDX_OFFSET) 3626#define EC_MKBP_FP_ENROLL BIT(27) 3627#define EC_MKBP_FP_MATCH BIT(28) 3628#define EC_MKBP_FP_FINGER_DOWN BIT(29) 3629#define EC_MKBP_FP_FINGER_UP BIT(30) 3630#define EC_MKBP_FP_IMAGE_READY BIT(31) 3631/* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ 3632#define EC_MKBP_FP_ERR_ENROLL_OK 0 3633#define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 3634#define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 3635#define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 3636#define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 3637/* Can be used to detect if image was usable for enrollment or not. */ 3638#define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 3639/* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ 3640#define EC_MKBP_FP_ERR_MATCH_NO 0 3641#define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 3642#define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 3643#define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 3644#define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 3645#define EC_MKBP_FP_ERR_MATCH_YES 1 3646#define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 3647#define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 3648 3649 3650/*****************************************************************************/ 3651/* Temperature sensor commands */ 3652 3653/* Read temperature sensor info */ 3654#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3655 3656struct ec_params_temp_sensor_get_info { 3657 uint8_t id; 3658} __ec_align1; 3659 3660struct ec_response_temp_sensor_get_info { 3661 char sensor_name[32]; 3662 uint8_t sensor_type; 3663} __ec_align1; 3664 3665/*****************************************************************************/ 3666 3667/* 3668 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 3669 * commands accidentally sent to the wrong interface. See the ACPI section 3670 * below. 3671 */ 3672 3673/*****************************************************************************/ 3674/* Host event commands */ 3675 3676 3677/* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ 3678/* 3679 * Host event mask params and response structures, shared by all of the host 3680 * event commands below. 3681 */ 3682struct ec_params_host_event_mask { 3683 uint32_t mask; 3684} __ec_align4; 3685 3686struct ec_response_host_event_mask { 3687 uint32_t mask; 3688} __ec_align4; 3689 3690/* These all use ec_response_host_event_mask */ 3691#define EC_CMD_HOST_EVENT_GET_B 0x0087 3692#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 3693#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 3694#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3695 3696/* These all use ec_params_host_event_mask */ 3697#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 3698#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 3699#define EC_CMD_HOST_EVENT_CLEAR 0x008C 3700#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 3701#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 3702 3703/* 3704 * Unified host event programming interface - Should be used by newer versions 3705 * of BIOS/OS to program host events and masks 3706 */ 3707 3708struct ec_params_host_event { 3709 3710 /* Action requested by host - one of enum ec_host_event_action. */ 3711 uint8_t action; 3712 3713 /* 3714 * Mask type that the host requested the action on - one of 3715 * enum ec_host_event_mask_type. 3716 */ 3717 uint8_t mask_type; 3718 3719 /* Set to 0, ignore on read */ 3720 uint16_t reserved; 3721 3722 /* Value to be used in case of set operations. */ 3723 uint64_t value; 3724} __ec_align4; 3725 3726/* 3727 * Response structure returned by EC_CMD_HOST_EVENT. 3728 * Update the value on a GET request. Set to 0 on GET/CLEAR 3729 */ 3730 3731struct ec_response_host_event { 3732 3733 /* Mask value in case of get operation */ 3734 uint64_t value; 3735} __ec_align4; 3736 3737enum ec_host_event_action { 3738 /* 3739 * params.value is ignored. Value of mask_type populated 3740 * in response.value 3741 */ 3742 EC_HOST_EVENT_GET, 3743 3744 /* Bits in params.value are set */ 3745 EC_HOST_EVENT_SET, 3746 3747 /* Bits in params.value are cleared */ 3748 EC_HOST_EVENT_CLEAR, 3749}; 3750 3751enum ec_host_event_mask_type { 3752 3753 /* Main host event copy */ 3754 EC_HOST_EVENT_MAIN, 3755 3756 /* Copy B of host events */ 3757 EC_HOST_EVENT_B, 3758 3759 /* SCI Mask */ 3760 EC_HOST_EVENT_SCI_MASK, 3761 3762 /* SMI Mask */ 3763 EC_HOST_EVENT_SMI_MASK, 3764 3765 /* Mask of events that should be always reported in hostevents */ 3766 EC_HOST_EVENT_ALWAYS_REPORT_MASK, 3767 3768 /* Active wake mask */ 3769 EC_HOST_EVENT_ACTIVE_WAKE_MASK, 3770 3771 /* Lazy wake mask for S0ix */ 3772 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 3773 3774 /* Lazy wake mask for S3 */ 3775 EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 3776 3777 /* Lazy wake mask for S5 */ 3778 EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 3779}; 3780 3781#define EC_CMD_HOST_EVENT 0x00A4 3782 3783/*****************************************************************************/ 3784/* Switch commands */ 3785 3786/* Enable/disable LCD backlight */ 3787#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3788 3789struct ec_params_switch_enable_backlight { 3790 uint8_t enabled; 3791} __ec_align1; 3792 3793/* Enable/disable WLAN/Bluetooth */ 3794#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3795#define EC_VER_SWITCH_ENABLE_WIRELESS 1 3796 3797/* Version 0 params; no response */ 3798struct ec_params_switch_enable_wireless_v0 { 3799 uint8_t enabled; 3800} __ec_align1; 3801 3802/* Version 1 params */ 3803struct ec_params_switch_enable_wireless_v1 { 3804 /* Flags to enable now */ 3805 uint8_t now_flags; 3806 3807 /* Which flags to copy from now_flags */ 3808 uint8_t now_mask; 3809 3810 /* 3811 * Flags to leave enabled in S3, if they're on at the S0->S3 3812 * transition. (Other flags will be disabled by the S0->S3 3813 * transition.) 3814 */ 3815 uint8_t suspend_flags; 3816 3817 /* Which flags to copy from suspend_flags */ 3818 uint8_t suspend_mask; 3819} __ec_align1; 3820 3821/* Version 1 response */ 3822struct ec_response_switch_enable_wireless_v1 { 3823 /* Flags to enable now */ 3824 uint8_t now_flags; 3825 3826 /* Flags to leave enabled in S3 */ 3827 uint8_t suspend_flags; 3828} __ec_align1; 3829 3830/*****************************************************************************/ 3831/* GPIO commands. Only available on EC if write protect has been disabled. */ 3832 3833/* Set GPIO output value */ 3834#define EC_CMD_GPIO_SET 0x0092 3835 3836struct ec_params_gpio_set { 3837 char name[32]; 3838 uint8_t val; 3839} __ec_align1; 3840 3841/* Get GPIO value */ 3842#define EC_CMD_GPIO_GET 0x0093 3843 3844/* Version 0 of input params and response */ 3845struct ec_params_gpio_get { 3846 char name[32]; 3847} __ec_align1; 3848 3849struct ec_response_gpio_get { 3850 uint8_t val; 3851} __ec_align1; 3852 3853/* Version 1 of input params and response */ 3854struct ec_params_gpio_get_v1 { 3855 uint8_t subcmd; 3856 union { 3857 struct __ec_align1 { 3858 char name[32]; 3859 } get_value_by_name; 3860 struct __ec_align1 { 3861 uint8_t index; 3862 } get_info; 3863 }; 3864} __ec_align1; 3865 3866struct ec_response_gpio_get_v1 { 3867 union { 3868 struct __ec_align1 { 3869 uint8_t val; 3870 } get_value_by_name, get_count; 3871 struct __ec_todo_unpacked { 3872 uint8_t val; 3873 char name[32]; 3874 uint32_t flags; 3875 } get_info; 3876 }; 3877} __ec_todo_packed; 3878 3879enum gpio_get_subcmd { 3880 EC_GPIO_GET_BY_NAME = 0, 3881 EC_GPIO_GET_COUNT = 1, 3882 EC_GPIO_GET_INFO = 2, 3883}; 3884 3885/*****************************************************************************/ 3886/* I2C commands. Only available when flash write protect is unlocked. */ 3887 3888/* 3889 * CAUTION: These commands are deprecated, and are not supported anymore in EC 3890 * builds >= 8398.0.0 (see crosbug.com/p/23570). 3891 * 3892 * Use EC_CMD_I2C_PASSTHRU instead. 3893 */ 3894 3895/* Read I2C bus */ 3896#define EC_CMD_I2C_READ 0x0094 3897 3898struct ec_params_i2c_read { 3899 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3900 uint8_t read_size; /* Either 8 or 16. */ 3901 uint8_t port; 3902 uint8_t offset; 3903} __ec_align_size1; 3904 3905struct ec_response_i2c_read { 3906 uint16_t data; 3907} __ec_align2; 3908 3909/* Write I2C bus */ 3910#define EC_CMD_I2C_WRITE 0x0095 3911 3912struct ec_params_i2c_write { 3913 uint16_t data; 3914 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3915 uint8_t write_size; /* Either 8 or 16. */ 3916 uint8_t port; 3917 uint8_t offset; 3918} __ec_align_size1; 3919 3920/*****************************************************************************/ 3921/* Charge state commands. Only available when flash write protect unlocked. */ 3922 3923/* Force charge state machine to stop charging the battery or force it to 3924 * discharge the battery. 3925 */ 3926#define EC_CMD_CHARGE_CONTROL 0x0096 3927#define EC_VER_CHARGE_CONTROL 3 3928 3929enum ec_charge_control_mode { 3930 CHARGE_CONTROL_NORMAL = 0, 3931 CHARGE_CONTROL_IDLE, 3932 CHARGE_CONTROL_DISCHARGE, 3933 /* Add no more entry below. */ 3934 CHARGE_CONTROL_COUNT, 3935}; 3936 3937#define EC_CHARGE_MODE_TEXT \ 3938 { \ 3939 [CHARGE_CONTROL_NORMAL] = "NORMAL", \ 3940 [CHARGE_CONTROL_IDLE] = "IDLE", \ 3941 [CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \ 3942 } 3943 3944enum ec_charge_control_cmd { 3945 EC_CHARGE_CONTROL_CMD_SET = 0, 3946 EC_CHARGE_CONTROL_CMD_GET, 3947}; 3948 3949enum ec_charge_control_flag { 3950 EC_CHARGE_CONTROL_FLAG_NO_IDLE = BIT(0), 3951}; 3952 3953struct ec_params_charge_control { 3954 uint32_t mode; /* enum charge_control_mode */ 3955 3956 /* Below are the fields added in V2. */ 3957 uint8_t cmd; /* enum ec_charge_control_cmd. */ 3958 uint8_t flags; /* enum ec_charge_control_flag (v3+) */ 3959 /* 3960 * Lower and upper thresholds for battery sustainer. This struct isn't 3961 * named to avoid tainting foreign projects' name spaces. 3962 * 3963 * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer 3964 * will be disabled. To disable battery sustainer, set mode=NORMAL, 3965 * lower=-1, upper=-1. 3966 */ 3967 struct { 3968 int8_t lower; /* Display SoC in percentage. */ 3969 int8_t upper; /* Display SoC in percentage. */ 3970 } sustain_soc; 3971} __ec_align4; 3972 3973/* Added in v2 */ 3974struct ec_response_charge_control { 3975 uint32_t mode; /* enum charge_control_mode */ 3976 struct { /* Battery sustainer thresholds */ 3977 int8_t lower; 3978 int8_t upper; 3979 } sustain_soc; 3980 uint8_t flags; /* enum ec_charge_control_flag (v3+) */ 3981 uint8_t reserved; 3982} __ec_align4; 3983 3984/*****************************************************************************/ 3985 3986/* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 3987#define EC_CMD_CONSOLE_SNAPSHOT 0x0097 3988 3989/* 3990 * Read data from the saved snapshot. If the subcmd parameter is 3991 * CONSOLE_READ_NEXT, this will return data starting from the beginning of 3992 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the 3993 * end of the previous snapshot. 3994 * 3995 * The params are only looked at in version >= 1 of this command. Prior 3996 * versions will just default to CONSOLE_READ_NEXT behavior. 3997 * 3998 * Response is null-terminated string. Empty string, if there is no more 3999 * remaining output. 4000 */ 4001#define EC_CMD_CONSOLE_READ 0x0098 4002 4003enum ec_console_read_subcmd { 4004 CONSOLE_READ_NEXT = 0, 4005 CONSOLE_READ_RECENT 4006}; 4007 4008struct ec_params_console_read_v1 { 4009 uint8_t subcmd; /* enum ec_console_read_subcmd */ 4010} __ec_align1; 4011 4012/*****************************************************************************/ 4013 4014/* 4015 * Cut off battery power immediately or after the host has shut down. 4016 * 4017 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. 4018 * EC_RES_SUCCESS if the command was successful. 4019 * EC_RES_ERROR if the cut off command failed. 4020 */ 4021#define EC_CMD_BATTERY_CUT_OFF 0x0099 4022 4023#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) 4024 4025struct ec_params_battery_cutoff { 4026 uint8_t flags; 4027} __ec_align1; 4028 4029/*****************************************************************************/ 4030/* USB port mux control. */ 4031 4032/* 4033 * Switch USB mux or return to automatic switching. 4034 */ 4035#define EC_CMD_USB_MUX 0x009A 4036 4037struct ec_params_usb_mux { 4038 uint8_t mux; 4039} __ec_align1; 4040 4041/*****************************************************************************/ 4042/* LDOs / FETs control. */ 4043 4044enum ec_ldo_state { 4045 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 4046 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 4047}; 4048 4049/* 4050 * Switch on/off a LDO. 4051 */ 4052#define EC_CMD_LDO_SET 0x009B 4053 4054struct ec_params_ldo_set { 4055 uint8_t index; 4056 uint8_t state; 4057} __ec_align1; 4058 4059/* 4060 * Get LDO state. 4061 */ 4062#define EC_CMD_LDO_GET 0x009C 4063 4064struct ec_params_ldo_get { 4065 uint8_t index; 4066} __ec_align1; 4067 4068struct ec_response_ldo_get { 4069 uint8_t state; 4070} __ec_align1; 4071 4072/*****************************************************************************/ 4073/* Power info. */ 4074 4075/* 4076 * Get power info. 4077 */ 4078#define EC_CMD_POWER_INFO 0x009D 4079 4080struct ec_response_power_info { 4081 uint32_t usb_dev_type; 4082 uint16_t voltage_ac; 4083 uint16_t voltage_system; 4084 uint16_t current_system; 4085 uint16_t usb_current_limit; 4086} __ec_align4; 4087 4088/*****************************************************************************/ 4089/* I2C passthru command */ 4090 4091#define EC_CMD_I2C_PASSTHRU 0x009E 4092 4093/* Read data; if not present, message is a write */ 4094#define EC_I2C_FLAG_READ BIT(15) 4095 4096/* Mask for address */ 4097#define EC_I2C_ADDR_MASK 0x3ff 4098 4099#define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ 4100#define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ 4101 4102/* Any error */ 4103#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 4104 4105struct ec_params_i2c_passthru_msg { 4106 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 4107 uint16_t len; /* Number of bytes to read or write */ 4108} __ec_align2; 4109 4110struct ec_params_i2c_passthru { 4111 uint8_t port; /* I2C port number */ 4112 uint8_t num_msgs; /* Number of messages */ 4113 struct ec_params_i2c_passthru_msg msg[]; 4114 /* Data to write for all messages is concatenated here */ 4115} __ec_align2; 4116 4117struct ec_response_i2c_passthru { 4118 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 4119 uint8_t num_msgs; /* Number of messages processed */ 4120 uint8_t data[]; /* Data read by messages concatenated here */ 4121} __ec_align1; 4122 4123/*****************************************************************************/ 4124/* AP hang detect */ 4125#define EC_CMD_HANG_DETECT 0x009F 4126 4127#define EC_HANG_DETECT_MIN_TIMEOUT 5 4128#define EC_HANG_DETECT_MAX_TIMEOUT 65535 4129 4130/* EC hang detect commands */ 4131enum ec_hang_detect_cmds { 4132 /* Reload AP hang detect timer. */ 4133 EC_HANG_DETECT_CMD_RELOAD = 0x0, 4134 4135 /* Stop AP hang detect timer. */ 4136 EC_HANG_DETECT_CMD_CANCEL = 0x1, 4137 4138 /* Configure watchdog with given reboot timeout and 4139 * cancel currently running AP hang detect timer. 4140 */ 4141 EC_HANG_DETECT_CMD_SET_TIMEOUT = 0x2, 4142 4143 /* Get last hang status - whether the AP boot was clear or not */ 4144 EC_HANG_DETECT_CMD_GET_STATUS = 0x3, 4145 4146 /* Clear last hang status. Called when AP is rebooting/shutting down 4147 * gracefully. 4148 */ 4149 EC_HANG_DETECT_CMD_CLEAR_STATUS = 0x4 4150}; 4151 4152struct ec_params_hang_detect { 4153 uint16_t command; /* enum ec_hang_detect_cmds */ 4154 /* Timeout in seconds before generating reboot */ 4155 uint16_t reboot_timeout_sec; 4156} __ec_align2; 4157 4158/* Status codes that describe whether AP has boot normally or the hang has been 4159 * detected and EC has reset AP 4160 */ 4161enum ec_hang_detect_status { 4162 EC_HANG_DETECT_AP_BOOT_NORMAL = 0x0, 4163 EC_HANG_DETECT_AP_BOOT_EC_WDT = 0x1, 4164 EC_HANG_DETECT_AP_BOOT_COUNT, 4165}; 4166 4167struct ec_response_hang_detect { 4168 uint8_t status; /* enum ec_hang_detect_status */ 4169} __ec_align1; 4170/*****************************************************************************/ 4171/* Commands for battery charging */ 4172 4173/* 4174 * This is the single catch-all host command to exchange data regarding the 4175 * charge state machine (v2 and up). 4176 */ 4177#define EC_CMD_CHARGE_STATE 0x00A0 4178 4179/* Subcommands for this host command */ 4180enum charge_state_command { 4181 CHARGE_STATE_CMD_GET_STATE, 4182 CHARGE_STATE_CMD_GET_PARAM, 4183 CHARGE_STATE_CMD_SET_PARAM, 4184 CHARGE_STATE_NUM_CMDS 4185}; 4186 4187/* 4188 * Known param numbers are defined here. Ranges are reserved for board-specific 4189 * params, which are handled by the particular implementations. 4190 */ 4191enum charge_state_params { 4192 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ 4193 CS_PARAM_CHG_CURRENT, /* charger current limit */ 4194 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 4195 CS_PARAM_CHG_STATUS, /* charger-specific status */ 4196 CS_PARAM_CHG_OPTION, /* charger-specific options */ 4197 CS_PARAM_LIMIT_POWER, /* 4198 * Check if power is limited due to 4199 * low battery and / or a weak external 4200 * charger. READ ONLY. 4201 */ 4202 /* How many so far? */ 4203 CS_NUM_BASE_PARAMS, 4204 4205 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ 4206 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 4207 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 4208 4209 /* Range for CONFIG_CHARGE_STATE_DEBUG params */ 4210 CS_PARAM_DEBUG_MIN = 0x20000, 4211 CS_PARAM_DEBUG_CTL_MODE = 0x20000, 4212 CS_PARAM_DEBUG_MANUAL_MODE, 4213 CS_PARAM_DEBUG_SEEMS_DEAD, 4214 CS_PARAM_DEBUG_SEEMS_DISCONNECTED, 4215 CS_PARAM_DEBUG_BATT_REMOVED, 4216 CS_PARAM_DEBUG_MANUAL_CURRENT, 4217 CS_PARAM_DEBUG_MANUAL_VOLTAGE, 4218 CS_PARAM_DEBUG_MAX = 0x2ffff, 4219 4220 /* Other custom param ranges go here... */ 4221}; 4222 4223struct ec_params_charge_state { 4224 uint8_t cmd; /* enum charge_state_command */ 4225 union { 4226 /* get_state has no args */ 4227 4228 struct __ec_todo_unpacked { 4229 uint32_t param; /* enum charge_state_param */ 4230 } get_param; 4231 4232 struct __ec_todo_unpacked { 4233 uint32_t param; /* param to set */ 4234 uint32_t value; /* value to set */ 4235 } set_param; 4236 }; 4237} __ec_todo_packed; 4238 4239struct ec_response_charge_state { 4240 union { 4241 struct __ec_align4 { 4242 int ac; 4243 int chg_voltage; 4244 int chg_current; 4245 int chg_input_current; 4246 int batt_state_of_charge; 4247 } get_state; 4248 4249 struct __ec_align4 { 4250 uint32_t value; 4251 } get_param; 4252 4253 /* set_param returns no args */ 4254 }; 4255} __ec_align4; 4256 4257 4258/* 4259 * Set maximum battery charging current. 4260 */ 4261#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 4262 4263struct ec_params_current_limit { 4264 uint32_t limit; /* in mA */ 4265} __ec_align4; 4266 4267/* 4268 * Set maximum external voltage / current. 4269 */ 4270#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 4271 4272/* Command v0 is used only on Spring and is obsolete + unsupported */ 4273struct ec_params_external_power_limit_v1 { 4274 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 4275 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 4276} __ec_align2; 4277 4278#define EC_POWER_LIMIT_NONE 0xffff 4279 4280/* 4281 * Set maximum voltage & current of a dedicated charge port 4282 */ 4283#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 4284 4285struct ec_params_dedicated_charger_limit { 4286 uint16_t current_lim; /* in mA */ 4287 uint16_t voltage_lim; /* in mV */ 4288} __ec_align2; 4289 4290/*****************************************************************************/ 4291/* Hibernate/Deep Sleep Commands */ 4292 4293/* Set the delay before going into hibernation. */ 4294#define EC_CMD_HIBERNATION_DELAY 0x00A8 4295 4296struct ec_params_hibernation_delay { 4297 /* 4298 * Seconds to wait in G3 before hibernate. Pass in 0 to read the 4299 * current settings without changing them. 4300 */ 4301 uint32_t seconds; 4302} __ec_align4; 4303 4304struct ec_response_hibernation_delay { 4305 /* 4306 * The current time in seconds in which the system has been in the G3 4307 * state. This value is reset if the EC transitions out of G3. 4308 */ 4309 uint32_t time_g3; 4310 4311 /* 4312 * The current time remaining in seconds until the EC should hibernate. 4313 * This value is also reset if the EC transitions out of G3. 4314 */ 4315 uint32_t time_remaining; 4316 4317 /* 4318 * The current time in seconds that the EC should wait in G3 before 4319 * hibernating. 4320 */ 4321 uint32_t hibernate_delay; 4322} __ec_align4; 4323 4324/* Inform the EC when entering a sleep state */ 4325#define EC_CMD_HOST_SLEEP_EVENT 0x00A9 4326 4327enum host_sleep_event { 4328 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 4329 HOST_SLEEP_EVENT_S3_RESUME = 2, 4330 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 4331 HOST_SLEEP_EVENT_S0IX_RESUME = 4, 4332 /* S3 suspend with additional enabled wake sources */ 4333 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, 4334}; 4335 4336struct ec_params_host_sleep_event { 4337 uint8_t sleep_event; 4338} __ec_align1; 4339 4340/* 4341 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep 4342 * transition failures 4343 */ 4344#define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 4345 4346/* Disable timeout detection for this sleep transition */ 4347#define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF 4348 4349struct ec_params_host_sleep_event_v1 { 4350 /* The type of sleep being entered or exited. */ 4351 uint8_t sleep_event; 4352 4353 /* Padding */ 4354 uint8_t reserved; 4355 union { 4356 /* Parameters that apply for suspend messages. */ 4357 struct { 4358 /* 4359 * The timeout in milliseconds between when this message 4360 * is received and when the EC will declare sleep 4361 * transition failure if the sleep signal is not 4362 * asserted. 4363 */ 4364 uint16_t sleep_timeout_ms; 4365 } suspend_params; 4366 4367 /* No parameters for non-suspend messages. */ 4368 }; 4369} __ec_align2; 4370 4371/* A timeout occurred when this bit is set */ 4372#define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 4373 4374/* 4375 * The mask defining which bits correspond to the number of sleep transitions, 4376 * as well as the maximum number of suspend line transitions that will be 4377 * reported back to the host. 4378 */ 4379#define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF 4380 4381struct ec_response_host_sleep_event_v1 { 4382 union { 4383 /* Response fields that apply for resume messages. */ 4384 struct { 4385 /* 4386 * The number of sleep power signal transitions that 4387 * occurred since the suspend message. The high bit 4388 * indicates a timeout occurred. 4389 */ 4390 uint32_t sleep_transitions; 4391 } resume_response; 4392 4393 /* No response fields for non-resume messages. */ 4394 }; 4395} __ec_align4; 4396 4397/*****************************************************************************/ 4398/* Device events */ 4399#define EC_CMD_DEVICE_EVENT 0x00AA 4400 4401enum ec_device_event { 4402 EC_DEVICE_EVENT_TRACKPAD, 4403 EC_DEVICE_EVENT_DSP, 4404 EC_DEVICE_EVENT_WIFI, 4405 EC_DEVICE_EVENT_WLC, 4406}; 4407 4408enum ec_device_event_param { 4409 /* Get and clear pending device events */ 4410 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 4411 /* Get device event mask */ 4412 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 4413 /* Set device event mask */ 4414 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 4415}; 4416 4417#define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) 4418 4419struct ec_params_device_event { 4420 uint32_t event_mask; 4421 uint8_t param; 4422} __ec_align_size1; 4423 4424struct ec_response_device_event { 4425 uint32_t event_mask; 4426} __ec_align4; 4427 4428/*****************************************************************************/ 4429/* Smart battery pass-through */ 4430 4431/* Get / Set 16-bit smart battery registers */ 4432#define EC_CMD_SB_READ_WORD 0x00B0 4433#define EC_CMD_SB_WRITE_WORD 0x00B1 4434 4435/* Get / Set string smart battery parameters 4436 * formatted as SMBUS "block". 4437 */ 4438#define EC_CMD_SB_READ_BLOCK 0x00B2 4439#define EC_CMD_SB_WRITE_BLOCK 0x00B3 4440 4441struct ec_params_sb_rd { 4442 uint8_t reg; 4443} __ec_align1; 4444 4445struct ec_response_sb_rd_word { 4446 uint16_t value; 4447} __ec_align2; 4448 4449struct ec_params_sb_wr_word { 4450 uint8_t reg; 4451 uint16_t value; 4452} __ec_align1; 4453 4454struct ec_response_sb_rd_block { 4455 uint8_t data[32]; 4456} __ec_align1; 4457 4458struct ec_params_sb_wr_block { 4459 uint8_t reg; 4460 uint16_t data[32]; 4461} __ec_align1; 4462 4463/*****************************************************************************/ 4464/* Battery vendor parameters 4465 * 4466 * Get or set vendor-specific parameters in the battery. Implementations may 4467 * differ between boards or batteries. On a set operation, the response 4468 * contains the actual value set, which may be rounded or clipped from the 4469 * requested value. 4470 */ 4471 4472#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 4473 4474enum ec_battery_vendor_param_mode { 4475 BATTERY_VENDOR_PARAM_MODE_GET = 0, 4476 BATTERY_VENDOR_PARAM_MODE_SET, 4477}; 4478 4479struct ec_params_battery_vendor_param { 4480 uint32_t param; 4481 uint32_t value; 4482 uint8_t mode; 4483} __ec_align_size1; 4484 4485struct ec_response_battery_vendor_param { 4486 uint32_t value; 4487} __ec_align4; 4488 4489/*****************************************************************************/ 4490/* 4491 * Smart Battery Firmware Update Commands 4492 */ 4493#define EC_CMD_SB_FW_UPDATE 0x00B5 4494 4495enum ec_sb_fw_update_subcmd { 4496 EC_SB_FW_UPDATE_PREPARE = 0x0, 4497 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 4498 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 4499 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 4500 EC_SB_FW_UPDATE_END = 0x4, 4501 EC_SB_FW_UPDATE_STATUS = 0x5, 4502 EC_SB_FW_UPDATE_PROTECT = 0x6, 4503 EC_SB_FW_UPDATE_MAX = 0x7, 4504}; 4505 4506#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 4507#define SB_FW_UPDATE_CMD_STATUS_SIZE 2 4508#define SB_FW_UPDATE_CMD_INFO_SIZE 8 4509 4510struct ec_sb_fw_update_header { 4511 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 4512 uint16_t fw_id; /* firmware id */ 4513} __ec_align4; 4514 4515struct ec_params_sb_fw_update { 4516 struct ec_sb_fw_update_header hdr; 4517 union { 4518 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 4519 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4520 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 4521 /* EC_SB_FW_UPDATE_END = 0x4 */ 4522 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4523 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 4524 /* Those have no args */ 4525 4526 /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 4527 struct __ec_align4 { 4528 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 4529 } write; 4530 }; 4531} __ec_align4; 4532 4533struct ec_response_sb_fw_update { 4534 union { 4535 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4536 struct __ec_align1 { 4537 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 4538 } info; 4539 4540 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4541 struct __ec_align1 { 4542 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 4543 } status; 4544 }; 4545} __ec_align1; 4546 4547/* 4548 * Entering Verified Boot Mode Command 4549 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 4550 * Valid Modes are: normal, developer, and recovery. 4551 */ 4552#define EC_CMD_ENTERING_MODE 0x00B6 4553 4554struct ec_params_entering_mode { 4555 int vboot_mode; 4556} __ec_align4; 4557 4558#define VBOOT_MODE_NORMAL 0 4559#define VBOOT_MODE_DEVELOPER 1 4560#define VBOOT_MODE_RECOVERY 2 4561 4562/*****************************************************************************/ 4563/* 4564 * I2C passthru protection command: Protects I2C tunnels against access on 4565 * certain addresses (board-specific). 4566 */ 4567#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 4568 4569enum ec_i2c_passthru_protect_subcmd { 4570 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 4571 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 4572}; 4573 4574struct ec_params_i2c_passthru_protect { 4575 uint8_t subcmd; 4576 uint8_t port; /* I2C port number */ 4577} __ec_align1; 4578 4579struct ec_response_i2c_passthru_protect { 4580 uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 4581} __ec_align1; 4582 4583 4584/*****************************************************************************/ 4585/* 4586 * HDMI CEC commands 4587 * 4588 * These commands are for sending and receiving message via HDMI CEC 4589 */ 4590 4591#define EC_CEC_MAX_PORTS 16 4592 4593#define MAX_CEC_MSG_LEN 16 4594 4595/* 4596 * Helper macros for packing/unpacking cec_events. 4597 * bits[27:0] : bitmask of events from enum mkbp_cec_event 4598 * bits[31:28]: port number 4599 */ 4600#define EC_MKBP_EVENT_CEC_PACK(events, port) \ 4601 (((events) & GENMASK(27, 0)) | (((port) & 0xf) << 28)) 4602#define EC_MKBP_EVENT_CEC_GET_EVENTS(event) ((event) & GENMASK(27, 0)) 4603#define EC_MKBP_EVENT_CEC_GET_PORT(event) (((event) >> 28) & 0xf) 4604 4605/* CEC message from the AP to be written on the CEC bus */ 4606#define EC_CMD_CEC_WRITE_MSG 0x00B8 4607 4608/** 4609 * struct ec_params_cec_write - Message to write to the CEC bus 4610 * @msg: message content to write to the CEC bus 4611 */ 4612struct ec_params_cec_write { 4613 uint8_t msg[MAX_CEC_MSG_LEN]; 4614} __ec_align1; 4615 4616/** 4617 * struct ec_params_cec_write_v1 - Message to write to the CEC bus 4618 * @port: CEC port to write the message on 4619 * @msg_len: length of msg in bytes 4620 * @msg: message content to write to the CEC bus 4621 */ 4622struct ec_params_cec_write_v1 { 4623 uint8_t port; 4624 uint8_t msg_len; 4625 uint8_t msg[MAX_CEC_MSG_LEN]; 4626} __ec_align1; 4627 4628/* CEC message read from a CEC bus reported back to the AP */ 4629#define EC_CMD_CEC_READ_MSG 0x00B9 4630 4631/** 4632 * struct ec_params_cec_read - Read a message from the CEC bus 4633 * @port: CEC port to read a message on 4634 */ 4635struct ec_params_cec_read { 4636 uint8_t port; 4637} __ec_align1; 4638 4639/** 4640 * struct ec_response_cec_read - Message read from the CEC bus 4641 * @msg_len: length of msg in bytes 4642 * @msg: message content read from the CEC bus 4643 */ 4644struct ec_response_cec_read { 4645 uint8_t msg_len; 4646 uint8_t msg[MAX_CEC_MSG_LEN]; 4647} __ec_align1; 4648 4649/* Set various CEC parameters */ 4650#define EC_CMD_CEC_SET 0x00BA 4651 4652/** 4653 * struct ec_params_cec_set - CEC parameters set 4654 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4655 * @port: CEC port to set the parameter on 4656 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC 4657 * or 1 to enable CEC functionality, in case cmd is 4658 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical 4659 * address between 0 and 15 or 0xff to unregister 4660 */ 4661struct ec_params_cec_set { 4662 uint8_t cmd : 4; /* enum cec_command */ 4663 uint8_t port : 4; 4664 uint8_t val; 4665} __ec_align1; 4666 4667/* Read various CEC parameters */ 4668#define EC_CMD_CEC_GET 0x00BB 4669 4670/** 4671 * struct ec_params_cec_get - CEC parameters get 4672 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4673 * @port: CEC port to get the parameter on 4674 */ 4675struct ec_params_cec_get { 4676 uint8_t cmd : 4; /* enum cec_command */ 4677 uint8_t port : 4; 4678} __ec_align1; 4679 4680/** 4681 * struct ec_response_cec_get - CEC parameters get response 4682 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is 4683 * disabled or 1 if CEC functionality is enabled, 4684 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the 4685 * configured logical address between 0 and 15 or 0xff if unregistered 4686 */ 4687struct ec_response_cec_get { 4688 uint8_t val; 4689} __ec_align1; 4690 4691/* Get the number of CEC ports */ 4692#define EC_CMD_CEC_PORT_COUNT 0x00C1 4693 4694/** 4695 * struct ec_response_cec_port_count - CEC port count response 4696 * @port_count: number of CEC ports 4697 */ 4698struct ec_response_cec_port_count { 4699 uint8_t port_count; 4700} __ec_align1; 4701 4702/* CEC parameters command */ 4703enum cec_command { 4704 /* CEC reading, writing and events enable */ 4705 CEC_CMD_ENABLE, 4706 /* CEC logical address */ 4707 CEC_CMD_LOGICAL_ADDRESS, 4708}; 4709 4710/* Events from CEC to AP */ 4711enum mkbp_cec_event { 4712 /* Outgoing message was acknowledged by a follower */ 4713 EC_MKBP_CEC_SEND_OK = BIT(0), 4714 /* Outgoing message was not acknowledged */ 4715 EC_MKBP_CEC_SEND_FAILED = BIT(1), 4716 /* Incoming message can be read out by AP */ 4717 EC_MKBP_CEC_HAVE_DATA = BIT(2), 4718}; 4719 4720/*****************************************************************************/ 4721 4722/* Commands for audio codec. */ 4723#define EC_CMD_EC_CODEC 0x00BC 4724 4725enum ec_codec_subcmd { 4726 EC_CODEC_GET_CAPABILITIES = 0x0, 4727 EC_CODEC_GET_SHM_ADDR = 0x1, 4728 EC_CODEC_SET_SHM_ADDR = 0x2, 4729 EC_CODEC_SUBCMD_COUNT, 4730}; 4731 4732enum ec_codec_cap { 4733 EC_CODEC_CAP_WOV_AUDIO_SHM = 0, 4734 EC_CODEC_CAP_WOV_LANG_SHM = 1, 4735 EC_CODEC_CAP_LAST = 32, 4736}; 4737 4738enum ec_codec_shm_id { 4739 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0, 4740 EC_CODEC_SHM_ID_WOV_LANG = 0x1, 4741 EC_CODEC_SHM_ID_LAST, 4742}; 4743 4744enum ec_codec_shm_type { 4745 EC_CODEC_SHM_TYPE_EC_RAM = 0x0, 4746 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1, 4747}; 4748 4749struct __ec_align1 ec_param_ec_codec_get_shm_addr { 4750 uint8_t shm_id; 4751 uint8_t reserved[3]; 4752}; 4753 4754struct __ec_align4 ec_param_ec_codec_set_shm_addr { 4755 uint64_t phys_addr; 4756 uint32_t len; 4757 uint8_t shm_id; 4758 uint8_t reserved[3]; 4759}; 4760 4761struct __ec_align4 ec_param_ec_codec { 4762 uint8_t cmd; /* enum ec_codec_subcmd */ 4763 uint8_t reserved[3]; 4764 4765 union { 4766 struct ec_param_ec_codec_get_shm_addr 4767 get_shm_addr_param; 4768 struct ec_param_ec_codec_set_shm_addr 4769 set_shm_addr_param; 4770 }; 4771}; 4772 4773struct __ec_align4 ec_response_ec_codec_get_capabilities { 4774 uint32_t capabilities; 4775}; 4776 4777struct __ec_align4 ec_response_ec_codec_get_shm_addr { 4778 uint64_t phys_addr; 4779 uint32_t len; 4780 uint8_t type; 4781 uint8_t reserved[3]; 4782}; 4783 4784/*****************************************************************************/ 4785 4786/* Commands for DMIC on audio codec. */ 4787#define EC_CMD_EC_CODEC_DMIC 0x00BD 4788 4789enum ec_codec_dmic_subcmd { 4790 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0, 4791 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1, 4792 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2, 4793 EC_CODEC_DMIC_SUBCMD_COUNT, 4794}; 4795 4796enum ec_codec_dmic_channel { 4797 EC_CODEC_DMIC_CHANNEL_0 = 0x0, 4798 EC_CODEC_DMIC_CHANNEL_1 = 0x1, 4799 EC_CODEC_DMIC_CHANNEL_2 = 0x2, 4800 EC_CODEC_DMIC_CHANNEL_3 = 0x3, 4801 EC_CODEC_DMIC_CHANNEL_4 = 0x4, 4802 EC_CODEC_DMIC_CHANNEL_5 = 0x5, 4803 EC_CODEC_DMIC_CHANNEL_6 = 0x6, 4804 EC_CODEC_DMIC_CHANNEL_7 = 0x7, 4805 EC_CODEC_DMIC_CHANNEL_COUNT, 4806}; 4807 4808struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx { 4809 uint8_t channel; /* enum ec_codec_dmic_channel */ 4810 uint8_t gain; 4811 uint8_t reserved[2]; 4812}; 4813 4814struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx { 4815 uint8_t channel; /* enum ec_codec_dmic_channel */ 4816 uint8_t reserved[3]; 4817}; 4818 4819struct __ec_align4 ec_param_ec_codec_dmic { 4820 uint8_t cmd; /* enum ec_codec_dmic_subcmd */ 4821 uint8_t reserved[3]; 4822 4823 union { 4824 struct ec_param_ec_codec_dmic_set_gain_idx 4825 set_gain_idx_param; 4826 struct ec_param_ec_codec_dmic_get_gain_idx 4827 get_gain_idx_param; 4828 }; 4829}; 4830 4831struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain { 4832 uint8_t max_gain; 4833}; 4834 4835struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx { 4836 uint8_t gain; 4837}; 4838 4839/*****************************************************************************/ 4840 4841/* Commands for I2S RX on audio codec. */ 4842 4843#define EC_CMD_EC_CODEC_I2S_RX 0x00BE 4844 4845enum ec_codec_i2s_rx_subcmd { 4846 EC_CODEC_I2S_RX_ENABLE = 0x0, 4847 EC_CODEC_I2S_RX_DISABLE = 0x1, 4848 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2, 4849 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3, 4850 EC_CODEC_I2S_RX_SET_BCLK = 0x4, 4851 EC_CODEC_I2S_RX_RESET = 0x5, 4852 EC_CODEC_I2S_RX_SUBCMD_COUNT, 4853}; 4854 4855enum ec_codec_i2s_rx_sample_depth { 4856 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0, 4857 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1, 4858 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT, 4859}; 4860 4861enum ec_codec_i2s_rx_daifmt { 4862 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0, 4863 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1, 4864 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2, 4865 EC_CODEC_I2S_RX_DAIFMT_COUNT, 4866}; 4867 4868struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth { 4869 uint8_t depth; 4870 uint8_t reserved[3]; 4871}; 4872 4873struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain { 4874 uint8_t left; 4875 uint8_t right; 4876 uint8_t reserved[2]; 4877}; 4878 4879struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt { 4880 uint8_t daifmt; 4881 uint8_t reserved[3]; 4882}; 4883 4884struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk { 4885 uint32_t bclk; 4886}; 4887 4888struct __ec_align4 ec_param_ec_codec_i2s_rx { 4889 uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */ 4890 uint8_t reserved[3]; 4891 4892 union { 4893 struct ec_param_ec_codec_i2s_rx_set_sample_depth 4894 set_sample_depth_param; 4895 struct ec_param_ec_codec_i2s_rx_set_daifmt 4896 set_daifmt_param; 4897 struct ec_param_ec_codec_i2s_rx_set_bclk 4898 set_bclk_param; 4899 }; 4900}; 4901 4902/*****************************************************************************/ 4903/* Commands for WoV on audio codec. */ 4904 4905#define EC_CMD_EC_CODEC_WOV 0x00BF 4906 4907enum ec_codec_wov_subcmd { 4908 EC_CODEC_WOV_SET_LANG = 0x0, 4909 EC_CODEC_WOV_SET_LANG_SHM = 0x1, 4910 EC_CODEC_WOV_GET_LANG = 0x2, 4911 EC_CODEC_WOV_ENABLE = 0x3, 4912 EC_CODEC_WOV_DISABLE = 0x4, 4913 EC_CODEC_WOV_READ_AUDIO = 0x5, 4914 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6, 4915 EC_CODEC_WOV_SUBCMD_COUNT, 4916}; 4917 4918/* 4919 * @hash is SHA256 of the whole language model. 4920 * @total_len indicates the length of whole language model. 4921 * @offset is the cursor from the beginning of the model. 4922 * @buf is the packet buffer. 4923 * @len denotes how many bytes in the buf. 4924 */ 4925struct __ec_align4 ec_param_ec_codec_wov_set_lang { 4926 uint8_t hash[32]; 4927 uint32_t total_len; 4928 uint32_t offset; 4929 uint8_t buf[128]; 4930 uint32_t len; 4931}; 4932 4933struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm { 4934 uint8_t hash[32]; 4935 uint32_t total_len; 4936}; 4937 4938struct __ec_align4 ec_param_ec_codec_wov { 4939 uint8_t cmd; /* enum ec_codec_wov_subcmd */ 4940 uint8_t reserved[3]; 4941 4942 union { 4943 struct ec_param_ec_codec_wov_set_lang 4944 set_lang_param; 4945 struct ec_param_ec_codec_wov_set_lang_shm 4946 set_lang_shm_param; 4947 }; 4948}; 4949 4950struct __ec_align4 ec_response_ec_codec_wov_get_lang { 4951 uint8_t hash[32]; 4952}; 4953 4954struct __ec_align4 ec_response_ec_codec_wov_read_audio { 4955 uint8_t buf[128]; 4956 uint32_t len; 4957}; 4958 4959struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm { 4960 uint32_t offset; 4961 uint32_t len; 4962}; 4963 4964/*****************************************************************************/ 4965/* System commands */ 4966 4967/* 4968 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 4969 * necessarily reboot the EC. Rename to "image" or something similar? 4970 */ 4971#define EC_CMD_REBOOT_EC 0x00D2 4972 4973/* Command */ 4974enum ec_reboot_cmd { 4975 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 4976 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 4977 EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ 4978 /* (command 3 was jump to RW-B) */ 4979 EC_REBOOT_COLD = 4, /* Cold-reboot */ 4980 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 4981 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 4982 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 4983 EC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */ 4984}; 4985 4986/* Flags for ec_params_reboot_ec.reboot_flags */ 4987#define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ 4988#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ 4989#define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ 4990 4991struct ec_params_reboot_ec { 4992 uint8_t cmd; /* enum ec_reboot_cmd */ 4993 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 4994} __ec_align1; 4995 4996/* 4997 * Get information on last EC panic. 4998 * 4999 * Returns variable-length platform-dependent panic information. See panic.h 5000 * for details. 5001 */ 5002#define EC_CMD_GET_PANIC_INFO 0x00D3 5003 5004/*****************************************************************************/ 5005/* 5006 * Special commands 5007 * 5008 * These do not follow the normal rules for commands. See each command for 5009 * details. 5010 */ 5011 5012/* 5013 * Reboot NOW 5014 * 5015 * This command will work even when the EC LPC interface is busy, because the 5016 * reboot command is processed at interrupt level. Note that when the EC 5017 * reboots, the host will reboot too, so there is no response to this command. 5018 * 5019 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 5020 */ 5021#define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 5022 5023/* 5024 * Resend last response (not supported on LPC). 5025 * 5026 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 5027 * there was no previous command, or the previous command's response was too 5028 * big to save. 5029 */ 5030#define EC_CMD_RESEND_RESPONSE 0x00DB 5031 5032/* 5033 * This header byte on a command indicate version 0. Any header byte less 5034 * than this means that we are talking to an old EC which doesn't support 5035 * versioning. In that case, we assume version 0. 5036 * 5037 * Header bytes greater than this indicate a later version. For example, 5038 * EC_CMD_VERSION0 + 1 means we are using version 1. 5039 * 5040 * The old EC interface must not use commands 0xdc or higher. 5041 */ 5042#define EC_CMD_VERSION0 0x00DC 5043 5044/*****************************************************************************/ 5045/* 5046 * PD commands 5047 * 5048 * These commands are for PD MCU communication. 5049 */ 5050 5051/* EC to PD MCU exchange status command */ 5052#define EC_CMD_PD_EXCHANGE_STATUS 0x0100 5053#define EC_VER_PD_EXCHANGE_STATUS 2 5054 5055enum pd_charge_state { 5056 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 5057 PD_CHARGE_NONE, /* No charging allowed */ 5058 PD_CHARGE_5V, /* 5V charging only */ 5059 PD_CHARGE_MAX /* Charge at max voltage */ 5060}; 5061 5062/* Status of EC being sent to PD */ 5063#define EC_STATUS_HIBERNATING BIT(0) 5064 5065struct ec_params_pd_status { 5066 uint8_t status; /* EC status */ 5067 int8_t batt_soc; /* battery state of charge */ 5068 uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 5069} __ec_align1; 5070 5071/* Status of PD being sent back to EC */ 5072#define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ 5073#define PD_STATUS_IN_RW BIT(1) /* Running RW image */ 5074#define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ 5075#define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ 5076#define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ 5077#define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ 5078#define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ 5079#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 5080 PD_STATUS_TCPC_ALERT_1 | \ 5081 PD_STATUS_HOST_EVENT) 5082struct ec_response_pd_status { 5083 uint32_t curr_lim_ma; /* input current limit */ 5084 uint16_t status; /* PD MCU status */ 5085 int8_t active_charge_port; /* active charging port */ 5086} __ec_align_size1; 5087 5088/* AP to PD MCU host event status command, cleared on read */ 5089#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 5090 5091/* PD MCU host event status bits */ 5092#define PD_EVENT_UPDATE_DEVICE BIT(0) 5093#define PD_EVENT_POWER_CHANGE BIT(1) 5094#define PD_EVENT_IDENTITY_RECEIVED BIT(2) 5095#define PD_EVENT_DATA_SWAP BIT(3) 5096#define PD_EVENT_TYPEC BIT(4) 5097#define PD_EVENT_PPM BIT(5) 5098#define PD_EVENT_INIT BIT(6) 5099 5100struct ec_response_host_event_status { 5101 uint32_t status; /* PD MCU host event status */ 5102} __ec_align4; 5103 5104/* Set USB type-C port role and muxes */ 5105#define EC_CMD_USB_PD_CONTROL 0x0101 5106 5107enum usb_pd_control_role { 5108 USB_PD_CTRL_ROLE_NO_CHANGE = 0, 5109 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ 5110 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 5111 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 5112 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 5113 USB_PD_CTRL_ROLE_FREEZE = 5, 5114 USB_PD_CTRL_ROLE_COUNT 5115}; 5116 5117enum usb_pd_control_mux { 5118 USB_PD_CTRL_MUX_NO_CHANGE = 0, 5119 USB_PD_CTRL_MUX_NONE = 1, 5120 USB_PD_CTRL_MUX_USB = 2, 5121 USB_PD_CTRL_MUX_DP = 3, 5122 USB_PD_CTRL_MUX_DOCK = 4, 5123 USB_PD_CTRL_MUX_AUTO = 5, 5124 USB_PD_CTRL_MUX_COUNT 5125}; 5126 5127enum usb_pd_control_swap { 5128 USB_PD_CTRL_SWAP_NONE = 0, 5129 USB_PD_CTRL_SWAP_DATA = 1, 5130 USB_PD_CTRL_SWAP_POWER = 2, 5131 USB_PD_CTRL_SWAP_VCONN = 3, 5132 USB_PD_CTRL_SWAP_COUNT 5133}; 5134 5135struct ec_params_usb_pd_control { 5136 uint8_t port; 5137 uint8_t role; 5138 uint8_t mux; 5139 uint8_t swap; 5140} __ec_align1; 5141 5142#define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ 5143#define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ 5144#define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ 5145 5146#define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ 5147#define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ 5148#define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ 5149#define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ 5150#define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ 5151#define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ 5152#define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ 5153 5154struct ec_response_usb_pd_control { 5155 uint8_t enabled; 5156 uint8_t role; 5157 uint8_t polarity; 5158 uint8_t state; 5159} __ec_align1; 5160 5161struct ec_response_usb_pd_control_v1 { 5162 uint8_t enabled; 5163 uint8_t role; 5164 uint8_t polarity; 5165 char state[32]; 5166} __ec_align1; 5167 5168/* Values representing usbc PD CC state */ 5169#define USBC_PD_CC_NONE 0 /* No accessory connected */ 5170#define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ 5171#define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ 5172#define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ 5173#define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ 5174#define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ 5175 5176/* Active/Passive Cable */ 5177#define USB_PD_CTRL_ACTIVE_CABLE BIT(0) 5178/* Optical/Non-optical cable */ 5179#define USB_PD_CTRL_OPTICAL_CABLE BIT(1) 5180/* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */ 5181#define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2) 5182/* Active Link Uni-Direction */ 5183#define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3) 5184 5185struct ec_response_usb_pd_control_v2 { 5186 uint8_t enabled; 5187 uint8_t role; 5188 uint8_t polarity; 5189 char state[32]; 5190 uint8_t cc_state; /* enum pd_cc_states representing cc state */ 5191 uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ 5192 uint8_t reserved; /* Reserved for future use */ 5193 uint8_t control_flags; /* USB_PD_CTRL_*flags */ 5194 uint8_t cable_speed; /* TBT_SS_* cable speed */ 5195 uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */ 5196} __ec_align1; 5197 5198#define EC_CMD_USB_PD_PORTS 0x0102 5199 5200/* Maximum number of PD ports on a device, num_ports will be <= this */ 5201#define EC_USB_PD_MAX_PORTS 8 5202 5203struct ec_response_usb_pd_ports { 5204 uint8_t num_ports; 5205} __ec_align1; 5206 5207#define EC_CMD_USB_PD_POWER_INFO 0x0103 5208 5209#define PD_POWER_CHARGING_PORT 0xff 5210struct ec_params_usb_pd_power_info { 5211 uint8_t port; 5212} __ec_align1; 5213 5214enum usb_chg_type { 5215 USB_CHG_TYPE_NONE, 5216 USB_CHG_TYPE_PD, 5217 USB_CHG_TYPE_C, 5218 USB_CHG_TYPE_PROPRIETARY, 5219 USB_CHG_TYPE_BC12_DCP, 5220 USB_CHG_TYPE_BC12_CDP, 5221 USB_CHG_TYPE_BC12_SDP, 5222 USB_CHG_TYPE_OTHER, 5223 USB_CHG_TYPE_VBUS, 5224 USB_CHG_TYPE_UNKNOWN, 5225 USB_CHG_TYPE_DEDICATED, 5226}; 5227enum usb_power_roles { 5228 USB_PD_PORT_POWER_DISCONNECTED, 5229 USB_PD_PORT_POWER_SOURCE, 5230 USB_PD_PORT_POWER_SINK, 5231 USB_PD_PORT_POWER_SINK_NOT_CHARGING, 5232}; 5233 5234struct usb_chg_measures { 5235 uint16_t voltage_max; 5236 uint16_t voltage_now; 5237 uint16_t current_max; 5238 uint16_t current_lim; 5239} __ec_align2; 5240 5241struct ec_response_usb_pd_power_info { 5242 uint8_t role; 5243 uint8_t type; 5244 uint8_t dualrole; 5245 uint8_t reserved1; 5246 struct usb_chg_measures meas; 5247 uint32_t max_power; 5248} __ec_align4; 5249 5250 5251/* 5252 * This command will return the number of USB PD charge port + the number 5253 * of dedicated port present. 5254 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports 5255 */ 5256#define EC_CMD_CHARGE_PORT_COUNT 0x0105 5257struct ec_response_charge_port_count { 5258 uint8_t port_count; 5259} __ec_align1; 5260 5261/* Write USB-PD device FW */ 5262#define EC_CMD_USB_PD_FW_UPDATE 0x0110 5263 5264enum usb_pd_fw_update_cmds { 5265 USB_PD_FW_REBOOT, 5266 USB_PD_FW_FLASH_ERASE, 5267 USB_PD_FW_FLASH_WRITE, 5268 USB_PD_FW_ERASE_SIG, 5269}; 5270 5271struct ec_params_usb_pd_fw_update { 5272 uint16_t dev_id; 5273 uint8_t cmd; 5274 uint8_t port; 5275 uint32_t size; /* Size to write in bytes */ 5276 /* Followed by data to write */ 5277} __ec_align4; 5278 5279/* Write USB-PD Accessory RW_HASH table entry */ 5280#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 5281/* RW hash is first 20 bytes of SHA-256 of RW section */ 5282#define PD_RW_HASH_SIZE 20 5283struct ec_params_usb_pd_rw_hash_entry { 5284 uint16_t dev_id; 5285 uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 5286 uint8_t reserved; /* 5287 * For alignment of current_image 5288 * TODO(rspangler) but it's not aligned! 5289 * Should have been reserved[2]. 5290 */ 5291 uint32_t current_image; /* One of ec_current_image */ 5292} __ec_align1; 5293 5294/* Read USB-PD Accessory info */ 5295#define EC_CMD_USB_PD_DEV_INFO 0x0112 5296 5297struct ec_params_usb_pd_info_request { 5298 uint8_t port; 5299} __ec_align1; 5300 5301/* Read USB-PD Device discovery info */ 5302#define EC_CMD_USB_PD_DISCOVERY 0x0113 5303struct ec_params_usb_pd_discovery_entry { 5304 uint16_t vid; /* USB-IF VID */ 5305 uint16_t pid; /* USB-IF PID */ 5306 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 5307} __ec_align_size1; 5308 5309/* Override default charge behavior */ 5310#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 5311 5312/* Negative port parameters have special meaning */ 5313enum usb_pd_override_ports { 5314 OVERRIDE_DONT_CHARGE = -2, 5315 OVERRIDE_OFF = -1, 5316 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ 5317}; 5318 5319struct ec_params_charge_port_override { 5320 int16_t override_port; /* Override port# */ 5321} __ec_align2; 5322 5323/* 5324 * Read (and delete) one entry of PD event log. 5325 * TODO(crbug.com/751742): Make this host command more generic to accommodate 5326 * future non-PD logs that use the same internal EC event_log. 5327 */ 5328#define EC_CMD_PD_GET_LOG_ENTRY 0x0115 5329 5330struct ec_response_pd_log { 5331 uint32_t timestamp; /* relative timestamp in milliseconds */ 5332 uint8_t type; /* event type : see PD_EVENT_xx below */ 5333 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 5334 uint16_t data; /* type-defined data payload */ 5335 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */ 5336} __ec_align4; 5337 5338/* The timestamp is the microsecond counter shifted to get about a ms. */ 5339#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ 5340 5341#define PD_LOG_SIZE_MASK 0x1f 5342#define PD_LOG_PORT_MASK 0xe0 5343#define PD_LOG_PORT_SHIFT 5 5344#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ 5345 ((size) & PD_LOG_SIZE_MASK)) 5346#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) 5347#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) 5348 5349/* PD event log : entry types */ 5350/* PD MCU events */ 5351#define PD_EVENT_MCU_BASE 0x00 5352#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) 5353#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) 5354/* Reserved for custom board event */ 5355#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) 5356/* PD generic accessory events */ 5357#define PD_EVENT_ACC_BASE 0x20 5358#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) 5359#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) 5360/* PD power supply events */ 5361#define PD_EVENT_PS_BASE 0x40 5362#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) 5363/* PD video dongles events */ 5364#define PD_EVENT_VIDEO_BASE 0x60 5365#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) 5366#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) 5367/* Returned in the "type" field, when there is no entry available */ 5368#define PD_EVENT_NO_ENTRY 0xff 5369 5370/* 5371 * PD_EVENT_MCU_CHARGE event definition : 5372 * the payload is "struct usb_chg_measures" 5373 * the data field contains the port state flags as defined below : 5374 */ 5375/* Port partner is a dual role device */ 5376#define CHARGE_FLAGS_DUAL_ROLE BIT(15) 5377/* Port is the pending override port */ 5378#define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) 5379/* Port is the override port */ 5380#define CHARGE_FLAGS_OVERRIDE BIT(13) 5381/* Charger type */ 5382#define CHARGE_FLAGS_TYPE_SHIFT 3 5383#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) 5384/* Power delivery role */ 5385#define CHARGE_FLAGS_ROLE_MASK (7 << 0) 5386 5387/* 5388 * PD_EVENT_PS_FAULT data field flags definition : 5389 */ 5390#define PS_FAULT_OCP 1 5391#define PS_FAULT_FAST_OCP 2 5392#define PS_FAULT_OVP 3 5393#define PS_FAULT_DISCH 4 5394 5395/* 5396 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". 5397 */ 5398struct mcdp_version { 5399 uint8_t major; 5400 uint8_t minor; 5401 uint16_t build; 5402} __ec_align4; 5403 5404struct mcdp_info { 5405 uint8_t family[2]; 5406 uint8_t chipid[2]; 5407 struct mcdp_version irom; 5408 struct mcdp_version fw; 5409} __ec_align4; 5410 5411/* struct mcdp_info field decoding */ 5412#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 5413#define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 5414 5415/* Get/Set USB-PD Alternate mode info */ 5416#define EC_CMD_USB_PD_GET_AMODE 0x0116 5417struct ec_params_usb_pd_get_mode_request { 5418 uint16_t svid_idx; /* SVID index to get */ 5419 uint8_t port; /* port */ 5420} __ec_align_size1; 5421 5422struct ec_params_usb_pd_get_mode_response { 5423 uint16_t svid; /* SVID */ 5424 uint16_t opos; /* Object Position */ 5425 uint32_t vdo[6]; /* Mode VDOs */ 5426} __ec_align4; 5427 5428#define EC_CMD_USB_PD_SET_AMODE 0x0117 5429 5430enum pd_mode_cmd { 5431 PD_EXIT_MODE = 0, 5432 PD_ENTER_MODE = 1, 5433 /* Not a command. Do NOT remove. */ 5434 PD_MODE_CMD_COUNT, 5435}; 5436 5437struct ec_params_usb_pd_set_mode_request { 5438 uint32_t cmd; /* enum pd_mode_cmd */ 5439 uint16_t svid; /* SVID to set */ 5440 uint8_t opos; /* Object Position */ 5441 uint8_t port; /* port */ 5442} __ec_align4; 5443 5444/* Ask the PD MCU to record a log of a requested type */ 5445#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 5446 5447struct ec_params_pd_write_log_entry { 5448 uint8_t type; /* event type : see PD_EVENT_xx above */ 5449 uint8_t port; /* port#, or 0 for events unrelated to a given port */ 5450} __ec_align1; 5451 5452 5453/* Control USB-PD chip */ 5454#define EC_CMD_PD_CONTROL 0x0119 5455 5456enum ec_pd_control_cmd { 5457 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 5458 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 5459 PD_RESET, /* Force reset the PD chip */ 5460 PD_CONTROL_DISABLE, /* Disable further calls to this command */ 5461 PD_CHIP_ON, /* Power on the PD chip */ 5462}; 5463 5464struct ec_params_pd_control { 5465 uint8_t chip; /* chip id */ 5466 uint8_t subcmd; 5467} __ec_align1; 5468 5469/* Get info about USB-C SS muxes */ 5470#define EC_CMD_USB_PD_MUX_INFO 0x011A 5471 5472struct ec_params_usb_pd_mux_info { 5473 uint8_t port; /* USB-C port number */ 5474} __ec_align1; 5475 5476/* Flags representing mux state */ 5477#define USB_PD_MUX_NONE 0 /* Open switch */ 5478#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ 5479#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ 5480#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ 5481#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ 5482#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ 5483#define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ 5484#define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ 5485#define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ 5486 5487struct ec_response_usb_pd_mux_info { 5488 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 5489} __ec_align1; 5490 5491#define EC_CMD_PD_CHIP_INFO 0x011B 5492 5493struct ec_params_pd_chip_info { 5494 uint8_t port; /* USB-C port number */ 5495 uint8_t renew; /* Force renewal */ 5496} __ec_align1; 5497 5498struct ec_response_pd_chip_info { 5499 uint16_t vendor_id; 5500 uint16_t product_id; 5501 uint16_t device_id; 5502 union { 5503 uint8_t fw_version_string[8]; 5504 uint64_t fw_version_number; 5505 }; 5506} __ec_align2; 5507 5508struct ec_response_pd_chip_info_v1 { 5509 uint16_t vendor_id; 5510 uint16_t product_id; 5511 uint16_t device_id; 5512 union { 5513 uint8_t fw_version_string[8]; 5514 uint64_t fw_version_number; 5515 }; 5516 union { 5517 uint8_t min_req_fw_version_string[8]; 5518 uint64_t min_req_fw_version_number; 5519 }; 5520} __ec_align2; 5521 5522/* Run RW signature verification and get status */ 5523#define EC_CMD_RWSIG_CHECK_STATUS 0x011C 5524 5525struct ec_response_rwsig_check_status { 5526 uint32_t status; 5527} __ec_align4; 5528 5529/* For controlling RWSIG task */ 5530#define EC_CMD_RWSIG_ACTION 0x011D 5531 5532enum rwsig_action { 5533 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 5534 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 5535}; 5536 5537struct ec_params_rwsig_action { 5538 uint32_t action; 5539} __ec_align4; 5540 5541/* Run verification on a slot */ 5542#define EC_CMD_EFS_VERIFY 0x011E 5543 5544struct ec_params_efs_verify { 5545 uint8_t region; /* enum ec_flash_region */ 5546} __ec_align1; 5547 5548/* 5549 * Retrieve info from Cros Board Info store. Response is based on the data 5550 * type. Integers return a uint32. Strings return a string, using the response 5551 * size to determine how big it is. 5552 */ 5553#define EC_CMD_GET_CROS_BOARD_INFO 0x011F 5554/* 5555 * Write info into Cros Board Info on EEPROM. Write fails if the board has 5556 * hardware write-protect enabled. 5557 */ 5558#define EC_CMD_SET_CROS_BOARD_INFO 0x0120 5559 5560enum cbi_data_tag { 5561 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ 5562 CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ 5563 CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ 5564 CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ 5565 CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ 5566 CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ 5567 CBI_TAG_COUNT, 5568}; 5569 5570/* 5571 * Flags to control read operation 5572 * 5573 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 5574 * write was successful without reboot. 5575 */ 5576#define CBI_GET_RELOAD BIT(0) 5577 5578struct ec_params_get_cbi { 5579 uint32_t tag; /* enum cbi_data_tag */ 5580 uint32_t flag; /* CBI_GET_* */ 5581} __ec_align4; 5582 5583/* 5584 * Flags to control write behavior. 5585 * 5586 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 5587 * useful when writing multiple fields in a row. 5588 * INIT: Need to be set when creating a new CBI from scratch. All fields 5589 * will be initialized to zero first. 5590 */ 5591#define CBI_SET_NO_SYNC BIT(0) 5592#define CBI_SET_INIT BIT(1) 5593 5594struct ec_params_set_cbi { 5595 uint32_t tag; /* enum cbi_data_tag */ 5596 uint32_t flag; /* CBI_SET_* */ 5597 uint32_t size; /* Data size */ 5598 uint8_t data[]; /* For string and raw data */ 5599} __ec_align1; 5600 5601/* 5602 * Information about resets of the AP by the EC and the EC's own uptime. 5603 */ 5604#define EC_CMD_GET_UPTIME_INFO 0x0121 5605 5606struct ec_response_uptime_info { 5607 /* 5608 * Number of milliseconds since the last EC boot. Sysjump resets 5609 * typically do not restart the EC's time_since_boot epoch. 5610 * 5611 * WARNING: The EC's sense of time is much less accurate than the AP's 5612 * sense of time, in both phase and frequency. This timebase is similar 5613 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. 5614 */ 5615 uint32_t time_since_ec_boot_ms; 5616 5617 /* 5618 * Number of times the AP was reset by the EC since the last EC boot. 5619 * Note that the AP may be held in reset by the EC during the initial 5620 * boot sequence, such that the very first AP boot may count as more 5621 * than one here. 5622 */ 5623 uint32_t ap_resets_since_ec_boot; 5624 5625 /* 5626 * The set of flags which describe the EC's most recent reset. See 5627 * include/system.h RESET_FLAG_* for details. 5628 */ 5629 uint32_t ec_reset_flags; 5630 5631 /* Empty log entries have both the cause and timestamp set to zero. */ 5632 struct ap_reset_log_entry { 5633 /* 5634 * See include/chipset.h: enum chipset_{reset,shutdown}_reason 5635 * for details. 5636 */ 5637 uint16_t reset_cause; 5638 5639 /* Reserved for protocol growth. */ 5640 uint16_t reserved; 5641 5642 /* 5643 * The time of the reset's assertion, in milliseconds since the 5644 * last EC boot, in the same epoch as time_since_ec_boot_ms. 5645 * Set to zero if the log entry is empty. 5646 */ 5647 uint32_t reset_time_ms; 5648 } recent_ap_reset[4]; 5649} __ec_align4; 5650 5651/* 5652 * Add entropy to the device secret (stored in the rollback region). 5653 * 5654 * Depending on the chip, the operation may take a long time (e.g. to erase 5655 * flash), so the commands are asynchronous. 5656 */ 5657#define EC_CMD_ADD_ENTROPY 0x0122 5658 5659enum add_entropy_action { 5660 /* Add entropy to the current secret. */ 5661 ADD_ENTROPY_ASYNC = 0, 5662 /* 5663 * Add entropy, and also make sure that the previous secret is erased. 5664 * (this can be implemented by adding entropy multiple times until 5665 * all rolback blocks have been overwritten). 5666 */ 5667 ADD_ENTROPY_RESET_ASYNC = 1, 5668 /* Read back result from the previous operation. */ 5669 ADD_ENTROPY_GET_RESULT = 2, 5670}; 5671 5672struct ec_params_rollback_add_entropy { 5673 uint8_t action; 5674} __ec_align1; 5675 5676/* 5677 * Perform a single read of a given ADC channel. 5678 */ 5679#define EC_CMD_ADC_READ 0x0123 5680 5681struct ec_params_adc_read { 5682 uint8_t adc_channel; 5683} __ec_align1; 5684 5685struct ec_response_adc_read { 5686 int32_t adc_value; 5687} __ec_align4; 5688 5689/* 5690 * Read back rollback info 5691 */ 5692#define EC_CMD_ROLLBACK_INFO 0x0124 5693 5694struct ec_response_rollback_info { 5695 int32_t id; /* Incrementing number to indicate which region to use. */ 5696 int32_t rollback_min_version; 5697 int32_t rw_rollback_version; 5698} __ec_align4; 5699 5700 5701/* Issue AP reset */ 5702#define EC_CMD_AP_RESET 0x0125 5703 5704/* 5705 * Get the number of peripheral charge ports 5706 */ 5707#define EC_CMD_PCHG_COUNT 0x0134 5708 5709#define EC_PCHG_MAX_PORTS 8 5710 5711struct ec_response_pchg_count { 5712 uint8_t port_count; 5713} __ec_align1; 5714 5715/* 5716 * Get the status of a peripheral charge port 5717 */ 5718#define EC_CMD_PCHG 0x0135 5719 5720struct ec_params_pchg { 5721 uint8_t port; 5722} __ec_align1; 5723 5724struct ec_response_pchg { 5725 uint32_t error; /* enum pchg_error */ 5726 uint8_t state; /* enum pchg_state state */ 5727 uint8_t battery_percentage; 5728 uint8_t unused0; 5729 uint8_t unused1; 5730 /* Fields added in version 1 */ 5731 uint32_t fw_version; 5732 uint32_t dropped_event_count; 5733} __ec_align2; 5734 5735enum pchg_state { 5736 /* Charger is reset and not initialized. */ 5737 PCHG_STATE_RESET = 0, 5738 /* Charger is initialized or disabled. */ 5739 PCHG_STATE_INITIALIZED, 5740 /* Charger is enabled and ready to detect a device. */ 5741 PCHG_STATE_ENABLED, 5742 /* Device is in proximity. */ 5743 PCHG_STATE_DETECTED, 5744 /* Device is being charged. */ 5745 PCHG_STATE_CHARGING, 5746 /* Device is fully charged. It implies DETECTED (& not charging). */ 5747 PCHG_STATE_FULL, 5748 /* In download (a.k.a. firmware update) mode */ 5749 PCHG_STATE_DOWNLOAD, 5750 /* In download mode. Ready for receiving data. */ 5751 PCHG_STATE_DOWNLOADING, 5752 /* Device is ready for data communication. */ 5753 PCHG_STATE_CONNECTED, 5754 /* Put no more entry below */ 5755 PCHG_STATE_COUNT, 5756}; 5757 5758#define EC_PCHG_STATE_TEXT { \ 5759 [PCHG_STATE_RESET] = "RESET", \ 5760 [PCHG_STATE_INITIALIZED] = "INITIALIZED", \ 5761 [PCHG_STATE_ENABLED] = "ENABLED", \ 5762 [PCHG_STATE_DETECTED] = "DETECTED", \ 5763 [PCHG_STATE_CHARGING] = "CHARGING", \ 5764 [PCHG_STATE_FULL] = "FULL", \ 5765 [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \ 5766 [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \ 5767 [PCHG_STATE_CONNECTED] = "CONNECTED", \ 5768 } 5769 5770/* 5771 * Update firmware of peripheral chip 5772 */ 5773#define EC_CMD_PCHG_UPDATE 0x0136 5774 5775/* Port number is encoded in bit[28:31]. */ 5776#define EC_MKBP_PCHG_PORT_SHIFT 28 5777/* Utility macro for converting MKBP event to port number. */ 5778#define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf) 5779/* Utility macro for extracting event bits. */ 5780#define EC_MKBP_PCHG_EVENT_MASK(e) ((e) \ 5781 & GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0)) 5782 5783#define EC_MKBP_PCHG_UPDATE_OPENED BIT(0) 5784#define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1) 5785#define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2) 5786#define EC_MKBP_PCHG_UPDATE_ERROR BIT(3) 5787#define EC_MKBP_PCHG_DEVICE_EVENT BIT(4) 5788 5789enum ec_pchg_update_cmd { 5790 /* Reset chip to normal mode. */ 5791 EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0, 5792 /* Reset and put a chip in update (a.k.a. download) mode. */ 5793 EC_PCHG_UPDATE_CMD_OPEN, 5794 /* Write a block of data containing FW image. */ 5795 EC_PCHG_UPDATE_CMD_WRITE, 5796 /* Close update session. */ 5797 EC_PCHG_UPDATE_CMD_CLOSE, 5798 /* End of commands */ 5799 EC_PCHG_UPDATE_CMD_COUNT, 5800}; 5801 5802struct ec_params_pchg_update { 5803 /* PCHG port number */ 5804 uint8_t port; 5805 /* enum ec_pchg_update_cmd */ 5806 uint8_t cmd; 5807 /* Padding */ 5808 uint8_t reserved0; 5809 uint8_t reserved1; 5810 /* Version of new firmware */ 5811 uint32_t version; 5812 /* CRC32 of new firmware */ 5813 uint32_t crc32; 5814 /* Address in chip memory where <data> is written to */ 5815 uint32_t addr; 5816 /* Size of <data> */ 5817 uint32_t size; 5818 /* Partial data of new firmware */ 5819 uint8_t data[]; 5820} __ec_align4; 5821 5822BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT 5823 < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8)); 5824 5825struct ec_response_pchg_update { 5826 /* Block size */ 5827 uint32_t block_size; 5828} __ec_align4; 5829 5830 5831/*****************************************************************************/ 5832/* Voltage regulator controls */ 5833 5834/* 5835 * Get basic info of voltage regulator for given index. 5836 * 5837 * Returns the regulator name and supported voltage list in mV. 5838 */ 5839#define EC_CMD_REGULATOR_GET_INFO 0x012C 5840 5841/* Maximum length of regulator name */ 5842#define EC_REGULATOR_NAME_MAX_LEN 16 5843 5844/* Maximum length of the supported voltage list. */ 5845#define EC_REGULATOR_VOLTAGE_MAX_COUNT 16 5846 5847struct ec_params_regulator_get_info { 5848 uint32_t index; 5849} __ec_align4; 5850 5851struct ec_response_regulator_get_info { 5852 char name[EC_REGULATOR_NAME_MAX_LEN]; 5853 uint16_t num_voltages; 5854 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT]; 5855} __ec_align2; 5856 5857/* 5858 * Configure the regulator as enabled / disabled. 5859 */ 5860#define EC_CMD_REGULATOR_ENABLE 0x012D 5861 5862struct ec_params_regulator_enable { 5863 uint32_t index; 5864 uint8_t enable; 5865} __ec_align4; 5866 5867/* 5868 * Query if the regulator is enabled. 5869 * 5870 * Returns 1 if the regulator is enabled, 0 if not. 5871 */ 5872#define EC_CMD_REGULATOR_IS_ENABLED 0x012E 5873 5874struct ec_params_regulator_is_enabled { 5875 uint32_t index; 5876} __ec_align4; 5877 5878struct ec_response_regulator_is_enabled { 5879 uint8_t enabled; 5880} __ec_align1; 5881 5882/* 5883 * Set voltage for the voltage regulator within the range specified. 5884 * 5885 * The driver should select the voltage in range closest to min_mv. 5886 * 5887 * Also note that this might be called before the regulator is enabled, and the 5888 * setting should be in effect after the regulator is enabled. 5889 */ 5890#define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F 5891 5892struct ec_params_regulator_set_voltage { 5893 uint32_t index; 5894 uint32_t min_mv; 5895 uint32_t max_mv; 5896} __ec_align4; 5897 5898/* 5899 * Get the currently configured voltage for the voltage regulator. 5900 * 5901 * Note that this might be called before the regulator is enabled, and this 5902 * should return the configured output voltage if the regulator is enabled. 5903 */ 5904#define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130 5905 5906struct ec_params_regulator_get_voltage { 5907 uint32_t index; 5908} __ec_align4; 5909 5910struct ec_response_regulator_get_voltage { 5911 uint32_t voltage_mv; 5912} __ec_align4; 5913 5914/* 5915 * Gather all discovery information for the given port and partner type. 5916 * 5917 * Note that if discovery has not yet completed, only the currently completed 5918 * responses will be filled in. If the discovery data structures are changed 5919 * in the process of the command running, BUSY will be returned. 5920 * 5921 * VDO field sizes are set to the maximum possible number of VDOs a VDM may 5922 * contain, while the number of SVIDs here is selected to fit within the PROTO2 5923 * maximum parameter size. 5924 */ 5925#define EC_CMD_TYPEC_DISCOVERY 0x0131 5926 5927enum typec_partner_type { 5928 TYPEC_PARTNER_SOP = 0, 5929 TYPEC_PARTNER_SOP_PRIME = 1, 5930}; 5931 5932struct ec_params_typec_discovery { 5933 uint8_t port; 5934 uint8_t partner_type; /* enum typec_partner_type */ 5935} __ec_align1; 5936 5937struct svid_mode_info { 5938 uint16_t svid; 5939 uint16_t mode_count; /* Number of modes partner sent */ 5940 uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5941}; 5942 5943struct ec_response_typec_discovery { 5944 uint8_t identity_count; /* Number of identity VDOs partner sent */ 5945 uint8_t svid_count; /* Number of SVIDs partner sent */ 5946 uint16_t reserved; 5947 uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5948 struct svid_mode_info svids[]; 5949} __ec_align1; 5950 5951/* USB Type-C commands for AP-controlled device policy. */ 5952#define EC_CMD_TYPEC_CONTROL 0x0132 5953 5954enum typec_control_command { 5955 TYPEC_CONTROL_COMMAND_EXIT_MODES, 5956 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, 5957 TYPEC_CONTROL_COMMAND_ENTER_MODE, 5958 TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY, 5959 TYPEC_CONTROL_COMMAND_USB_MUX_SET, 5960 TYPEC_CONTROL_COMMAND_BIST_SHARE_MODE, 5961 TYPEC_CONTROL_COMMAND_SEND_VDM_REQ, 5962}; 5963 5964/* Replies the AP may specify to the TBT EnterMode command as a UFP */ 5965enum typec_tbt_ufp_reply { 5966 TYPEC_TBT_UFP_REPLY_NAK, 5967 TYPEC_TBT_UFP_REPLY_ACK, 5968}; 5969 5970struct typec_usb_mux_set { 5971 uint8_t mux_index; /* Index of the mux to set in the chain */ 5972 uint8_t mux_flags; /* USB_PD_MUX_*-encoded USB mux state to set */ 5973} __ec_align1; 5974 5975#define VDO_MAX_SIZE 7 5976 5977struct typec_vdm_req { 5978 /* VDM data, including VDM header */ 5979 uint32_t vdm_data[VDO_MAX_SIZE]; 5980 /* Number of 32-bit fields filled in */ 5981 uint8_t vdm_data_objects; 5982 /* Partner to address - see enum typec_partner_type */ 5983 uint8_t partner_type; 5984} __ec_align1; 5985 5986struct ec_params_typec_control { 5987 uint8_t port; 5988 uint8_t command; /* enum typec_control_command */ 5989 uint16_t reserved; 5990 5991 /* 5992 * This section will be interpreted based on |command|. Define a 5993 * placeholder structure to avoid having to increase the size and bump 5994 * the command version when adding new sub-commands. 5995 */ 5996 union { 5997 uint32_t clear_events_mask; 5998 uint8_t mode_to_enter; /* enum typec_mode */ 5999 uint8_t tbt_ufp_reply; /* enum typec_tbt_ufp_reply */ 6000 struct typec_usb_mux_set mux_params; 6001 /* Used for VMD_REQ */ 6002 struct typec_vdm_req vdm_req_params; 6003 uint8_t placeholder[128]; 6004 }; 6005} __ec_align1; 6006 6007/* 6008 * Gather all status information for a port. 6009 * 6010 * Note: this covers many of the return fields from the deprecated 6011 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the 6012 * discovery data. The "enum pd_cc_states" is defined with the deprecated 6013 * EC_CMD_USB_PD_CONTROL command. 6014 * 6015 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags. 6016 */ 6017#define EC_CMD_TYPEC_STATUS 0x0133 6018 6019/* 6020 * Power role. 6021 * 6022 * Note this is also used for PD header creation, and values align to those in 6023 * the Power Delivery Specification Revision 3.0 (See 6024 * 6.2.1.1.4 Port Power Role). 6025 */ 6026enum pd_power_role { 6027 PD_ROLE_SINK = 0, 6028 PD_ROLE_SOURCE = 1 6029}; 6030 6031/* 6032 * Data role. 6033 * 6034 * Note this is also used for PD header creation, and the first two values 6035 * align to those in the Power Delivery Specification Revision 3.0 (See 6036 * 6.2.1.1.6 Port Data Role). 6037 */ 6038enum pd_data_role { 6039 PD_ROLE_UFP = 0, 6040 PD_ROLE_DFP = 1, 6041 PD_ROLE_DISCONNECTED = 2, 6042}; 6043 6044enum pd_vconn_role { 6045 PD_ROLE_VCONN_OFF = 0, 6046 PD_ROLE_VCONN_SRC = 1, 6047}; 6048 6049/* 6050 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2, 6051 * regardless of whether a debug accessory is connected. 6052 */ 6053enum tcpc_cc_polarity { 6054 /* 6055 * _CCx: is used to indicate the polarity while not connected to 6056 * a Debug Accessory. Only one CC line will assert a resistor and 6057 * the other will be open. 6058 */ 6059 POLARITY_CC1 = 0, 6060 POLARITY_CC2 = 1, 6061 6062 /* 6063 * _CCx_DTS is used to indicate the polarity while connected to a 6064 * SRC Debug Accessory. Assert resistors on both lines. 6065 */ 6066 POLARITY_CC1_DTS = 2, 6067 POLARITY_CC2_DTS = 3, 6068 6069 /* 6070 * The current TCPC code relies on these specific POLARITY values. 6071 * Adding in a check to verify if the list grows for any reason 6072 * that this will give a hint that other places need to be 6073 * adjusted. 6074 */ 6075 POLARITY_COUNT 6076}; 6077 6078#define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) 6079#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) 6080#define PD_STATUS_EVENT_HARD_RESET BIT(2) 6081#define PD_STATUS_EVENT_DISCONNECTED BIT(3) 6082#define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4) 6083#define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5) 6084#define PD_STATUS_EVENT_VDM_REQ_REPLY BIT(6) 6085#define PD_STATUS_EVENT_VDM_REQ_FAILED BIT(7) 6086#define PD_STATUS_EVENT_VDM_ATTENTION BIT(8) 6087 6088struct ec_params_typec_status { 6089 uint8_t port; 6090} __ec_align1; 6091 6092struct ec_response_typec_status { 6093 uint8_t pd_enabled; /* PD communication enabled - bool */ 6094 uint8_t dev_connected; /* Device connected - bool */ 6095 uint8_t sop_connected; /* Device is SOP PD capable - bool */ 6096 uint8_t source_cap_count; /* Number of Source Cap PDOs */ 6097 6098 uint8_t power_role; /* enum pd_power_role */ 6099 uint8_t data_role; /* enum pd_data_role */ 6100 uint8_t vconn_role; /* enum pd_vconn_role */ 6101 uint8_t sink_cap_count; /* Number of Sink Cap PDOs */ 6102 6103 uint8_t polarity; /* enum tcpc_cc_polarity */ 6104 uint8_t cc_state; /* enum pd_cc_states */ 6105 uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */ 6106 uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */ 6107 6108 char tc_state[32]; /* TC state name */ 6109 6110 uint32_t events; /* PD_STATUS_EVENT bitmask */ 6111 6112 /* 6113 * BCD PD revisions for partners 6114 * 6115 * The format has the PD major reversion in the upper nibble, and PD 6116 * minor version in the next nibble. Following two nibbles are 6117 * currently 0. 6118 * ex. PD 3.2 would map to 0x3200 6119 * 6120 * PD major/minor will be 0 if no PD device is connected. 6121 */ 6122 uint16_t sop_revision; 6123 uint16_t sop_prime_revision; 6124 6125 uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */ 6126 6127 uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ 6128} __ec_align1; 6129 6130/* 6131 * Gather the response to the most recent VDM REQ from the AP, as well 6132 * as popping the oldest VDM:Attention from the DPM queue 6133 */ 6134#define EC_CMD_TYPEC_VDM_RESPONSE 0x013C 6135 6136struct ec_params_typec_vdm_response { 6137 uint8_t port; 6138} __ec_align1; 6139 6140struct ec_response_typec_vdm_response { 6141 /* Number of 32-bit fields filled in */ 6142 uint8_t vdm_data_objects; 6143 /* Partner to address - see enum typec_partner_type */ 6144 uint8_t partner_type; 6145 /* enum ec_status describing VDM response */ 6146 uint16_t vdm_response_err; 6147 /* VDM data, including VDM header */ 6148 uint32_t vdm_response[VDO_MAX_SIZE]; 6149 /* Number of 32-bit Attention fields filled in */ 6150 uint8_t vdm_attention_objects; 6151 /* Number of remaining messages to consume */ 6152 uint8_t vdm_attention_left; 6153 /* Reserved */ 6154 uint16_t reserved1; 6155 /* VDM:Attention contents */ 6156 uint32_t vdm_attention[2]; 6157} __ec_align1; 6158 6159#undef VDO_MAX_SIZE 6160 6161/* 6162 * UCSI OPM-PPM commands 6163 * 6164 * These commands are used for communication between OPM and PPM. 6165 * Only UCSI3.0 is tested. 6166 */ 6167 6168#define EC_CMD_UCSI_PPM_SET 0x0140 6169 6170/* The data size is stored in the host command protocol header. */ 6171struct ec_params_ucsi_ppm_set { 6172 uint16_t offset; 6173 uint8_t data[]; 6174} __ec_align2; 6175 6176#define EC_CMD_UCSI_PPM_GET 0x0141 6177 6178/* For 'GET' sub-commands, data will be returned as a raw payload. */ 6179struct ec_params_ucsi_ppm_get { 6180 uint16_t offset; 6181 uint8_t size; 6182} __ec_align2; 6183 6184/*****************************************************************************/ 6185/* The command range 0x200-0x2FF is reserved for Rotor. */ 6186 6187/*****************************************************************************/ 6188/* 6189 * Reserve a range of host commands for the CR51 firmware. 6190 */ 6191#define EC_CMD_CR51_BASE 0x0300 6192#define EC_CMD_CR51_LAST 0x03FF 6193 6194/*****************************************************************************/ 6195/* Fingerprint MCU commands: range 0x0400-0x040x */ 6196 6197/* Fingerprint SPI sensor passthru command: prototyping ONLY */ 6198#define EC_CMD_FP_PASSTHRU 0x0400 6199 6200#define EC_FP_FLAG_NOT_COMPLETE 0x1 6201 6202struct ec_params_fp_passthru { 6203 uint16_t len; /* Number of bytes to write then read */ 6204 uint16_t flags; /* EC_FP_FLAG_xxx */ 6205 uint8_t data[]; /* Data to send */ 6206} __ec_align2; 6207 6208/* Configure the Fingerprint MCU behavior */ 6209#define EC_CMD_FP_MODE 0x0402 6210 6211/* Put the sensor in its lowest power mode */ 6212#define FP_MODE_DEEPSLEEP BIT(0) 6213/* Wait to see a finger on the sensor */ 6214#define FP_MODE_FINGER_DOWN BIT(1) 6215/* Poll until the finger has left the sensor */ 6216#define FP_MODE_FINGER_UP BIT(2) 6217/* Capture the current finger image */ 6218#define FP_MODE_CAPTURE BIT(3) 6219/* Finger enrollment session on-going */ 6220#define FP_MODE_ENROLL_SESSION BIT(4) 6221/* Enroll the current finger image */ 6222#define FP_MODE_ENROLL_IMAGE BIT(5) 6223/* Try to match the current finger image */ 6224#define FP_MODE_MATCH BIT(6) 6225/* Reset and re-initialize the sensor. */ 6226#define FP_MODE_RESET_SENSOR BIT(7) 6227/* special value: don't change anything just read back current mode */ 6228#define FP_MODE_DONT_CHANGE BIT(31) 6229 6230#define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ 6231 FP_MODE_FINGER_DOWN | \ 6232 FP_MODE_FINGER_UP | \ 6233 FP_MODE_CAPTURE | \ 6234 FP_MODE_ENROLL_SESSION | \ 6235 FP_MODE_ENROLL_IMAGE | \ 6236 FP_MODE_MATCH | \ 6237 FP_MODE_RESET_SENSOR | \ 6238 FP_MODE_DONT_CHANGE) 6239 6240/* Capture types defined in bits [30..28] */ 6241#define FP_MODE_CAPTURE_TYPE_SHIFT 28 6242#define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) 6243/* 6244 * This enum must remain ordered, if you add new values you must ensure that 6245 * FP_CAPTURE_TYPE_MAX is still the last one. 6246 */ 6247enum fp_capture_type { 6248 /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ 6249 FP_CAPTURE_VENDOR_FORMAT = 0, 6250 /* Simple raw image capture (produces width x height x bpp bits) */ 6251 FP_CAPTURE_SIMPLE_IMAGE = 1, 6252 /* Self test pattern (e.g. checkerboard) */ 6253 FP_CAPTURE_PATTERN0 = 2, 6254 /* Self test pattern (e.g. inverted checkerboard) */ 6255 FP_CAPTURE_PATTERN1 = 3, 6256 /* Capture for Quality test with fixed contrast */ 6257 FP_CAPTURE_QUALITY_TEST = 4, 6258 /* Capture for pixel reset value test */ 6259 FP_CAPTURE_RESET_TEST = 5, 6260 FP_CAPTURE_TYPE_MAX, 6261}; 6262/* Extracts the capture type from the sensor 'mode' word */ 6263#define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ 6264 >> FP_MODE_CAPTURE_TYPE_SHIFT) 6265 6266struct ec_params_fp_mode { 6267 uint32_t mode; /* as defined by FP_MODE_ constants */ 6268} __ec_align4; 6269 6270struct ec_response_fp_mode { 6271 uint32_t mode; /* as defined by FP_MODE_ constants */ 6272} __ec_align4; 6273 6274/* Retrieve Fingerprint sensor information */ 6275#define EC_CMD_FP_INFO 0x0403 6276 6277/* Number of dead pixels detected on the last maintenance */ 6278#define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) 6279/* Unknown number of dead pixels detected on the last maintenance */ 6280#define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) 6281/* No interrupt from the sensor */ 6282#define FP_ERROR_NO_IRQ BIT(12) 6283/* SPI communication error */ 6284#define FP_ERROR_SPI_COMM BIT(13) 6285/* Invalid sensor Hardware ID */ 6286#define FP_ERROR_BAD_HWID BIT(14) 6287/* Sensor initialization failed */ 6288#define FP_ERROR_INIT_FAIL BIT(15) 6289 6290struct ec_response_fp_info_v0 { 6291 /* Sensor identification */ 6292 uint32_t vendor_id; 6293 uint32_t product_id; 6294 uint32_t model_id; 6295 uint32_t version; 6296 /* Image frame characteristics */ 6297 uint32_t frame_size; 6298 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 6299 uint16_t width; 6300 uint16_t height; 6301 uint16_t bpp; 6302 uint16_t errors; /* see FP_ERROR_ flags above */ 6303} __ec_align4; 6304 6305struct ec_response_fp_info { 6306 /* Sensor identification */ 6307 uint32_t vendor_id; 6308 uint32_t product_id; 6309 uint32_t model_id; 6310 uint32_t version; 6311 /* Image frame characteristics */ 6312 uint32_t frame_size; 6313 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 6314 uint16_t width; 6315 uint16_t height; 6316 uint16_t bpp; 6317 uint16_t errors; /* see FP_ERROR_ flags above */ 6318 /* Template/finger current information */ 6319 uint32_t template_size; /* max template size in bytes */ 6320 uint16_t template_max; /* maximum number of fingers/templates */ 6321 uint16_t template_valid; /* number of valid fingers/templates */ 6322 uint32_t template_dirty; /* bitmap of templates with MCU side changes */ 6323 uint32_t template_version; /* version of the template format */ 6324} __ec_align4; 6325 6326/* Get the last captured finger frame or a template content */ 6327#define EC_CMD_FP_FRAME 0x0404 6328 6329/* constants defining the 'offset' field which also contains the frame index */ 6330#define FP_FRAME_INDEX_SHIFT 28 6331/* Frame buffer where the captured image is stored */ 6332#define FP_FRAME_INDEX_RAW_IMAGE 0 6333/* First frame buffer holding a template */ 6334#define FP_FRAME_INDEX_TEMPLATE 1 6335#define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) 6336#define FP_FRAME_OFFSET_MASK 0x0FFFFFFF 6337 6338/* Version of the format of the encrypted templates. */ 6339#define FP_TEMPLATE_FORMAT_VERSION 3 6340 6341/* Constants for encryption parameters */ 6342#define FP_CONTEXT_NONCE_BYTES 12 6343#define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) 6344#define FP_CONTEXT_TAG_BYTES 16 6345#define FP_CONTEXT_SALT_BYTES 16 6346#define FP_CONTEXT_TPM_BYTES 32 6347 6348struct ec_fp_template_encryption_metadata { 6349 /* 6350 * Version of the structure format (N=3). 6351 */ 6352 uint16_t struct_version; 6353 /* Reserved bytes, set to 0. */ 6354 uint16_t reserved; 6355 /* 6356 * The salt is *only* ever used for key derivation. The nonce is unique, 6357 * a different one is used for every message. 6358 */ 6359 uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; 6360 uint8_t salt[FP_CONTEXT_SALT_BYTES]; 6361 uint8_t tag[FP_CONTEXT_TAG_BYTES]; 6362}; 6363 6364struct ec_params_fp_frame { 6365 /* 6366 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE 6367 * in the high nibble, and the real offset within the frame in 6368 * FP_FRAME_OFFSET_MASK. 6369 */ 6370 uint32_t offset; 6371 uint32_t size; 6372} __ec_align4; 6373 6374/* Load a template into the MCU */ 6375#define EC_CMD_FP_TEMPLATE 0x0405 6376 6377/* Flag in the 'size' field indicating that the full template has been sent */ 6378#define FP_TEMPLATE_COMMIT 0x80000000 6379 6380struct ec_params_fp_template { 6381 uint32_t offset; 6382 uint32_t size; 6383 uint8_t data[]; 6384} __ec_align4; 6385 6386/* Clear the current fingerprint user context and set a new one */ 6387#define EC_CMD_FP_CONTEXT 0x0406 6388 6389struct ec_params_fp_context { 6390 uint32_t userid[FP_CONTEXT_USERID_WORDS]; 6391} __ec_align4; 6392 6393#define EC_CMD_FP_STATS 0x0407 6394 6395#define FPSTATS_CAPTURE_INV BIT(0) 6396#define FPSTATS_MATCHING_INV BIT(1) 6397 6398struct ec_response_fp_stats { 6399 uint32_t capture_time_us; 6400 uint32_t matching_time_us; 6401 uint32_t overall_time_us; 6402 struct { 6403 uint32_t lo; 6404 uint32_t hi; 6405 } overall_t0; 6406 uint8_t timestamps_invalid; 6407 int8_t template_matched; 6408} __ec_align2; 6409 6410#define EC_CMD_FP_SEED 0x0408 6411struct ec_params_fp_seed { 6412 /* 6413 * Version of the structure format (N=3). 6414 */ 6415 uint16_t struct_version; 6416 /* Reserved bytes, set to 0. */ 6417 uint16_t reserved; 6418 /* Seed from the TPM. */ 6419 uint8_t seed[FP_CONTEXT_TPM_BYTES]; 6420} __ec_align4; 6421 6422#define EC_CMD_FP_ENC_STATUS 0x0409 6423 6424/* FP TPM seed has been set or not */ 6425#define FP_ENC_STATUS_SEED_SET BIT(0) 6426 6427struct ec_response_fp_encryption_status { 6428 /* Used bits in encryption engine status */ 6429 uint32_t valid_flags; 6430 /* Encryption engine status */ 6431 uint32_t status; 6432} __ec_align4; 6433 6434/*****************************************************************************/ 6435/* Touchpad MCU commands: range 0x0500-0x05FF */ 6436 6437/* Perform touchpad self test */ 6438#define EC_CMD_TP_SELF_TEST 0x0500 6439 6440/* Get number of frame types, and the size of each type */ 6441#define EC_CMD_TP_FRAME_INFO 0x0501 6442 6443struct ec_response_tp_frame_info { 6444 uint32_t n_frames; 6445 uint32_t frame_sizes[]; 6446} __ec_align4; 6447 6448/* Create a snapshot of current frame readings */ 6449#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 6450 6451/* Read the frame */ 6452#define EC_CMD_TP_FRAME_GET 0x0503 6453 6454struct ec_params_tp_frame_get { 6455 uint32_t frame_index; 6456 uint32_t offset; 6457 uint32_t size; 6458} __ec_align4; 6459 6460/*****************************************************************************/ 6461/* EC-EC communication commands: range 0x0600-0x06FF */ 6462 6463#define EC_COMM_TEXT_MAX 8 6464 6465/* 6466 * Get battery static information, i.e. information that never changes, or 6467 * very infrequently. 6468 */ 6469#define EC_CMD_BATTERY_GET_STATIC 0x0600 6470 6471/** 6472 * struct ec_params_battery_static_info - Battery static info parameters 6473 * @index: Battery index. 6474 */ 6475struct ec_params_battery_static_info { 6476 uint8_t index; 6477} __ec_align_size1; 6478 6479/** 6480 * struct ec_response_battery_static_info - Battery static info response 6481 * @design_capacity: Battery Design Capacity (mAh) 6482 * @design_voltage: Battery Design Voltage (mV) 6483 * @manufacturer: Battery Manufacturer String 6484 * @model: Battery Model Number String 6485 * @serial: Battery Serial Number String 6486 * @type: Battery Type String 6487 * @cycle_count: Battery Cycle Count 6488 */ 6489struct ec_response_battery_static_info { 6490 uint16_t design_capacity; 6491 uint16_t design_voltage; 6492 char manufacturer[EC_COMM_TEXT_MAX]; 6493 char model[EC_COMM_TEXT_MAX]; 6494 char serial[EC_COMM_TEXT_MAX]; 6495 char type[EC_COMM_TEXT_MAX]; 6496 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ 6497 uint32_t cycle_count; 6498} __ec_align4; 6499 6500/* 6501 * Get battery dynamic information, i.e. information that is likely to change 6502 * every time it is read. 6503 */ 6504#define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 6505 6506/** 6507 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters 6508 * @index: Battery index. 6509 */ 6510struct ec_params_battery_dynamic_info { 6511 uint8_t index; 6512} __ec_align_size1; 6513 6514/** 6515 * struct ec_response_battery_dynamic_info - Battery dynamic info response 6516 * @actual_voltage: Battery voltage (mV) 6517 * @actual_current: Battery current (mA); negative=discharging 6518 * @remaining_capacity: Remaining capacity (mAh) 6519 * @full_capacity: Capacity (mAh, might change occasionally) 6520 * @flags: Flags, see EC_BATT_FLAG_* 6521 * @desired_voltage: Charging voltage desired by battery (mV) 6522 * @desired_current: Charging current desired by battery (mA) 6523 */ 6524struct ec_response_battery_dynamic_info { 6525 int16_t actual_voltage; 6526 int16_t actual_current; 6527 int16_t remaining_capacity; 6528 int16_t full_capacity; 6529 int16_t flags; 6530 int16_t desired_voltage; 6531 int16_t desired_current; 6532} __ec_align2; 6533 6534/* 6535 * Control charger chip. Used to control charger chip on the slave. 6536 */ 6537#define EC_CMD_CHARGER_CONTROL 0x0602 6538 6539/** 6540 * struct ec_params_charger_control - Charger control parameters 6541 * @max_current: Charger current (mA). Positive to allow base to draw up to 6542 * max_current and (possibly) charge battery, negative to request current 6543 * from base (OTG). 6544 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is 6545 * >= 0. 6546 * @allow_charging: Allow base battery charging (only makes sense if 6547 * max_current > 0). 6548 */ 6549struct ec_params_charger_control { 6550 int16_t max_current; 6551 uint16_t otg_voltage; 6552 uint8_t allow_charging; 6553} __ec_align_size1; 6554 6555/* Get ACK from the USB-C SS muxes */ 6556#define EC_CMD_USB_PD_MUX_ACK 0x0603 6557 6558struct ec_params_usb_pd_mux_ack { 6559 uint8_t port; /* USB-C port number */ 6560} __ec_align1; 6561 6562/*****************************************************************************/ 6563/* 6564 * Reserve a range of host commands for board-specific, experimental, or 6565 * special purpose features. These can be (re)used without updating this file. 6566 * 6567 * CAUTION: Don't go nuts with this. Shipping products should document ALL 6568 * their EC commands for easier development, testing, debugging, and support. 6569 * 6570 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 6571 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 6572 * 6573 * In your experimental code, you may want to do something like this: 6574 * 6575 * #define EC_CMD_MAGIC_FOO 0x0000 6576 * #define EC_CMD_MAGIC_BAR 0x0001 6577 * #define EC_CMD_MAGIC_HEY 0x0002 6578 * 6579 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 6580 * EC_VER_MASK(0); 6581 * 6582 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 6583 * EC_VER_MASK(0); 6584 * 6585 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 6586 * EC_VER_MASK(0); 6587 */ 6588#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 6589#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 6590 6591/* 6592 * Given the private host command offset, calculate the true private host 6593 * command value. 6594 */ 6595#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 6596 (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 6597 6598/*****************************************************************************/ 6599/* 6600 * Passthru commands 6601 * 6602 * Some platforms have sub-processors chained to each other. For example. 6603 * 6604 * AP <--> EC <--> PD MCU 6605 * 6606 * The top 2 bits of the command number are used to indicate which device the 6607 * command is intended for. Device 0 is always the device receiving the 6608 * command; other device mapping is board-specific. 6609 * 6610 * When a device receives a command to be passed to a sub-processor, it passes 6611 * it on with the device number set back to 0. This allows the sub-processor 6612 * to remain blissfully unaware of whether the command originated on the next 6613 * device up the chain, or was passed through from the AP. 6614 * 6615 * In the above example, if the AP wants to send command 0x0002 to the PD MCU, 6616 * AP sends command 0x4002 to the EC 6617 * EC sends command 0x0002 to the PD MCU 6618 * EC forwards PD MCU response back to the AP 6619 */ 6620 6621/* Offset and max command number for sub-device n */ 6622#define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) 6623#define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) 6624 6625/*****************************************************************************/ 6626/* 6627 * Deprecated constants. These constants have been renamed for clarity. The 6628 * meaning and size has not changed. Programs that use the old names should 6629 * switch to the new names soon, as the old names may not be carried forward 6630 * forever. 6631 */ 6632#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 6633#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 6634#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 6635 6636 6637 6638#endif /* __CROS_EC_COMMANDS_H */
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