stmfx.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Copyright (C) 2019 STMicroelectronics
  4 * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
  5 */
  6
  7#ifndef MFD_STMFX_H
  8#define MFD_STMFX_H
  9
 10#include <linux/regmap.h>
 11
 12/* General */
 13#define STMFX_REG_CHIP_ID		0x00 /* R */
 14#define STMFX_REG_FW_VERSION_MSB	0x01 /* R */
 15#define STMFX_REG_FW_VERSION_LSB	0x02 /* R */
 16#define STMFX_REG_SYS_CTRL		0x40 /* RW */
 17/* IRQ output management */
 18#define STMFX_REG_IRQ_OUT_PIN		0x41 /* RW */
 19#define STMFX_REG_IRQ_SRC_EN		0x42 /* RW */
 20#define STMFX_REG_IRQ_PENDING		0x08 /* R */
 21#define STMFX_REG_IRQ_ACK		0x44 /* RW */
 22/* GPIO management */
 23#define STMFX_REG_IRQ_GPI_PENDING1	0x0C /* R */
 24#define STMFX_REG_IRQ_GPI_PENDING2	0x0D /* R */
 25#define STMFX_REG_IRQ_GPI_PENDING3	0x0E /* R */
 26#define STMFX_REG_GPIO_STATE1		0x10 /* R */
 27#define STMFX_REG_GPIO_STATE2		0x11 /* R */
 28#define STMFX_REG_GPIO_STATE3		0x12 /* R */
 29#define STMFX_REG_IRQ_GPI_SRC1		0x48 /* RW */
 30#define STMFX_REG_IRQ_GPI_SRC2		0x49 /* RW */
 31#define STMFX_REG_IRQ_GPI_SRC3		0x4A /* RW */
 32#define STMFX_REG_IRQ_GPI_EVT1		0x4C /* RW */
 33#define STMFX_REG_IRQ_GPI_EVT2		0x4D /* RW */
 34#define STMFX_REG_IRQ_GPI_EVT3		0x4E /* RW */
 35#define STMFX_REG_IRQ_GPI_TYPE1		0x50 /* RW */
 36#define STMFX_REG_IRQ_GPI_TYPE2		0x51 /* RW */
 37#define STMFX_REG_IRQ_GPI_TYPE3		0x52 /* RW */
 38#define STMFX_REG_IRQ_GPI_ACK1		0x54 /* RW */
 39#define STMFX_REG_IRQ_GPI_ACK2		0x55 /* RW */
 40#define STMFX_REG_IRQ_GPI_ACK3		0x56 /* RW */
 41#define STMFX_REG_GPIO_DIR1		0x60 /* RW */
 42#define STMFX_REG_GPIO_DIR2		0x61 /* RW */
 43#define STMFX_REG_GPIO_DIR3		0x62 /* RW */
 44#define STMFX_REG_GPIO_TYPE1		0x64 /* RW */
 45#define STMFX_REG_GPIO_TYPE2		0x65 /* RW */
 46#define STMFX_REG_GPIO_TYPE3		0x66 /* RW */
 47#define STMFX_REG_GPIO_PUPD1		0x68 /* RW */
 48#define STMFX_REG_GPIO_PUPD2		0x69 /* RW */
 49#define STMFX_REG_GPIO_PUPD3		0x6A /* RW */
 50#define STMFX_REG_GPO_SET1		0x6C /* RW */
 51#define STMFX_REG_GPO_SET2		0x6D /* RW */
 52#define STMFX_REG_GPO_SET3		0x6E /* RW */
 53#define STMFX_REG_GPO_CLR1		0x70 /* RW */
 54#define STMFX_REG_GPO_CLR2		0x71 /* RW */
 55#define STMFX_REG_GPO_CLR3		0x72 /* RW */
 56
 57#define STMFX_REG_MAX			0xB0
 58
 59/* MFX boot time is around 10ms, so after reset, we have to wait this delay */
 60#define STMFX_BOOT_TIME_MS 10
 61
 62/* STMFX_REG_CHIP_ID bitfields */
 63#define STMFX_REG_CHIP_ID_MASK		GENMASK(7, 0)
 64
 65/* STMFX_REG_SYS_CTRL bitfields */
 66#define STMFX_REG_SYS_CTRL_GPIO_EN	BIT(0)
 67#define STMFX_REG_SYS_CTRL_TS_EN	BIT(1)
 68#define STMFX_REG_SYS_CTRL_IDD_EN	BIT(2)
 69#define STMFX_REG_SYS_CTRL_ALTGPIO_EN	BIT(3)
 70#define STMFX_REG_SYS_CTRL_SWRST	BIT(7)
 71
 72/* STMFX_REG_IRQ_OUT_PIN bitfields */
 73#define STMFX_REG_IRQ_OUT_PIN_TYPE	BIT(0) /* 0-OD 1-PP */
 74#define STMFX_REG_IRQ_OUT_PIN_POL	BIT(1) /* 0-active LOW 1-active HIGH */
 75
 76/* STMFX_REG_IRQ_(SRC_EN/PENDING/ACK) bit shift */
 77enum stmfx_irqs {
 78	STMFX_REG_IRQ_SRC_EN_GPIO = 0,
 79	STMFX_REG_IRQ_SRC_EN_IDD,
 80	STMFX_REG_IRQ_SRC_EN_ERROR,
 81	STMFX_REG_IRQ_SRC_EN_TS_DET,
 82	STMFX_REG_IRQ_SRC_EN_TS_NE,
 83	STMFX_REG_IRQ_SRC_EN_TS_TH,
 84	STMFX_REG_IRQ_SRC_EN_TS_FULL,
 85	STMFX_REG_IRQ_SRC_EN_TS_OVF,
 86	STMFX_REG_IRQ_SRC_MAX,
 87};
 88
 89enum stmfx_functions {
 90	STMFX_FUNC_GPIO		= BIT(0), /* GPIO[15:0] */
 91	STMFX_FUNC_ALTGPIO_LOW	= BIT(1), /* aGPIO[3:0] */
 92	STMFX_FUNC_ALTGPIO_HIGH = BIT(2), /* aGPIO[7:4] */
 93	STMFX_FUNC_TS		= BIT(3),
 94	STMFX_FUNC_IDD		= BIT(4),
 95};
 96
 97/**
 98 * struct stmfx_ddata - STMFX MFD structure
 99 * @device:		device reference used for logs
100 * @map:		register map
101 * @vdd:		STMFX power supply
102 * @irq_domain:		IRQ domain
103 * @lock:		IRQ bus lock
104 * @irq_src:		cache of IRQ_SRC_EN register for bus_lock
105 * @bkp_sysctrl:	backup of SYS_CTRL register for suspend/resume
106 * @bkp_irqoutpin:	backup of IRQ_OUT_PIN register for suspend/resume
107 */
108struct stmfx {
109	struct device *dev;
110	struct regmap *map;
111	struct regulator *vdd;
112	int irq;
113	struct irq_domain *irq_domain;
114	struct mutex lock; /* IRQ bus lock */
115	u8 irq_src;
116	u8 bkp_sysctrl;
117	u8 bkp_irqoutpin;
118};
119
120int stmfx_function_enable(struct stmfx *stmfx, u32 func);
121int stmfx_function_disable(struct stmfx *stmfx, u32 func);
122#endif