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registers.h
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linux-6.19.14/include/linux/mfd/mt6328/registers.h
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (c) 2022 Yassine Oudjana <y.oudjana@protonmail.com> 4 */ 5 6#ifndef __MFD_MT6328_REGISTERS_H__ 7#define __MFD_MT6328_REGISTERS_H__ 8 9/* PMIC Registers */ 10#define MT6328_STRUP_CON0 0x0000 11#define MT6328_STRUP_CON2 0x0002 12#define MT6328_STRUP_CON3 0x0004 13#define MT6328_STRUP_CON4 0x0006 14#define MT6328_STRUP_CON5 0x0008 15#define MT6328_STRUP_CON6 0x000a 16#define MT6328_STRUP_CON7 0x000c 17#define MT6328_STRUP_CON8 0x000e 18#define MT6328_STRUP_CON9 0x0010 19#define MT6328_STRUP_CON10 0x0012 20#define MT6328_STRUP_CON11 0x0014 21#define MT6328_STRUP_CON12 0x0016 22#define MT6328_STRUP_CON13 0x0018 23#define MT6328_STRUP_CON14 0x001a 24#define MT6328_STRUP_CON15 0x001c 25#define MT6328_STRUP_CON16 0x001e 26#define MT6328_STRUP_CON17 0x0020 27#define MT6328_STRUP_CON18 0x0022 28#define MT6328_STRUP_CON19 0x0024 29#define MT6328_STRUP_CON20 0x0026 30#define MT6328_STRUP_CON21 0x0028 31#define MT6328_STRUP_CON22 0x002a 32#define MT6328_STRUP_CON23 0x002c 33#define MT6328_STRUP_CON24 0x002e 34#define MT6328_STRUP_CON25 0x0030 35#define MT6328_STRUP_CON26 0x0032 36#define MT6328_STRUP_CON27 0x0034 37#define MT6328_STRUP_CON28 0x0036 38#define MT6328_STRUP_CON29 0x0038 39#define MT6328_STRUP_CON30 0x003a 40#define MT6328_STRUP_CON31 0x003c 41#define MT6328_STRUP_CON32 0x003e 42#define MT6328_STRUP_ANA_CON0 0x0040 43#define MT6328_HWCID 0x0200 44#define MT6328_SWCID 0x0202 45#define MT6328_TOP_CON 0x0204 46#define MT6328_TEST_OUT 0x0206 47#define MT6328_TEST_CON0 0x0208 48#define MT6328_TEST_CON1 0x020a 49#define MT6328_TESTMODE_SW 0x020c 50#define MT6328_EN_STATUS0 0x020e 51#define MT6328_EN_STATUS1 0x0210 52#define MT6328_EN_STATUS2 0x0212 53#define MT6328_OCSTATUS0 0x0214 54#define MT6328_OCSTATUS1 0x0216 55#define MT6328_OCSTATUS2 0x0218 56#define MT6328_PGDEBSTATUS 0x021a 57#define MT6328_PGSTATUS 0x021c 58#define MT6328_THERMALSTATUS 0x021e 59#define MT6328_TOPSTATUS 0x0220 60#define MT6328_TDSEL_CON 0x0222 61#define MT6328_RDSEL_CON 0x0224 62#define MT6328_SMT_CON0 0x0226 63#define MT6328_SMT_CON1 0x0228 64#define MT6328_SMT_CON2 0x022a 65#define MT6328_DRV_CON0 0x022c 66#define MT6328_DRV_CON1 0x022e 67#define MT6328_DRV_CON2 0x0230 68#define MT6328_DRV_CON3 0x0232 69#define MT6328_TOP_STATUS 0x0234 70#define MT6328_TOP_STATUS_SET 0x0236 71#define MT6328_TOP_STATUS_CLR 0x0238 72#define MT6328_RGS_ANA_MON 0x023a 73#define MT6328_TOP_CKPDN_CON0 0x023c 74#define MT6328_TOP_CKPDN_CON0_SET 0x023e 75#define MT6328_TOP_CKPDN_CON0_CLR 0x0240 76#define MT6328_TOP_CKPDN_CON1 0x0242 77#define MT6328_TOP_CKPDN_CON1_SET 0x0244 78#define MT6328_TOP_CKPDN_CON1_CLR 0x0246 79#define MT6328_TOP_CKPDN_CON2 0x0248 80#define MT6328_TOP_CKPDN_CON2_SET 0x024a 81#define MT6328_TOP_CKPDN_CON2_CLR 0x024c 82#define MT6328_TOP_CKPDN_CON3 0x024e 83#define MT6328_TOP_CKPDN_CON3_SET 0x0250 84#define MT6328_TOP_CKPDN_CON3_CLR 0x0252 85#define MT6328_TOP_CKPDN_CON4 0x0254 86#define MT6328_TOP_CKPDN_CON4_SET 0x0256 87#define MT6328_TOP_CKPDN_CON4_CLR 0x0258 88#define MT6328_TOP_CKSEL_CON0 0x025a 89#define MT6328_TOP_CKSEL_CON0_SET 0x025c 90#define MT6328_TOP_CKSEL_CON0_CLR 0x025e 91#define MT6328_TOP_CKSEL_CON1 0x0260 92#define MT6328_TOP_CKSEL_CON1_SET 0x0262 93#define MT6328_TOP_CKSEL_CON1_CLR 0x0264 94#define MT6328_TOP_CKSEL_CON2 0x0266 95#define MT6328_TOP_CKSEL_CON2_SET 0x0268 96#define MT6328_TOP_CKSEL_CON2_CLR 0x026a 97#define MT6328_TOP_CKDIVSEL_CON0 0x026c 98#define MT6328_TOP_CKDIVSEL_CON0_SET 0x026e 99#define MT6328_TOP_CKDIVSEL_CON0_CLR 0x0270 100#define MT6328_TOP_CKDIVSEL_CON1 0x0272 101#define MT6328_TOP_CKDIVSEL_CON1_SET 0x0274 102#define MT6328_TOP_CKDIVSEL_CON1_CLR 0x0276 103#define MT6328_TOP_CKHWEN_CON0 0x0278 104#define MT6328_TOP_CKHWEN_CON0_SET 0x027a 105#define MT6328_TOP_CKHWEN_CON0_CLR 0x027c 106#define MT6328_TOP_CKHWEN_CON1 0x027e 107#define MT6328_TOP_CKHWEN_CON1_SET 0x0280 108#define MT6328_TOP_CKHWEN_CON1_CLR 0x0282 109#define MT6328_TOP_CKTST_CON0 0x0284 110#define MT6328_TOP_CKTST_CON1 0x0286 111#define MT6328_TOP_CKTST_CON2 0x0288 112#define MT6328_TOP_CLKSQ 0x028a 113#define MT6328_TOP_CLKSQ_SET 0x028c 114#define MT6328_TOP_CLKSQ_CLR 0x028e 115#define MT6328_TOP_CLKSQ_RTC 0x0290 116#define MT6328_TOP_CLKSQ_RTC_SET 0x0292 117#define MT6328_TOP_CLKSQ_RTC_CLR 0x0294 118#define MT6328_TOP_CLK_TRIM 0x0296 119#define MT6328_TOP_RST_CON0 0x0298 120#define MT6328_TOP_RST_CON0_SET 0x029a 121#define MT6328_TOP_RST_CON0_CLR 0x029c 122#define MT6328_TOP_RST_CON1 0x029e 123#define MT6328_TOP_RST_MISC 0x02a0 124#define MT6328_TOP_RST_MISC_SET 0x02a2 125#define MT6328_TOP_RST_MISC_CLR 0x02a4 126#define MT6328_TOP_RST_STATUS 0x02a6 127#define MT6328_TOP_RST_STATUS_SET 0x02a8 128#define MT6328_TOP_RST_STATUS_CLR 0x02aa 129#define MT6328_INT_CON0 0x02ac 130#define MT6328_INT_CON0_SET 0x02ae 131#define MT6328_INT_CON0_CLR 0x02b0 132#define MT6328_INT_CON1 0x02b2 133#define MT6328_INT_CON1_SET 0x02b4 134#define MT6328_INT_CON1_CLR 0x02b6 135#define MT6328_INT_CON2 0x02b8 136#define MT6328_INT_CON2_SET 0x02ba 137#define MT6328_INT_CON2_CLR 0x02bc 138#define MT6328_INT_MISC_CON 0x02be 139#define MT6328_INT_MISC_CON_SET 0x02c0 140#define MT6328_INT_MISC_CON_CLR 0x02c2 141#define MT6328_INT_STATUS0 0x02c4 142#define MT6328_INT_STATUS1 0x02c6 143#define MT6328_INT_STATUS2 0x02c8 144#define MT6328_OC_GEAR_0 0x02ca 145#define MT6328_FQMTR_CON0 0x02cc 146#define MT6328_FQMTR_CON1 0x02ce 147#define MT6328_FQMTR_CON2 0x02d0 148#define MT6328_RG_SPI_CON 0x02d2 149#define MT6328_DEW_DIO_EN 0x02d4 150#define MT6328_DEW_READ_TEST 0x02d6 151#define MT6328_DEW_WRITE_TEST 0x02d8 152#define MT6328_DEW_CRC_SWRST 0x02da 153#define MT6328_DEW_CRC_EN 0x02dc 154#define MT6328_DEW_CRC_VAL 0x02de 155#define MT6328_DEW_DBG_MON_SEL 0x02e0 156#define MT6328_DEW_CIPHER_KEY_SEL 0x02e2 157#define MT6328_DEW_CIPHER_IV_SEL 0x02e4 158#define MT6328_DEW_CIPHER_EN 0x02e6 159#define MT6328_DEW_CIPHER_RDY 0x02e8 160#define MT6328_DEW_CIPHER_MODE 0x02ea 161#define MT6328_DEW_CIPHER_SWRST 0x02ec 162#define MT6328_DEW_RDDMY_NO 0x02ee 163#define MT6328_INT_TYPE_CON0 0x02f0 164#define MT6328_INT_TYPE_CON0_SET 0x02f2 165#define MT6328_INT_TYPE_CON0_CLR 0x02f4 166#define MT6328_INT_TYPE_CON1 0x02f6 167#define MT6328_INT_TYPE_CON1_SET 0x02f8 168#define MT6328_INT_TYPE_CON1_CLR 0x02fa 169#define MT6328_INT_TYPE_CON2 0x02fc 170#define MT6328_INT_TYPE_CON2_SET 0x02fe 171#define MT6328_INT_TYPE_CON2_CLR 0x0300 172#define MT6328_INT_STA 0x0302 173#define MT6328_BUCK_ALL_CON0 0x0400 174#define MT6328_BUCK_ALL_CON1 0x0402 175#define MT6328_BUCK_ALL_CON2 0x0404 176#define MT6328_BUCK_ALL_CON3 0x0406 177#define MT6328_BUCK_ALL_CON4 0x0408 178#define MT6328_BUCK_ALL_CON5 0x040a 179#define MT6328_BUCK_ALL_CON6 0x040c 180#define MT6328_BUCK_ALL_CON9 0x040e 181#define MT6328_BUCK_ALL_CON12 0x0410 182#define MT6328_BUCK_ALL_CON13 0x0412 183#define MT6328_BUCK_ALL_CON14 0x0414 184#define MT6328_BUCK_ALL_CON16 0x0416 185#define MT6328_BUCK_ALL_CON18 0x0418 186#define MT6328_BUCK_ALL_CON19 0x041a 187#define MT6328_BUCK_ALL_CON20 0x041c 188#define MT6328_BUCK_ALL_CON21 0x041e 189#define MT6328_BUCK_ALL_CON22 0x0420 190#define MT6328_BUCK_ALL_CON23 0x0422 191#define MT6328_BUCK_ALL_CON24 0x0424 192#define MT6328_BUCK_ALL_CON25 0x0426 193#define MT6328_BUCK_ALL_CON26 0x0428 194#define MT6328_BUCK_ALL_CON27 0x042a 195#define MT6328_BUCK_ALL_CON28 0x042c 196#define MT6328_SMPS_TOP_ANA_CON0 0x042e 197#define MT6328_SMPS_TOP_ANA_CON1 0x0430 198#define MT6328_SMPS_TOP_ANA_CON2 0x0432 199#define MT6328_SMPS_TOP_ANA_CON3 0x0434 200#define MT6328_SMPS_TOP_ANA_CON4 0x0436 201#define MT6328_SMPS_TOP_ANA_CON5 0x0438 202#define MT6328_SMPS_TOP_ANA_CON6 0x043a 203#define MT6328_SMPS_TOP_ANA_CON7 0x043c 204#define MT6328_SMPS_TOP_ANA_CON8 0x043e 205#define MT6328_VCORE_ANA_CON0 0x0440 206#define MT6328_VCORE_ANA_CON1 0x0442 207#define MT6328_VCORE_ANA_CON2 0x0444 208#define MT6328_VCORE_ANA_CON3 0x0446 209#define MT6328_VCORE_ANA_CON4 0x0448 210#define MT6328_VSYS22_ANA_CON0 0x044a 211#define MT6328_VSYS22_ANA_CON1 0x044c 212#define MT6328_VSYS22_ANA_CON2 0x044e 213#define MT6328_VSYS22_ANA_CON3 0x0450 214#define MT6328_VSYS22_ANA_CON4 0x0452 215#define MT6328_VPROC_ANA_CON0 0x0454 216#define MT6328_VPROC_ANA_CON1 0x0456 217#define MT6328_VPROC_ANA_CON2 0x0458 218#define MT6328_VPROC_ANA_CON3 0x045a 219#define MT6328_VPROC_ANA_CON4 0x045c 220#define MT6328_OSC32_ANA_CON0 0x045e 221#define MT6328_OSC32_ANA_CON1 0x0460 222#define MT6328_VPA_ANA_CON0 0x0462 223#define MT6328_VPA_ANA_CON1 0x0464 224#define MT6328_VPA_ANA_CON2 0x0466 225#define MT6328_VPA_ANA_CON3 0x0468 226#define MT6328_VLTE_ANA_CON0 0x046a 227#define MT6328_VLTE_ANA_CON1 0x046c 228#define MT6328_VLTE_ANA_CON2 0x046e 229#define MT6328_VLTE_ANA_CON3 0x0470 230#define MT6328_VLTE_ANA_CON4 0x0472 231#define MT6328_VPROC_CON0 0x0474 232#define MT6328_VPROC_CON1 0x0476 233#define MT6328_VPROC_CON2 0x0478 234#define MT6328_VPROC_CON3 0x047a 235#define MT6328_VPROC_CON4 0x047c 236#define MT6328_VPROC_CON5 0x047e 237#define MT6328_VPROC_CON6 0x0480 238#define MT6328_VPROC_CON7 0x0482 239#define MT6328_VPROC_CON8 0x0484 240#define MT6328_VPROC_CON9 0x0486 241#define MT6328_VPROC_CON10 0x0488 242#define MT6328_VPROC_CON11 0x048a 243#define MT6328_VPROC_CON12 0x048c 244#define MT6328_VPROC_CON13 0x048e 245#define MT6328_VPROC_CON14 0x0490 246#define MT6328_VPROC_CON15 0x0492 247#define MT6328_VPROC_CON16 0x0494 248#define MT6328_VPROC_CON17 0x0496 249#define MT6328_VPROC_CON18 0x0498 250#define MT6328_VPROC_CON19 0x049a 251#define MT6328_VSRAM_CON0 0x049c 252#define MT6328_VSRAM_CON1 0x049e 253#define MT6328_VSRAM_CON2 0x04a0 254#define MT6328_VSRAM_CON3 0x04a2 255#define MT6328_VSRAM_CON4 0x04a4 256#define MT6328_VSRAM_CON5 0x04a6 257#define MT6328_VSRAM_CON6 0x04a8 258#define MT6328_VSRAM_CON7 0x04aa 259#define MT6328_VSRAM_CON8 0x04ac 260#define MT6328_VSRAM_CON9 0x04ae 261#define MT6328_VSRAM_CON10 0x04b0 262#define MT6328_VSRAM_CON11 0x04b2 263#define MT6328_VSRAM_CON12 0x04b4 264#define MT6328_VSRAM_CON13 0x04b6 265#define MT6328_VSRAM_CON14 0x04b8 266#define MT6328_VSRAM_CON15 0x04ba 267#define MT6328_VSRAM_CON16 0x04bc 268#define MT6328_VSRAM_CON17 0x04be 269#define MT6328_VSRAM_CON18 0x04c0 270#define MT6328_VSRAM_CON19 0x04c2 271#define MT6328_VLTE_CON0 0x04c4 272#define MT6328_VLTE_CON1 0x04c6 273#define MT6328_VLTE_CON2 0x04c8 274#define MT6328_VLTE_CON3 0x04ca 275#define MT6328_VLTE_CON4 0x04cc 276#define MT6328_VLTE_CON5 0x04ce 277#define MT6328_VLTE_CON6 0x04d0 278#define MT6328_VLTE_CON7 0x04d2 279#define MT6328_VLTE_CON8 0x04d4 280#define MT6328_VLTE_CON9 0x04d6 281#define MT6328_VLTE_CON10 0x04d8 282#define MT6328_VLTE_CON11 0x04da 283#define MT6328_VLTE_CON12 0x04dc 284#define MT6328_VLTE_CON13 0x04de 285#define MT6328_VLTE_CON14 0x04e0 286#define MT6328_VLTE_CON15 0x04e2 287#define MT6328_VLTE_CON16 0x04e4 288#define MT6328_VLTE_CON17 0x04e6 289#define MT6328_VLTE_CON18 0x04e8 290#define MT6328_VLTE_CON19 0x04ea 291#define MT6328_VCORE1_CON0 0x0600 292#define MT6328_VCORE1_CON1 0x0602 293#define MT6328_VCORE1_CON2 0x0604 294#define MT6328_VCORE1_CON3 0x0606 295#define MT6328_VCORE1_CON4 0x0608 296#define MT6328_VCORE1_CON5 0x060a 297#define MT6328_VCORE1_CON6 0x060c 298#define MT6328_VCORE1_CON7 0x060e 299#define MT6328_VCORE1_CON8 0x0610 300#define MT6328_VCORE1_CON9 0x0612 301#define MT6328_VCORE1_CON10 0x0614 302#define MT6328_VCORE1_CON11 0x0616 303#define MT6328_VCORE1_CON12 0x0618 304#define MT6328_VCORE1_CON13 0x061a 305#define MT6328_VCORE1_CON14 0x061c 306#define MT6328_VCORE1_CON15 0x061e 307#define MT6328_VCORE1_CON16 0x0620 308#define MT6328_VCORE1_CON17 0x0622 309#define MT6328_VCORE1_CON18 0x0624 310#define MT6328_VCORE1_CON19 0x0626 311#define MT6328_VSYS22_CON0 0x0628 312#define MT6328_VSYS22_CON1 0x062a 313#define MT6328_VSYS22_CON2 0x062c 314#define MT6328_VSYS22_CON3 0x062e 315#define MT6328_VSYS22_CON4 0x0630 316#define MT6328_VSYS22_CON5 0x0632 317#define MT6328_VSYS22_CON6 0x0634 318#define MT6328_VSYS22_CON7 0x0636 319#define MT6328_VSYS22_CON8 0x0638 320#define MT6328_VSYS22_CON9 0x063a 321#define MT6328_VSYS22_CON10 0x063c 322#define MT6328_VSYS22_CON11 0x063e 323#define MT6328_VSYS22_CON12 0x0640 324#define MT6328_VSYS22_CON13 0x0642 325#define MT6328_VSYS22_CON14 0x0644 326#define MT6328_VSYS22_CON15 0x0646 327#define MT6328_VSYS22_CON16 0x0648 328#define MT6328_VSYS22_CON17 0x064a 329#define MT6328_VSYS22_CON18 0x064c 330#define MT6328_VSYS22_CON19 0x064e 331#define MT6328_VPA_CON0 0x0650 332#define MT6328_VPA_CON1 0x0652 333#define MT6328_VPA_CON2 0x0654 334#define MT6328_VPA_CON3 0x0656 335#define MT6328_VPA_CON4 0x0658 336#define MT6328_VPA_CON5 0x065a 337#define MT6328_VPA_CON6 0x065c 338#define MT6328_VPA_CON7 0x065e 339#define MT6328_VPA_CON8 0x0660 340#define MT6328_VPA_CON9 0x0662 341#define MT6328_VPA_CON10 0x0664 342#define MT6328_VPA_CON11 0x0666 343#define MT6328_VPA_CON12 0x0668 344#define MT6328_VPA_CON13 0x066a 345#define MT6328_VPA_CON14 0x066c 346#define MT6328_VPA_CON15 0x066e 347#define MT6328_VPA_CON16 0x0670 348#define MT6328_VPA_CON17 0x0672 349#define MT6328_VPA_CON18 0x0674 350#define MT6328_VPA_CON19 0x0676 351#define MT6328_VPA_CON20 0x0678 352#define MT6328_VPA_CON21 0x067a 353#define MT6328_VPA_CON22 0x067c 354#define MT6328_VPA_CON23 0x067e 355#define MT6328_VPA_CON24 0x0680 356#define MT6328_BUCK_K_CON0 0x0682 357#define MT6328_BUCK_K_CON1 0x0684 358#define MT6328_BUCK_K_CON2 0x0686 359#define MT6328_BUCK_K_CON3 0x0688 360#define MT6328_ZCD_CON0 0x0800 361#define MT6328_ZCD_CON1 0x0802 362#define MT6328_ZCD_CON2 0x0804 363#define MT6328_ZCD_CON3 0x0806 364#define MT6328_ZCD_CON4 0x0808 365#define MT6328_ZCD_CON5 0x080a 366#define MT6328_ISINK0_CON0 0x080c 367#define MT6328_ISINK0_CON1 0x080e 368#define MT6328_ISINK0_CON2 0x0810 369#define MT6328_ISINK0_CON3 0x0812 370#define MT6328_ISINK1_CON0 0x0814 371#define MT6328_ISINK1_CON1 0x0816 372#define MT6328_ISINK1_CON2 0x0818 373#define MT6328_ISINK1_CON3 0x081a 374#define MT6328_ISINK2_CON1 0x081c 375#define MT6328_ISINK3_CON1 0x081e 376#define MT6328_ISINK_ANA0 0x0820 377#define MT6328_ISINK_ANA1 0x0822 378#define MT6328_ISINK_PHASE_DLY 0x0824 379#define MT6328_ISINK_SFSTR 0x0826 380#define MT6328_ISINK_EN_CTRL 0x0828 381#define MT6328_ISINK_MODE_CTRL 0x082a 382#define MT6328_VTCXO_0_CON0 0x0a00 383#define MT6328_VTCXO_1_CON0 0x0a02 384#define MT6328_VAUD28_CON0 0x0a04 385#define MT6328_VAUX18_CON0 0x0a06 386#define MT6328_VRF18_0_CON0 0x0a08 387#define MT6328_VRF18_0_CON1 0x0a0a 388#define MT6328_VCAMA_CON0 0x0a0c 389#define MT6328_VCN28_CON0 0x0a0e 390#define MT6328_VCN33_CON0 0x0a10 391#define MT6328_VCN33_CON1 0x0a12 392#define MT6328_VCN33_CON2 0x0a14 393#define MT6328_VRF18_1_CON0 0x0a16 394#define MT6328_VRF18_1_CON1 0x0a18 395#define MT6328_VUSB33_CON0 0x0a1a 396#define MT6328_VMCH_CON0 0x0a1c 397#define MT6328_VMCH_CON1 0x0a1e 398#define MT6328_VMC_CON0 0x0a20 399#define MT6328_VMC_CON1 0x0a22 400#define MT6328_VEMC_3V3_CON0 0x0a24 401#define MT6328_VEMC_3V3_CON1 0x0a26 402#define MT6328_VIO28_CON0 0x0a28 403#define MT6328_VCAMAF_CON0 0x0a2a 404#define MT6328_VGP1_CON0 0x0a2c 405#define MT6328_VGP1_CON1 0x0a2e 406#define MT6328_VEFUSE_CON0 0x0a30 407#define MT6328_VSIM1_CON0 0x0a32 408#define MT6328_VSIM2_CON0 0x0a34 409#define MT6328_VIO18_CON0 0x0a36 410#define MT6328_VIBR_CON0 0x0a38 411#define MT6328_VCN18_CON0 0x0a3a 412#define MT6328_VCAM_CON0 0x0a3c 413#define MT6328_VCAMIO_CON0 0x0a3e 414#define MT6328_LDO_VSRAM_CON0 0x0a40 415#define MT6328_LDO_VSRAM_CON1 0x0a42 416#define MT6328_VTREF_CON0 0x0a44 417#define MT6328_VM_CON0 0x0a46 418#define MT6328_VM_CON1 0x0a48 419#define MT6328_VRTC_CON0 0x0a4a 420#define MT6328_LDO_OCFB0 0x0a4c 421#define MT6328_ALDO_ANA_CON0 0x0a4e 422#define MT6328_ADLDO_ANA_CON1 0x0a50 423#define MT6328_ADLDO_ANA_CON2 0x0a52 424#define MT6328_ADLDO_ANA_CON3 0x0a54 425#define MT6328_ADLDO_ANA_CON4 0x0a56 426#define MT6328_ADLDO_ANA_CON5 0x0a58 427#define MT6328_ADLDO_ANA_CON6 0x0a5a 428#define MT6328_ADLDO_ANA_CON7 0x0a5c 429#define MT6328_ADLDO_ANA_CON8 0x0a5e 430#define MT6328_ADLDO_ANA_CON9 0x0a60 431#define MT6328_ADLDO_ANA_CON10 0x0a62 432#define MT6328_ADLDO_ANA_CON11 0x0a64 433#define MT6328_ADLDO_ANA_CON12 0x0a66 434#define MT6328_ADLDO_ANA_CON13 0x0a68 435#define MT6328_DLDO_ANA_CON0 0x0a6a 436#define MT6328_DLDO_ANA_CON1 0x0a6c 437#define MT6328_DLDO_ANA_CON2 0x0a6e 438#define MT6328_DLDO_ANA_CON3 0x0a70 439#define MT6328_DLDO_ANA_CON4 0x0a72 440#define MT6328_DLDO_ANA_CON5 0x0a74 441#define MT6328_SLDO_ANA_CON0 0x0a76 442#define MT6328_SLDO_ANA_CON1 0x0a78 443#define MT6328_SLDO_ANA_CON2 0x0a7a 444#define MT6328_SLDO_ANA_CON3 0x0a7c 445#define MT6328_SLDO_ANA_CON4 0x0a7e 446#define MT6328_SLDO_ANA_CON5 0x0a80 447#define MT6328_SLDO_ANA_CON6 0x0a82 448#define MT6328_SLDO_ANA_CON7 0x0a84 449#define MT6328_SLDO_ANA_CON8 0x0a86 450#define MT6328_SLDO_ANA_CON9 0x0a88 451#define MT6328_SLDO_ANA_CON10 0x0a8a 452#define MT6328_LDO_RSV_CON0 0x0a8c 453#define MT6328_LDO_RSV_CON1 0x0a8e 454#define MT6328_SPK_CON0 0x0a90 455#define MT6328_SPK_CON1 0x0a92 456#define MT6328_SPK_CON2 0x0a94 457#define MT6328_SPK_CON3 0x0a96 458#define MT6328_SPK_CON4 0x0a98 459#define MT6328_SPK_CON5 0x0a9a 460#define MT6328_SPK_CON6 0x0a9c 461#define MT6328_SPK_CON7 0x0a9e 462#define MT6328_SPK_CON8 0x0aa0 463#define MT6328_SPK_CON9 0x0aa2 464#define MT6328_SPK_CON10 0x0aa4 465#define MT6328_SPK_CON11 0x0aa6 466#define MT6328_SPK_CON12 0x0aa8 467#define MT6328_SPK_CON13 0x0aaa 468#define MT6328_SPK_CON14 0x0aac 469#define MT6328_SPK_CON15 0x0aae 470#define MT6328_SPK_CON16 0x0ab0 471#define MT6328_SPK_ANA_CON0 0x0ab2 472#define MT6328_SPK_ANA_CON1 0x0ab4 473#define MT6328_SPK_ANA_CON3 0x0ab6 474#define MT6328_OTP_CON0 0x0c00 475#define MT6328_OTP_CON1 0x0c02 476#define MT6328_OTP_CON2 0x0c04 477#define MT6328_OTP_CON3 0x0c06 478#define MT6328_OTP_CON4 0x0c08 479#define MT6328_OTP_CON5 0x0c0a 480#define MT6328_OTP_CON6 0x0c0c 481#define MT6328_OTP_CON7 0x0c0e 482#define MT6328_OTP_CON8 0x0c10 483#define MT6328_OTP_CON9 0x0c12 484#define MT6328_OTP_CON10 0x0c14 485#define MT6328_OTP_CON11 0x0c16 486#define MT6328_OTP_CON12 0x0c18 487#define MT6328_OTP_CON13 0x0c1a 488#define MT6328_OTP_CON14 0x0c1c 489#define MT6328_OTP_DOUT_0_15 0x0c1e 490#define MT6328_OTP_DOUT_16_31 0x0c20 491#define MT6328_OTP_DOUT_32_47 0x0c22 492#define MT6328_OTP_DOUT_48_63 0x0c24 493#define MT6328_OTP_DOUT_64_79 0x0c26 494#define MT6328_OTP_DOUT_80_95 0x0c28 495#define MT6328_OTP_DOUT_96_111 0x0c2a 496#define MT6328_OTP_DOUT_112_127 0x0c2c 497#define MT6328_OTP_DOUT_128_143 0x0c2e 498#define MT6328_OTP_DOUT_144_159 0x0c30 499#define MT6328_OTP_DOUT_160_175 0x0c32 500#define MT6328_OTP_DOUT_176_191 0x0c34 501#define MT6328_OTP_DOUT_192_207 0x0c36 502#define MT6328_OTP_DOUT_208_223 0x0c38 503#define MT6328_OTP_DOUT_224_239 0x0c3a 504#define MT6328_OTP_DOUT_240_255 0x0c3c 505#define MT6328_OTP_DOUT_256_271 0x0c3e 506#define MT6328_OTP_DOUT_272_287 0x0c40 507#define MT6328_OTP_DOUT_288_303 0x0c42 508#define MT6328_OTP_DOUT_304_319 0x0c44 509#define MT6328_OTP_DOUT_320_335 0x0c46 510#define MT6328_OTP_DOUT_336_351 0x0c48 511#define MT6328_OTP_DOUT_352_367 0x0c4a 512#define MT6328_OTP_DOUT_368_383 0x0c4c 513#define MT6328_OTP_DOUT_384_399 0x0c4e 514#define MT6328_OTP_DOUT_400_415 0x0c50 515#define MT6328_OTP_DOUT_416_431 0x0c52 516#define MT6328_OTP_DOUT_432_447 0x0c54 517#define MT6328_OTP_DOUT_448_463 0x0c56 518#define MT6328_OTP_DOUT_464_479 0x0c58 519#define MT6328_OTP_DOUT_480_495 0x0c5a 520#define MT6328_OTP_DOUT_496_511 0x0c5c 521#define MT6328_OTP_VAL_0_15 0x0c5e 522#define MT6328_OTP_VAL_16_31 0x0c60 523#define MT6328_OTP_VAL_32_47 0x0c62 524#define MT6328_OTP_VAL_48_63 0x0c64 525#define MT6328_OTP_VAL_64_79 0x0c66 526#define MT6328_OTP_VAL_80_95 0x0c68 527#define MT6328_OTP_VAL_96_111 0x0c6a 528#define MT6328_OTP_VAL_112_127 0x0c6c 529#define MT6328_OTP_VAL_128_143 0x0c6e 530#define MT6328_OTP_VAL_144_159 0x0c70 531#define MT6328_OTP_VAL_160_175 0x0c72 532#define MT6328_OTP_VAL_176_191 0x0c74 533#define MT6328_OTP_VAL_192_207 0x0c76 534#define MT6328_OTP_VAL_208_223 0x0c78 535#define MT6328_OTP_VAL_224_239 0x0c7a 536#define MT6328_OTP_VAL_240_255 0x0c7c 537#define MT6328_OTP_VAL_256_271 0x0c7e 538#define MT6328_OTP_VAL_272_287 0x0c80 539#define MT6328_OTP_VAL_288_303 0x0c82 540#define MT6328_OTP_VAL_304_319 0x0c84 541#define MT6328_OTP_VAL_320_335 0x0c86 542#define MT6328_OTP_VAL_336_351 0x0c88 543#define MT6328_OTP_VAL_352_367 0x0c8a 544#define MT6328_OTP_VAL_368_383 0x0c8c 545#define MT6328_OTP_VAL_384_399 0x0c8e 546#define MT6328_OTP_VAL_400_415 0x0c90 547#define MT6328_OTP_VAL_416_431 0x0c92 548#define MT6328_OTP_VAL_432_447 0x0c94 549#define MT6328_OTP_VAL_448_463 0x0c96 550#define MT6328_OTP_VAL_464_479 0x0c98 551#define MT6328_OTP_VAL_480_495 0x0c9a 552#define MT6328_OTP_VAL_496_511 0x0c9c 553#define MT6328_RTC_MIX_CON0 0x0c9e 554#define MT6328_RTC_MIX_CON1 0x0ca0 555#define MT6328_RTC_MIX_CON2 0x0ca2 556#define MT6328_FGADC_CON0 0x0ca4 557#define MT6328_FGADC_CON1 0x0ca6 558#define MT6328_FGADC_CON2 0x0ca8 559#define MT6328_FGADC_CON3 0x0caa 560#define MT6328_FGADC_CON4 0x0cac 561#define MT6328_FGADC_CON5 0x0cae 562#define MT6328_FGADC_CON6 0x0cb0 563#define MT6328_FGADC_CON7 0x0cb2 564#define MT6328_FGADC_CON8 0x0cb4 565#define MT6328_FGADC_CON9 0x0cb6 566#define MT6328_FGADC_CON10 0x0cb8 567#define MT6328_FGADC_CON11 0x0cba 568#define MT6328_FGADC_CON12 0x0cbc 569#define MT6328_FGADC_CON13 0x0cbe 570#define MT6328_FGADC_CON14 0x0cc0 571#define MT6328_FGADC_CON15 0x0cc2 572#define MT6328_FGADC_CON16 0x0cc4 573#define MT6328_FGADC_CON17 0x0cc6 574#define MT6328_FGADC_CON18 0x0cc8 575#define MT6328_FGADC_CON19 0x0cca 576#define MT6328_FGADC_CON20 0x0ccc 577#define MT6328_FGADC_CON21 0x0cce 578#define MT6328_FGADC_CON22 0x0cd0 579#define MT6328_FGADC_CON23 0x0cd2 580#define MT6328_FGADC_CON24 0x0cd4 581#define MT6328_FGADC_CON25 0x0cd6 582#define MT6328_FGADC_CON26 0x0cd8 583#define MT6328_FGADC_CON27 0x0cda 584#define MT6328_AUDDEC_ANA_CON0 0x0cdc 585#define MT6328_AUDDEC_ANA_CON1 0x0cde 586#define MT6328_AUDDEC_ANA_CON2 0x0ce0 587#define MT6328_AUDDEC_ANA_CON3 0x0ce2 588#define MT6328_AUDDEC_ANA_CON4 0x0ce4 589#define MT6328_AUDDEC_ANA_CON5 0x0ce6 590#define MT6328_AUDDEC_ANA_CON6 0x0ce8 591#define MT6328_AUDDEC_ANA_CON7 0x0cea 592#define MT6328_AUDDEC_ANA_CON8 0x0cec 593#define MT6328_AUDENC_ANA_CON0 0x0cee 594#define MT6328_AUDENC_ANA_CON1 0x0cf0 595#define MT6328_AUDENC_ANA_CON2 0x0cf2 596#define MT6328_AUDENC_ANA_CON3 0x0cf4 597#define MT6328_AUDENC_ANA_CON4 0x0cf6 598#define MT6328_AUDENC_ANA_CON5 0x0cf8 599#define MT6328_AUDENC_ANA_CON6 0x0cfa 600#define MT6328_AUDENC_ANA_CON7 0x0cfc 601#define MT6328_AUDENC_ANA_CON8 0x0cfe 602#define MT6328_AUDENC_ANA_CON9 0x0d00 603#define MT6328_AUDENC_ANA_CON10 0x0d02 604#define MT6328_AUDNCP_CLKDIV_CON0 0x0d04 605#define MT6328_AUDNCP_CLKDIV_CON1 0x0d06 606#define MT6328_AUDNCP_CLKDIV_CON2 0x0d08 607#define MT6328_AUDNCP_CLKDIV_CON3 0x0d0a 608#define MT6328_AUDNCP_CLKDIV_CON4 0x0d0c 609#define MT6328_AUXADC_ADC0 0x0e00 610#define MT6328_AUXADC_ADC1 0x0e02 611#define MT6328_AUXADC_ADC2 0x0e04 612#define MT6328_AUXADC_ADC3 0x0e06 613#define MT6328_AUXADC_ADC4 0x0e08 614#define MT6328_AUXADC_ADC5 0x0e0a 615#define MT6328_AUXADC_ADC6 0x0e0c 616#define MT6328_AUXADC_ADC7 0x0e0e 617#define MT6328_AUXADC_ADC8 0x0e10 618#define MT6328_AUXADC_ADC9 0x0e12 619#define MT6328_AUXADC_ADC10 0x0e14 620#define MT6328_AUXADC_ADC11 0x0e16 621#define MT6328_AUXADC_ADC12 0x0e18 622#define MT6328_AUXADC_ADC13 0x0e1a 623#define MT6328_AUXADC_ADC14 0x0e1c 624#define MT6328_AUXADC_ADC15 0x0e1e 625#define MT6328_AUXADC_ADC16 0x0e20 626#define MT6328_AUXADC_ADC17 0x0e22 627#define MT6328_AUXADC_ADC18 0x0e24 628#define MT6328_AUXADC_ADC19 0x0e26 629#define MT6328_AUXADC_ADC20 0x0e28 630#define MT6328_AUXADC_ADC21 0x0e2a 631#define MT6328_AUXADC_ADC22 0x0e2c 632#define MT6328_AUXADC_ADC23 0x0e2e 633#define MT6328_AUXADC_ADC24 0x0e30 634#define MT6328_AUXADC_ADC25 0x0e32 635#define MT6328_AUXADC_ADC26 0x0e34 636#define MT6328_AUXADC_ADC27 0x0e36 637#define MT6328_AUXADC_ADC28 0x0e38 638#define MT6328_AUXADC_ADC29 0x0e3a 639#define MT6328_AUXADC_ADC30 0x0e3c 640#define MT6328_AUXADC_ADC31 0x0e3e 641#define MT6328_AUXADC_ADC32 0x0e40 642#define MT6328_AUXADC_ADC33 0x0e42 643#define MT6328_AUXADC_BUF0 0x0e44 644#define MT6328_AUXADC_BUF1 0x0e46 645#define MT6328_AUXADC_BUF2 0x0e48 646#define MT6328_AUXADC_BUF3 0x0e4a 647#define MT6328_AUXADC_BUF4 0x0e4c 648#define MT6328_AUXADC_BUF5 0x0e4e 649#define MT6328_AUXADC_BUF6 0x0e50 650#define MT6328_AUXADC_BUF7 0x0e52 651#define MT6328_AUXADC_BUF8 0x0e54 652#define MT6328_AUXADC_BUF9 0x0e56 653#define MT6328_AUXADC_BUF10 0x0e58 654#define MT6328_AUXADC_BUF11 0x0e5a 655#define MT6328_AUXADC_BUF12 0x0e5c 656#define MT6328_AUXADC_BUF13 0x0e5e 657#define MT6328_AUXADC_BUF14 0x0e60 658#define MT6328_AUXADC_BUF15 0x0e62 659#define MT6328_AUXADC_BUF16 0x0e64 660#define MT6328_AUXADC_BUF17 0x0e66 661#define MT6328_AUXADC_BUF18 0x0e68 662#define MT6328_AUXADC_BUF19 0x0e6a 663#define MT6328_AUXADC_BUF20 0x0e6c 664#define MT6328_AUXADC_BUF21 0x0e6e 665#define MT6328_AUXADC_BUF22 0x0e70 666#define MT6328_AUXADC_BUF23 0x0e72 667#define MT6328_AUXADC_BUF24 0x0e74 668#define MT6328_AUXADC_BUF25 0x0e76 669#define MT6328_AUXADC_BUF26 0x0e78 670#define MT6328_AUXADC_BUF27 0x0e7a 671#define MT6328_AUXADC_BUF28 0x0e7c 672#define MT6328_AUXADC_BUF29 0x0e7e 673#define MT6328_AUXADC_BUF30 0x0e80 674#define MT6328_AUXADC_BUF31 0x0e82 675#define MT6328_AUXADC_STA0 0x0e84 676#define MT6328_AUXADC_STA1 0x0e86 677#define MT6328_AUXADC_RQST0 0x0e88 678#define MT6328_AUXADC_RQST0_SET 0x0e8a 679#define MT6328_AUXADC_RQST0_CLR 0x0e8c 680#define MT6328_AUXADC_RQST1 0x0e8e 681#define MT6328_AUXADC_RQST1_SET 0x0e90 682#define MT6328_AUXADC_RQST1_CLR 0x0e92 683#define MT6328_AUXADC_CON0 0x0e94 684#define MT6328_AUXADC_CON0_SET 0x0e96 685#define MT6328_AUXADC_CON0_CLR 0x0e98 686#define MT6328_AUXADC_CON1 0x0e9a 687#define MT6328_AUXADC_CON2 0x0e9c 688#define MT6328_AUXADC_CON3 0x0e9e 689#define MT6328_AUXADC_CON4 0x0ea0 690#define MT6328_AUXADC_CON5 0x0ea2 691#define MT6328_AUXADC_CON6 0x0ea4 692#define MT6328_AUXADC_CON7 0x0ea6 693#define MT6328_AUXADC_CON8 0x0ea8 694#define MT6328_AUXADC_CON9 0x0eaa 695#define MT6328_AUXADC_CON10 0x0eac 696#define MT6328_AUXADC_CON11 0x0eae 697#define MT6328_AUXADC_CON12 0x0eb0 698#define MT6328_AUXADC_CON13 0x0eb2 699#define MT6328_AUXADC_CON14 0x0eb4 700#define MT6328_AUXADC_CON15 0x0eb6 701#define MT6328_AUXADC_CON16 0x0eb8 702#define MT6328_AUXADC_AUTORPT0 0x0eba 703#define MT6328_AUXADC_LBAT0 0x0ebc 704#define MT6328_AUXADC_LBAT1 0x0ebe 705#define MT6328_AUXADC_LBAT2 0x0ec0 706#define MT6328_AUXADC_LBAT3 0x0ec2 707#define MT6328_AUXADC_LBAT4 0x0ec4 708#define MT6328_AUXADC_LBAT5 0x0ec6 709#define MT6328_AUXADC_LBAT6 0x0ec8 710#define MT6328_AUXADC_ACCDET 0x0eca 711#define MT6328_AUXADC_THR0 0x0ecc 712#define MT6328_AUXADC_THR1 0x0ece 713#define MT6328_AUXADC_THR2 0x0ed0 714#define MT6328_AUXADC_THR3 0x0ed2 715#define MT6328_AUXADC_THR4 0x0ed4 716#define MT6328_AUXADC_THR5 0x0ed6 717#define MT6328_AUXADC_THR6 0x0ed8 718#define MT6328_AUXADC_EFUSE0 0x0eda 719#define MT6328_AUXADC_EFUSE1 0x0edc 720#define MT6328_AUXADC_EFUSE2 0x0ede 721#define MT6328_AUXADC_EFUSE3 0x0ee0 722#define MT6328_AUXADC_EFUSE4 0x0ee2 723#define MT6328_AUXADC_EFUSE5 0x0ee4 724#define MT6328_AUXADC_DBG0 0x0ee6 725#define MT6328_AUXADC_IMP0 0x0ee8 726#define MT6328_AUXADC_IMP1 0x0eea 727#define MT6328_AUXADC_VISMPS0_1 0x0eec 728#define MT6328_AUXADC_VISMPS0_2 0x0eee 729#define MT6328_AUXADC_VISMPS0_3 0x0ef0 730#define MT6328_AUXADC_VISMPS0_4 0x0ef2 731#define MT6328_AUXADC_VISMPS0_5 0x0ef4 732#define MT6328_AUXADC_VISMPS0_6 0x0ef6 733#define MT6328_AUXADC_VISMPS0_7 0x0ef8 734#define MT6328_AUXADC_LBAT2_1 0x0efa 735#define MT6328_AUXADC_LBAT2_2 0x0efc 736#define MT6328_AUXADC_LBAT2_3 0x0efe 737#define MT6328_AUXADC_LBAT2_4 0x0f00 738#define MT6328_AUXADC_LBAT2_5 0x0f02 739#define MT6328_AUXADC_LBAT2_6 0x0f04 740#define MT6328_AUXADC_LBAT2_7 0x0f06 741#define MT6328_AUXADC_MDBG_0 0x0f08 742#define MT6328_AUXADC_MDBG_1 0x0f0a 743#define MT6328_AUXADC_MDBG_2 0x0f0c 744#define MT6328_AUXADC_MDRT_0 0x0f0e 745#define MT6328_AUXADC_MDRT_1 0x0f10 746#define MT6328_AUXADC_MDRT_2 0x0f12 747#define MT6328_ACCDET_CON0 0x0f14 748#define MT6328_ACCDET_CON1 0x0f16 749#define MT6328_ACCDET_CON2 0x0f18 750#define MT6328_ACCDET_CON3 0x0f1a 751#define MT6328_ACCDET_CON4 0x0f1c 752#define MT6328_ACCDET_CON5 0x0f1e 753#define MT6328_ACCDET_CON6 0x0f20 754#define MT6328_ACCDET_CON7 0x0f22 755#define MT6328_ACCDET_CON8 0x0f24 756#define MT6328_ACCDET_CON9 0x0f26 757#define MT6328_ACCDET_CON10 0x0f28 758#define MT6328_ACCDET_CON11 0x0f2a 759#define MT6328_ACCDET_CON12 0x0f2c 760#define MT6328_ACCDET_CON13 0x0f2e 761#define MT6328_ACCDET_CON14 0x0f30 762#define MT6328_ACCDET_CON15 0x0f32 763#define MT6328_ACCDET_CON16 0x0f34 764#define MT6328_ACCDET_CON17 0x0f36 765#define MT6328_ACCDET_CON18 0x0f38 766#define MT6328_ACCDET_CON19 0x0f3a 767#define MT6328_ACCDET_CON20 0x0f3c 768#define MT6328_ACCDET_CON21 0x0f3e 769#define MT6328_ACCDET_CON22 0x0f40 770#define MT6328_ACCDET_CON23 0x0f42 771#define MT6328_ACCDET_CON24 0x0f44 772#define MT6328_ACCDET_CON25 0x0f46 773#define MT6328_CHR_CON0 0x0f48 774#define MT6328_CHR_CON1 0x0f4a 775#define MT6328_CHR_CON2 0x0f4c 776#define MT6328_CHR_CON3 0x0f4e 777#define MT6328_CHR_CON4 0x0f50 778#define MT6328_CHR_CON5 0x0f52 779#define MT6328_CHR_CON6 0x0f54 780#define MT6328_CHR_CON7 0x0f56 781#define MT6328_CHR_CON8 0x0f58 782#define MT6328_CHR_CON9 0x0f5a 783#define MT6328_CHR_CON10 0x0f5c 784#define MT6328_CHR_CON11 0x0f5e 785#define MT6328_CHR_CON12 0x0f60 786#define MT6328_CHR_CON13 0x0f62 787#define MT6328_CHR_CON14 0x0f64 788#define MT6328_CHR_CON15 0x0f66 789#define MT6328_CHR_CON16 0x0f68 790#define MT6328_CHR_CON17 0x0f6a 791#define MT6328_CHR_CON18 0x0f6c 792#define MT6328_CHR_CON19 0x0f6e 793#define MT6328_CHR_CON20 0x0f70 794#define MT6328_CHR_CON21 0x0f72 795#define MT6328_CHR_CON22 0x0f74 796#define MT6328_CHR_CON23 0x0f76 797#define MT6328_CHR_CON24 0x0f78 798#define MT6328_CHR_CON25 0x0f7a 799#define MT6328_CHR_CON26 0x0f7c 800#define MT6328_CHR_CON27 0x0f7e 801#define MT6328_CHR_CON28 0x0f80 802#define MT6328_CHR_CON29 0x0f82 803#define MT6328_CHR_CON30 0x0f84 804#define MT6328_CHR_CON31 0x0f86 805#define MT6328_CHR_CON32 0x0f88 806#define MT6328_CHR_CON33 0x0f8a 807#define MT6328_CHR_CON34 0x0f8c 808#define MT6328_CHR_CON35 0x0f8e 809#define MT6328_CHR_CON36 0x0f90 810#define MT6328_CHR_CON37 0x0f92 811#define MT6328_CHR_CON38 0x0f94 812#define MT6328_CHR_CON39 0x0f96 813#define MT6328_CHR_CON40 0x0f98 814#define MT6328_CHR_CON41 0x0f9a 815#define MT6328_CHR_CON42 0x0f9c 816#define MT6328_BATON_CON0 0x0f9e 817#define MT6328_CHR_CON43 0x0fa0 818#define MT6328_EOSC_CALI_CON0 0x0faa 819#define MT6328_EOSC_CALI_CON1 0x0fac 820#define MT6328_VRTC_PWM_CON0 0x0fae 821 822#endif /* __MFD_MT6328_REGISTERS_H__ */
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