registers.h

   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Copyright (C) 2015-2017  Dialog Semiconductor
   4 */
   5
   6#ifndef __DA9062_H__
   7#define __DA9062_H__
   8
   9#define DA9062_PMIC_DEVICE_ID		0x62
  10#define DA9062_PMIC_VARIANT_MRC_AA	0x01
  11#define DA9062_PMIC_VARIANT_VRC_DA9061	0x01
  12#define DA9062_PMIC_VARIANT_VRC_DA9062	0x02
  13
  14#define DA9062_I2C_PAGE_SEL_SHIFT	1
  15
  16/*
  17 * Registers
  18 */
  19
  20#define DA9062AA_PAGE_CON		0x000
  21#define DA9062AA_STATUS_A		0x001
  22#define DA9062AA_STATUS_B		0x002
  23#define DA9062AA_STATUS_D		0x004
  24#define DA9062AA_FAULT_LOG		0x005
  25#define DA9062AA_EVENT_A		0x006
  26#define DA9062AA_EVENT_B		0x007
  27#define DA9062AA_EVENT_C		0x008
  28#define DA9062AA_IRQ_MASK_A		0x00A
  29#define DA9062AA_IRQ_MASK_B		0x00B
  30#define DA9062AA_IRQ_MASK_C		0x00C
  31#define DA9062AA_CONTROL_A		0x00E
  32#define DA9062AA_CONTROL_B		0x00F
  33#define DA9062AA_CONTROL_C		0x010
  34#define DA9062AA_CONTROL_D		0x011
  35#define DA9062AA_CONTROL_E		0x012
  36#define DA9062AA_CONTROL_F		0x013
  37#define DA9062AA_PD_DIS			0x014
  38#define DA9062AA_GPIO_0_1		0x015
  39#define DA9062AA_GPIO_2_3		0x016
  40#define DA9062AA_GPIO_4			0x017
  41#define DA9062AA_GPIO_WKUP_MODE		0x01C
  42#define DA9062AA_GPIO_MODE0_4		0x01D
  43#define DA9062AA_GPIO_OUT0_2		0x01E
  44#define DA9062AA_GPIO_OUT3_4		0x01F
  45#define DA9062AA_BUCK2_CONT		0x020
  46#define DA9062AA_BUCK1_CONT		0x021
  47#define DA9062AA_BUCK4_CONT		0x022
  48#define DA9062AA_BUCK3_CONT		0x024
  49#define DA9062AA_LDO1_CONT		0x026
  50#define DA9062AA_LDO2_CONT		0x027
  51#define DA9062AA_LDO3_CONT		0x028
  52#define DA9062AA_LDO4_CONT		0x029
  53#define DA9062AA_DVC_1			0x032
  54#define DA9062AA_COUNT_S		0x040
  55#define DA9062AA_COUNT_MI		0x041
  56#define DA9062AA_COUNT_H		0x042
  57#define DA9062AA_COUNT_D		0x043
  58#define DA9062AA_COUNT_MO		0x044
  59#define DA9062AA_COUNT_Y		0x045
  60#define DA9062AA_ALARM_S		0x046
  61#define DA9062AA_ALARM_MI		0x047
  62#define DA9062AA_ALARM_H		0x048
  63#define DA9062AA_ALARM_D		0x049
  64#define DA9062AA_ALARM_MO		0x04A
  65#define DA9062AA_ALARM_Y		0x04B
  66#define DA9062AA_SECOND_A		0x04C
  67#define DA9062AA_SECOND_B		0x04D
  68#define DA9062AA_SECOND_C		0x04E
  69#define DA9062AA_SECOND_D		0x04F
  70#define DA9062AA_SEQ			0x081
  71#define DA9062AA_SEQ_TIMER		0x082
  72#define DA9062AA_ID_2_1			0x083
  73#define DA9062AA_ID_4_3			0x084
  74#define DA9062AA_ID_12_11		0x088
  75#define DA9062AA_ID_14_13		0x089
  76#define DA9062AA_ID_16_15		0x08A
  77#define DA9062AA_ID_22_21		0x08D
  78#define DA9062AA_ID_24_23		0x08E
  79#define DA9062AA_ID_26_25		0x08F
  80#define DA9062AA_ID_28_27		0x090
  81#define DA9062AA_ID_30_29		0x091
  82#define DA9062AA_ID_32_31		0x092
  83#define DA9062AA_SEQ_A			0x095
  84#define DA9062AA_SEQ_B			0x096
  85#define DA9062AA_WAIT			0x097
  86#define DA9062AA_EN_32K			0x098
  87#define DA9062AA_RESET			0x099
  88#define DA9062AA_BUCK_ILIM_A		0x09A
  89#define DA9062AA_BUCK_ILIM_B		0x09B
  90#define DA9062AA_BUCK_ILIM_C		0x09C
  91#define DA9062AA_BUCK2_CFG		0x09D
  92#define DA9062AA_BUCK1_CFG		0x09E
  93#define DA9062AA_BUCK4_CFG		0x09F
  94#define DA9062AA_BUCK3_CFG		0x0A0
  95#define DA9062AA_VBUCK2_A		0x0A3
  96#define DA9062AA_VBUCK1_A		0x0A4
  97#define DA9062AA_VBUCK4_A		0x0A5
  98#define DA9062AA_VBUCK3_A		0x0A7
  99#define DA9062AA_VLDO1_A		0x0A9
 100#define DA9062AA_VLDO2_A		0x0AA
 101#define DA9062AA_VLDO3_A		0x0AB
 102#define DA9062AA_VLDO4_A		0x0AC
 103#define DA9062AA_VBUCK2_B		0x0B4
 104#define DA9062AA_VBUCK1_B		0x0B5
 105#define DA9062AA_VBUCK4_B		0x0B6
 106#define DA9062AA_VBUCK3_B		0x0B8
 107#define DA9062AA_VLDO1_B		0x0BA
 108#define DA9062AA_VLDO2_B		0x0BB
 109#define DA9062AA_VLDO3_B		0x0BC
 110#define DA9062AA_VLDO4_B		0x0BD
 111#define DA9062AA_BBAT_CONT		0x0C5
 112#define DA9062AA_INTERFACE		0x105
 113#define DA9062AA_CONFIG_A		0x106
 114#define DA9062AA_CONFIG_B		0x107
 115#define DA9062AA_CONFIG_C		0x108
 116#define DA9062AA_CONFIG_D		0x109
 117#define DA9062AA_CONFIG_E		0x10A
 118#define DA9062AA_CONFIG_G		0x10C
 119#define DA9062AA_CONFIG_H		0x10D
 120#define DA9062AA_CONFIG_I		0x10E
 121#define DA9062AA_CONFIG_J		0x10F
 122#define DA9062AA_CONFIG_K		0x110
 123#define DA9062AA_CONFIG_M		0x112
 124#define DA9062AA_TRIM_CLDR		0x120
 125#define DA9062AA_GP_ID_0		0x121
 126#define DA9062AA_GP_ID_1		0x122
 127#define DA9062AA_GP_ID_2		0x123
 128#define DA9062AA_GP_ID_3		0x124
 129#define DA9062AA_GP_ID_4		0x125
 130#define DA9062AA_GP_ID_5		0x126
 131#define DA9062AA_GP_ID_6		0x127
 132#define DA9062AA_GP_ID_7		0x128
 133#define DA9062AA_GP_ID_8		0x129
 134#define DA9062AA_GP_ID_9		0x12A
 135#define DA9062AA_GP_ID_10		0x12B
 136#define DA9062AA_GP_ID_11		0x12C
 137#define DA9062AA_GP_ID_12		0x12D
 138#define DA9062AA_GP_ID_13		0x12E
 139#define DA9062AA_GP_ID_14		0x12F
 140#define DA9062AA_GP_ID_15		0x130
 141#define DA9062AA_GP_ID_16		0x131
 142#define DA9062AA_GP_ID_17		0x132
 143#define DA9062AA_GP_ID_18		0x133
 144#define DA9062AA_GP_ID_19		0x134
 145#define DA9062AA_DEVICE_ID		0x181
 146#define DA9062AA_VARIANT_ID		0x182
 147#define DA9062AA_CUSTOMER_ID		0x183
 148#define DA9062AA_CONFIG_ID		0x184
 149
 150/*
 151 * Bit fields
 152 */
 153
 154/* DA9062AA_PAGE_CON = 0x000 */
 155#define DA9062AA_PAGE_SHIFT		0
 156#define DA9062AA_PAGE_MASK		0x3f
 157#define DA9062AA_WRITE_MODE_SHIFT	6
 158#define DA9062AA_WRITE_MODE_MASK	BIT(6)
 159#define DA9062AA_REVERT_SHIFT		7
 160#define DA9062AA_REVERT_MASK		BIT(7)
 161
 162/* DA9062AA_STATUS_A = 0x001 */
 163#define DA9062AA_NONKEY_SHIFT		0
 164#define DA9062AA_NONKEY_MASK		0x01
 165#define DA9062AA_DVC_BUSY_SHIFT		2
 166#define DA9062AA_DVC_BUSY_MASK		BIT(2)
 167
 168/* DA9062AA_STATUS_B = 0x002 */
 169#define DA9062AA_GPI0_SHIFT		0
 170#define DA9062AA_GPI0_MASK		0x01
 171#define DA9062AA_GPI1_SHIFT		1
 172#define DA9062AA_GPI1_MASK		BIT(1)
 173#define DA9062AA_GPI2_SHIFT		2
 174#define DA9062AA_GPI2_MASK		BIT(2)
 175#define DA9062AA_GPI3_SHIFT		3
 176#define DA9062AA_GPI3_MASK		BIT(3)
 177#define DA9062AA_GPI4_SHIFT		4
 178#define DA9062AA_GPI4_MASK		BIT(4)
 179
 180/* DA9062AA_STATUS_D = 0x004 */
 181#define DA9062AA_LDO1_ILIM_SHIFT	0
 182#define DA9062AA_LDO1_ILIM_MASK		0x01
 183#define DA9062AA_LDO2_ILIM_SHIFT	1
 184#define DA9062AA_LDO2_ILIM_MASK		BIT(1)
 185#define DA9062AA_LDO3_ILIM_SHIFT	2
 186#define DA9062AA_LDO3_ILIM_MASK		BIT(2)
 187#define DA9062AA_LDO4_ILIM_SHIFT	3
 188#define DA9062AA_LDO4_ILIM_MASK		BIT(3)
 189
 190/* DA9062AA_FAULT_LOG = 0x005 */
 191#define DA9062AA_TWD_ERROR_SHIFT	0
 192#define DA9062AA_TWD_ERROR_MASK		0x01
 193#define DA9062AA_POR_SHIFT		1
 194#define DA9062AA_POR_MASK		BIT(1)
 195#define DA9062AA_VDD_FAULT_SHIFT	2
 196#define DA9062AA_VDD_FAULT_MASK		BIT(2)
 197#define DA9062AA_VDD_START_SHIFT	3
 198#define DA9062AA_VDD_START_MASK		BIT(3)
 199#define DA9062AA_TEMP_CRIT_SHIFT	4
 200#define DA9062AA_TEMP_CRIT_MASK		BIT(4)
 201#define DA9062AA_KEY_RESET_SHIFT	5
 202#define DA9062AA_KEY_RESET_MASK		BIT(5)
 203#define DA9062AA_NSHUTDOWN_SHIFT	6
 204#define DA9062AA_NSHUTDOWN_MASK		BIT(6)
 205#define DA9062AA_WAIT_SHUT_SHIFT	7
 206#define DA9062AA_WAIT_SHUT_MASK		BIT(7)
 207
 208/* DA9062AA_EVENT_A = 0x006 */
 209#define DA9062AA_E_NONKEY_SHIFT		0
 210#define DA9062AA_E_NONKEY_MASK		0x01
 211#define DA9062AA_E_ALARM_SHIFT		1
 212#define DA9062AA_E_ALARM_MASK		BIT(1)
 213#define DA9062AA_E_TICK_SHIFT		2
 214#define DA9062AA_E_TICK_MASK		BIT(2)
 215#define DA9062AA_E_WDG_WARN_SHIFT	3
 216#define DA9062AA_E_WDG_WARN_MASK	BIT(3)
 217#define DA9062AA_E_SEQ_RDY_SHIFT	4
 218#define DA9062AA_E_SEQ_RDY_MASK		BIT(4)
 219#define DA9062AA_EVENTS_B_SHIFT		5
 220#define DA9062AA_EVENTS_B_MASK		BIT(5)
 221#define DA9062AA_EVENTS_C_SHIFT		6
 222#define DA9062AA_EVENTS_C_MASK		BIT(6)
 223
 224/* DA9062AA_EVENT_B = 0x007 */
 225#define DA9062AA_E_TEMP_SHIFT		1
 226#define DA9062AA_E_TEMP_MASK		BIT(1)
 227#define DA9062AA_E_LDO_LIM_SHIFT	3
 228#define DA9062AA_E_LDO_LIM_MASK		BIT(3)
 229#define DA9062AA_E_DVC_RDY_SHIFT	5
 230#define DA9062AA_E_DVC_RDY_MASK		BIT(5)
 231#define DA9062AA_E_VDD_WARN_SHIFT	7
 232#define DA9062AA_E_VDD_WARN_MASK	BIT(7)
 233
 234/* DA9062AA_EVENT_C = 0x008 */
 235#define DA9062AA_E_GPI0_SHIFT		0
 236#define DA9062AA_E_GPI0_MASK		0x01
 237#define DA9062AA_E_GPI1_SHIFT		1
 238#define DA9062AA_E_GPI1_MASK		BIT(1)
 239#define DA9062AA_E_GPI2_SHIFT		2
 240#define DA9062AA_E_GPI2_MASK		BIT(2)
 241#define DA9062AA_E_GPI3_SHIFT		3
 242#define DA9062AA_E_GPI3_MASK		BIT(3)
 243#define DA9062AA_E_GPI4_SHIFT		4
 244#define DA9062AA_E_GPI4_MASK		BIT(4)
 245
 246/* DA9062AA_IRQ_MASK_A = 0x00A */
 247#define DA9062AA_M_NONKEY_SHIFT		0
 248#define DA9062AA_M_NONKEY_MASK		0x01
 249#define DA9062AA_M_ALARM_SHIFT		1
 250#define DA9062AA_M_ALARM_MASK		BIT(1)
 251#define DA9062AA_M_TICK_SHIFT		2
 252#define DA9062AA_M_TICK_MASK		BIT(2)
 253#define DA9062AA_M_WDG_WARN_SHIFT	3
 254#define DA9062AA_M_WDG_WARN_MASK	BIT(3)
 255#define DA9062AA_M_SEQ_RDY_SHIFT	4
 256#define DA9062AA_M_SEQ_RDY_MASK		BIT(4)
 257
 258/* DA9062AA_IRQ_MASK_B = 0x00B */
 259#define DA9062AA_M_TEMP_SHIFT		1
 260#define DA9062AA_M_TEMP_MASK		BIT(1)
 261#define DA9062AA_M_LDO_LIM_SHIFT	3
 262#define DA9062AA_M_LDO_LIM_MASK		BIT(3)
 263#define DA9062AA_M_DVC_RDY_SHIFT	5
 264#define DA9062AA_M_DVC_RDY_MASK		BIT(5)
 265#define DA9062AA_M_VDD_WARN_SHIFT	7
 266#define DA9062AA_M_VDD_WARN_MASK	BIT(7)
 267
 268/* DA9062AA_IRQ_MASK_C = 0x00C */
 269#define DA9062AA_M_GPI0_SHIFT		0
 270#define DA9062AA_M_GPI0_MASK		0x01
 271#define DA9062AA_M_GPI1_SHIFT		1
 272#define DA9062AA_M_GPI1_MASK		BIT(1)
 273#define DA9062AA_M_GPI2_SHIFT		2
 274#define DA9062AA_M_GPI2_MASK		BIT(2)
 275#define DA9062AA_M_GPI3_SHIFT		3
 276#define DA9062AA_M_GPI3_MASK		BIT(3)
 277#define DA9062AA_M_GPI4_SHIFT		4
 278#define DA9062AA_M_GPI4_MASK		BIT(4)
 279
 280/* DA9062AA_CONTROL_A = 0x00E */
 281#define DA9062AA_SYSTEM_EN_SHIFT	0
 282#define DA9062AA_SYSTEM_EN_MASK		0x01
 283#define DA9062AA_POWER_EN_SHIFT		1
 284#define DA9062AA_POWER_EN_MASK		BIT(1)
 285#define DA9062AA_POWER1_EN_SHIFT	2
 286#define DA9062AA_POWER1_EN_MASK		BIT(2)
 287#define DA9062AA_STANDBY_SHIFT		3
 288#define DA9062AA_STANDBY_MASK		BIT(3)
 289#define DA9062AA_M_SYSTEM_EN_SHIFT	4
 290#define DA9062AA_M_SYSTEM_EN_MASK	BIT(4)
 291#define DA9062AA_M_POWER_EN_SHIFT	5
 292#define DA9062AA_M_POWER_EN_MASK	BIT(5)
 293#define DA9062AA_M_POWER1_EN_SHIFT	6
 294#define DA9062AA_M_POWER1_EN_MASK	BIT(6)
 295
 296/* DA9062AA_CONTROL_B = 0x00F */
 297#define DA9062AA_WATCHDOG_PD_SHIFT	1
 298#define DA9062AA_WATCHDOG_PD_MASK	BIT(1)
 299#define DA9062AA_FREEZE_EN_SHIFT	2
 300#define DA9062AA_FREEZE_EN_MASK		BIT(2)
 301#define DA9062AA_NRES_MODE_SHIFT	3
 302#define DA9062AA_NRES_MODE_MASK		BIT(3)
 303#define DA9062AA_NONKEY_LOCK_SHIFT	4
 304#define DA9062AA_NONKEY_LOCK_MASK	BIT(4)
 305#define DA9062AA_NFREEZE_SHIFT		5
 306#define DA9062AA_NFREEZE_MASK		(0x03 << 5)
 307#define DA9062AA_BUCK_SLOWSTART_SHIFT	7
 308#define DA9062AA_BUCK_SLOWSTART_MASK	BIT(7)
 309
 310/* DA9062AA_CONTROL_C = 0x010 */
 311#define DA9062AA_DEBOUNCING_SHIFT	0
 312#define DA9062AA_DEBOUNCING_MASK	0x07
 313#define DA9062AA_AUTO_BOOT_SHIFT	3
 314#define DA9062AA_AUTO_BOOT_MASK		BIT(3)
 315#define DA9062AA_OTPREAD_EN_SHIFT	4
 316#define DA9062AA_OTPREAD_EN_MASK	BIT(4)
 317#define DA9062AA_SLEW_RATE_SHIFT	5
 318#define DA9062AA_SLEW_RATE_MASK		(0x03 << 5)
 319#define DA9062AA_DEF_SUPPLY_SHIFT	7
 320#define DA9062AA_DEF_SUPPLY_MASK	BIT(7)
 321
 322/* DA9062AA_CONTROL_D = 0x011 */
 323#define DA9062AA_TWDSCALE_SHIFT		0
 324#define DA9062AA_TWDSCALE_MASK		0x07
 325
 326/* DA9062AA_CONTROL_E = 0x012 */
 327#define DA9062AA_RTC_MODE_PD_SHIFT	0
 328#define DA9062AA_RTC_MODE_PD_MASK	0x01
 329#define DA9062AA_RTC_MODE_SD_SHIFT	1
 330#define DA9062AA_RTC_MODE_SD_MASK	BIT(1)
 331#define DA9062AA_RTC_EN_SHIFT		2
 332#define DA9062AA_RTC_EN_MASK		BIT(2)
 333#define DA9062AA_V_LOCK_SHIFT		7
 334#define DA9062AA_V_LOCK_MASK		BIT(7)
 335
 336/* DA9062AA_CONTROL_F = 0x013 */
 337#define DA9062AA_WATCHDOG_SHIFT		0
 338#define DA9062AA_WATCHDOG_MASK		0x01
 339#define DA9062AA_SHUTDOWN_SHIFT		1
 340#define DA9062AA_SHUTDOWN_MASK		BIT(1)
 341#define DA9062AA_WAKE_UP_SHIFT		2
 342#define DA9062AA_WAKE_UP_MASK		BIT(2)
 343
 344/* DA9062AA_PD_DIS = 0x014 */
 345#define DA9062AA_GPI_DIS_SHIFT		0
 346#define DA9062AA_GPI_DIS_MASK		0x01
 347#define DA9062AA_PMIF_DIS_SHIFT		2
 348#define DA9062AA_PMIF_DIS_MASK		BIT(2)
 349#define DA9062AA_CLDR_PAUSE_SHIFT	4
 350#define DA9062AA_CLDR_PAUSE_MASK	BIT(4)
 351#define DA9062AA_BBAT_DIS_SHIFT		5
 352#define DA9062AA_BBAT_DIS_MASK		BIT(5)
 353#define DA9062AA_OUT32K_PAUSE_SHIFT	6
 354#define DA9062AA_OUT32K_PAUSE_MASK	BIT(6)
 355#define DA9062AA_PMCONT_DIS_SHIFT	7
 356#define DA9062AA_PMCONT_DIS_MASK	BIT(7)
 357
 358/* DA9062AA_GPIO_0_1 = 0x015 */
 359#define DA9062AA_GPIO0_PIN_SHIFT	0
 360#define DA9062AA_GPIO0_PIN_MASK		0x03
 361#define DA9062AA_GPIO0_TYPE_SHIFT	2
 362#define DA9062AA_GPIO0_TYPE_MASK	BIT(2)
 363#define DA9062AA_GPIO0_WEN_SHIFT	3
 364#define DA9062AA_GPIO0_WEN_MASK		BIT(3)
 365#define DA9062AA_GPIO1_PIN_SHIFT	4
 366#define DA9062AA_GPIO1_PIN_MASK		(0x03 << 4)
 367#define DA9062AA_GPIO1_TYPE_SHIFT	6
 368#define DA9062AA_GPIO1_TYPE_MASK	BIT(6)
 369#define DA9062AA_GPIO1_WEN_SHIFT	7
 370#define DA9062AA_GPIO1_WEN_MASK		BIT(7)
 371
 372/* DA9062AA_GPIO_2_3 = 0x016 */
 373#define DA9062AA_GPIO2_PIN_SHIFT	0
 374#define DA9062AA_GPIO2_PIN_MASK		0x03
 375#define DA9062AA_GPIO2_TYPE_SHIFT	2
 376#define DA9062AA_GPIO2_TYPE_MASK	BIT(2)
 377#define DA9062AA_GPIO2_WEN_SHIFT	3
 378#define DA9062AA_GPIO2_WEN_MASK		BIT(3)
 379#define DA9062AA_GPIO3_PIN_SHIFT	4
 380#define DA9062AA_GPIO3_PIN_MASK		(0x03 << 4)
 381#define DA9062AA_GPIO3_TYPE_SHIFT	6
 382#define DA9062AA_GPIO3_TYPE_MASK	BIT(6)
 383#define DA9062AA_GPIO3_WEN_SHIFT	7
 384#define DA9062AA_GPIO3_WEN_MASK		BIT(7)
 385
 386/* DA9062AA_GPIO_4 = 0x017 */
 387#define DA9062AA_GPIO4_PIN_SHIFT	0
 388#define DA9062AA_GPIO4_PIN_MASK		0x03
 389#define DA9062AA_GPIO4_TYPE_SHIFT	2
 390#define DA9062AA_GPIO4_TYPE_MASK	BIT(2)
 391#define DA9062AA_GPIO4_WEN_SHIFT	3
 392#define DA9062AA_GPIO4_WEN_MASK		BIT(3)
 393
 394/* DA9062AA_GPIO_WKUP_MODE = 0x01C */
 395#define DA9062AA_GPIO0_WKUP_MODE_SHIFT	0
 396#define DA9062AA_GPIO0_WKUP_MODE_MASK	0x01
 397#define DA9062AA_GPIO1_WKUP_MODE_SHIFT	1
 398#define DA9062AA_GPIO1_WKUP_MODE_MASK	BIT(1)
 399#define DA9062AA_GPIO2_WKUP_MODE_SHIFT	2
 400#define DA9062AA_GPIO2_WKUP_MODE_MASK	BIT(2)
 401#define DA9062AA_GPIO3_WKUP_MODE_SHIFT	3
 402#define DA9062AA_GPIO3_WKUP_MODE_MASK	BIT(3)
 403#define DA9062AA_GPIO4_WKUP_MODE_SHIFT	4
 404#define DA9062AA_GPIO4_WKUP_MODE_MASK	BIT(4)
 405
 406/* DA9062AA_GPIO_MODE0_4 = 0x01D */
 407#define DA9062AA_GPIO0_MODE_SHIFT	0
 408#define DA9062AA_GPIO0_MODE_MASK	0x01
 409#define DA9062AA_GPIO1_MODE_SHIFT	1
 410#define DA9062AA_GPIO1_MODE_MASK	BIT(1)
 411#define DA9062AA_GPIO2_MODE_SHIFT	2
 412#define DA9062AA_GPIO2_MODE_MASK	BIT(2)
 413#define DA9062AA_GPIO3_MODE_SHIFT	3
 414#define DA9062AA_GPIO3_MODE_MASK	BIT(3)
 415#define DA9062AA_GPIO4_MODE_SHIFT	4
 416#define DA9062AA_GPIO4_MODE_MASK	BIT(4)
 417
 418/* DA9062AA_GPIO_OUT0_2 = 0x01E */
 419#define DA9062AA_GPIO0_OUT_SHIFT	0
 420#define DA9062AA_GPIO0_OUT_MASK		0x07
 421#define DA9062AA_GPIO1_OUT_SHIFT	3
 422#define DA9062AA_GPIO1_OUT_MASK		(0x07 << 3)
 423#define DA9062AA_GPIO2_OUT_SHIFT	6
 424#define DA9062AA_GPIO2_OUT_MASK		(0x03 << 6)
 425
 426/* DA9062AA_GPIO_OUT3_4 = 0x01F */
 427#define DA9062AA_GPIO3_OUT_SHIFT	0
 428#define DA9062AA_GPIO3_OUT_MASK		0x07
 429#define DA9062AA_GPIO4_OUT_SHIFT	3
 430#define DA9062AA_GPIO4_OUT_MASK		(0x03 << 3)
 431
 432/* DA9062AA_BUCK2_CONT = 0x020 */
 433#define DA9062AA_BUCK2_EN_SHIFT		0
 434#define DA9062AA_BUCK2_EN_MASK		0x01
 435#define DA9062AA_BUCK2_GPI_SHIFT	1
 436#define DA9062AA_BUCK2_GPI_MASK		(0x03 << 1)
 437#define DA9062AA_BUCK2_CONF_SHIFT	3
 438#define DA9062AA_BUCK2_CONF_MASK	BIT(3)
 439#define DA9062AA_VBUCK2_GPI_SHIFT	5
 440#define DA9062AA_VBUCK2_GPI_MASK	(0x03 << 5)
 441
 442/* DA9062AA_BUCK1_CONT = 0x021 */
 443#define DA9062AA_BUCK1_EN_SHIFT		0
 444#define DA9062AA_BUCK1_EN_MASK		0x01
 445#define DA9062AA_BUCK1_GPI_SHIFT	1
 446#define DA9062AA_BUCK1_GPI_MASK		(0x03 << 1)
 447#define DA9062AA_BUCK1_CONF_SHIFT	3
 448#define DA9062AA_BUCK1_CONF_MASK	BIT(3)
 449#define DA9062AA_VBUCK1_GPI_SHIFT	5
 450#define DA9062AA_VBUCK1_GPI_MASK	(0x03 << 5)
 451
 452/* DA9062AA_BUCK4_CONT = 0x022 */
 453#define DA9062AA_BUCK4_EN_SHIFT		0
 454#define DA9062AA_BUCK4_EN_MASK		0x01
 455#define DA9062AA_BUCK4_GPI_SHIFT	1
 456#define DA9062AA_BUCK4_GPI_MASK		(0x03 << 1)
 457#define DA9062AA_BUCK4_CONF_SHIFT	3
 458#define DA9062AA_BUCK4_CONF_MASK	BIT(3)
 459#define DA9062AA_VBUCK4_GPI_SHIFT	5
 460#define DA9062AA_VBUCK4_GPI_MASK	(0x03 << 5)
 461
 462/* DA9062AA_BUCK3_CONT = 0x024 */
 463#define DA9062AA_BUCK3_EN_SHIFT		0
 464#define DA9062AA_BUCK3_EN_MASK		0x01
 465#define DA9062AA_BUCK3_GPI_SHIFT	1
 466#define DA9062AA_BUCK3_GPI_MASK		(0x03 << 1)
 467#define DA9062AA_BUCK3_CONF_SHIFT	3
 468#define DA9062AA_BUCK3_CONF_MASK	BIT(3)
 469#define DA9062AA_VBUCK3_GPI_SHIFT	5
 470#define DA9062AA_VBUCK3_GPI_MASK	(0x03 << 5)
 471
 472/* DA9062AA_LDO1_CONT = 0x026 */
 473#define DA9062AA_LDO1_EN_SHIFT		0
 474#define DA9062AA_LDO1_EN_MASK		0x01
 475#define DA9062AA_LDO1_GPI_SHIFT		1
 476#define DA9062AA_LDO1_GPI_MASK		(0x03 << 1)
 477#define DA9062AA_LDO1_PD_DIS_SHIFT	3
 478#define DA9062AA_LDO1_PD_DIS_MASK	BIT(3)
 479#define DA9062AA_VLDO1_GPI_SHIFT	5
 480#define DA9062AA_VLDO1_GPI_MASK		(0x03 << 5)
 481#define DA9062AA_LDO1_CONF_SHIFT	7
 482#define DA9062AA_LDO1_CONF_MASK		BIT(7)
 483
 484/* DA9062AA_LDO2_CONT = 0x027 */
 485#define DA9062AA_LDO2_EN_SHIFT		0
 486#define DA9062AA_LDO2_EN_MASK		0x01
 487#define DA9062AA_LDO2_GPI_SHIFT		1
 488#define DA9062AA_LDO2_GPI_MASK		(0x03 << 1)
 489#define DA9062AA_LDO2_PD_DIS_SHIFT	3
 490#define DA9062AA_LDO2_PD_DIS_MASK	BIT(3)
 491#define DA9062AA_VLDO2_GPI_SHIFT	5
 492#define DA9062AA_VLDO2_GPI_MASK		(0x03 << 5)
 493#define DA9062AA_LDO2_CONF_SHIFT	7
 494#define DA9062AA_LDO2_CONF_MASK		BIT(7)
 495
 496/* DA9062AA_LDO3_CONT = 0x028 */
 497#define DA9062AA_LDO3_EN_SHIFT		0
 498#define DA9062AA_LDO3_EN_MASK		0x01
 499#define DA9062AA_LDO3_GPI_SHIFT		1
 500#define DA9062AA_LDO3_GPI_MASK		(0x03 << 1)
 501#define DA9062AA_LDO3_PD_DIS_SHIFT	3
 502#define DA9062AA_LDO3_PD_DIS_MASK	BIT(3)
 503#define DA9062AA_VLDO3_GPI_SHIFT	5
 504#define DA9062AA_VLDO3_GPI_MASK		(0x03 << 5)
 505#define DA9062AA_LDO3_CONF_SHIFT	7
 506#define DA9062AA_LDO3_CONF_MASK		BIT(7)
 507
 508/* DA9062AA_LDO4_CONT = 0x029 */
 509#define DA9062AA_LDO4_EN_SHIFT		0
 510#define DA9062AA_LDO4_EN_MASK		0x01
 511#define DA9062AA_LDO4_GPI_SHIFT		1
 512#define DA9062AA_LDO4_GPI_MASK		(0x03 << 1)
 513#define DA9062AA_LDO4_PD_DIS_SHIFT	3
 514#define DA9062AA_LDO4_PD_DIS_MASK	BIT(3)
 515#define DA9062AA_VLDO4_GPI_SHIFT	5
 516#define DA9062AA_VLDO4_GPI_MASK		(0x03 << 5)
 517#define DA9062AA_LDO4_CONF_SHIFT	7
 518#define DA9062AA_LDO4_CONF_MASK		BIT(7)
 519
 520/* DA9062AA_DVC_1 = 0x032 */
 521#define DA9062AA_VBUCK1_SEL_SHIFT	0
 522#define DA9062AA_VBUCK1_SEL_MASK	0x01
 523#define DA9062AA_VBUCK2_SEL_SHIFT	1
 524#define DA9062AA_VBUCK2_SEL_MASK	BIT(1)
 525#define DA9062AA_VBUCK4_SEL_SHIFT	2
 526#define DA9062AA_VBUCK4_SEL_MASK	BIT(2)
 527#define DA9062AA_VBUCK3_SEL_SHIFT	3
 528#define DA9062AA_VBUCK3_SEL_MASK	BIT(3)
 529#define DA9062AA_VLDO1_SEL_SHIFT	4
 530#define DA9062AA_VLDO1_SEL_MASK		BIT(4)
 531#define DA9062AA_VLDO2_SEL_SHIFT	5
 532#define DA9062AA_VLDO2_SEL_MASK		BIT(5)
 533#define DA9062AA_VLDO3_SEL_SHIFT	6
 534#define DA9062AA_VLDO3_SEL_MASK		BIT(6)
 535#define DA9062AA_VLDO4_SEL_SHIFT	7
 536#define DA9062AA_VLDO4_SEL_MASK		BIT(7)
 537
 538/* DA9062AA_COUNT_S = 0x040 */
 539#define DA9062AA_COUNT_SEC_SHIFT	0
 540#define DA9062AA_COUNT_SEC_MASK		0x3f
 541#define DA9062AA_RTC_READ_SHIFT		7
 542#define DA9062AA_RTC_READ_MASK		BIT(7)
 543
 544/* DA9062AA_COUNT_MI = 0x041 */
 545#define DA9062AA_COUNT_MIN_SHIFT	0
 546#define DA9062AA_COUNT_MIN_MASK		0x3f
 547
 548/* DA9062AA_COUNT_H = 0x042 */
 549#define DA9062AA_COUNT_HOUR_SHIFT	0
 550#define DA9062AA_COUNT_HOUR_MASK	0x1f
 551
 552/* DA9062AA_COUNT_D = 0x043 */
 553#define DA9062AA_COUNT_DAY_SHIFT	0
 554#define DA9062AA_COUNT_DAY_MASK		0x1f
 555
 556/* DA9062AA_COUNT_MO = 0x044 */
 557#define DA9062AA_COUNT_MONTH_SHIFT	0
 558#define DA9062AA_COUNT_MONTH_MASK	0x0f
 559
 560/* DA9062AA_COUNT_Y = 0x045 */
 561#define DA9062AA_COUNT_YEAR_SHIFT	0
 562#define DA9062AA_COUNT_YEAR_MASK	0x3f
 563#define DA9062AA_MONITOR_SHIFT		6
 564#define DA9062AA_MONITOR_MASK		BIT(6)
 565
 566/* DA9062AA_ALARM_S = 0x046 */
 567#define DA9062AA_ALARM_SEC_SHIFT	0
 568#define DA9062AA_ALARM_SEC_MASK		0x3f
 569#define DA9062AA_ALARM_STATUS_SHIFT	6
 570#define DA9062AA_ALARM_STATUS_MASK	(0x03 << 6)
 571
 572/* DA9062AA_ALARM_MI = 0x047 */
 573#define DA9062AA_ALARM_MIN_SHIFT	0
 574#define DA9062AA_ALARM_MIN_MASK		0x3f
 575
 576/* DA9062AA_ALARM_H = 0x048 */
 577#define DA9062AA_ALARM_HOUR_SHIFT	0
 578#define DA9062AA_ALARM_HOUR_MASK	0x1f
 579
 580/* DA9062AA_ALARM_D = 0x049 */
 581#define DA9062AA_ALARM_DAY_SHIFT	0
 582#define DA9062AA_ALARM_DAY_MASK		0x1f
 583
 584/* DA9062AA_ALARM_MO = 0x04A */
 585#define DA9062AA_ALARM_MONTH_SHIFT	0
 586#define DA9062AA_ALARM_MONTH_MASK	0x0f
 587#define DA9062AA_TICK_TYPE_SHIFT	4
 588#define DA9062AA_TICK_TYPE_MASK		BIT(4)
 589#define DA9062AA_TICK_WAKE_SHIFT	5
 590#define DA9062AA_TICK_WAKE_MASK		BIT(5)
 591
 592/* DA9062AA_ALARM_Y = 0x04B */
 593#define DA9062AA_ALARM_YEAR_SHIFT	0
 594#define DA9062AA_ALARM_YEAR_MASK	0x3f
 595#define DA9062AA_ALARM_ON_SHIFT		6
 596#define DA9062AA_ALARM_ON_MASK		BIT(6)
 597#define DA9062AA_TICK_ON_SHIFT		7
 598#define DA9062AA_TICK_ON_MASK		BIT(7)
 599
 600/* DA9062AA_SECOND_A = 0x04C */
 601#define DA9062AA_SECONDS_A_SHIFT	0
 602#define DA9062AA_SECONDS_A_MASK		0xff
 603
 604/* DA9062AA_SECOND_B = 0x04D */
 605#define DA9062AA_SECONDS_B_SHIFT	0
 606#define DA9062AA_SECONDS_B_MASK		0xff
 607
 608/* DA9062AA_SECOND_C = 0x04E */
 609#define DA9062AA_SECONDS_C_SHIFT	0
 610#define DA9062AA_SECONDS_C_MASK		0xff
 611
 612/* DA9062AA_SECOND_D = 0x04F */
 613#define DA9062AA_SECONDS_D_SHIFT	0
 614#define DA9062AA_SECONDS_D_MASK		0xff
 615
 616/* DA9062AA_SEQ = 0x081 */
 617#define DA9062AA_SEQ_POINTER_SHIFT	0
 618#define DA9062AA_SEQ_POINTER_MASK	0x0f
 619#define DA9062AA_NXT_SEQ_START_SHIFT	4
 620#define DA9062AA_NXT_SEQ_START_MASK	(0x0f << 4)
 621
 622/* DA9062AA_SEQ_TIMER = 0x082 */
 623#define DA9062AA_SEQ_TIME_SHIFT		0
 624#define DA9062AA_SEQ_TIME_MASK		0x0f
 625#define DA9062AA_SEQ_DUMMY_SHIFT	4
 626#define DA9062AA_SEQ_DUMMY_MASK		(0x0f << 4)
 627
 628/* DA9062AA_ID_2_1 = 0x083 */
 629#define DA9062AA_LDO1_STEP_SHIFT	0
 630#define DA9062AA_LDO1_STEP_MASK		0x0f
 631#define DA9062AA_LDO2_STEP_SHIFT	4
 632#define DA9062AA_LDO2_STEP_MASK		(0x0f << 4)
 633
 634/* DA9062AA_ID_4_3 = 0x084 */
 635#define DA9062AA_LDO3_STEP_SHIFT	0
 636#define DA9062AA_LDO3_STEP_MASK		0x0f
 637#define DA9062AA_LDO4_STEP_SHIFT	4
 638#define DA9062AA_LDO4_STEP_MASK		(0x0f << 4)
 639
 640/* DA9062AA_ID_12_11 = 0x088 */
 641#define DA9062AA_PD_DIS_STEP_SHIFT	4
 642#define DA9062AA_PD_DIS_STEP_MASK	(0x0f << 4)
 643
 644/* DA9062AA_ID_14_13 = 0x089 */
 645#define DA9062AA_BUCK1_STEP_SHIFT	0
 646#define DA9062AA_BUCK1_STEP_MASK	0x0f
 647#define DA9062AA_BUCK2_STEP_SHIFT	4
 648#define DA9062AA_BUCK2_STEP_MASK	(0x0f << 4)
 649
 650/* DA9062AA_ID_16_15 = 0x08A */
 651#define DA9062AA_BUCK4_STEP_SHIFT	0
 652#define DA9062AA_BUCK4_STEP_MASK	0x0f
 653#define DA9062AA_BUCK3_STEP_SHIFT	4
 654#define DA9062AA_BUCK3_STEP_MASK	(0x0f << 4)
 655
 656/* DA9062AA_ID_22_21 = 0x08D */
 657#define DA9062AA_GP_RISE1_STEP_SHIFT	0
 658#define DA9062AA_GP_RISE1_STEP_MASK	0x0f
 659#define DA9062AA_GP_FALL1_STEP_SHIFT	4
 660#define DA9062AA_GP_FALL1_STEP_MASK	(0x0f << 4)
 661
 662/* DA9062AA_ID_24_23 = 0x08E */
 663#define DA9062AA_GP_RISE2_STEP_SHIFT	0
 664#define DA9062AA_GP_RISE2_STEP_MASK	0x0f
 665#define DA9062AA_GP_FALL2_STEP_SHIFT	4
 666#define DA9062AA_GP_FALL2_STEP_MASK	(0x0f << 4)
 667
 668/* DA9062AA_ID_26_25 = 0x08F */
 669#define DA9062AA_GP_RISE3_STEP_SHIFT	0
 670#define DA9062AA_GP_RISE3_STEP_MASK	0x0f
 671#define DA9062AA_GP_FALL3_STEP_SHIFT	4
 672#define DA9062AA_GP_FALL3_STEP_MASK	(0x0f << 4)
 673
 674/* DA9062AA_ID_28_27 = 0x090 */
 675#define DA9062AA_GP_RISE4_STEP_SHIFT	0
 676#define DA9062AA_GP_RISE4_STEP_MASK	0x0f
 677#define DA9062AA_GP_FALL4_STEP_SHIFT	4
 678#define DA9062AA_GP_FALL4_STEP_MASK	(0x0f << 4)
 679
 680/* DA9062AA_ID_30_29 = 0x091 */
 681#define DA9062AA_GP_RISE5_STEP_SHIFT	0
 682#define DA9062AA_GP_RISE5_STEP_MASK	0x0f
 683#define DA9062AA_GP_FALL5_STEP_SHIFT	4
 684#define DA9062AA_GP_FALL5_STEP_MASK	(0x0f << 4)
 685
 686/* DA9062AA_ID_32_31 = 0x092 */
 687#define DA9062AA_WAIT_STEP_SHIFT	0
 688#define DA9062AA_WAIT_STEP_MASK		0x0f
 689#define DA9062AA_EN32K_STEP_SHIFT	4
 690#define DA9062AA_EN32K_STEP_MASK	(0x0f << 4)
 691
 692/* DA9062AA_SEQ_A = 0x095 */
 693#define DA9062AA_SYSTEM_END_SHIFT	0
 694#define DA9062AA_SYSTEM_END_MASK	0x0f
 695#define DA9062AA_POWER_END_SHIFT	4
 696#define DA9062AA_POWER_END_MASK		(0x0f << 4)
 697
 698/* DA9062AA_SEQ_B = 0x096 */
 699#define DA9062AA_MAX_COUNT_SHIFT	0
 700#define DA9062AA_MAX_COUNT_MASK		0x0f
 701#define DA9062AA_PART_DOWN_SHIFT	4
 702#define DA9062AA_PART_DOWN_MASK		(0x0f << 4)
 703
 704/* DA9062AA_WAIT = 0x097 */
 705#define DA9062AA_WAIT_TIME_SHIFT	0
 706#define DA9062AA_WAIT_TIME_MASK		0x0f
 707#define DA9062AA_WAIT_MODE_SHIFT	4
 708#define DA9062AA_WAIT_MODE_MASK		BIT(4)
 709#define DA9062AA_TIME_OUT_SHIFT		5
 710#define DA9062AA_TIME_OUT_MASK		BIT(5)
 711#define DA9062AA_WAIT_DIR_SHIFT		6
 712#define DA9062AA_WAIT_DIR_MASK		(0x03 << 6)
 713
 714/* DA9062AA_EN_32K = 0x098 */
 715#define DA9062AA_STABILISATION_TIME_SHIFT	0
 716#define DA9062AA_STABILISATION_TIME_MASK	0x07
 717#define DA9062AA_CRYSTAL_SHIFT			3
 718#define DA9062AA_CRYSTAL_MASK			BIT(3)
 719#define DA9062AA_DELAY_MODE_SHIFT		4
 720#define DA9062AA_DELAY_MODE_MASK		BIT(4)
 721#define DA9062AA_OUT_CLOCK_SHIFT		5
 722#define DA9062AA_OUT_CLOCK_MASK			BIT(5)
 723#define DA9062AA_RTC_CLOCK_SHIFT		6
 724#define DA9062AA_RTC_CLOCK_MASK			BIT(6)
 725#define DA9062AA_EN_32KOUT_SHIFT		7
 726#define DA9062AA_EN_32KOUT_MASK			BIT(7)
 727
 728/* DA9062AA_RESET = 0x099 */
 729#define DA9062AA_RESET_TIMER_SHIFT	0
 730#define DA9062AA_RESET_TIMER_MASK	0x3f
 731#define DA9062AA_RESET_EVENT_SHIFT	6
 732#define DA9062AA_RESET_EVENT_MASK	(0x03 << 6)
 733
 734/* DA9062AA_BUCK_ILIM_A = 0x09A */
 735#define DA9062AA_BUCK3_ILIM_SHIFT	0
 736#define DA9062AA_BUCK3_ILIM_MASK	0x0f
 737
 738/* DA9062AA_BUCK_ILIM_B = 0x09B */
 739#define DA9062AA_BUCK4_ILIM_SHIFT	0
 740#define DA9062AA_BUCK4_ILIM_MASK	0x0f
 741
 742/* DA9062AA_BUCK_ILIM_C = 0x09C */
 743#define DA9062AA_BUCK1_ILIM_SHIFT	0
 744#define DA9062AA_BUCK1_ILIM_MASK	0x0f
 745#define DA9062AA_BUCK2_ILIM_SHIFT	4
 746#define DA9062AA_BUCK2_ILIM_MASK	(0x0f << 4)
 747
 748/* DA9062AA_BUCK2_CFG = 0x09D */
 749#define DA9062AA_BUCK2_PD_DIS_SHIFT	5
 750#define DA9062AA_BUCK2_PD_DIS_MASK	BIT(5)
 751#define DA9062AA_BUCK2_MODE_SHIFT	6
 752#define DA9062AA_BUCK2_MODE_MASK	(0x03 << 6)
 753
 754/* DA9062AA_BUCK1_CFG = 0x09E */
 755#define DA9062AA_BUCK1_PD_DIS_SHIFT	5
 756#define DA9062AA_BUCK1_PD_DIS_MASK	BIT(5)
 757#define DA9062AA_BUCK1_MODE_SHIFT	6
 758#define DA9062AA_BUCK1_MODE_MASK	(0x03 << 6)
 759
 760/* DA9062AA_BUCK4_CFG = 0x09F */
 761#define DA9062AA_BUCK4_VTTR_EN_SHIFT	3
 762#define DA9062AA_BUCK4_VTTR_EN_MASK	BIT(3)
 763#define DA9062AA_BUCK4_VTT_EN_SHIFT	4
 764#define DA9062AA_BUCK4_VTT_EN_MASK	BIT(4)
 765#define DA9062AA_BUCK4_PD_DIS_SHIFT	5
 766#define DA9062AA_BUCK4_PD_DIS_MASK	BIT(5)
 767#define DA9062AA_BUCK4_MODE_SHIFT	6
 768#define DA9062AA_BUCK4_MODE_MASK	(0x03 << 6)
 769
 770/* DA9062AA_BUCK3_CFG = 0x0A0 */
 771#define DA9062AA_BUCK3_PD_DIS_SHIFT	5
 772#define DA9062AA_BUCK3_PD_DIS_MASK	BIT(5)
 773#define DA9062AA_BUCK3_MODE_SHIFT	6
 774#define DA9062AA_BUCK3_MODE_MASK	(0x03 << 6)
 775
 776/* DA9062AA_VBUCK2_A = 0x0A3 */
 777#define DA9062AA_VBUCK2_A_SHIFT		0
 778#define DA9062AA_VBUCK2_A_MASK		0x7f
 779#define DA9062AA_BUCK2_SL_A_SHIFT	7
 780#define DA9062AA_BUCK2_SL_A_MASK	BIT(7)
 781
 782/* DA9062AA_VBUCK1_A = 0x0A4 */
 783#define DA9062AA_VBUCK1_A_SHIFT		0
 784#define DA9062AA_VBUCK1_A_MASK		0x7f
 785#define DA9062AA_BUCK1_SL_A_SHIFT	7
 786#define DA9062AA_BUCK1_SL_A_MASK	BIT(7)
 787
 788/* DA9062AA_VBUCK4_A = 0x0A5 */
 789#define DA9062AA_VBUCK4_A_SHIFT		0
 790#define DA9062AA_VBUCK4_A_MASK		0x7f
 791#define DA9062AA_BUCK4_SL_A_SHIFT	7
 792#define DA9062AA_BUCK4_SL_A_MASK	BIT(7)
 793
 794/* DA9062AA_VBUCK3_A = 0x0A7 */
 795#define DA9062AA_VBUCK3_A_SHIFT		0
 796#define DA9062AA_VBUCK3_A_MASK		0x7f
 797#define DA9062AA_BUCK3_SL_A_SHIFT	7
 798#define DA9062AA_BUCK3_SL_A_MASK	BIT(7)
 799
 800/* DA9062AA_VLDO[1-4]_A common */
 801#define DA9062AA_VLDO_A_MIN_SEL	2
 802
 803/* DA9062AA_VLDO1_A = 0x0A9 */
 804#define DA9062AA_VLDO1_A_SHIFT		0
 805#define DA9062AA_VLDO1_A_MASK		0x3f
 806#define DA9062AA_LDO1_SL_A_SHIFT	7
 807#define DA9062AA_LDO1_SL_A_MASK		BIT(7)
 808
 809/* DA9062AA_VLDO2_A = 0x0AA */
 810#define DA9062AA_VLDO2_A_SHIFT		0
 811#define DA9062AA_VLDO2_A_MASK		0x3f
 812#define DA9062AA_LDO2_SL_A_SHIFT	7
 813#define DA9062AA_LDO2_SL_A_MASK		BIT(7)
 814
 815/* DA9062AA_VLDO3_A = 0x0AB */
 816#define DA9062AA_VLDO3_A_SHIFT		0
 817#define DA9062AA_VLDO3_A_MASK		0x3f
 818#define DA9062AA_LDO3_SL_A_SHIFT	7
 819#define DA9062AA_LDO3_SL_A_MASK		BIT(7)
 820
 821/* DA9062AA_VLDO4_A = 0x0AC */
 822#define DA9062AA_VLDO4_A_SHIFT		0
 823#define DA9062AA_VLDO4_A_MASK		0x3f
 824#define DA9062AA_LDO4_SL_A_SHIFT	7
 825#define DA9062AA_LDO4_SL_A_MASK		BIT(7)
 826
 827/* DA9062AA_VBUCK2_B = 0x0B4 */
 828#define DA9062AA_VBUCK2_B_SHIFT		0
 829#define DA9062AA_VBUCK2_B_MASK		0x7f
 830#define DA9062AA_BUCK2_SL_B_SHIFT	7
 831#define DA9062AA_BUCK2_SL_B_MASK	BIT(7)
 832
 833/* DA9062AA_VBUCK1_B = 0x0B5 */
 834#define DA9062AA_VBUCK1_B_SHIFT		0
 835#define DA9062AA_VBUCK1_B_MASK		0x7f
 836#define DA9062AA_BUCK1_SL_B_SHIFT	7
 837#define DA9062AA_BUCK1_SL_B_MASK	BIT(7)
 838
 839/* DA9062AA_VBUCK4_B = 0x0B6 */
 840#define DA9062AA_VBUCK4_B_SHIFT		0
 841#define DA9062AA_VBUCK4_B_MASK		0x7f
 842#define DA9062AA_BUCK4_SL_B_SHIFT	7
 843#define DA9062AA_BUCK4_SL_B_MASK	BIT(7)
 844
 845/* DA9062AA_VBUCK3_B = 0x0B8 */
 846#define DA9062AA_VBUCK3_B_SHIFT		0
 847#define DA9062AA_VBUCK3_B_MASK		0x7f
 848#define DA9062AA_BUCK3_SL_B_SHIFT	7
 849#define DA9062AA_BUCK3_SL_B_MASK	BIT(7)
 850
 851/* DA9062AA_VLDO1_B = 0x0BA */
 852#define DA9062AA_VLDO1_B_SHIFT		0
 853#define DA9062AA_VLDO1_B_MASK		0x3f
 854#define DA9062AA_LDO1_SL_B_SHIFT	7
 855#define DA9062AA_LDO1_SL_B_MASK		BIT(7)
 856
 857/* DA9062AA_VLDO2_B = 0x0BB */
 858#define DA9062AA_VLDO2_B_SHIFT		0
 859#define DA9062AA_VLDO2_B_MASK		0x3f
 860#define DA9062AA_LDO2_SL_B_SHIFT	7
 861#define DA9062AA_LDO2_SL_B_MASK		BIT(7)
 862
 863/* DA9062AA_VLDO3_B = 0x0BC */
 864#define DA9062AA_VLDO3_B_SHIFT		0
 865#define DA9062AA_VLDO3_B_MASK		0x3f
 866#define DA9062AA_LDO3_SL_B_SHIFT	7
 867#define DA9062AA_LDO3_SL_B_MASK		BIT(7)
 868
 869/* DA9062AA_VLDO4_B = 0x0BD */
 870#define DA9062AA_VLDO4_B_SHIFT		0
 871#define DA9062AA_VLDO4_B_MASK		0x3f
 872#define DA9062AA_LDO4_SL_B_SHIFT	7
 873#define DA9062AA_LDO4_SL_B_MASK		BIT(7)
 874
 875/* DA9062AA_BBAT_CONT = 0x0C5 */
 876#define DA9062AA_BCHG_VSET_SHIFT	0
 877#define DA9062AA_BCHG_VSET_MASK		0x0f
 878#define DA9062AA_BCHG_ISET_SHIFT	4
 879#define DA9062AA_BCHG_ISET_MASK		(0x0f << 4)
 880
 881/* DA9062AA_INTERFACE = 0x105 */
 882#define DA9062AA_IF_BASE_ADDR_SHIFT	4
 883#define DA9062AA_IF_BASE_ADDR_MASK	(0x0f << 4)
 884
 885/* DA9062AA_CONFIG_A = 0x106 */
 886#define DA9062AA_PM_I_V_SHIFT		0
 887#define DA9062AA_PM_I_V_MASK		0x01
 888#define DA9062AA_PM_O_TYPE_SHIFT	2
 889#define DA9062AA_PM_O_TYPE_MASK		BIT(2)
 890#define DA9062AA_IRQ_TYPE_SHIFT		3
 891#define DA9062AA_IRQ_TYPE_MASK		BIT(3)
 892#define DA9062AA_PM_IF_V_SHIFT		4
 893#define DA9062AA_PM_IF_V_MASK		BIT(4)
 894#define DA9062AA_PM_IF_FMP_SHIFT	5
 895#define DA9062AA_PM_IF_FMP_MASK		BIT(5)
 896#define DA9062AA_PM_IF_HSM_SHIFT	6
 897#define DA9062AA_PM_IF_HSM_MASK		BIT(6)
 898
 899/* DA9062AA_CONFIG_B = 0x107 */
 900#define DA9062AA_VDD_FAULT_ADJ_SHIFT	0
 901#define DA9062AA_VDD_FAULT_ADJ_MASK	0x0f
 902#define DA9062AA_VDD_HYST_ADJ_SHIFT	4
 903#define DA9062AA_VDD_HYST_ADJ_MASK	(0x07 << 4)
 904
 905/* DA9062AA_CONFIG_C = 0x108 */
 906#define DA9062AA_BUCK_ACTV_DISCHRG_SHIFT	2
 907#define DA9062AA_BUCK_ACTV_DISCHRG_MASK		BIT(2)
 908#define DA9062AA_BUCK1_CLK_INV_SHIFT		3
 909#define DA9062AA_BUCK1_CLK_INV_MASK		BIT(3)
 910#define DA9062AA_BUCK4_CLK_INV_SHIFT		4
 911#define DA9062AA_BUCK4_CLK_INV_MASK		BIT(4)
 912#define DA9062AA_BUCK3_CLK_INV_SHIFT		6
 913#define DA9062AA_BUCK3_CLK_INV_MASK		BIT(6)
 914
 915/* DA9062AA_CONFIG_D = 0x109 */
 916#define DA9062AA_GPI_V_SHIFT		0
 917#define DA9062AA_GPI_V_MASK		0x01
 918#define DA9062AA_NIRQ_MODE_SHIFT	1
 919#define DA9062AA_NIRQ_MODE_MASK		BIT(1)
 920#define DA9062AA_SYSTEM_EN_RD_SHIFT	2
 921#define DA9062AA_SYSTEM_EN_RD_MASK	BIT(2)
 922#define DA9062AA_FORCE_RESET_SHIFT	5
 923#define DA9062AA_FORCE_RESET_MASK	BIT(5)
 924
 925/* DA9062AA_CONFIG_E = 0x10A */
 926#define DA9062AA_BUCK1_AUTO_SHIFT	0
 927#define DA9062AA_BUCK1_AUTO_MASK	0x01
 928#define DA9062AA_BUCK2_AUTO_SHIFT	1
 929#define DA9062AA_BUCK2_AUTO_MASK	BIT(1)
 930#define DA9062AA_BUCK4_AUTO_SHIFT	2
 931#define DA9062AA_BUCK4_AUTO_MASK	BIT(2)
 932#define DA9062AA_BUCK3_AUTO_SHIFT	4
 933#define DA9062AA_BUCK3_AUTO_MASK	BIT(4)
 934
 935/* DA9062AA_CONFIG_G = 0x10C */
 936#define DA9062AA_LDO1_AUTO_SHIFT	0
 937#define DA9062AA_LDO1_AUTO_MASK		0x01
 938#define DA9062AA_LDO2_AUTO_SHIFT	1
 939#define DA9062AA_LDO2_AUTO_MASK		BIT(1)
 940#define DA9062AA_LDO3_AUTO_SHIFT	2
 941#define DA9062AA_LDO3_AUTO_MASK		BIT(2)
 942#define DA9062AA_LDO4_AUTO_SHIFT	3
 943#define DA9062AA_LDO4_AUTO_MASK		BIT(3)
 944
 945/* DA9062AA_CONFIG_H = 0x10D */
 946#define DA9062AA_BUCK1_2_MERGE_SHIFT	3
 947#define DA9062AA_BUCK1_2_MERGE_MASK	BIT(3)
 948#define DA9062AA_BUCK2_OD_SHIFT		5
 949#define DA9062AA_BUCK2_OD_MASK		BIT(5)
 950#define DA9062AA_BUCK1_OD_SHIFT		6
 951#define DA9062AA_BUCK1_OD_MASK		BIT(6)
 952
 953/* DA9062AA_CONFIG_I = 0x10E */
 954#define DA9062AA_NONKEY_PIN_SHIFT	0
 955#define DA9062AA_NONKEY_PIN_MASK	0x03
 956#define DA9062AA_nONKEY_SD_SHIFT	2
 957#define DA9062AA_nONKEY_SD_MASK		BIT(2)
 958#define DA9062AA_WATCHDOG_SD_SHIFT	3
 959#define DA9062AA_WATCHDOG_SD_MASK	BIT(3)
 960#define DA9062AA_KEY_SD_MODE_SHIFT	4
 961#define DA9062AA_KEY_SD_MODE_MASK	BIT(4)
 962#define DA9062AA_HOST_SD_MODE_SHIFT	5
 963#define DA9062AA_HOST_SD_MODE_MASK	BIT(5)
 964#define DA9062AA_INT_SD_MODE_SHIFT	6
 965#define DA9062AA_INT_SD_MODE_MASK	BIT(6)
 966#define DA9062AA_LDO_SD_SHIFT		7
 967#define DA9062AA_LDO_SD_MASK		BIT(7)
 968
 969/* DA9062AA_CONFIG_J = 0x10F */
 970#define DA9062AA_KEY_DELAY_SHIFT	0
 971#define DA9062AA_KEY_DELAY_MASK		0x03
 972#define DA9062AA_SHUT_DELAY_SHIFT	2
 973#define DA9062AA_SHUT_DELAY_MASK	(0x03 << 2)
 974#define DA9062AA_RESET_DURATION_SHIFT	4
 975#define DA9062AA_RESET_DURATION_MASK	(0x03 << 4)
 976#define DA9062AA_TWOWIRE_TO_SHIFT	6
 977#define DA9062AA_TWOWIRE_TO_MASK	BIT(6)
 978#define DA9062AA_IF_RESET_SHIFT		7
 979#define DA9062AA_IF_RESET_MASK		BIT(7)
 980
 981/* DA9062AA_CONFIG_K = 0x110 */
 982#define DA9062AA_GPIO0_PUPD_SHIFT	0
 983#define DA9062AA_GPIO0_PUPD_MASK	0x01
 984#define DA9062AA_GPIO1_PUPD_SHIFT	1
 985#define DA9062AA_GPIO1_PUPD_MASK	BIT(1)
 986#define DA9062AA_GPIO2_PUPD_SHIFT	2
 987#define DA9062AA_GPIO2_PUPD_MASK	BIT(2)
 988#define DA9062AA_GPIO3_PUPD_SHIFT	3
 989#define DA9062AA_GPIO3_PUPD_MASK	BIT(3)
 990#define DA9062AA_GPIO4_PUPD_SHIFT	4
 991#define DA9062AA_GPIO4_PUPD_MASK	BIT(4)
 992
 993/* DA9062AA_CONFIG_M = 0x112 */
 994#define DA9062AA_NSHUTDOWN_PU_SHIFT	1
 995#define DA9062AA_NSHUTDOWN_PU_MASK	BIT(1)
 996#define DA9062AA_WDG_MODE_SHIFT		3
 997#define DA9062AA_WDG_MODE_MASK		BIT(3)
 998#define DA9062AA_OSC_FRQ_SHIFT		4
 999#define DA9062AA_OSC_FRQ_MASK		(0x0f << 4)
1000
1001/* DA9062AA_TRIM_CLDR = 0x120 */
1002#define DA9062AA_TRIM_CLDR_SHIFT	0
1003#define DA9062AA_TRIM_CLDR_MASK		0xff
1004
1005/* DA9062AA_GP_ID_0 = 0x121 */
1006#define DA9062AA_GP_0_SHIFT		0
1007#define DA9062AA_GP_0_MASK		0xff
1008
1009/* DA9062AA_GP_ID_1 = 0x122 */
1010#define DA9062AA_GP_1_SHIFT		0
1011#define DA9062AA_GP_1_MASK		0xff
1012
1013/* DA9062AA_GP_ID_2 = 0x123 */
1014#define DA9062AA_GP_2_SHIFT		0
1015#define DA9062AA_GP_2_MASK		0xff
1016
1017/* DA9062AA_GP_ID_3 = 0x124 */
1018#define DA9062AA_GP_3_SHIFT		0
1019#define DA9062AA_GP_3_MASK		0xff
1020
1021/* DA9062AA_GP_ID_4 = 0x125 */
1022#define DA9062AA_GP_4_SHIFT		0
1023#define DA9062AA_GP_4_MASK		0xff
1024
1025/* DA9062AA_GP_ID_5 = 0x126 */
1026#define DA9062AA_GP_5_SHIFT		0
1027#define DA9062AA_GP_5_MASK		0xff
1028
1029/* DA9062AA_GP_ID_6 = 0x127 */
1030#define DA9062AA_GP_6_SHIFT		0
1031#define DA9062AA_GP_6_MASK		0xff
1032
1033/* DA9062AA_GP_ID_7 = 0x128 */
1034#define DA9062AA_GP_7_SHIFT		0
1035#define DA9062AA_GP_7_MASK		0xff
1036
1037/* DA9062AA_GP_ID_8 = 0x129 */
1038#define DA9062AA_GP_8_SHIFT		0
1039#define DA9062AA_GP_8_MASK		0xff
1040
1041/* DA9062AA_GP_ID_9 = 0x12A */
1042#define DA9062AA_GP_9_SHIFT		0
1043#define DA9062AA_GP_9_MASK		0xff
1044
1045/* DA9062AA_GP_ID_10 = 0x12B */
1046#define DA9062AA_GP_10_SHIFT		0
1047#define DA9062AA_GP_10_MASK		0xff
1048
1049/* DA9062AA_GP_ID_11 = 0x12C */
1050#define DA9062AA_GP_11_SHIFT		0
1051#define DA9062AA_GP_11_MASK		0xff
1052
1053/* DA9062AA_GP_ID_12 = 0x12D */
1054#define DA9062AA_GP_12_SHIFT		0
1055#define DA9062AA_GP_12_MASK		0xff
1056
1057/* DA9062AA_GP_ID_13 = 0x12E */
1058#define DA9062AA_GP_13_SHIFT		0
1059#define DA9062AA_GP_13_MASK		0xff
1060
1061/* DA9062AA_GP_ID_14 = 0x12F */
1062#define DA9062AA_GP_14_SHIFT		0
1063#define DA9062AA_GP_14_MASK		0xff
1064
1065/* DA9062AA_GP_ID_15 = 0x130 */
1066#define DA9062AA_GP_15_SHIFT		0
1067#define DA9062AA_GP_15_MASK		0xff
1068
1069/* DA9062AA_GP_ID_16 = 0x131 */
1070#define DA9062AA_GP_16_SHIFT		0
1071#define DA9062AA_GP_16_MASK		0xff
1072
1073/* DA9062AA_GP_ID_17 = 0x132 */
1074#define DA9062AA_GP_17_SHIFT		0
1075#define DA9062AA_GP_17_MASK		0xff
1076
1077/* DA9062AA_GP_ID_18 = 0x133 */
1078#define DA9062AA_GP_18_SHIFT		0
1079#define DA9062AA_GP_18_MASK		0xff
1080
1081/* DA9062AA_GP_ID_19 = 0x134 */
1082#define DA9062AA_GP_19_SHIFT		0
1083#define DA9062AA_GP_19_MASK		0xff
1084
1085/* DA9062AA_DEVICE_ID = 0x181 */
1086#define DA9062AA_DEV_ID_SHIFT		0
1087#define DA9062AA_DEV_ID_MASK		0xff
1088
1089/* DA9062AA_VARIANT_ID = 0x182 */
1090#define DA9062AA_VRC_SHIFT		0
1091#define DA9062AA_VRC_MASK		0x0f
1092#define DA9062AA_MRC_SHIFT		4
1093#define DA9062AA_MRC_MASK		(0x0f << 4)
1094
1095/* DA9062AA_CUSTOMER_ID = 0x183 */
1096#define DA9062AA_CUST_ID_SHIFT		0
1097#define DA9062AA_CUST_ID_MASK		0xff
1098
1099/* DA9062AA_CONFIG_ID = 0x184 */
1100#define DA9062AA_CONFIG_REV_SHIFT	0
1101#define DA9062AA_CONFIG_REV_MASK	0xff
1102
1103#endif /* __DA9062_H__ */