da9052.h

  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 * da9052 declarations for DA9052 PMICs.
  4 *
  5 * Copyright(c) 2011 Dialog Semiconductor Ltd.
  6 *
  7 * Author: David Dajun Chen <dchen@diasemi.com>
  8 */
  9
 10#ifndef __MFD_DA9052_DA9052_H
 11#define __MFD_DA9052_DA9052_H
 12
 13#include <linux/interrupt.h>
 14#include <linux/regmap.h>
 15#include <linux/slab.h>
 16#include <linux/completion.h>
 17#include <linux/list.h>
 18#include <linux/mfd/core.h>
 19
 20#include <linux/mfd/da9052/reg.h>
 21
 22/* Common - HWMON Channel Definations */
 23#define DA9052_ADC_VDDOUT	0
 24#define DA9052_ADC_ICH		1
 25#define DA9052_ADC_TBAT	2
 26#define DA9052_ADC_VBAT	3
 27#define DA9052_ADC_IN4		4
 28#define DA9052_ADC_IN5		5
 29#define DA9052_ADC_IN6		6
 30#define DA9052_ADC_TSI		7
 31#define DA9052_ADC_TJUNC	8
 32#define DA9052_ADC_VBBAT	9
 33
 34/* TSI channel has its own 4 channel mux */
 35#define DA9052_ADC_TSI_XP	70
 36#define DA9052_ADC_TSI_XN	71
 37#define DA9052_ADC_TSI_YP	72
 38#define DA9052_ADC_TSI_YN	73
 39
 40#define DA9052_IRQ_DCIN	0
 41#define DA9052_IRQ_VBUS	1
 42#define DA9052_IRQ_DCINREM	2
 43#define DA9052_IRQ_VBUSREM	3
 44#define DA9052_IRQ_VDDLOW	4
 45#define DA9052_IRQ_ALARM	5
 46#define DA9052_IRQ_SEQRDY	6
 47#define DA9052_IRQ_COMP1V2	7
 48#define DA9052_IRQ_NONKEY	8
 49#define DA9052_IRQ_IDFLOAT	9
 50#define DA9052_IRQ_IDGND	10
 51#define DA9052_IRQ_CHGEND	11
 52#define DA9052_IRQ_TBAT	12
 53#define DA9052_IRQ_ADC_EOM	13
 54#define DA9052_IRQ_PENDOWN	14
 55#define DA9052_IRQ_TSIREADY	15
 56#define DA9052_IRQ_GPI0	16
 57#define DA9052_IRQ_GPI1	17
 58#define DA9052_IRQ_GPI2	18
 59#define DA9052_IRQ_GPI3	19
 60#define DA9052_IRQ_GPI4	20
 61#define DA9052_IRQ_GPI5	21
 62#define DA9052_IRQ_GPI6	22
 63#define DA9052_IRQ_GPI7	23
 64#define DA9052_IRQ_GPI8	24
 65#define DA9052_IRQ_GPI9	25
 66#define DA9052_IRQ_GPI10	26
 67#define DA9052_IRQ_GPI11	27
 68#define DA9052_IRQ_GPI12	28
 69#define DA9052_IRQ_GPI13	29
 70#define DA9052_IRQ_GPI14	30
 71#define DA9052_IRQ_GPI15	31
 72
 73enum da9052_chip_id {
 74	DA9052,
 75	DA9053_AA,
 76	DA9053_BA,
 77	DA9053_BB,
 78	DA9053_BC,
 79};
 80
 81struct da9052_pdata;
 82
 83struct da9052 {
 84	struct device *dev;
 85	struct regmap *regmap;
 86
 87	struct mutex auxadc_lock;
 88	struct completion done;
 89
 90	int irq_base;
 91	struct regmap_irq_chip_data *irq_data;
 92	u8 chip_id;
 93
 94	int chip_irq;
 95
 96	int fault_log;
 97
 98	/* SOC I/O transfer related fixes for DA9052/53 */
 99	int (*fix_io) (struct da9052 *da9052, unsigned char reg);
100};
101
102/* ADC API */
103int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel);
104int da9052_adc_read_temp(struct da9052 *da9052);
105
106/* Device I/O API */
107static inline int da9052_reg_read(struct da9052 *da9052, unsigned char reg)
108{
109	int val, ret;
110
111	ret = regmap_read(da9052->regmap, reg, &val);
112	if (ret < 0)
113		return ret;
114
115	if (da9052->fix_io) {
116		ret = da9052->fix_io(da9052, reg);
117		if (ret < 0)
118			return ret;
119	}
120
121	return val;
122}
123
124static inline int da9052_reg_write(struct da9052 *da9052, unsigned char reg,
125				    unsigned char val)
126{
127	int ret;
128
129	ret = regmap_write(da9052->regmap, reg, val);
130	if (ret < 0)
131		return ret;
132
133	if (da9052->fix_io) {
134		ret = da9052->fix_io(da9052, reg);
135		if (ret < 0)
136			return ret;
137	}
138
139	return ret;
140}
141
142static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg,
143				     unsigned reg_cnt, unsigned char *val)
144{
145	int ret;
146	unsigned int tmp;
147	int i;
148
149	for (i = 0; i < reg_cnt; i++) {
150		ret = regmap_read(da9052->regmap, reg + i, &tmp);
151		val[i] = (unsigned char)tmp;
152		if (ret < 0)
153			return ret;
154	}
155
156	if (da9052->fix_io) {
157		ret = da9052->fix_io(da9052, reg);
158		if (ret < 0)
159			return ret;
160	}
161
162	return ret;
163}
164
165static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg,
166				      unsigned reg_cnt, unsigned char *val)
167{
168	int ret = 0;
169	int i;
170
171	for (i = 0; i < reg_cnt; i++) {
172		ret = regmap_write(da9052->regmap, reg + i, val[i]);
173		if (ret < 0)
174			return ret;
175	}
176
177	if (da9052->fix_io) {
178		ret = da9052->fix_io(da9052, reg);
179		if (ret < 0)
180			return ret;
181	}
182
183	return ret;
184}
185
186static inline int da9052_reg_update(struct da9052 *da9052, unsigned char reg,
187				     unsigned char bit_mask,
188				     unsigned char reg_val)
189{
190	int ret;
191
192	ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val);
193	if (ret < 0)
194		return ret;
195
196	if (da9052->fix_io) {
197		ret = da9052->fix_io(da9052, reg);
198		if (ret < 0)
199			return ret;
200	}
201
202	return ret;
203}
204
205int da9052_device_init(struct da9052 *da9052, u8 chip_id);
206void da9052_device_exit(struct da9052 *da9052);
207
208extern const struct regmap_config da9052_regmap_config;
209
210int da9052_irq_init(struct da9052 *da9052);
211int da9052_irq_exit(struct da9052 *da9052);
212int da9052_request_irq(struct da9052 *da9052, int irq, char *name,
213			   irq_handler_t handler, void *data);
214void da9052_free_irq(struct da9052 *da9052, int irq, void *data);
215
216int da9052_enable_irq(struct da9052 *da9052, int irq);
217int da9052_disable_irq(struct da9052 *da9052, int irq);
218int da9052_disable_irq_nosync(struct da9052 *da9052, int irq);
219
220#endif /* __MFD_DA9052_DA9052_H */