adp5585.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Analog Devices ADP5585 I/O expander, PWM controller and keypad controller
  4 *
  5 * Copyright 2022 NXP
  6 * Copyright 2024 Ideas on Board Oy
  7 */
  8
  9#ifndef __MFD_ADP5585_H_
 10#define __MFD_ADP5585_H_
 11
 12#include <linux/bits.h>
 13#include <linux/notifier.h>
 14
 15#define ADP5585_ID			0x00
 16#define		ADP5585_MAN_ID_VALUE		0x20
 17#define		ADP5585_MAN_ID_MASK		GENMASK(7, 4)
 18#define		ADP5585_REV_ID_MASK		GENMASK(3, 0)
 19#define ADP5585_INT_STATUS		0x01
 20#define		ADP5585_OVRFLOW_INT		BIT(2)
 21#define		ADP5585_EVENT_INT		BIT(0)
 22#define ADP5585_STATUS			0x02
 23#define		ADP5585_EC_MASK			GENMASK(4, 0)
 24#define ADP5585_FIFO_1			0x03
 25#define		ADP5585_KEV_EV_PRESS_MASK	BIT(7)
 26#define		ADP5585_KEY_EVENT_MASK		GENMASK(6, 0)
 27#define ADP5585_FIFO_2			0x04
 28#define ADP5585_FIFO_3			0x05
 29#define ADP5585_FIFO_4			0x06
 30#define ADP5585_FIFO_5			0x07
 31#define ADP5585_FIFO_6			0x08
 32#define ADP5585_FIFO_7			0x09
 33#define ADP5585_FIFO_8			0x0a
 34#define ADP5585_FIFO_9			0x0b
 35#define ADP5585_FIFO_10			0x0c
 36#define ADP5585_FIFO_11			0x0d
 37#define ADP5585_FIFO_12			0x0e
 38#define ADP5585_FIFO_13			0x0f
 39#define ADP5585_FIFO_14			0x10
 40#define ADP5585_FIFO_15			0x11
 41#define ADP5585_FIFO_16			0x12
 42#define		ADP5585_EV_MAX			(ADP5585_FIFO_16 - ADP5585_FIFO_1 + 1)
 43#define ADP5585_GPI_INT_STAT_A		0x13
 44#define ADP5585_GPI_INT_STAT_B		0x14
 45#define ADP5585_GPI_STATUS_A		0x15
 46#define ADP5585_GPI_STATUS_B		0x16
 47#define ADP5585_RPULL_CONFIG_A		0x17
 48#define ADP5585_RPULL_CONFIG_B		0x18
 49#define ADP5585_RPULL_CONFIG_C		0x19
 50#define ADP5585_RPULL_CONFIG_D		0x1a
 51#define		ADP5585_Rx_PULL_CFG_PU_300K	0
 52#define		ADP5585_Rx_PULL_CFG_PD_300K	1
 53#define		ADP5585_Rx_PULL_CFG_PU_100K	2
 54#define		ADP5585_Rx_PULL_CFG_DISABLE	3
 55#define		ADP5585_Rx_PULL_CFG_MASK	3
 56#define ADP5585_GPI_INT_LEVEL_A		0x1b
 57#define ADP5585_GPI_INT_LEVEL_B		0x1c
 58#define ADP5585_GPI_EVENT_EN_A		0x1d
 59#define ADP5585_GPI_EVENT_EN_B		0x1e
 60#define ADP5585_GPI_INTERRUPT_EN_A	0x1f
 61#define ADP5585_GPI_INTERRUPT_EN_B	0x20
 62#define ADP5585_DEBOUNCE_DIS_A		0x21
 63#define ADP5585_DEBOUNCE_DIS_B		0x22
 64#define ADP5585_GPO_DATA_OUT_A		0x23
 65#define ADP5585_GPO_DATA_OUT_B		0x24
 66#define ADP5585_GPO_OUT_MODE_A		0x25
 67#define ADP5585_GPO_OUT_MODE_B		0x26
 68#define ADP5585_GPIO_DIRECTION_A	0x27
 69#define ADP5585_GPIO_DIRECTION_B	0x28
 70#define ADP5585_RESET1_EVENT_A		0x29
 71#define		ADP5585_RESET_EV_PRESS		BIT(7)
 72#define ADP5585_RESET1_EVENT_B		0x2a
 73#define ADP5585_RESET1_EVENT_C		0x2b
 74#define ADP5585_RESET2_EVENT_A		0x2c
 75#define ADP5585_RESET2_EVENT_B		0x2d
 76#define ADP5585_RESET_CFG		0x2e
 77#define ADP5585_PWM_OFFT_LOW		0x2f
 78#define ADP5585_PWM_OFFT_HIGH		0x30
 79#define ADP5585_PWM_ONT_LOW		0x31
 80#define ADP5585_PWM_ONT_HIGH		0x32
 81#define ADP5585_PWM_CFG			0x33
 82#define		ADP5585_PWM_IN_AND		BIT(2)
 83#define		ADP5585_PWM_MODE		BIT(1)
 84#define		ADP5585_PWM_EN			BIT(0)
 85#define ADP5585_LOGIC_CFG		0x34
 86#define ADP5585_LOGIC_FF_CFG		0x35
 87#define ADP5585_LOGIC_INT_EVENT_EN	0x36
 88#define ADP5585_POLL_PTIME_CFG		0x37
 89#define ADP5585_PIN_CONFIG_A		0x38
 90#define ADP5585_PIN_CONFIG_B		0x39
 91#define ADP5585_PIN_CONFIG_C		0x3a
 92#define		ADP5585_PULL_SELECT		BIT(7)
 93#define		ADP5585_C4_EXTEND_CFG_GPIO11	(0U << 6)
 94#define		ADP5585_C4_EXTEND_CFG_RESET2	(1U << 6)
 95#define		ADP5585_C4_EXTEND_CFG_MASK	GENMASK(6, 6)
 96#define		ADP5585_R4_EXTEND_CFG_GPIO5	(0U << 5)
 97#define		ADP5585_R4_EXTEND_CFG_RESET1	(1U << 5)
 98#define		ADP5585_R4_EXTEND_CFG_MASK	GENMASK(5, 5)
 99#define		ADP5585_R3_EXTEND_CFG_GPIO4	(0U << 2)
100#define		ADP5585_R3_EXTEND_CFG_LC	(1U << 2)
101#define		ADP5585_R3_EXTEND_CFG_PWM_OUT	(2U << 2)
102#define		ADP5585_R3_EXTEND_CFG_MASK	GENMASK(3, 2)
103#define		ADP5585_R0_EXTEND_CFG_GPIO1	(0U << 0)
104#define		ADP5585_R0_EXTEND_CFG_LY	(1U << 0)
105#define		ADP5585_R0_EXTEND_CFG_MASK	GENMASK(0, 0)
106#define ADP5585_GENERAL_CFG		0x3b
107#define		ADP5585_OSC_EN			BIT(7)
108#define		ADP5585_OSC_FREQ_50KHZ		(0U << 5)
109#define		ADP5585_OSC_FREQ_100KHZ		(1U << 5)
110#define		ADP5585_OSC_FREQ_200KHZ		(2U << 5)
111#define		ADP5585_OSC_FREQ_500KHZ		(3U << 5)
112#define		ADP5585_OSC_FREQ_MASK		GENMASK(6, 5)
113#define		ADP5585_INT_CFG			BIT(1)
114#define		ADP5585_RST_CFG			BIT(0)
115#define ADP5585_INT_EN			0x3c
116#define		ADP5585_OVRFLOW_IEN		BIT(2)
117#define		ADP5585_EVENT_IEN		BIT(0)
118
119#define ADP5585_MAX_REG			ADP5585_INT_EN
120
121#define ADP5585_PIN_MAX			11
122#define ADP5585_MAX_UNLOCK_TIME_SEC	7
123#define ADP5585_KEY_EVENT_START		1
124#define ADP5585_KEY_EVENT_END		25
125#define ADP5585_GPI_EVENT_START		37
126#define ADP5585_GPI_EVENT_END		47
127#define ADP5585_ROW5_KEY_EVENT_START	1
128#define ADP5585_ROW5_KEY_EVENT_END	30
129#define ADP5585_PWM_OUT			3
130#define ADP5585_RESET1_OUT		4
131#define ADP5585_RESET2_OUT		9
132#define ADP5585_ROW5			5
133
134/* ADP5589 */
135#define		ADP5589_MAN_ID_VALUE		0x10
136#define ADP5589_GPI_STATUS_A		0x16
137#define ADP5589_GPI_STATUS_C		0x18
138#define ADP5589_RPULL_CONFIG_A		0x19
139#define ADP5589_GPI_INT_LEVEL_A		0x1e
140#define ADP5589_GPI_EVENT_EN_A		0x21
141#define ADP5589_DEBOUNCE_DIS_A		0x27
142#define ADP5589_GPO_DATA_OUT_A		0x2a
143#define ADP5589_GPO_OUT_MODE_A		0x2d
144#define		ADP5589_GPIO_DIRECTION_A	0x30
145#define ADP5589_UNLOCK1			0x33
146#define		ADP5589_UNLOCK_EV_PRESS		BIT(7)
147#define ADP5589_UNLOCK_TIMERS		0x36
148#define		ADP5589_UNLOCK_TIMER		GENMASK(2, 0)
149#define ADP5589_LOCK_CFG		0x37
150#define		ADP5589_LOCK_EN			BIT(0)
151#define ADP5589_RESET1_EVENT_A		0x38
152#define ADP5589_RESET2_EVENT_A		0x3B
153#define ADP5589_RESET_CFG		0x3D
154#define		ADP5585_RESET2_POL		BIT(7)
155#define		ADP5585_RESET1_POL		BIT(6)
156#define		ADP5585_RST_PASSTHRU_EN		BIT(5)
157#define		ADP5585_RESET_TRIG_TIME		GENMASK(4, 2)
158#define		ADP5585_PULSE_WIDTH		GENMASK(1, 0)
159#define ADP5589_PWM_OFFT_LOW		0x3e
160#define ADP5589_PWM_ONT_LOW		0x40
161#define ADP5589_PWM_CFG			0x42
162#define ADP5589_POLL_PTIME_CFG		0x48
163#define ADP5589_PIN_CONFIG_A		0x49
164#define ADP5589_PIN_CONFIG_D		0x4C
165#define ADP5589_GENERAL_CFG		0x4d
166#define ADP5589_INT_EN			0x4e
167#define ADP5589_MAX_REG			ADP5589_INT_EN
168
169#define ADP5589_PIN_MAX			19
170#define ADP5589_KEY_EVENT_START		1
171#define ADP5589_KEY_EVENT_END		88
172#define ADP5589_GPI_EVENT_START		97
173#define ADP5589_GPI_EVENT_END		115
174#define ADP5589_UNLOCK_WILDCARD		127
175#define ADP5589_RESET2_OUT		12
176
177struct regmap;
178
179enum adp5585_variant {
180	ADP5585_00 = 1,
181	ADP5585_01,
182	ADP5585_02,
183	ADP5585_03,
184	ADP5585_04,
185	ADP5589_00,
186	ADP5589_01,
187	ADP5589_02,
188	ADP5585_MAX
189};
190
191struct adp5585_regs {
192	unsigned int gen_cfg;
193	unsigned int ext_cfg;
194	unsigned int int_en;
195	unsigned int poll_ptime_cfg;
196	unsigned int reset_cfg;
197	unsigned int reset1_event_a;
198	unsigned int reset2_event_a;
199	unsigned int pin_cfg_a;
200};
201
202struct adp5585_dev {
203	struct device *dev;
204	struct regmap *regmap;
205	const struct adp5585_regs *regs;
206	struct blocking_notifier_head event_notifier;
207	unsigned long *pin_usage;
208	unsigned int n_pins;
209	unsigned int reset2_out;
210	enum adp5585_variant variant;
211	unsigned int id;
212	bool has_unlock;
213	bool has_pin6;
214	int irq;
215	unsigned int ev_poll_time;
216	unsigned int unlock_time;
217	unsigned int unlock_keys[2];
218	unsigned int nkeys_unlock;
219	unsigned int reset1_keys[3];
220	unsigned int nkeys_reset1;
221	unsigned int reset2_keys[2];
222	unsigned int nkeys_reset2;
223	u8 reset_cfg;
224};
225
226#endif