driver.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2#ifndef __LINUX_GPIO_DRIVER_H
  3#define __LINUX_GPIO_DRIVER_H
  4
  5#include <linux/bits.h>
  6#include <linux/cleanup.h>
  7#include <linux/err.h>
  8#include <linux/irqchip/chained_irq.h>
  9#include <linux/irqdomain.h>
 10#include <linux/irqhandler.h>
 11#include <linux/lockdep.h>
 12#include <linux/pinctrl/pinconf-generic.h>
 13#include <linux/pinctrl/pinctrl.h>
 14#include <linux/property.h>
 15#include <linux/spinlock_types.h>
 16#include <linux/types.h>
 17#include <linux/util_macros.h>
 18
 19#ifdef CONFIG_GENERIC_MSI_IRQ
 20#include <asm/msi.h>
 21#endif
 22
 23struct device;
 24struct irq_chip;
 25struct irq_data;
 26struct module;
 27struct of_phandle_args;
 28struct pinctrl_dev;
 29struct seq_file;
 30
 31struct gpio_chip;
 32struct gpio_desc;
 33struct gpio_device;
 34
 35enum gpio_lookup_flags;
 36enum gpiod_flags;
 37
 38union gpio_irq_fwspec {
 39	struct irq_fwspec	fwspec;
 40#ifdef CONFIG_GENERIC_MSI_IRQ
 41	msi_alloc_info_t	msiinfo;
 42#endif
 43};
 44
 45#define GPIO_LINE_DIRECTION_IN	1
 46#define GPIO_LINE_DIRECTION_OUT	0
 47
 48/**
 49 * struct gpio_irq_chip - GPIO interrupt controller
 50 */
 51struct gpio_irq_chip {
 52	/**
 53	 * @chip:
 54	 *
 55	 * GPIO IRQ chip implementation, provided by GPIO driver.
 56	 */
 57	struct irq_chip *chip;
 58
 59	/**
 60	 * @domain:
 61	 *
 62	 * Interrupt translation domain; responsible for mapping between GPIO
 63	 * hwirq number and Linux IRQ number.
 64	 */
 65	struct irq_domain *domain;
 66
 67#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
 68	/**
 69	 * @fwnode:
 70	 *
 71	 * Firmware node corresponding to this gpiochip/irqchip, necessary
 72	 * for hierarchical irqdomain support.
 73	 */
 74	struct fwnode_handle *fwnode;
 75
 76	/**
 77	 * @parent_domain:
 78	 *
 79	 * If non-NULL, will be set as the parent of this GPIO interrupt
 80	 * controller's IRQ domain to establish a hierarchical interrupt
 81	 * domain. The presence of this will activate the hierarchical
 82	 * interrupt support.
 83	 */
 84	struct irq_domain *parent_domain;
 85
 86	/**
 87	 * @child_to_parent_hwirq:
 88	 *
 89	 * This callback translates a child hardware IRQ offset to a parent
 90	 * hardware IRQ offset on a hierarchical interrupt chip. The child
 91	 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
 92	 * ngpio field of struct gpio_chip) and the corresponding parent
 93	 * hardware IRQ and type (such as IRQ_TYPE_*) shall be returned by
 94	 * the driver. The driver can calculate this from an offset or using
 95	 * a lookup table or whatever method is best for this chip. Return
 96	 * 0 on successful translation in the driver.
 97	 *
 98	 * If some ranges of hardware IRQs do not have a corresponding parent
 99	 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
100	 * @need_valid_mask to make these GPIO lines unavailable for
101	 * translation.
102	 */
103	int (*child_to_parent_hwirq)(struct gpio_chip *gc,
104				     unsigned int child_hwirq,
105				     unsigned int child_type,
106				     unsigned int *parent_hwirq,
107				     unsigned int *parent_type);
108
109	/**
110	 * @populate_parent_alloc_arg :
111	 *
112	 * This optional callback allocates and populates the specific struct
113	 * for the parent's IRQ domain. If this is not specified, then
114	 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
115	 * variant named &gpiochip_populate_parent_fwspec_fourcell is also
116	 * available.
117	 */
118	int (*populate_parent_alloc_arg)(struct gpio_chip *gc,
119					 union gpio_irq_fwspec *fwspec,
120					 unsigned int parent_hwirq,
121					 unsigned int parent_type);
122
123	/**
124	 * @child_offset_to_irq:
125	 *
126	 * This optional callback is used to translate the child's GPIO line
127	 * offset on the GPIO chip to an IRQ number for the GPIO to_irq()
128	 * callback. If this is not specified, then a default callback will be
129	 * provided that returns the line offset.
130	 */
131	unsigned int (*child_offset_to_irq)(struct gpio_chip *gc,
132					    unsigned int pin);
133
134	/**
135	 * @child_irq_domain_ops:
136	 *
137	 * The IRQ domain operations that will be used for this GPIO IRQ
138	 * chip. If no operations are provided, then default callbacks will
139	 * be populated to setup the IRQ hierarchy. Some drivers need to
140	 * supply their own translate function.
141	 */
142	struct irq_domain_ops child_irq_domain_ops;
143#endif
144
145	/**
146	 * @handler:
147	 *
148	 * The IRQ handler to use (often a predefined IRQ core function) for
149	 * GPIO IRQs, provided by GPIO driver.
150	 */
151	irq_flow_handler_t handler;
152
153	/**
154	 * @default_type:
155	 *
156	 * Default IRQ triggering type applied during GPIO driver
157	 * initialization, provided by GPIO driver.
158	 */
159	unsigned int default_type;
160
161	/**
162	 * @lock_key:
163	 *
164	 * Per GPIO IRQ chip lockdep class for IRQ lock.
165	 */
166	struct lock_class_key *lock_key;
167
168	/**
169	 * @request_key:
170	 *
171	 * Per GPIO IRQ chip lockdep class for IRQ request.
172	 */
173	struct lock_class_key *request_key;
174
175	/**
176	 * @parent_handler:
177	 *
178	 * The interrupt handler for the GPIO chip's parent interrupts, may be
179	 * NULL if the parent interrupts are nested rather than cascaded.
180	 */
181	irq_flow_handler_t parent_handler;
182
183	union {
184		/**
185		 * @parent_handler_data:
186		 *
187		 * If @per_parent_data is false, @parent_handler_data is a
188		 * single pointer used as the data associated with every
189		 * parent interrupt.
190		 */
191		void *parent_handler_data;
192
193		/**
194		 * @parent_handler_data_array:
195		 *
196		 * If @per_parent_data is true, @parent_handler_data_array is
197		 * an array of @num_parents pointers, and is used to associate
198		 * different data for each parent. This cannot be NULL if
199		 * @per_parent_data is true.
200		 */
201		void **parent_handler_data_array;
202	};
203
204	/**
205	 * @num_parents:
206	 *
207	 * The number of interrupt parents of a GPIO chip.
208	 */
209	unsigned int num_parents;
210
211	/**
212	 * @parents:
213	 *
214	 * A list of interrupt parents of a GPIO chip. This is owned by the
215	 * driver, so the core will only reference this list, not modify it.
216	 */
217	unsigned int *parents;
218
219	/**
220	 * @map:
221	 *
222	 * A list of interrupt parents for each line of a GPIO chip.
223	 */
224	unsigned int *map;
225
226	/**
227	 * @threaded:
228	 *
229	 * True if set the interrupt handling uses nested threads.
230	 */
231	bool threaded;
232
233	/**
234	 * @per_parent_data:
235	 *
236	 * True if parent_handler_data_array describes a @num_parents
237	 * sized array to be used as parent data.
238	 */
239	bool per_parent_data;
240
241	/**
242	 * @initialized:
243	 *
244	 * Flag to track GPIO chip irq member's initialization.
245	 * This flag will make sure GPIO chip irq members are not used
246	 * before they are initialized.
247	 */
248	bool initialized;
249
250	/**
251	 * @domain_is_allocated_externally:
252	 *
253	 * True it the irq_domain was allocated outside of gpiolib, in which
254	 * case gpiolib won't free the irq_domain itself.
255	 */
256	bool domain_is_allocated_externally;
257
258	/**
259	 * @init_hw: optional routine to initialize hardware before
260	 * an IRQ chip will be added. This is quite useful when
261	 * a particular driver wants to clear IRQ related registers
262	 * in order to avoid undesired events.
263	 */
264	int (*init_hw)(struct gpio_chip *gc);
265
266	/**
267	 * @init_valid_mask: optional routine to initialize @valid_mask, to be
268	 * used if not all GPIO lines are valid interrupts. Sometimes some
269	 * lines just cannot fire interrupts, and this routine, when defined,
270	 * is passed a bitmap in "valid_mask" and it will have ngpios
271	 * bits from 0..(ngpios-1) set to "1" as in valid. The callback can
272	 * then directly set some bits to "0" if they cannot be used for
273	 * interrupts.
274	 */
275	void (*init_valid_mask)(struct gpio_chip *gc,
276				unsigned long *valid_mask,
277				unsigned int ngpios);
278
279	/**
280	 * @valid_mask:
281	 *
282	 * If not %NULL, holds bitmask of GPIOs which are valid to be included
283	 * in IRQ domain of the chip.
284	 */
285	unsigned long *valid_mask;
286
287	/**
288	 * @first:
289	 *
290	 * Required for static IRQ allocation. If set,
291	 * irq_domain_create_simple() will allocate and map all IRQs
292	 * during initialization.
293	 */
294	unsigned int first;
295
296	/**
297	 * @irq_enable:
298	 *
299	 * Store old irq_chip irq_enable callback
300	 */
301	void		(*irq_enable)(struct irq_data *data);
302
303	/**
304	 * @irq_disable:
305	 *
306	 * Store old irq_chip irq_disable callback
307	 */
308	void		(*irq_disable)(struct irq_data *data);
309	/**
310	 * @irq_unmask:
311	 *
312	 * Store old irq_chip irq_unmask callback
313	 */
314	void		(*irq_unmask)(struct irq_data *data);
315
316	/**
317	 * @irq_mask:
318	 *
319	 * Store old irq_chip irq_mask callback
320	 */
321	void		(*irq_mask)(struct irq_data *data);
322};
323
324/**
325 * struct gpio_chip - abstract a GPIO controller
326 * @label: a functional name for the GPIO device, such as a part
327 *	number or the name of the SoC IP-block implementing it.
328 * @gpiodev: the internal state holder, opaque struct
329 * @parent: optional parent device providing the GPIOs
330 * @fwnode: optional fwnode providing this controller's properties
331 * @owner: helps prevent removal of modules exporting active GPIOs
332 * @request: optional hook for chip-specific activation, such as
333 *	enabling module power and clock; may sleep; must return 0 on success
334 *	or negative error number on failure
335 * @free: optional hook for chip-specific deactivation, such as
336 *	disabling module power and clock; may sleep
337 * @get_direction: returns direction for signal "offset", 0=out, 1=in,
338 *	(same as GPIO_LINE_DIRECTION_OUT / GPIO_LINE_DIRECTION_IN),
339 *	or negative error. It is recommended to always implement this
340 *	function, even on input-only or output-only gpio chips.
341 * @direction_input: configures signal "offset" as input, returns 0 on success
342 *	or a negative error number. This can be omitted on input-only or
343 *	output-only gpio chips.
344 * @direction_output: configures signal "offset" as output, returns 0 on
345 *	success or a negative error number. This can be omitted on input-only
346 *	or output-only gpio chips.
347 * @get: returns value for signal "offset", 0=low, 1=high, or negative error
348 * @get_multiple: reads values for multiple signals defined by "mask" and
349 *	stores them in "bits", returns 0 on success or negative error
350 * @set: assigns output value for signal "offset", returns 0 on success or
351 *       negative error value
352 * @set_multiple: assigns output values for multiple signals defined by
353 *                "mask", returns 0 on success or negative error value
354 * @set_config: optional hook for all kinds of settings. Uses the same
355 *	packed config format as generic pinconf. Must return 0 on success and
356 *	a negative error number on failure.
357 * @to_irq: optional hook supporting non-static gpiod_to_irq() mappings;
358 *	implementation may not sleep
359 * @dbg_show: optional routine to show contents in debugfs; default code
360 *	will be used when this is omitted, but custom code can show extra
361 *	state (such as pullup/pulldown configuration).
362 * @init_valid_mask: optional routine to initialize @valid_mask, to be used if
363 *	not all GPIOs are valid.
364 * @add_pin_ranges: optional routine to initialize pin ranges, to be used when
365 *	requires special mapping of the pins that provides GPIO functionality.
366 *	It is called after adding GPIO chip and before adding IRQ chip.
367 * @en_hw_timestamp: Dependent on GPIO chip, an optional routine to
368 *	enable hardware timestamp.
369 * @dis_hw_timestamp: Dependent on GPIO chip, an optional routine to
370 *	disable hardware timestamp.
371 * @base: identifies the first GPIO number handled by this chip;
372 *	or, if negative during registration, requests dynamic ID allocation.
373 *	DEPRECATION: providing anything non-negative and nailing the base
374 *	offset of GPIO chips is deprecated. Please pass -1 as base to
375 *	let gpiolib select the chip base in all possible cases. We want to
376 *	get rid of the static GPIO number space in the long run.
377 * @ngpio: the number of GPIOs handled by this controller; the last GPIO
378 *	handled is (base + ngpio - 1).
379 * @offset: when multiple gpio chips belong to the same device this
380 *	can be used as offset within the device so friendly names can
381 *	be properly assigned.
382 * @names: if set, must be an array of strings to use as alternative
383 *      names for the GPIOs in this chip. Any entry in the array
384 *      may be NULL if there is no alias for the GPIO, however the
385 *      array must be @ngpio entries long.
386 * @can_sleep: flag must be set iff get()/set() methods sleep, as they
387 *	must while accessing GPIO expander chips over I2C or SPI. This
388 *	implies that if the chip supports IRQs, these IRQs need to be threaded
389 *	as the chip access may sleep when e.g. reading out the IRQ status
390 *	registers.
391 *
392 * A gpio_chip can help platforms abstract various sources of GPIOs so
393 * they can all be accessed through a common programming interface.
394 * Example sources would be SOC controllers, FPGAs, multifunction
395 * chips, dedicated GPIO expanders, and so on.
396 *
397 * Each chip controls a number of signals, identified in method calls
398 * by "offset" values in the range 0..(@ngpio - 1).  When those signals
399 * are referenced through calls like gpio_get_value(gpio), the offset
400 * is calculated by subtracting @base from the gpio number.
401 */
402struct gpio_chip {
403	const char		*label;
404	struct gpio_device	*gpiodev;
405	struct device		*parent;
406	struct fwnode_handle	*fwnode;
407	struct module		*owner;
408
409	int			(*request)(struct gpio_chip *gc,
410						unsigned int offset);
411	void			(*free)(struct gpio_chip *gc,
412						unsigned int offset);
413	int			(*get_direction)(struct gpio_chip *gc,
414						unsigned int offset);
415	int			(*direction_input)(struct gpio_chip *gc,
416						unsigned int offset);
417	int			(*direction_output)(struct gpio_chip *gc,
418						unsigned int offset, int value);
419	int			(*get)(struct gpio_chip *gc,
420						unsigned int offset);
421	int			(*get_multiple)(struct gpio_chip *gc,
422						unsigned long *mask,
423						unsigned long *bits);
424	int			(*set)(struct gpio_chip *gc,
425				       unsigned int offset, int value);
426	int			(*set_multiple)(struct gpio_chip *gc,
427						unsigned long *mask,
428						unsigned long *bits);
429	int			(*set_config)(struct gpio_chip *gc,
430					      unsigned int offset,
431					      unsigned long config);
432	int			(*to_irq)(struct gpio_chip *gc,
433						unsigned int offset);
434
435	void			(*dbg_show)(struct seq_file *s,
436						struct gpio_chip *gc);
437
438	int			(*init_valid_mask)(struct gpio_chip *gc,
439						   unsigned long *valid_mask,
440						   unsigned int ngpios);
441
442	int			(*add_pin_ranges)(struct gpio_chip *gc);
443
444	int			(*en_hw_timestamp)(struct gpio_chip *gc,
445						   u32 offset,
446						   unsigned long flags);
447	int			(*dis_hw_timestamp)(struct gpio_chip *gc,
448						    u32 offset,
449						    unsigned long flags);
450	int			base;
451	u16			ngpio;
452	u16			offset;
453	const char		*const *names;
454	bool			can_sleep;
455
456#ifdef CONFIG_GPIOLIB_IRQCHIP
457	/*
458	 * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
459	 * to handle IRQs for most practical cases.
460	 */
461
462	/**
463	 * @irq:
464	 *
465	 * Integrates interrupt chip functionality with the GPIO chip. Can be
466	 * used to handle IRQs for most practical cases.
467	 */
468	struct gpio_irq_chip irq;
469#endif /* CONFIG_GPIOLIB_IRQCHIP */
470
471#if defined(CONFIG_OF_GPIO)
472	/*
473	 * If CONFIG_OF_GPIO is enabled, then all GPIO controllers described in
474	 * the device tree automatically may have an OF translation
475	 */
476
477	/**
478	 * @of_gpio_n_cells:
479	 *
480	 * Number of cells used to form the GPIO specifier. The standard is 2
481	 * cells:
482	 *
483	 * gpios = <&gpio offset flags>;
484	 *
485	 * some complex GPIO controllers instantiate more than one chip per
486	 * device tree node and have 3 cells:
487	 *
488	 * gpios = <&gpio instance offset flags>;
489	 *
490	 * Legacy GPIO controllers may even have 1 cell:
491	 *
492	 * gpios = <&gpio offset>;
493	 */
494	unsigned int of_gpio_n_cells;
495
496	/**
497	 * @of_node_instance_match:
498	 *
499	 * Determine if a chip is the right instance. Must be implemented by
500	 * any driver using more than one gpio_chip per device tree node.
501	 * Returns true if gc is the instance indicated by i (which is the
502	 * first cell in the phandles for GPIO lines and gpio-ranges).
503	 */
504	bool (*of_node_instance_match)(struct gpio_chip *gc, unsigned int i);
505
506	/**
507	 * @of_xlate:
508	 *
509	 * Callback to translate a device tree GPIO specifier into a chip-
510	 * relative GPIO number and flags.
511	 */
512	int (*of_xlate)(struct gpio_chip *gc,
513			const struct of_phandle_args *gpiospec, u32 *flags);
514#endif /* CONFIG_OF_GPIO */
515};
516
517char *gpiochip_dup_line_label(struct gpio_chip *gc, unsigned int offset);
518
519
520struct _gpiochip_for_each_data {
521	const char **label;
522	unsigned int *i;
523};
524
525DEFINE_CLASS(_gpiochip_for_each_data,
526	     struct _gpiochip_for_each_data,
527	     if (*_T.label) kfree(*_T.label),
528	     ({
529		struct _gpiochip_for_each_data _data = { label, i };
530		*_data.i = 0;
531		_data;
532	     }),
533	     const char **label, int *i)
534
535/**
536 * for_each_hwgpio_in_range - Iterates over all GPIOs in a given range
537 * @_chip: Chip to iterate over.
538 * @_i: Loop counter.
539 * @_base: First GPIO in the ranger.
540 * @_size: Amount of GPIOs to check starting from @base.
541 * @_label: Place to store the address of the label if the GPIO is requested.
542 *          Set to NULL for unused GPIOs.
543 */
544#define for_each_hwgpio_in_range(_chip, _i, _base, _size, _label)			\
545	for (CLASS(_gpiochip_for_each_data, _data)(&_label, &_i);			\
546	     _i < _size;								\
547	     _i++, kfree(_label), _label = NULL)					\
548		for_each_if(!IS_ERR(_label = gpiochip_dup_line_label(_chip, _base + _i)))
549
550/**
551 * for_each_hwgpio - Iterates over all GPIOs for given chip.
552 * @_chip: Chip to iterate over.
553 * @_i: Loop counter.
554 * @_label: Place to store the address of the label if the GPIO is requested.
555 *          Set to NULL for unused GPIOs.
556 */
557#define for_each_hwgpio(_chip, _i, _label)						\
558	for_each_hwgpio_in_range(_chip, _i, 0, _chip->ngpio, _label)
559
560/**
561 * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range
562 * @_chip:	the chip to query
563 * @_i:		loop variable
564 * @_base:	first GPIO in the range
565 * @_size:	amount of GPIOs to check starting from @base
566 * @_label:	label of current GPIO
567 */
568#define for_each_requested_gpio_in_range(_chip, _i, _base, _size, _label)		\
569	for_each_hwgpio_in_range(_chip, _i, _base, _size, _label)			\
570		for_each_if(_label)
571
572/* Iterates over all requested GPIO of the given @chip */
573#define for_each_requested_gpio(chip, i, label)						\
574	for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label)
575
576/* add/remove chips */
577int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
578			       struct lock_class_key *lock_key,
579			       struct lock_class_key *request_key);
580
581/**
582 * gpiochip_add_data() - register a gpio_chip
583 * @gc: the chip to register, with gc->base initialized
584 * @data: driver-private data associated with this chip
585 *
586 * Context: potentially before irqs will work
587 *
588 * When gpiochip_add_data() is called very early during boot, so that GPIOs
589 * can be freely used, the gc->parent device must be registered before
590 * the gpio framework's arch_initcall().  Otherwise sysfs initialization
591 * for GPIOs will fail rudely.
592 *
593 * gpiochip_add_data() must only be called after gpiolib initialization,
594 * i.e. after core_initcall().
595 *
596 * If gc->base is negative, this requests dynamic assignment of
597 * a range of valid GPIOs.
598 *
599 * Returns:
600 * A negative errno if the chip can't be registered, such as because the
601 * gc->base is invalid or already associated with a different chip.
602 * Otherwise it returns zero as a success code.
603 */
604#ifdef CONFIG_LOCKDEP
605#define gpiochip_add_data(gc, data) ({		\
606		static struct lock_class_key lock_key;	\
607		static struct lock_class_key request_key;	  \
608		gpiochip_add_data_with_key(gc, data, &lock_key, \
609					   &request_key);	  \
610	})
611#define devm_gpiochip_add_data(dev, gc, data) ({ \
612		static struct lock_class_key lock_key;	\
613		static struct lock_class_key request_key;	  \
614		devm_gpiochip_add_data_with_key(dev, gc, data, &lock_key, \
615					   &request_key);	  \
616	})
617#else
618#define gpiochip_add_data(gc, data) gpiochip_add_data_with_key(gc, data, NULL, NULL)
619#define devm_gpiochip_add_data(dev, gc, data) \
620	devm_gpiochip_add_data_with_key(dev, gc, data, NULL, NULL)
621#endif /* CONFIG_LOCKDEP */
622
623void gpiochip_remove(struct gpio_chip *gc);
624int devm_gpiochip_add_data_with_key(struct device *dev, struct gpio_chip *gc,
625				    void *data, struct lock_class_key *lock_key,
626				    struct lock_class_key *request_key);
627
628struct gpio_device *gpio_device_find(const void *data,
629				int (*match)(struct gpio_chip *gc,
630					     const void *data));
631
632struct gpio_device *gpio_device_get(struct gpio_device *gdev);
633void gpio_device_put(struct gpio_device *gdev);
634
635DEFINE_FREE(gpio_device_put, struct gpio_device *,
636	    if (!IS_ERR_OR_NULL(_T)) gpio_device_put(_T))
637
638struct device *gpio_device_to_device(struct gpio_device *gdev);
639
640bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset);
641int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset);
642void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset);
643void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset);
644void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset);
645
646/* irq_data versions of the above */
647int gpiochip_irq_reqres(struct irq_data *data);
648void gpiochip_irq_relres(struct irq_data *data);
649
650/* Paste this in your irq_chip structure  */
651#define	GPIOCHIP_IRQ_RESOURCE_HELPERS					\
652		.irq_request_resources  = gpiochip_irq_reqres,		\
653		.irq_release_resources  = gpiochip_irq_relres
654
655static inline void gpio_irq_chip_set_chip(struct gpio_irq_chip *girq,
656					  const struct irq_chip *chip)
657{
658	/* Yes, dropping const is ugly, but it isn't like we have a choice */
659	girq->chip = (struct irq_chip *)chip;
660}
661
662/* Line status inquiry for drivers */
663bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset);
664bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset);
665
666/* Sleep persistence inquiry for drivers */
667bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset);
668bool gpiochip_line_is_valid(const struct gpio_chip *gc, unsigned int offset);
669const unsigned long *gpiochip_query_valid_mask(const struct gpio_chip *gc);
670
671/* get driver data */
672void *gpiochip_get_data(struct gpio_chip *gc);
673
674#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
675
676int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
677					    union gpio_irq_fwspec *gfwspec,
678					    unsigned int parent_hwirq,
679					    unsigned int parent_type);
680int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
681					     union gpio_irq_fwspec *gfwspec,
682					     unsigned int parent_hwirq,
683					     unsigned int parent_type);
684
685#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
686
687#ifdef CONFIG_GPIOLIB_IRQCHIP
688int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
689				struct irq_domain *domain);
690#else
691
692#include <asm/bug.h>
693
694static inline int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
695					      struct irq_domain *domain)
696{
697	WARN_ON(1);
698	return -EINVAL;
699}
700#endif
701
702int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset);
703void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset);
704int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
705			    unsigned long config);
706
707/**
708 * struct gpio_pin_range - pin range controlled by a gpio chip
709 * @node: list for maintaining set of pin ranges, used internally
710 * @pctldev: pinctrl device which handles corresponding pins
711 * @range: actual range of pins controlled by a gpio controller
712 */
713struct gpio_pin_range {
714	struct list_head node;
715	struct pinctrl_dev *pctldev;
716	struct pinctrl_gpio_range range;
717};
718
719#ifdef CONFIG_PINCTRL
720
721int gpiochip_add_pin_range_with_pins(struct gpio_chip *gc,
722				     const char *pinctl_name,
723				     unsigned int gpio_offset,
724				     unsigned int pin_offset,
725				     unsigned int const *pins,
726				     unsigned int npins);
727int gpiochip_add_pingroup_range(struct gpio_chip *gc,
728			struct pinctrl_dev *pctldev,
729			unsigned int gpio_offset, const char *pin_group);
730void gpiochip_remove_pin_ranges(struct gpio_chip *gc);
731
732static inline int
733gpiochip_add_pin_range(struct gpio_chip *gc,
734		       const char *pinctl_name,
735		       unsigned int gpio_offset,
736		       unsigned int pin_offset,
737		       unsigned int npins)
738{
739	return gpiochip_add_pin_range_with_pins(gc, pinctl_name, gpio_offset,
740						pin_offset, NULL, npins);
741}
742
743static inline int
744gpiochip_add_sparse_pin_range(struct gpio_chip *gc,
745			      const char *pinctl_name,
746			      unsigned int gpio_offset,
747			      unsigned int const *pins,
748			      unsigned int npins)
749{
750	return gpiochip_add_pin_range_with_pins(gc, pinctl_name, gpio_offset, 0,
751						pins, npins);
752}
753#else /* ! CONFIG_PINCTRL */
754
755static inline int
756gpiochip_add_pin_range_with_pins(struct gpio_chip *gc,
757				 const char *pinctl_name,
758				 unsigned int gpio_offset,
759				 unsigned int pin_offset,
760				 unsigned int npins)
761{
762	return 0;
763}
764
765static inline int
766gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
767		       unsigned int gpio_offset, unsigned int pin_offset,
768		       unsigned int npins)
769{
770	return 0;
771}
772
773static inline int
774gpiochip_add_sparse_pin_range(struct gpio_chip *gc,
775			      const char *pinctl_name,
776			      unsigned int gpio_offset,
777			      unsigned int const *pins,
778			      unsigned int npins)
779{
780	return 0;
781}
782
783static inline int
784gpiochip_add_pingroup_range(struct gpio_chip *gc,
785			struct pinctrl_dev *pctldev,
786			unsigned int gpio_offset, const char *pin_group)
787{
788	return 0;
789}
790
791static inline void
792gpiochip_remove_pin_ranges(struct gpio_chip *gc)
793{
794}
795
796#endif /* CONFIG_PINCTRL */
797
798struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
799					    unsigned int hwnum,
800					    const char *label,
801					    enum gpio_lookup_flags lflags,
802					    enum gpiod_flags dflags);
803void gpiochip_free_own_desc(struct gpio_desc *desc);
804
805struct gpio_desc *
806gpio_device_get_desc(struct gpio_device *gdev, unsigned int hwnum);
807
808struct gpio_chip *gpio_device_get_chip(struct gpio_device *gdev);
809
810#ifdef CONFIG_GPIOLIB
811
812/* lock/unlock as IRQ */
813int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset);
814void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset);
815
816struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
817struct gpio_device *gpiod_to_gpio_device(struct gpio_desc *desc);
818
819/* struct gpio_device getters */
820int gpio_device_get_base(struct gpio_device *gdev);
821const char *gpio_device_get_label(struct gpio_device *gdev);
822
823struct gpio_device *gpio_device_find_by_label(const char *label);
824struct gpio_device *gpio_device_find_by_fwnode(const struct fwnode_handle *fwnode);
825
826#else /* CONFIG_GPIOLIB */
827
828#include <asm/bug.h>
829
830static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
831{
832	/* GPIO can never have been requested */
833	WARN_ON(1);
834	return ERR_PTR(-ENODEV);
835}
836
837static inline struct gpio_device *gpiod_to_gpio_device(struct gpio_desc *desc)
838{
839	WARN_ON(1);
840	return ERR_PTR(-ENODEV);
841}
842
843static inline int gpio_device_get_base(struct gpio_device *gdev)
844{
845	WARN_ON(1);
846	return -ENODEV;
847}
848
849static inline const char *gpio_device_get_label(struct gpio_device *gdev)
850{
851	WARN_ON(1);
852	return NULL;
853}
854
855static inline struct gpio_device *gpio_device_find_by_label(const char *label)
856{
857	WARN_ON(1);
858	return NULL;
859}
860
861static inline struct gpio_device *gpio_device_find_by_fwnode(const struct fwnode_handle *fwnode)
862{
863	WARN_ON(1);
864	return NULL;
865}
866
867static inline int gpiochip_lock_as_irq(struct gpio_chip *gc,
868				       unsigned int offset)
869{
870	WARN_ON(1);
871	return -EINVAL;
872}
873
874static inline void gpiochip_unlock_as_irq(struct gpio_chip *gc,
875					  unsigned int offset)
876{
877	WARN_ON(1);
878}
879#endif /* CONFIG_GPIOLIB */
880
881#define for_each_gpiochip_node(dev, child)					\
882	device_for_each_child_node(dev, child)					\
883		for_each_if(fwnode_property_present(child, "gpio-controller"))
884
885static inline unsigned int gpiochip_node_count(struct device *dev)
886{
887	struct fwnode_handle *child;
888	unsigned int count = 0;
889
890	for_each_gpiochip_node(dev, child)
891		count++;
892
893	return count;
894}
895
896static inline struct fwnode_handle *gpiochip_node_get_first(struct device *dev)
897{
898	struct fwnode_handle *fwnode;
899
900	for_each_gpiochip_node(dev, fwnode)
901		return fwnode;
902
903	return NULL;
904}
905
906#endif /* __LINUX_GPIO_DRIVER_H */