imx-dma.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
  4 */
  5
  6#ifndef __LINUX_DMA_IMX_H
  7#define __LINUX_DMA_IMX_H
  8
  9#include <linux/scatterlist.h>
 10#include <linux/device.h>
 11#include <linux/dmaengine.h>
 12
 13/*
 14 * This enumerates peripheral types. Used for SDMA.
 15 */
 16enum sdma_peripheral_type {
 17	IMX_DMATYPE_SSI,	/* MCU domain SSI */
 18	IMX_DMATYPE_SSI_SP,	/* Shared SSI */
 19	IMX_DMATYPE_MMC,	/* MMC */
 20	IMX_DMATYPE_SDHC,	/* SDHC */
 21	IMX_DMATYPE_UART,	/* MCU domain UART */
 22	IMX_DMATYPE_UART_SP,	/* Shared UART */
 23	IMX_DMATYPE_FIRI,	/* FIRI */
 24	IMX_DMATYPE_CSPI,	/* MCU domain CSPI */
 25	IMX_DMATYPE_CSPI_SP,	/* Shared CSPI */
 26	IMX_DMATYPE_SIM,	/* SIM */
 27	IMX_DMATYPE_ATA,	/* ATA */
 28	IMX_DMATYPE_CCM,	/* CCM */
 29	IMX_DMATYPE_EXT,	/* External peripheral */
 30	IMX_DMATYPE_MSHC,	/* Memory Stick Host Controller */
 31	IMX_DMATYPE_MSHC_SP,	/* Shared Memory Stick Host Controller */
 32	IMX_DMATYPE_DSP,	/* DSP */
 33	IMX_DMATYPE_MEMORY,	/* Memory */
 34	IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */
 35	IMX_DMATYPE_SPDIF,	/* SPDIF */
 36	IMX_DMATYPE_IPU_MEMORY,	/* IPU Memory */
 37	IMX_DMATYPE_ASRC,	/* ASRC */
 38	IMX_DMATYPE_ESAI,	/* ESAI */
 39	IMX_DMATYPE_SSI_DUAL,	/* SSI Dual FIFO */
 40	IMX_DMATYPE_ASRC_SP,	/* Shared ASRC */
 41	IMX_DMATYPE_SAI,	/* SAI */
 42	IMX_DMATYPE_MULTI_SAI,	/* MULTI FIFOs For Audio */
 43	IMX_DMATYPE_HDMI,       /* HDMI Audio */
 44	IMX_DMATYPE_I2C,	/* I2C */
 45};
 46
 47enum imx_dma_prio {
 48	DMA_PRIO_HIGH = 0,
 49	DMA_PRIO_MEDIUM = 1,
 50	DMA_PRIO_LOW = 2
 51};
 52
 53struct imx_dma_data {
 54	int dma_request; /* DMA request line */
 55	int dma_request2; /* secondary DMA request line */
 56	enum sdma_peripheral_type peripheral_type;
 57	int priority;
 58};
 59
 60static inline int imx_dma_is_ipu(struct dma_chan *chan)
 61{
 62	return !strcmp(dev_name(chan->device->dev), "ipu-core");
 63}
 64
 65static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
 66{
 67	return !strcmp(chan->device->dev->driver->name, "imx-sdma") ||
 68		!strcmp(chan->device->dev->driver->name, "imx-dma");
 69}
 70
 71/**
 72 * struct sdma_peripheral_config - SDMA config for audio
 73 * @n_fifos_src: Number of FIFOs for recording
 74 * @n_fifos_dst: Number of FIFOs for playback
 75 * @stride_fifos_src: FIFO address stride for recording, 0 means all FIFOs are
 76 *                    continuous, 1 means 1 word stride between FIFOs. All stride
 77 *                    between FIFOs should be same.
 78 * @stride_fifos_dst: FIFO address stride for playback
 79 * @words_per_fifo: numbers of words per FIFO fetch/fill, 1 means
 80 *                  one channel per FIFO, 2 means 2 channels per FIFO..
 81 *                  If 'n_fifos_src =  4' and 'words_per_fifo = 2', it
 82 *                  means the first two words(channels) fetch from FIFO0
 83 *                  and then jump to FIFO1 for next two words, and so on
 84 *                  after the last FIFO3 fetched, roll back to FIFO0.
 85 * @sw_done: Use software done. Needed for PDM (micfil)
 86 *
 87 * Some i.MX Audio devices (SAI, micfil) have multiple successive FIFO
 88 * registers. For multichannel recording/playback the SAI/micfil have
 89 * one FIFO register per channel and the SDMA engine has to read/write
 90 * the next channel from/to the next register and wrap around to the
 91 * first register when all channels are handled. The number of active
 92 * channels must be communicated to the SDMA engine using this struct.
 93 */
 94struct sdma_peripheral_config {
 95	int n_fifos_src;
 96	int n_fifos_dst;
 97	int stride_fifos_src;
 98	int stride_fifos_dst;
 99	int words_per_fifo;
100	bool sw_done;
101};
102
103#endif /* __LINUX_DMA_IMX_H */