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dma-mapping.h

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linux-6.19.14/include/linux/dma-mapping.h C
  1/* SPDX-License-Identifier: GPL-2.0 */
  2#ifndef _LINUX_DMA_MAPPING_H
  3#define _LINUX_DMA_MAPPING_H
  4
  5#include <linux/device.h>
  6#include <linux/err.h>
  7#include <linux/dma-direction.h>
  8#include <linux/scatterlist.h>
  9#include <linux/bug.h>
 10
 11/**
 12 * List of possible attributes associated with a DMA mapping. The semantics
 13 * of each attribute should be defined in Documentation/core-api/dma-attributes.rst.
 14 */
 15
 16/*
 17 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
 18 * may be weakly ordered, that is that reads and writes may pass each other.
 19 */
 20#define DMA_ATTR_WEAK_ORDERING		(1UL << 1)
 21/*
 22 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
 23 * buffered to improve performance.
 24 */
 25#define DMA_ATTR_WRITE_COMBINE		(1UL << 2)
 26/*
 27 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
 28 * virtual mapping for the allocated buffer.
 29 */
 30#define DMA_ATTR_NO_KERNEL_MAPPING	(1UL << 4)
 31/*
 32 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
 33 * the CPU cache for the given buffer assuming that it has been already
 34 * transferred to 'device' domain.
 35 */
 36#define DMA_ATTR_SKIP_CPU_SYNC		(1UL << 5)
 37/*
 38 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
 39 * in physical memory.
 40 */
 41#define DMA_ATTR_FORCE_CONTIGUOUS	(1UL << 6)
 42/*
 43 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
 44 * that it's probably not worth the time to try to allocate memory to in a way
 45 * that gives better TLB efficiency.
 46 */
 47#define DMA_ATTR_ALLOC_SINGLE_PAGES	(1UL << 7)
 48/*
 49 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
 50 * allocation failure reports (similarly to __GFP_NOWARN).
 51 */
 52#define DMA_ATTR_NO_WARN	(1UL << 8)
 53
 54/*
 55 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
 56 * accessible at an elevated privilege level (and ideally inaccessible or
 57 * at least read-only at lesser-privileged levels).
 58 */
 59#define DMA_ATTR_PRIVILEGED		(1UL << 9)
 60
 61/*
 62 * DMA_ATTR_MMIO - Indicates memory-mapped I/O (MMIO) region for DMA mapping
 63 *
 64 * This attribute indicates the physical address is not normal system
 65 * memory. It may not be used with kmap*()/phys_to_virt()/phys_to_page()
 66 * functions, it may not be cacheable, and access using CPU load/store
 67 * instructions may not be allowed.
 68 *
 69 * Usually this will be used to describe MMIO addresses, or other non-cacheable
 70 * register addresses. When DMA mapping this sort of address we call
 71 * the operation Peer to Peer as a one device is DMA'ing to another device.
 72 * For PCI devices the p2pdma APIs must be used to determine if DMA_ATTR_MMIO
 73 * is appropriate.
 74 *
 75 * For architectures that require cache flushing for DMA coherence
 76 * DMA_ATTR_MMIO will not perform any cache flushing. The address
 77 * provided must never be mapped cacheable into the CPU.
 78 */
 79#define DMA_ATTR_MMIO		(1UL << 10)
 80
 81/*
 82 * DMA_ATTR_CPU_CACHE_CLEAN: Indicates the CPU will not dirty any cacheline
 83 * overlapping this buffer while it is mapped for DMA. All mappings sharing
 84 * a cacheline must have this attribute for this to be considered safe.
 85 */
 86#define DMA_ATTR_CPU_CACHE_CLEAN	(1UL << 11)
 87
 88/*
 89 * A dma_addr_t can hold any valid DMA or bus address for the platform.  It can
 90 * be given to a device to use as a DMA source or target.  It is specific to a
 91 * given device and there may be a translation between the CPU physical address
 92 * space and the bus address space.
 93 *
 94 * DMA_MAPPING_ERROR is the magic error code if a mapping failed.  It should not
 95 * be used directly in drivers, but checked for using dma_mapping_error()
 96 * instead.
 97 */
 98#define DMA_MAPPING_ERROR		(~(dma_addr_t)0)
 99
100#define DMA_BIT_MASK(n)	GENMASK_ULL((n) - 1, 0)
101
102struct dma_iova_state {
103	dma_addr_t addr;
104	u64 __size;
105};
106
107/*
108 * Use the high bit to mark if we used swiotlb for one or more ranges.
109 */
110#define DMA_IOVA_USE_SWIOTLB		(1ULL << 63)
111
112static inline size_t dma_iova_size(struct dma_iova_state *state)
113{
114	/* Casting is needed for 32-bits systems */
115	return (size_t)(state->__size & ~DMA_IOVA_USE_SWIOTLB);
116}
117
118#ifdef CONFIG_DMA_API_DEBUG
119void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr);
120void debug_dma_map_single(struct device *dev, const void *addr,
121		unsigned long len);
122#else
123static inline void debug_dma_mapping_error(struct device *dev,
124		dma_addr_t dma_addr)
125{
126}
127static inline void debug_dma_map_single(struct device *dev, const void *addr,
128		unsigned long len)
129{
130}
131#endif /* CONFIG_DMA_API_DEBUG */
132
133#ifdef CONFIG_HAS_DMA
134static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
135{
136	debug_dma_mapping_error(dev, dma_addr);
137
138	if (unlikely(dma_addr == DMA_MAPPING_ERROR))
139		return -ENOMEM;
140	return 0;
141}
142
143dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page,
144		size_t offset, size_t size, enum dma_data_direction dir,
145		unsigned long attrs);
146void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size,
147		enum dma_data_direction dir, unsigned long attrs);
148dma_addr_t dma_map_phys(struct device *dev, phys_addr_t phys, size_t size,
149		enum dma_data_direction dir, unsigned long attrs);
150void dma_unmap_phys(struct device *dev, dma_addr_t addr, size_t size,
151		enum dma_data_direction dir, unsigned long attrs);
152unsigned int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
153		int nents, enum dma_data_direction dir, unsigned long attrs);
154void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
155				      int nents, enum dma_data_direction dir,
156				      unsigned long attrs);
157int dma_map_sgtable(struct device *dev, struct sg_table *sgt,
158		enum dma_data_direction dir, unsigned long attrs);
159dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr,
160		size_t size, enum dma_data_direction dir, unsigned long attrs);
161void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size,
162		enum dma_data_direction dir, unsigned long attrs);
163void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
164		gfp_t flag, unsigned long attrs);
165void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
166		dma_addr_t dma_handle, unsigned long attrs);
167void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
168		gfp_t gfp, unsigned long attrs);
169void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
170		dma_addr_t dma_handle);
171int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
172		void *cpu_addr, dma_addr_t dma_addr, size_t size,
173		unsigned long attrs);
174int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
175		void *cpu_addr, dma_addr_t dma_addr, size_t size,
176		unsigned long attrs);
177bool dma_can_mmap(struct device *dev);
178bool dma_pci_p2pdma_supported(struct device *dev);
179int dma_set_mask(struct device *dev, u64 mask);
180int dma_set_coherent_mask(struct device *dev, u64 mask);
181u64 dma_get_required_mask(struct device *dev);
182bool dma_addressing_limited(struct device *dev);
183size_t dma_max_mapping_size(struct device *dev);
184size_t dma_opt_mapping_size(struct device *dev);
185unsigned long dma_get_merge_boundary(struct device *dev);
186struct sg_table *dma_alloc_noncontiguous(struct device *dev, size_t size,
187		enum dma_data_direction dir, gfp_t gfp, unsigned long attrs);
188void dma_free_noncontiguous(struct device *dev, size_t size,
189		struct sg_table *sgt, enum dma_data_direction dir);
190void *dma_vmap_noncontiguous(struct device *dev, size_t size,
191		struct sg_table *sgt);
192void dma_vunmap_noncontiguous(struct device *dev, void *vaddr);
193int dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma,
194		size_t size, struct sg_table *sgt);
195#else /* CONFIG_HAS_DMA */
196static inline dma_addr_t dma_map_page_attrs(struct device *dev,
197		struct page *page, size_t offset, size_t size,
198		enum dma_data_direction dir, unsigned long attrs)
199{
200	return DMA_MAPPING_ERROR;
201}
202static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
203		size_t size, enum dma_data_direction dir, unsigned long attrs)
204{
205}
206static inline dma_addr_t dma_map_phys(struct device *dev, phys_addr_t phys,
207		size_t size, enum dma_data_direction dir, unsigned long attrs)
208{
209	return DMA_MAPPING_ERROR;
210}
211static inline void dma_unmap_phys(struct device *dev, dma_addr_t addr,
212		size_t size, enum dma_data_direction dir, unsigned long attrs)
213{
214}
215static inline unsigned int dma_map_sg_attrs(struct device *dev,
216		struct scatterlist *sg, int nents, enum dma_data_direction dir,
217		unsigned long attrs)
218{
219	return 0;
220}
221static inline void dma_unmap_sg_attrs(struct device *dev,
222		struct scatterlist *sg, int nents, enum dma_data_direction dir,
223		unsigned long attrs)
224{
225}
226static inline int dma_map_sgtable(struct device *dev, struct sg_table *sgt,
227		enum dma_data_direction dir, unsigned long attrs)
228{
229	return -EOPNOTSUPP;
230}
231static inline dma_addr_t dma_map_resource(struct device *dev,
232		phys_addr_t phys_addr, size_t size, enum dma_data_direction dir,
233		unsigned long attrs)
234{
235	return DMA_MAPPING_ERROR;
236}
237static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
238		size_t size, enum dma_data_direction dir, unsigned long attrs)
239{
240}
241static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
242{
243	return -ENOMEM;
244}
245static inline void *dma_alloc_attrs(struct device *dev, size_t size,
246		dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
247{
248	return NULL;
249}
250static inline void dma_free_attrs(struct device *dev, size_t size,
251		void *cpu_addr, dma_addr_t dma_handle, unsigned long attrs)
252{
253}
254static inline void *dmam_alloc_attrs(struct device *dev, size_t size,
255		dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
256{
257	return NULL;
258}
259static inline void dmam_free_coherent(struct device *dev, size_t size,
260		void *vaddr, dma_addr_t dma_handle)
261{
262}
263static inline int dma_get_sgtable_attrs(struct device *dev,
264		struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr,
265		size_t size, unsigned long attrs)
266{
267	return -ENXIO;
268}
269static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
270		void *cpu_addr, dma_addr_t dma_addr, size_t size,
271		unsigned long attrs)
272{
273	return -ENXIO;
274}
275static inline bool dma_can_mmap(struct device *dev)
276{
277	return false;
278}
279static inline bool dma_pci_p2pdma_supported(struct device *dev)
280{
281	return false;
282}
283static inline int dma_set_mask(struct device *dev, u64 mask)
284{
285	return -EIO;
286}
287static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
288{
289	return -EIO;
290}
291static inline u64 dma_get_required_mask(struct device *dev)
292{
293	return 0;
294}
295static inline bool dma_addressing_limited(struct device *dev)
296{
297	return false;
298}
299static inline size_t dma_max_mapping_size(struct device *dev)
300{
301	return 0;
302}
303static inline size_t dma_opt_mapping_size(struct device *dev)
304{
305	return 0;
306}
307static inline unsigned long dma_get_merge_boundary(struct device *dev)
308{
309	return 0;
310}
311static inline struct sg_table *dma_alloc_noncontiguous(struct device *dev,
312		size_t size, enum dma_data_direction dir, gfp_t gfp,
313		unsigned long attrs)
314{
315	return NULL;
316}
317static inline void dma_free_noncontiguous(struct device *dev, size_t size,
318		struct sg_table *sgt, enum dma_data_direction dir)
319{
320}
321static inline void *dma_vmap_noncontiguous(struct device *dev, size_t size,
322		struct sg_table *sgt)
323{
324	return NULL;
325}
326static inline void dma_vunmap_noncontiguous(struct device *dev, void *vaddr)
327{
328}
329static inline int dma_mmap_noncontiguous(struct device *dev,
330		struct vm_area_struct *vma, size_t size, struct sg_table *sgt)
331{
332	return -EINVAL;
333}
334#endif /* CONFIG_HAS_DMA */
335
336#ifdef CONFIG_IOMMU_DMA
337/**
338 * dma_use_iova - check if the IOVA API is used for this state
339 * @state: IOVA state
340 *
341 * Return %true if the DMA transfers uses the dma_iova_*() calls or %false if
342 * they can't be used.
343 */
344static inline bool dma_use_iova(struct dma_iova_state *state)
345{
346	return state->__size != 0;
347}
348
349bool dma_iova_try_alloc(struct device *dev, struct dma_iova_state *state,
350		phys_addr_t phys, size_t size);
351void dma_iova_free(struct device *dev, struct dma_iova_state *state);
352void dma_iova_destroy(struct device *dev, struct dma_iova_state *state,
353		size_t mapped_len, enum dma_data_direction dir,
354		unsigned long attrs);
355int dma_iova_sync(struct device *dev, struct dma_iova_state *state,
356		size_t offset, size_t size);
357int dma_iova_link(struct device *dev, struct dma_iova_state *state,
358		phys_addr_t phys, size_t offset, size_t size,
359		enum dma_data_direction dir, unsigned long attrs);
360void dma_iova_unlink(struct device *dev, struct dma_iova_state *state,
361		size_t offset, size_t size, enum dma_data_direction dir,
362		unsigned long attrs);
363#else /* CONFIG_IOMMU_DMA */
364static inline bool dma_use_iova(struct dma_iova_state *state)
365{
366	return false;
367}
368static inline bool dma_iova_try_alloc(struct device *dev,
369		struct dma_iova_state *state, phys_addr_t phys, size_t size)
370{
371	return false;
372}
373static inline void dma_iova_free(struct device *dev,
374		struct dma_iova_state *state)
375{
376}
377static inline void dma_iova_destroy(struct device *dev,
378		struct dma_iova_state *state, size_t mapped_len,
379		enum dma_data_direction dir, unsigned long attrs)
380{
381}
382static inline int dma_iova_sync(struct device *dev,
383		struct dma_iova_state *state, size_t offset, size_t size)
384{
385	return -EOPNOTSUPP;
386}
387static inline int dma_iova_link(struct device *dev,
388		struct dma_iova_state *state, phys_addr_t phys, size_t offset,
389		size_t size, enum dma_data_direction dir, unsigned long attrs)
390{
391	return -EOPNOTSUPP;
392}
393static inline void dma_iova_unlink(struct device *dev,
394		struct dma_iova_state *state, size_t offset, size_t size,
395		enum dma_data_direction dir, unsigned long attrs)
396{
397}
398#endif /* CONFIG_IOMMU_DMA */
399
400#if defined(CONFIG_HAS_DMA) && defined(CONFIG_DMA_NEED_SYNC)
401void __dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size,
402		enum dma_data_direction dir);
403void __dma_sync_single_for_device(struct device *dev, dma_addr_t addr,
404		size_t size, enum dma_data_direction dir);
405void __dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
406		int nelems, enum dma_data_direction dir);
407void __dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
408		int nelems, enum dma_data_direction dir);
409bool __dma_need_sync(struct device *dev, dma_addr_t dma_addr);
410
411static inline bool dma_dev_need_sync(const struct device *dev)
412{
413	/* Always call DMA sync operations when debugging is enabled */
414	return !dev->dma_skip_sync || IS_ENABLED(CONFIG_DMA_API_DEBUG);
415}
416
417static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
418		size_t size, enum dma_data_direction dir)
419{
420	if (dma_dev_need_sync(dev))
421		__dma_sync_single_for_cpu(dev, addr, size, dir);
422}
423
424static inline void dma_sync_single_for_device(struct device *dev,
425		dma_addr_t addr, size_t size, enum dma_data_direction dir)
426{
427	if (dma_dev_need_sync(dev))
428		__dma_sync_single_for_device(dev, addr, size, dir);
429}
430
431static inline void dma_sync_sg_for_cpu(struct device *dev,
432		struct scatterlist *sg, int nelems, enum dma_data_direction dir)
433{
434	if (dma_dev_need_sync(dev))
435		__dma_sync_sg_for_cpu(dev, sg, nelems, dir);
436}
437
438static inline void dma_sync_sg_for_device(struct device *dev,
439		struct scatterlist *sg, int nelems, enum dma_data_direction dir)
440{
441	if (dma_dev_need_sync(dev))
442		__dma_sync_sg_for_device(dev, sg, nelems, dir);
443}
444
445static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr)
446{
447	return dma_dev_need_sync(dev) ? __dma_need_sync(dev, dma_addr) : false;
448}
449bool dma_need_unmap(struct device *dev);
450#else /* !CONFIG_HAS_DMA || !CONFIG_DMA_NEED_SYNC */
451static inline bool dma_dev_need_sync(const struct device *dev)
452{
453	return false;
454}
455static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
456		size_t size, enum dma_data_direction dir)
457{
458}
459static inline void dma_sync_single_for_device(struct device *dev,
460		dma_addr_t addr, size_t size, enum dma_data_direction dir)
461{
462}
463static inline void dma_sync_sg_for_cpu(struct device *dev,
464		struct scatterlist *sg, int nelems, enum dma_data_direction dir)
465{
466}
467static inline void dma_sync_sg_for_device(struct device *dev,
468		struct scatterlist *sg, int nelems, enum dma_data_direction dir)
469{
470}
471static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr)
472{
473	return false;
474}
475static inline bool dma_need_unmap(struct device *dev)
476{
477	return false;
478}
479#endif /* !CONFIG_HAS_DMA || !CONFIG_DMA_NEED_SYNC */
480
481struct page *dma_alloc_pages(struct device *dev, size_t size,
482		dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
483void dma_free_pages(struct device *dev, size_t size, struct page *page,
484		dma_addr_t dma_handle, enum dma_data_direction dir);
485int dma_mmap_pages(struct device *dev, struct vm_area_struct *vma,
486		size_t size, struct page *page);
487
488static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
489		dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
490{
491	struct page *page = dma_alloc_pages(dev, size, dma_handle, dir, gfp);
492	return page ? page_address(page) : NULL;
493}
494
495static inline void dma_free_noncoherent(struct device *dev, size_t size,
496		void *vaddr, dma_addr_t dma_handle, enum dma_data_direction dir)
497{
498	dma_free_pages(dev, size, virt_to_page(vaddr), dma_handle, dir);
499}
500
501static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
502		size_t size, enum dma_data_direction dir, unsigned long attrs)
503{
504	/* DMA must never operate on areas that might be remapped. */
505	if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr),
506			  "rejecting DMA map of vmalloc memory\n"))
507		return DMA_MAPPING_ERROR;
508	debug_dma_map_single(dev, ptr, size);
509	return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr),
510			size, dir, attrs);
511}
512
513static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
514		size_t size, enum dma_data_direction dir, unsigned long attrs)
515{
516	return dma_unmap_page_attrs(dev, addr, size, dir, attrs);
517}
518
519static inline void dma_sync_single_range_for_cpu(struct device *dev,
520		dma_addr_t addr, unsigned long offset, size_t size,
521		enum dma_data_direction dir)
522{
523	return dma_sync_single_for_cpu(dev, addr + offset, size, dir);
524}
525
526static inline void dma_sync_single_range_for_device(struct device *dev,
527		dma_addr_t addr, unsigned long offset, size_t size,
528		enum dma_data_direction dir)
529{
530	return dma_sync_single_for_device(dev, addr + offset, size, dir);
531}
532
533/**
534 * dma_unmap_sgtable - Unmap the given buffer for DMA
535 * @dev:	The device for which to perform the DMA operation
536 * @sgt:	The sg_table object describing the buffer
537 * @dir:	DMA direction
538 * @attrs:	Optional DMA attributes for the unmap operation
539 *
540 * Unmaps a buffer described by a scatterlist stored in the given sg_table
541 * object for the @dir DMA operation by the @dev device. After this function
542 * the ownership of the buffer is transferred back to the CPU domain.
543 */
544static inline void dma_unmap_sgtable(struct device *dev, struct sg_table *sgt,
545		enum dma_data_direction dir, unsigned long attrs)
546{
547	dma_unmap_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs);
548}
549
550/**
551 * dma_sync_sgtable_for_cpu - Synchronize the given buffer for CPU access
552 * @dev:	The device for which to perform the DMA operation
553 * @sgt:	The sg_table object describing the buffer
554 * @dir:	DMA direction
555 *
556 * Performs the needed cache synchronization and moves the ownership of the
557 * buffer back to the CPU domain, so it is safe to perform any access to it
558 * by the CPU. Before doing any further DMA operations, one has to transfer
559 * the ownership of the buffer back to the DMA domain by calling the
560 * dma_sync_sgtable_for_device().
561 */
562static inline void dma_sync_sgtable_for_cpu(struct device *dev,
563		struct sg_table *sgt, enum dma_data_direction dir)
564{
565	dma_sync_sg_for_cpu(dev, sgt->sgl, sgt->orig_nents, dir);
566}
567
568/**
569 * dma_sync_sgtable_for_device - Synchronize the given buffer for DMA
570 * @dev:	The device for which to perform the DMA operation
571 * @sgt:	The sg_table object describing the buffer
572 * @dir:	DMA direction
573 *
574 * Performs the needed cache synchronization and moves the ownership of the
575 * buffer back to the DMA domain, so it is safe to perform the DMA operation.
576 * Once finished, one has to call dma_sync_sgtable_for_cpu() or
577 * dma_unmap_sgtable().
578 */
579static inline void dma_sync_sgtable_for_device(struct device *dev,
580		struct sg_table *sgt, enum dma_data_direction dir)
581{
582	dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir);
583}
584
585#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
586#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
587#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
588#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
589#define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
590#define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
591#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
592#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
593
594bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size);
595
596static inline void *dma_alloc_coherent(struct device *dev, size_t size,
597		dma_addr_t *dma_handle, gfp_t gfp)
598{
599	return dma_alloc_attrs(dev, size, dma_handle, gfp,
600			(gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
601}
602
603static inline void dma_free_coherent(struct device *dev, size_t size,
604		void *cpu_addr, dma_addr_t dma_handle)
605{
606	return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
607}
608
609
610static inline u64 dma_get_mask(struct device *dev)
611{
612	if (dev->dma_mask && *dev->dma_mask)
613		return *dev->dma_mask;
614	return DMA_BIT_MASK(32);
615}
616
617/*
618 * Set both the DMA mask and the coherent DMA mask to the same thing.
619 * Note that we don't check the return value from dma_set_coherent_mask()
620 * as the DMA API guarantees that the coherent DMA mask can be set to
621 * the same or smaller than the streaming DMA mask.
622 */
623static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
624{
625	int rc = dma_set_mask(dev, mask);
626	if (rc == 0)
627		dma_set_coherent_mask(dev, mask);
628	return rc;
629}
630
631/*
632 * Similar to the above, except it deals with the case where the device
633 * does not have dev->dma_mask appropriately setup.
634 */
635static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
636{
637	dev->dma_mask = &dev->coherent_dma_mask;
638	return dma_set_mask_and_coherent(dev, mask);
639}
640
641static inline unsigned int dma_get_max_seg_size(struct device *dev)
642{
643	if (dev->dma_parms && dev->dma_parms->max_segment_size)
644		return dev->dma_parms->max_segment_size;
645	return SZ_64K;
646}
647
648static inline void dma_set_max_seg_size(struct device *dev, unsigned int size)
649{
650	if (WARN_ON_ONCE(!dev->dma_parms))
651		return;
652	dev->dma_parms->max_segment_size = size;
653}
654
655static inline unsigned long dma_get_seg_boundary(struct device *dev)
656{
657	if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
658		return dev->dma_parms->segment_boundary_mask;
659	return ULONG_MAX;
660}
661
662/**
663 * dma_get_seg_boundary_nr_pages - return the segment boundary in "page" units
664 * @dev: device to guery the boundary for
665 * @page_shift: ilog() of the IOMMU page size
666 *
667 * Return the segment boundary in IOMMU page units (which may be different from
668 * the CPU page size) for the passed in device.
669 *
670 * If @dev is NULL a boundary of U32_MAX is assumed, this case is just for
671 * non-DMA API callers.
672 */
673static inline unsigned long dma_get_seg_boundary_nr_pages(struct device *dev,
674		unsigned int page_shift)
675{
676	if (!dev)
677		return (U32_MAX >> page_shift) + 1;
678	return (dma_get_seg_boundary(dev) >> page_shift) + 1;
679}
680
681static inline void dma_set_seg_boundary(struct device *dev, unsigned long mask)
682{
683	if (WARN_ON_ONCE(!dev->dma_parms))
684		return;
685	dev->dma_parms->segment_boundary_mask = mask;
686}
687
688static inline unsigned int dma_get_min_align_mask(struct device *dev)
689{
690	if (dev->dma_parms)
691		return dev->dma_parms->min_align_mask;
692	return 0;
693}
694
695static inline void dma_set_min_align_mask(struct device *dev,
696		unsigned int min_align_mask)
697{
698	if (WARN_ON_ONCE(!dev->dma_parms))
699		return;
700	dev->dma_parms->min_align_mask = min_align_mask;
701}
702
703#ifndef dma_get_cache_alignment
704static inline int dma_get_cache_alignment(void)
705{
706#ifdef ARCH_HAS_DMA_MINALIGN
707	return ARCH_DMA_MINALIGN;
708#endif
709	return 1;
710}
711#endif
712
713static inline void *dmam_alloc_coherent(struct device *dev, size_t size,
714		dma_addr_t *dma_handle, gfp_t gfp)
715{
716	return dmam_alloc_attrs(dev, size, dma_handle, gfp,
717			(gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
718}
719
720static inline void *dma_alloc_wc(struct device *dev, size_t size,
721				 dma_addr_t *dma_addr, gfp_t gfp)
722{
723	unsigned long attrs = DMA_ATTR_WRITE_COMBINE;
724
725	if (gfp & __GFP_NOWARN)
726		attrs |= DMA_ATTR_NO_WARN;
727
728	return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs);
729}
730
731static inline void dma_free_wc(struct device *dev, size_t size,
732			       void *cpu_addr, dma_addr_t dma_addr)
733{
734	return dma_free_attrs(dev, size, cpu_addr, dma_addr,
735			      DMA_ATTR_WRITE_COMBINE);
736}
737
738static inline int dma_mmap_wc(struct device *dev,
739			      struct vm_area_struct *vma,
740			      void *cpu_addr, dma_addr_t dma_addr,
741			      size_t size)
742{
743	return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
744			      DMA_ATTR_WRITE_COMBINE);
745}
746
747#ifdef CONFIG_NEED_DMA_MAP_STATE
748#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)        dma_addr_t ADDR_NAME
749#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)          __u32 LEN_NAME
750#define dma_unmap_addr(PTR, ADDR_NAME)           ((PTR)->ADDR_NAME)
751#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  (((PTR)->ADDR_NAME) = (VAL))
752#define dma_unmap_len(PTR, LEN_NAME)             ((PTR)->LEN_NAME)
753#define dma_unmap_len_set(PTR, LEN_NAME, VAL)    (((PTR)->LEN_NAME) = (VAL))
754#else
755#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
756#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
757#define dma_unmap_addr(PTR, ADDR_NAME)           \
758	({ typeof(PTR) __p __maybe_unused = PTR; 0; })
759#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  \
760	do { typeof(PTR) __p __maybe_unused = PTR; } while (0)
761#define dma_unmap_len(PTR, LEN_NAME)             \
762	({ typeof(PTR) __p __maybe_unused = PTR; 0; })
763#define dma_unmap_len_set(PTR, LEN_NAME, VAL)    \
764	do { typeof(PTR) __p __maybe_unused = PTR; } while (0)
765#endif
766
767#endif /* _LINUX_DMA_MAPPING_H */
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