edac_cdx_pcol.h

 1/* SPDX-License-Identifier: GPL-2.0
 2 *
 3 * Driver for AMD network controllers and boards
 4 *
 5 * Copyright (C) 2021, Xilinx, Inc.
 6 * Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
 7 */
 8
 9#ifndef MC_CDX_PCOL_H
10#define MC_CDX_PCOL_H
11#include  <linux/cdx/mcdi.h>
12
13#define MC_CMD_EDAC_GET_DDR_CONFIG_OUT_WORD_LENGTH_LEN		4
14/* Number of registers for the DDR controller */
15#define MC_CMD_GET_DDR_CONFIG_OFST	4
16#define MC_CMD_GET_DDR_CONFIG_LEN	4
17
18/***********************************/
19/* MC_CMD_EDAC_GET_DDR_CONFIG
20 * Provides detailed configuration for the DDR controller of the given index.
21 */
22#define MC_CMD_EDAC_GET_DDR_CONFIG 0x3
23
24/* MC_CMD_EDAC_GET_DDR_CONFIG_IN msgrequest */
25#define MC_CMD_EDAC_GET_DDR_CONFIG_IN_CONTROLLER_INDEX_OFST		0
26#define MC_CMD_EDAC_GET_DDR_CONFIG_IN_CONTROLLER_INDEX_LEN		4
27
28#endif /* MC_CDX_PCOL_H */