bittiming.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/* Copyright (c) 2020 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de>
  3 * Copyright (c) 2021-2025 Vincent Mailhol <mailhol@kernel.org>
  4 */
  5
  6#ifndef _CAN_BITTIMING_H
  7#define _CAN_BITTIMING_H
  8
  9#include <linux/netdevice.h>
 10#include <linux/can/netlink.h>
 11
 12#define CAN_SYNC_SEG 1
 13
 14#define CAN_BITRATE_UNSET 0
 15#define CAN_BITRATE_UNKNOWN (-1U)
 16
 17#define CAN_CTRLMODE_FD_TDC_MASK				\
 18	(CAN_CTRLMODE_TDC_AUTO | CAN_CTRLMODE_TDC_MANUAL)
 19#define CAN_CTRLMODE_XL_TDC_MASK				\
 20	(CAN_CTRLMODE_XL_TDC_AUTO | CAN_CTRLMODE_XL_TDC_MANUAL)
 21#define CAN_CTRLMODE_TDC_AUTO_MASK				\
 22	(CAN_CTRLMODE_TDC_AUTO | CAN_CTRLMODE_XL_TDC_AUTO)
 23#define CAN_CTRLMODE_TDC_MANUAL_MASK				\
 24	(CAN_CTRLMODE_TDC_MANUAL | CAN_CTRLMODE_XL_TDC_MANUAL)
 25
 26/*
 27 * struct can_tdc - CAN FD Transmission Delay Compensation parameters
 28 *
 29 * At high bit rates, the propagation delay from the TX pin to the RX
 30 * pin of the transceiver causes measurement errors: the sample point
 31 * on the RX pin might occur on the previous bit.
 32 *
 33 * To solve this issue, ISO 11898-1 introduces in section 11.3.3
 34 * "Transmitter delay compensation" a SSP (Secondary Sample Point)
 35 * equal to the distance from the start of the bit time on the TX pin
 36 * to the actual measurement on the RX pin.
 37 *
 38 * This structure contains the parameters to calculate that SSP.
 39 *
 40 * -+----------- one bit ----------+-- TX pin
 41 *  |<--- Sample Point --->|
 42 *
 43 *                         --+----------- one bit ----------+-- RX pin
 44 *  |<-------- TDCV -------->|
 45 *                           |<------- TDCO ------->|
 46 *  |<----------- Secondary Sample Point ---------->|
 47 *
 48 * To increase precision, contrary to the other bittiming parameters
 49 * which are measured in time quanta, the TDC parameters are measured
 50 * in clock periods (also referred as "minimum time quantum" in ISO
 51 * 11898-1).
 52 *
 53 * @tdcv: Transmitter Delay Compensation Value. The time needed for
 54 *	the signal to propagate, i.e. the distance, in clock periods,
 55 *	from the start of the bit on the TX pin to when it is received
 56 *	on the RX pin. @tdcv depends on the controller modes:
 57 *
 58 *	  CAN_CTRLMODE_TDC_AUTO is set: The transceiver dynamically
 59 *	  measures @tdcv for each transmitted CAN FD frame and the
 60 *	  value provided here should be ignored.
 61 *
 62 *	  CAN_CTRLMODE_TDC_MANUAL is set: use the fixed provided @tdcv
 63 *	  value.
 64 *
 65 *	N.B. CAN_CTRLMODE_TDC_AUTO and CAN_CTRLMODE_TDC_MANUAL are
 66 *	mutually exclusive. Only one can be set at a time. If both
 67 *	CAN_TDC_CTRLMODE_AUTO and CAN_TDC_CTRLMODE_MANUAL are unset,
 68 *	TDC is disabled and all the values of this structure should be
 69 *	ignored.
 70 *
 71 * @tdco: Transmitter Delay Compensation Offset. Offset value, in
 72 *	clock periods, defining the distance between the start of the
 73 *	bit reception on the RX pin of the transceiver and the SSP
 74 *	position such that SSP = @tdcv + @tdco.
 75 *
 76 * @tdcf: Transmitter Delay Compensation Filter window. Defines the
 77 *	minimum value for the SSP position in clock periods. If the
 78 *	SSP position is less than @tdcf, then no delay compensations
 79 *	occur and the normal sampling point is used instead. The
 80 *	feature is enabled if and only if @tdcv is set to zero
 81 *	(automatic mode) and @tdcf is configured to a value greater
 82 *	than @tdco.
 83 */
 84struct can_tdc {
 85	u32 tdcv;
 86	u32 tdco;
 87	u32 tdcf;
 88};
 89
 90/* The transceiver decoding margin corresponds to t_Decode in ISO 11898-2 */
 91#define CAN_PWM_DECODE_NS 5
 92/* Maximum PWM symbol duration. Corresponds to t_SymbolNom_MAX - t_Decode */
 93#define CAN_PWM_NS_MAX (205 - CAN_PWM_DECODE_NS)
 94
 95/*
 96 * struct can_tdc_const - CAN hardware-dependent constant for
 97 *	Transmission Delay Compensation
 98 *
 99 * @tdcv_min: Transmitter Delay Compensation Value minimum value. If
100 *	the controller does not support manual mode for tdcv
101 *	(c.f. flag CAN_CTRLMODE_TDC_MANUAL) then this value is
102 *	ignored.
103 * @tdcv_max: Transmitter Delay Compensation Value maximum value. If
104 *	the controller does not support manual mode for tdcv
105 *	(c.f. flag CAN_CTRLMODE_TDC_MANUAL) then this value is
106 *	ignored.
107 *
108 * @tdco_min: Transmitter Delay Compensation Offset minimum value.
109 * @tdco_max: Transmitter Delay Compensation Offset maximum value.
110 *	Should not be zero. If the controller does not support TDC,
111 *	then the pointer to this structure should be NULL.
112 *
113 * @tdcf_min: Transmitter Delay Compensation Filter window minimum
114 *	value. If @tdcf_max is zero, this value is ignored.
115 * @tdcf_max: Transmitter Delay Compensation Filter window maximum
116 *	value. Should be set to zero if the controller does not
117 *	support this feature.
118 */
119struct can_tdc_const {
120	u32 tdcv_min;
121	u32 tdcv_max;
122	u32 tdco_min;
123	u32 tdco_max;
124	u32 tdcf_min;
125	u32 tdcf_max;
126};
127
128/*
129 * struct can_pwm - CAN Pulse-Width Modulation (PWM) parameters
130 *
131 * @pwms: pulse width modulation short phase
132 * @pwml: pulse width modulation long phase
133 * @pwmo: pulse width modulation offset
134 */
135struct can_pwm {
136	u32 pwms;
137	u32 pwml;
138	u32 pwmo;
139};
140
141/*
142 * struct can_pwm - CAN hardware-dependent constants for Pulse-Width
143 *	Modulation (PWM)
144 *
145 * @pwms_min: PWM short phase minimum value. Must be at least 1.
146 * @pwms_max: PWM short phase maximum value
147 * @pwml_min: PWM long phase minimum value. Must be at least 1.
148 * @pwml_max: PWM long phase maximum value
149 * @pwmo_min: PWM offset phase minimum value
150 * @pwmo_max: PWM offset phase maximum value
151 */
152struct can_pwm_const {
153	u32 pwms_min;
154	u32 pwms_max;
155	u32 pwml_min;
156	u32 pwml_max;
157	u32 pwmo_min;
158	u32 pwmo_max;
159};
160
161struct data_bittiming_params {
162	const struct can_bittiming_const *data_bittiming_const;
163	struct can_bittiming data_bittiming;
164	const struct can_tdc_const *tdc_const;
165	const struct can_pwm_const *pwm_const;
166	union {
167		struct can_tdc tdc;
168		struct can_pwm pwm;
169	};
170	const u32 *data_bitrate_const;
171	unsigned int data_bitrate_const_cnt;
172	int (*do_set_data_bittiming)(struct net_device *dev);
173	int (*do_get_auto_tdcv)(const struct net_device *dev, u32 *tdcv);
174};
175
176#ifdef CONFIG_CAN_CALC_BITTIMING
177int can_calc_bittiming(const struct net_device *dev, struct can_bittiming *bt,
178		       const struct can_bittiming_const *btc, struct netlink_ext_ack *extack);
179
180void can_calc_tdco(struct can_tdc *tdc, const struct can_tdc_const *tdc_const,
181		   const struct can_bittiming *dbt,
182		   u32 tdc_mask, u32 *ctrlmode, u32 ctrlmode_supported);
183
184int can_calc_pwm(struct net_device *dev, struct netlink_ext_ack *extack);
185#else /* !CONFIG_CAN_CALC_BITTIMING */
186static inline int
187can_calc_bittiming(const struct net_device *dev, struct can_bittiming *bt,
188		   const struct can_bittiming_const *btc, struct netlink_ext_ack *extack)
189{
190	NL_SET_ERR_MSG(extack, "bit-timing calculation not available\n");
191	return -EINVAL;
192}
193
194static inline void
195can_calc_tdco(struct can_tdc *tdc, const struct can_tdc_const *tdc_const,
196	      const struct can_bittiming *dbt,
197	      u32 tdc_mask, u32 *ctrlmode, u32 ctrlmode_supported)
198{
199}
200
201static inline int
202can_calc_pwm(struct net_device *dev, struct netlink_ext_ack *extack)
203{
204	NL_SET_ERR_MSG(extack,
205		       "bit-timing calculation not available: manually provide PWML and PWMS\n");
206	return -EINVAL;
207}
208#endif /* CONFIG_CAN_CALC_BITTIMING */
209
210void can_sjw_set_default(struct can_bittiming *bt);
211
212int can_sjw_check(const struct net_device *dev, const struct can_bittiming *bt,
213		  const struct can_bittiming_const *btc, struct netlink_ext_ack *extack);
214
215int can_get_bittiming(const struct net_device *dev, struct can_bittiming *bt,
216		      const struct can_bittiming_const *btc,
217		      const u32 *bitrate_const,
218		      const unsigned int bitrate_const_cnt,
219		      struct netlink_ext_ack *extack);
220
221int can_validate_pwm_bittiming(const struct net_device *dev,
222			       const struct can_pwm *pwm,
223			       struct netlink_ext_ack *extack);
224
225/*
226 * can_get_relative_tdco() - TDCO relative to the sample point
227 *
228 * struct can_tdc::tdco represents the absolute offset from TDCV. Some
229 * controllers use instead an offset relative to the Sample Point (SP)
230 * such that:
231 *
232 * SSP = TDCV + absolute TDCO
233 *     = TDCV + SP + relative TDCO
234 *
235 * -+----------- one bit ----------+-- TX pin
236 *  |<--- Sample Point --->|
237 *
238 *                         --+----------- one bit ----------+-- RX pin
239 *  |<-------- TDCV -------->|
240 *                           |<------------------------>| absolute TDCO
241 *                           |<--- Sample Point --->|
242 *                           |                      |<->| relative TDCO
243 *  |<------------- Secondary Sample Point ------------>|
244 */
245static inline s32 can_get_relative_tdco(const struct data_bittiming_params *dbt_params)
246{
247	const struct can_bittiming *dbt = &dbt_params->data_bittiming;
248	s32 sample_point_in_tc = (CAN_SYNC_SEG + dbt->prop_seg +
249				  dbt->phase_seg1) * dbt->brp;
250
251	return (s32)dbt_params->tdc.tdco - sample_point_in_tc;
252}
253
254/*
255 * can_bit_time() - Duration of one bit
256 *
257 * Please refer to ISO 11898-1:2015, section 11.3.1.1 "Bit time" for
258 * additional information.
259 *
260 * Return: the number of time quanta in one bit.
261 */
262static inline unsigned int can_bit_time(const struct can_bittiming *bt)
263{
264	return CAN_SYNC_SEG + bt->prop_seg + bt->phase_seg1 + bt->phase_seg2;
265}
266
267/* Duration of one bit in minimum time quantum */
268static inline unsigned int can_bit_time_tqmin(const struct can_bittiming *bt)
269{
270	return can_bit_time(bt) * bt->brp;
271}
272
273/* Convert a duration from minimum a minimum time quantum to nano seconds */
274static inline u32 can_tqmin_to_ns(u32 tqmin, u32 clock_freq)
275{
276	return DIV_U64_ROUND_CLOSEST(mul_u32_u32(tqmin, NSEC_PER_SEC),
277				     clock_freq);
278}
279
280#endif /* !_CAN_BITTIMING_H */