aspeed-wdt.h

  1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
  2
  3#ifndef DT_BINDINGS_ASPEED_WDT_H
  4#define DT_BINDINGS_ASPEED_WDT_H
  5
  6#define AST2500_WDT_RESET_CPU		(1 << 0)
  7#define AST2500_WDT_RESET_COPROC	(1 << 1)
  8#define AST2500_WDT_RESET_SDRAM		(1 << 2)
  9#define AST2500_WDT_RESET_AHB		(1 << 3)
 10#define AST2500_WDT_RESET_I2C		(1 << 4)
 11#define AST2500_WDT_RESET_MAC0		(1 << 5)
 12#define AST2500_WDT_RESET_MAC1		(1 << 6)
 13#define AST2500_WDT_RESET_GRAPHICS	(1 << 7)
 14#define AST2500_WDT_RESET_USB2_HOST_HUB	(1 << 8)
 15#define AST2500_WDT_RESET_USB_HOST	(1 << 9)
 16#define AST2500_WDT_RESET_HID_EHCI	(1 << 10)
 17#define AST2500_WDT_RESET_VIDEO		(1 << 11)
 18#define AST2500_WDT_RESET_HAC		(1 << 12)
 19#define AST2500_WDT_RESET_LPC		(1 << 13)
 20#define AST2500_WDT_RESET_SDIO		(1 << 14)
 21#define AST2500_WDT_RESET_MIC		(1 << 15)
 22#define AST2500_WDT_RESET_CRT		(1 << 16)
 23#define AST2500_WDT_RESET_PWM		(1 << 17)
 24#define AST2500_WDT_RESET_PECI		(1 << 18)
 25#define AST2500_WDT_RESET_JTAG		(1 << 19)
 26#define AST2500_WDT_RESET_ADC		(1 << 20)
 27#define AST2500_WDT_RESET_GPIO		(1 << 21)
 28#define AST2500_WDT_RESET_MCTP		(1 << 22)
 29#define AST2500_WDT_RESET_XDMA		(1 << 23)
 30#define AST2500_WDT_RESET_SPI		(1 << 24)
 31#define AST2500_WDT_RESET_SOC_MISC	(1 << 25)
 32
 33#define AST2500_WDT_RESET_DEFAULT 0x023ffff3
 34
 35#define AST2600_WDT_RESET1_CPU		(1 << 0)
 36#define AST2600_WDT_RESET1_SDRAM	(1 << 1)
 37#define AST2600_WDT_RESET1_AHB		(1 << 2)
 38#define AST2600_WDT_RESET1_SLI		(1 << 3)
 39#define AST2600_WDT_RESET1_SOC_MISC0	(1 << 4)
 40#define AST2600_WDT_RESET1_COPROC	(1 << 5)
 41#define AST2600_WDT_RESET1_USB_A	(1 << 6)
 42#define AST2600_WDT_RESET1_USB_B	(1 << 7)
 43#define AST2600_WDT_RESET1_UHCI		(1 << 8)
 44#define AST2600_WDT_RESET1_GRAPHICS	(1 << 9)
 45#define AST2600_WDT_RESET1_CRT		(1 << 10)
 46#define AST2600_WDT_RESET1_VIDEO	(1 << 11)
 47#define AST2600_WDT_RESET1_HAC		(1 << 12)
 48#define AST2600_WDT_RESET1_DP		(1 << 13)
 49#define AST2600_WDT_RESET1_DP_MCU	(1 << 14)
 50#define AST2600_WDT_RESET1_GP_MCU	(1 << 15)
 51#define AST2600_WDT_RESET1_MAC0		(1 << 16)
 52#define AST2600_WDT_RESET1_MAC1		(1 << 17)
 53#define AST2600_WDT_RESET1_SDIO0	(1 << 18)
 54#define AST2600_WDT_RESET1_JTAG0	(1 << 19)
 55#define AST2600_WDT_RESET1_MCTP0	(1 << 20)
 56#define AST2600_WDT_RESET1_MCTP1	(1 << 21)
 57#define AST2600_WDT_RESET1_XDMA0	(1 << 22)
 58#define AST2600_WDT_RESET1_XDMA1	(1 << 23)
 59#define AST2600_WDT_RESET1_GPIO0	(1 << 24)
 60#define AST2600_WDT_RESET1_RVAS		(1 << 25)
 61
 62#define AST2600_WDT_RESET1_DEFAULT 0x030f1ff1
 63
 64#define AST2600_WDT_RESET2_CPU		(1 << 0)
 65#define AST2600_WDT_RESET2_SPI		(1 << 1)
 66#define AST2600_WDT_RESET2_AHB2		(1 << 2)
 67#define AST2600_WDT_RESET2_SLI2		(1 << 3)
 68#define AST2600_WDT_RESET2_SOC_MISC1	(1 << 4)
 69#define AST2600_WDT_RESET2_MAC2		(1 << 5)
 70#define AST2600_WDT_RESET2_MAC3		(1 << 6)
 71#define AST2600_WDT_RESET2_SDIO1	(1 << 7)
 72#define AST2600_WDT_RESET2_JTAG1	(1 << 8)
 73#define AST2600_WDT_RESET2_GPIO1	(1 << 9)
 74#define AST2600_WDT_RESET2_MDIO		(1 << 10)
 75#define AST2600_WDT_RESET2_LPC		(1 << 11)
 76#define AST2600_WDT_RESET2_PECI		(1 << 12)
 77#define AST2600_WDT_RESET2_PWM		(1 << 13)
 78#define AST2600_WDT_RESET2_ADC		(1 << 14)
 79#define AST2600_WDT_RESET2_FSI		(1 << 15)
 80#define AST2600_WDT_RESET2_I2C		(1 << 16)
 81#define AST2600_WDT_RESET2_I3C_GLOBAL	(1 << 17)
 82#define AST2600_WDT_RESET2_I3C0		(1 << 18)
 83#define AST2600_WDT_RESET2_I3C1		(1 << 19)
 84#define AST2600_WDT_RESET2_I3C2		(1 << 20)
 85#define AST2600_WDT_RESET2_I3C3		(1 << 21)
 86#define AST2600_WDT_RESET2_I3C4		(1 << 22)
 87#define AST2600_WDT_RESET2_I3C5		(1 << 23)
 88#define AST2600_WDT_RESET2_ESPI		(1 << 26)
 89
 90#define AST2600_WDT_RESET2_DEFAULT 0x03fffff1
 91
 92#define AST2700_WDT_RESET1_CPU		(1 << 0)
 93#define AST2700_WDT_RESET1_DRAM		(1 << 1)
 94#define AST2700_WDT_RESET1_SLI0		(1 << 2)
 95#define AST2700_WDT_RESET1_EHCI		(1 << 3)
 96#define AST2700_WDT_RESET1_HACE		(1 << 4)
 97#define AST2700_WDT_RESET1_SOC_MISC0	(1 << 5)
 98#define AST2700_WDT_RESET1_VIDEO	(1 << 6)
 99#define AST2700_WDT_RESET1_2D_GRAPHIC	(1 << 7)
100#define AST2700_WDT_RESET1_RAVS0	(1 << 8)
101#define AST2700_WDT_RESET1_RAVS1	(1 << 9)
102#define AST2700_WDT_RESET1_GPIO0	(1 << 10)
103#define AST2700_WDT_RESET1_SSP		(1 << 11)
104#define AST2700_WDT_RESET1_TSP		(1 << 12)
105#define AST2700_WDT_RESET1_CRT		(1 << 13)
106#define AST2700_WDT_RESET1_USB20_HOST	(1 << 14)
107#define AST2700_WDT_RESET1_USB11_HOST	(1 << 15)
108#define AST2700_WDT_RESET1_UFS		(1 << 16)
109#define AST2700_WDT_RESET1_EMMC		(1 << 17)
110#define AST2700_WDT_RESET1_AHB_TO_PCIE1	(1 << 18)
111#define AST2700_WDT_RESET1_XDMA0	(1 << 22)
112#define AST2700_WDT_RESET1_MCTP1	(1 << 23)
113#define AST2700_WDT_RESET1_MCTP0	(1 << 24)
114#define AST2700_WDT_RESET1_JTAG0	(1 << 25)
115#define AST2700_WDT_RESET1_ECC		(1 << 26)
116#define AST2700_WDT_RESET1_XDMA1	(1 << 27)
117#define AST2700_WDT_RESET1_DP		(1 << 28)
118#define AST2700_WDT_RESET1_DP_MCU	(1 << 29)
119#define AST2700_WDT_RESET1_AHB_TO_PCIE0	(1 << 31)
120
121#define AST2700_WDT_RESET1_DEFAULT 0x8207ff71
122
123#define AST2700_WDT_RESET2_USB3_A_HOST	(1 << 0)
124#define AST2700_WDT_RESET2_USB3_A_VHUB3	(1 << 1)
125#define AST2700_WDT_RESET2_USB3_A_VHUB2	(1 << 2)
126#define AST2700_WDT_RESET2_USB3_B_HOST	(1 << 3)
127#define AST2700_WDT_RESET2_USB3_B_VHUB3	(1 << 4)
128#define AST2700_WDT_RESET2_USB3_B_VHUB2	(1 << 5)
129#define AST2700_WDT_RESET2_SM3		(1 << 6)
130#define AST2700_WDT_RESET2_SM4		(1 << 7)
131#define AST2700_WDT_RESET2_SHA3		(1 << 8)
132#define AST2700_WDT_RESET2_RSA		(1 << 9)
133
134#define AST2700_WDT_RESET2_DEFAULT 0x000003f6
135
136#define AST2700_WDT_RESET3_LPC0		(1 << 0)
137#define AST2700_WDT_RESET3_LPC1		(1 << 1)
138#define AST2700_WDT_RESET3_MDIO		(1 << 2)
139#define AST2700_WDT_RESET3_PECI		(1 << 3)
140#define AST2700_WDT_RESET3_PWM		(1 << 4)
141#define AST2700_WDT_RESET3_MAC0		(1 << 5)
142#define AST2700_WDT_RESET3_MAC1		(1 << 6)
143#define AST2700_WDT_RESET3_MAC2		(1 << 7)
144#define AST2700_WDT_RESET3_ADC		(1 << 8)
145#define AST2700_WDT_RESET3_SDC		(1 << 9)
146#define AST2700_WDT_RESET3_ESPI0	(1 << 10)
147#define AST2700_WDT_RESET3_ESPI1	(1 << 11)
148#define AST2700_WDT_RESET3_JTAG1	(1 << 12)
149#define AST2700_WDT_RESET3_SPI0		(1 << 13)
150#define AST2700_WDT_RESET3_SPI1		(1 << 14)
151#define AST2700_WDT_RESET3_SPI2		(1 << 15)
152#define AST2700_WDT_RESET3_I3C0		(1 << 16)
153#define AST2700_WDT_RESET3_I3C1		(1 << 17)
154#define AST2700_WDT_RESET3_I3C2		(1 << 18)
155#define AST2700_WDT_RESET3_I3C3		(1 << 19)
156#define AST2700_WDT_RESET3_I3C4		(1 << 20)
157#define AST2700_WDT_RESET3_I3C5		(1 << 21)
158#define AST2700_WDT_RESET3_I3C6		(1 << 22)
159#define AST2700_WDT_RESET3_I3C7		(1 << 23)
160#define AST2700_WDT_RESET3_I3C8		(1 << 24)
161#define AST2700_WDT_RESET3_I3C9		(1 << 25)
162#define AST2700_WDT_RESET3_I3C10	(1 << 26)
163#define AST2700_WDT_RESET3_I3C11	(1 << 27)
164#define AST2700_WDT_RESET3_I3C12	(1 << 28)
165#define AST2700_WDT_RESET3_I3C13	(1 << 29)
166#define AST2700_WDT_RESET3_I3C14	(1 << 30)
167#define AST2700_WDT_RESET3_I3C15	(1 << 31)
168
169#define AST2700_WDT_RESET3_DEFAULT 0x000093ec
170
171#define AST2700_WDT_RESET4_FMC		(1 << 0)
172#define AST2700_WDT_RESET4_SOC_MISC1	(1 << 1)
173#define AST2700_WDT_RESET4_AHB		(1 << 2)
174#define AST2700_WDT_RESET4_SLI1		(1 << 3)
175#define AST2700_WDT_RESET4_UART0	(1 << 4)
176#define AST2700_WDT_RESET4_UART1	(1 << 5)
177#define AST2700_WDT_RESET4_UART2	(1 << 6)
178#define AST2700_WDT_RESET4_UART3	(1 << 7)
179#define AST2700_WDT_RESET4_I2C_MONITOR	(1 << 8)
180#define AST2700_WDT_RESET4_HOST_TO_SPI1	(1 << 9)
181#define AST2700_WDT_RESET4_HOST_TO_SPI2	(1 << 10)
182#define AST2700_WDT_RESET4_GPIO1	(1 << 11)
183#define AST2700_WDT_RESET4_FSI		(1 << 12)
184#define AST2700_WDT_RESET4_CANBUS	(1 << 13)
185#define AST2700_WDT_RESET4_MCTP		(1 << 14)
186#define AST2700_WDT_RESET4_XDMA		(1 << 15)
187#define AST2700_WDT_RESET4_UART5	(1 << 16)
188#define AST2700_WDT_RESET4_UART6	(1 << 17)
189#define AST2700_WDT_RESET4_UART7	(1 << 18)
190#define AST2700_WDT_RESET4_UART8	(1 << 19)
191#define AST2700_WDT_RESET4_BOOT_MCU	(1 << 20)
192#define AST2700_WDT_RESET4_IO_MCU	(1 << 21)
193#define AST2700_WDT_RESET4_LTPI0	(1 << 22)
194#define AST2700_WDT_RESET4_VGA_LINK	(1 << 23)
195#define AST2700_WDT_RESET4_LTPI1	(1 << 24)
196#define AST2700_WDT_RESET4_LTPI_PHY	(1 << 25)
197#define AST2700_WDT_RESET4_ACE		(1 << 26)
198#define AST2700_WDT_RESET4_LTPI_GPIO0	(1 << 28)
199#define AST2700_WDT_RESET4_LTPI_GPIO1	(1 << 29)
200#define AST2700_WDT_RESET4_AHB_TO_PCIE1	(1 << 30)
201#define AST2700_WDT_RESET4_I3C_DMA	(1 << 31)
202
203#define AST2700_WDT_RESET4_DEFAULT 0x40303803
204
205#define AST2700_WDT_RESET5_I2C_GLOBAL	(1 << 0)
206#define AST2700_WDT_RESET5_I2C0		(1 << 1)
207#define AST2700_WDT_RESET5_I2C1		(1 << 2)
208#define AST2700_WDT_RESET5_I2C2		(1 << 3)
209#define AST2700_WDT_RESET5_I2C3		(1 << 4)
210#define AST2700_WDT_RESET5_I2C4		(1 << 5)
211#define AST2700_WDT_RESET5_I2C5		(1 << 6)
212#define AST2700_WDT_RESET5_I2C6		(1 << 7)
213#define AST2700_WDT_RESET5_I2C7		(1 << 8)
214#define AST2700_WDT_RESET5_I2C8		(1 << 9)
215#define AST2700_WDT_RESET5_I2C9		(1 << 10)
216#define AST2700_WDT_RESET5_I2C10	(1 << 11)
217#define AST2700_WDT_RESET5_I2C11	(1 << 12)
218#define AST2700_WDT_RESET5_I2C12	(1 << 13)
219#define AST2700_WDT_RESET5_I2C13	(1 << 14)
220#define AST2700_WDT_RESET5_I2C14	(1 << 15)
221#define AST2700_WDT_RESET5_I2C15	(1 << 16)
222#define AST2700_WDT_RESET5_UHCI		(1 << 17)
223#define AST2700_WDT_RESET5_USB2_C_UART	(1 << 18)
224#define AST2700_WDT_RESET5_USB2_C	(1 << 19)
225#define AST2700_WDT_RESET5_USB2_D_UART	(1 << 20)
226#define AST2700_WDT_RESET5_USB2_D	(1 << 21)
227
228#define AST2700_WDT_RESET5_DEFAULT 0x00320000
229
230#endif