qcom,qcs615-rpmh.h

  1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
  2/*
  3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
  4 */
  5
  6#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS615_H
  7#define __DT_BINDINGS_INTERCONNECT_QCOM_QCS615_H
  8
  9#define MASTER_A1NOC_CFG		1
 10#define MASTER_QDSS_BAM			2
 11#define MASTER_QSPI			3
 12#define MASTER_QUP_0			4
 13#define MASTER_BLSP_1			5
 14#define MASTER_CNOC_A2NOC		6
 15#define MASTER_CRYPTO			7
 16#define MASTER_IPA			8
 17#define MASTER_EMAC_EVB			9
 18#define MASTER_PCIE			10
 19#define MASTER_QDSS_ETR			11
 20#define MASTER_SDCC_1			12
 21#define MASTER_SDCC_2			13
 22#define MASTER_UFS_MEM			14
 23#define MASTER_USB2			15
 24#define MASTER_USB3_0			16
 25#define SLAVE_A1NOC_SNOC		17
 26#define SLAVE_LPASS_SNOC		18
 27#define SLAVE_ANOC_PCIE_SNOC		19
 28#define SLAVE_SERVICE_A2NOC		20
 29
 30#define MASTER_CAMNOC_HF0_UNCOMP	1
 31#define MASTER_CAMNOC_HF1_UNCOMP	2
 32#define MASTER_CAMNOC_SF_UNCOMP		3
 33#define SLAVE_CAMNOC_UNCOMP		4
 34
 35#define MASTER_SPDM			1
 36#define MASTER_SNOC_CNOC		2
 37#define MASTER_QDSS_DAP			3
 38#define SLAVE_A1NOC_CFG			4
 39#define SLAVE_AHB2PHY_EAST		5
 40#define SLAVE_AHB2PHY_WEST		6
 41#define SLAVE_AOP			7
 42#define SLAVE_AOSS			8
 43#define SLAVE_CAMERA_CFG		9
 44#define SLAVE_CLK_CTL			10
 45#define SLAVE_RBCPR_CX_CFG		11
 46#define SLAVE_RBCPR_MX_CFG		12
 47#define SLAVE_CRYPTO_0_CFG		13
 48#define SLAVE_CNOC_DDRSS		14
 49#define SLAVE_DISPLAY_CFG		15
 50#define SLAVE_EMAC_AVB_CFG		16
 51#define SLAVE_GLM			17
 52#define SLAVE_GFX3D_CFG			18
 53#define SLAVE_IMEM_CFG			19
 54#define SLAVE_IPA_CFG			20
 55#define SLAVE_CNOC_MNOC_CFG		21
 56#define SLAVE_PCIE_CFG			22
 57#define SLAVE_PIMEM_CFG			23
 58#define SLAVE_PRNG			24
 59#define SLAVE_QDSS_CFG			25
 60#define SLAVE_QSPI			26
 61#define SLAVE_QUP_0			27
 62#define SLAVE_QUP_1			28
 63#define SLAVE_SDCC_1			29
 64#define SLAVE_SDCC_2			30
 65#define SLAVE_SNOC_CFG			31
 66#define SLAVE_SPDM_WRAPPER		32
 67#define SLAVE_TCSR			33
 68#define SLAVE_TLMM_EAST			34
 69#define SLAVE_TLMM_SOUTH		35
 70#define SLAVE_TLMM_WEST			36
 71#define SLAVE_UFS_MEM_CFG		37
 72#define SLAVE_USB2			38
 73#define SLAVE_USB3			39
 74#define SLAVE_VENUS_CFG			40
 75#define SLAVE_VSENSE_CTRL_CFG		41
 76#define SLAVE_CNOC_A2NOC		42
 77#define SLAVE_SERVICE_CNOC		43
 78
 79#define MASTER_CNOC_DC_NOC		1
 80#define SLAVE_DC_NOC_GEMNOC		2
 81#define SLAVE_LLCC_CFG			3
 82
 83#define MASTER_APPSS_PROC		1
 84#define MASTER_GPU_TCU			2
 85#define MASTER_SYS_TCU			3
 86#define MASTER_GEM_NOC_CFG		4
 87#define MASTER_GFX3D			5
 88#define MASTER_MNOC_HF_MEM_NOC		6
 89#define MASTER_MNOC_SF_MEM_NOC		7
 90#define MASTER_SNOC_GC_MEM_NOC		8
 91#define MASTER_SNOC_SF_MEM_NOC		9
 92#define SLAVE_MSS_PROC_MS_MPU_CFG	10
 93#define SLAVE_GEM_NOC_SNOC		11
 94#define SLAVE_LLCC			12
 95#define SLAVE_MEM_NOC_PCIE_SNOC		13
 96#define SLAVE_SERVICE_GEM_NOC		14
 97
 98#define MASTER_IPA_CORE			1
 99#define SLAVE_IPA_CORE			2
100
101#define MASTER_LLCC			1
102#define SLAVE_EBI1			2
103
104#define MASTER_CNOC_MNOC_CFG		1
105#define MASTER_CAMNOC_HF0		2
106#define MASTER_CAMNOC_HF1		3
107#define MASTER_CAMNOC_SF		4
108#define MASTER_MDP0			5
109#define MASTER_ROTATOR			6
110#define MASTER_VIDEO_P0			7
111#define MASTER_VIDEO_PROC		8
112#define SLAVE_MNOC_SF_MEM_NOC		9
113#define SLAVE_MNOC_HF_MEM_NOC		10
114#define SLAVE_SERVICE_MNOC		11
115
116#define MASTER_SNOC_CFG			1
117#define MASTER_A1NOC_SNOC		2
118#define MASTER_GEM_NOC_SNOC		3
119#define MASTER_GEM_NOC_PCIE_SNOC	4
120#define MASTER_LPASS_ANOC		5
121#define MASTER_ANOC_PCIE_SNOC		6
122#define MASTER_PIMEM			7
123#define MASTER_GIC			8
124#define SLAVE_APPSS			9
125#define SLAVE_SNOC_CNOC			10
126#define SLAVE_SNOC_GEM_NOC_SF		11
127#define SLAVE_SNOC_MEM_NOC_GC		12
128#define SLAVE_IMEM			13
129#define SLAVE_PIMEM			14
130#define SLAVE_SERVICE_SNOC		15
131#define SLAVE_PCIE_0			16
132#define SLAVE_QDSS_STM			17
133#define SLAVE_TCU			18
134
135#endif
136