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qcom,milos-rpmh.h
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linux-6.19.14/include/dt-bindings/interconnect/qcom,milos-rpmh.h
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2/* 3 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2025, Luca Weiss <luca.weiss@fairphone.com> 5 */ 6 7#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MILOS_H 8#define __DT_BINDINGS_INTERCONNECT_QCOM_MILOS_H 9 10#define MASTER_QUP_1 0 11#define MASTER_UFS_MEM 1 12#define MASTER_USB3_0 2 13#define SLAVE_A1NOC_SNOC 3 14 15#define MASTER_QDSS_BAM 0 16#define MASTER_QSPI_0 1 17#define MASTER_QUP_0 2 18#define MASTER_CRYPTO 3 19#define MASTER_IPA 4 20#define MASTER_QDSS_ETR 5 21#define MASTER_QDSS_ETR_1 6 22#define MASTER_SDCC_1 7 23#define MASTER_SDCC_2 8 24#define SLAVE_A2NOC_SNOC 9 25 26#define MASTER_QUP_CORE_0 0 27#define MASTER_QUP_CORE_1 1 28#define SLAVE_QUP_CORE_0 2 29#define SLAVE_QUP_CORE_1 3 30 31#define MASTER_CNOC_CFG 0 32#define SLAVE_AHB2PHY_SOUTH 1 33#define SLAVE_AHB2PHY_NORTH 2 34#define SLAVE_CAMERA_CFG 3 35#define SLAVE_CLK_CTL 4 36#define SLAVE_RBCPR_CX_CFG 5 37#define SLAVE_RBCPR_MXA_CFG 6 38#define SLAVE_CRYPTO_0_CFG 7 39#define SLAVE_CX_RDPM 8 40#define SLAVE_GFX3D_CFG 9 41#define SLAVE_IMEM_CFG 10 42#define SLAVE_CNOC_MSS 11 43#define SLAVE_MX_2_RDPM 12 44#define SLAVE_MX_RDPM 13 45#define SLAVE_PDM 14 46#define SLAVE_QDSS_CFG 15 47#define SLAVE_QSPI_0 16 48#define SLAVE_QUP_0 17 49#define SLAVE_QUP_1 18 50#define SLAVE_SDC1 19 51#define SLAVE_SDCC_2 20 52#define SLAVE_TCSR 21 53#define SLAVE_TLMM 22 54#define SLAVE_UFS_MEM_CFG 23 55#define SLAVE_USB3_0 24 56#define SLAVE_VENUS_CFG 25 57#define SLAVE_VSENSE_CTRL_CFG 26 58#define SLAVE_WLAN 27 59#define SLAVE_CNOC_MNOC_HF_CFG 28 60#define SLAVE_CNOC_MNOC_SF_CFG 29 61#define SLAVE_NSP_QTB_CFG 30 62#define SLAVE_PCIE_ANOC_CFG 31 63#define SLAVE_WLAN_Q6_THROTTLE_CFG 32 64#define SLAVE_SERVICE_CNOC_CFG 33 65#define SLAVE_QDSS_STM 34 66#define SLAVE_TCU 35 67 68#define MASTER_GEM_NOC_CNOC 0 69#define MASTER_GEM_NOC_PCIE_SNOC 1 70#define SLAVE_AOSS 2 71#define SLAVE_DISPLAY_CFG 3 72#define SLAVE_IPA_CFG 4 73#define SLAVE_IPC_ROUTER_CFG 5 74#define SLAVE_PCIE_0_CFG 6 75#define SLAVE_PCIE_1_CFG 7 76#define SLAVE_PRNG 8 77#define SLAVE_TME_CFG 9 78#define SLAVE_APPSS 10 79#define SLAVE_CNOC_CFG 11 80#define SLAVE_DDRSS_CFG 12 81#define SLAVE_IMEM 13 82#define SLAVE_PIMEM 14 83#define SLAVE_SERVICE_CNOC 15 84#define SLAVE_PCIE_0 16 85#define SLAVE_PCIE_1 17 86 87#define MASTER_GPU_TCU 0 88#define MASTER_SYS_TCU 1 89#define MASTER_APPSS_PROC 2 90#define MASTER_GFX3D 3 91#define MASTER_LPASS_GEM_NOC 4 92#define MASTER_MSS_PROC 5 93#define MASTER_MNOC_HF_MEM_NOC 6 94#define MASTER_MNOC_SF_MEM_NOC 7 95#define MASTER_COMPUTE_NOC 8 96#define MASTER_ANOC_PCIE_GEM_NOC 9 97#define MASTER_SNOC_GC_MEM_NOC 10 98#define MASTER_SNOC_SF_MEM_NOC 11 99#define MASTER_WLAN_Q6 12 100#define SLAVE_GEM_NOC_CNOC 13 101#define SLAVE_LLCC 14 102#define SLAVE_MEM_NOC_PCIE_SNOC 15 103 104#define MASTER_LPASS_PROC 0 105#define SLAVE_LPASS_GEM_NOC 1 106 107#define MASTER_LLCC 0 108#define SLAVE_EBI1 1 109 110#define MASTER_CAMNOC_HF 0 111#define MASTER_CAMNOC_ICP 1 112#define MASTER_CAMNOC_SF 2 113#define MASTER_MDP 3 114#define MASTER_VIDEO 4 115#define MASTER_CNOC_MNOC_HF_CFG 5 116#define MASTER_CNOC_MNOC_SF_CFG 6 117#define SLAVE_MNOC_HF_MEM_NOC 7 118#define SLAVE_MNOC_SF_MEM_NOC 8 119#define SLAVE_SERVICE_MNOC_HF 9 120#define SLAVE_SERVICE_MNOC_SF 10 121 122#define MASTER_CDSP_PROC 0 123#define SLAVE_CDSP_MEM_NOC 1 124 125#define MASTER_PCIE_ANOC_CFG 0 126#define MASTER_PCIE_0 1 127#define MASTER_PCIE_1 2 128#define SLAVE_ANOC_PCIE_GEM_NOC 3 129#define SLAVE_SERVICE_PCIE_ANOC 4 130 131#define MASTER_A1NOC_SNOC 0 132#define MASTER_A2NOC_SNOC 1 133#define MASTER_APSS_NOC 2 134#define MASTER_CNOC_SNOC 3 135#define MASTER_PIMEM 4 136#define MASTER_GIC 5 137#define SLAVE_SNOC_GEM_NOC_GC 6 138#define SLAVE_SNOC_GEM_NOC_SF 7 139 140 141#endif
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