toshiba,tmpv770x.h

  1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
  2
  3#ifndef _DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_
  4#define _DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_
  5
  6/* PLL */
  7#define TMPV770X_PLL_PIPLL0		0
  8#define TMPV770X_PLL_PIPLL1		1
  9#define TMPV770X_PLL_PIDNNPLL		2
 10#define TMPV770X_PLL_PIETHERPLL		3
 11#define TMPV770X_PLL_PIDDRCPLL		4
 12#define TMPV770X_PLL_PIVOIFPLL		5
 13#define TMPV770X_PLL_PIIMGERPLL		6
 14
 15/* Clocks */
 16#define TMPV770X_CLK_PIPLL1_DIV1	0
 17#define TMPV770X_CLK_PIPLL1_DIV2	1
 18#define TMPV770X_CLK_PIPLL1_DIV4	2
 19#define TMPV770X_CLK_PIDNNPLL_DIV1	3
 20#define TMPV770X_CLK_DDRC_PHY_PLL0	4
 21#define TMPV770X_CLK_DDRC_PHY_PLL1	5
 22#define TMPV770X_CLK_D_PHYPLL		6
 23#define TMPV770X_CLK_PHY_PCIEPLL	7
 24#define TMPV770X_CLK_CA53CL0		8
 25#define TMPV770X_CLK_CA53CL1		9
 26#define TMPV770X_CLK_PISDMAC		10
 27#define TMPV770X_CLK_PIPDMAC0		11
 28#define TMPV770X_CLK_PIPDMAC1		12
 29#define TMPV770X_CLK_PIWRAM		13
 30#define TMPV770X_CLK_DDRC0		14
 31#define TMPV770X_CLK_DDRC0_SCLK		15
 32#define TMPV770X_CLK_DDRC0_NCLK		16
 33#define TMPV770X_CLK_DDRC0_MCLK		17
 34#define TMPV770X_CLK_DDRC0_APBCLK	18
 35#define TMPV770X_CLK_DDRC1		19
 36#define TMPV770X_CLK_DDRC1_SCLK		20
 37#define TMPV770X_CLK_DDRC1_NCLK		21
 38#define TMPV770X_CLK_DDRC1_MCLK		22
 39#define TMPV770X_CLK_DDRC1_APBCLK	23
 40#define TMPV770X_CLK_HOX		24
 41#define TMPV770X_CLK_PCIE_MSTR		25
 42#define TMPV770X_CLK_PCIE_AUX		26
 43#define TMPV770X_CLK_PIINTC		27
 44#define TMPV770X_CLK_PIETHER_BUS	28
 45#define TMPV770X_CLK_PISPI0		29
 46#define TMPV770X_CLK_PISPI1		30
 47#define TMPV770X_CLK_PISPI2		31
 48#define TMPV770X_CLK_PISPI3		32
 49#define TMPV770X_CLK_PISPI4		33
 50#define TMPV770X_CLK_PISPI5		34
 51#define TMPV770X_CLK_PISPI6		35
 52#define TMPV770X_CLK_PIUART0		36
 53#define TMPV770X_CLK_PIUART1		37
 54#define TMPV770X_CLK_PIUART2		38
 55#define TMPV770X_CLK_PIUART3		39
 56#define TMPV770X_CLK_PII2C0		40
 57#define TMPV770X_CLK_PII2C1		41
 58#define TMPV770X_CLK_PII2C2		42
 59#define TMPV770X_CLK_PII2C3		43
 60#define TMPV770X_CLK_PII2C4		44
 61#define TMPV770X_CLK_PII2C5		45
 62#define TMPV770X_CLK_PII2C6		46
 63#define TMPV770X_CLK_PII2C7		47
 64#define TMPV770X_CLK_PII2C8		48
 65#define TMPV770X_CLK_PIGPIO		49
 66#define TMPV770X_CLK_PIPGM		50
 67#define TMPV770X_CLK_PIPCMIF		51
 68#define TMPV770X_CLK_PIPCMIF_AUDIO_O	52
 69#define TMPV770X_CLK_PIPCMIF_AUDIO_I	53
 70#define TMPV770X_CLK_PICMPT0		54
 71#define TMPV770X_CLK_PICMPT1		55
 72#define TMPV770X_CLK_PITSC		56
 73#define TMPV770X_CLK_PIUWDT		57
 74#define TMPV770X_CLK_PISWDT		58
 75#define TMPV770X_CLK_WDTCLK		59
 76#define TMPV770X_CLK_PISUBUS_150M	60
 77#define TMPV770X_CLK_PISUBUS_300M	61
 78#define TMPV770X_CLK_PIPMU		62
 79#define TMPV770X_CLK_PIGPMU		63
 80#define TMPV770X_CLK_PITMU		64
 81#define TMPV770X_CLK_WRCK		65
 82#define TMPV770X_CLK_PIEMM		66
 83#define TMPV770X_CLK_PIMISC		67
 84#define TMPV770X_CLK_PIGCOMM		68
 85#define TMPV770X_CLK_PIDCOMM		69
 86#define TMPV770X_CLK_PICKMON		70
 87#define TMPV770X_CLK_PIMBUS		71
 88#define TMPV770X_CLK_SBUSCLK		72
 89#define TMPV770X_CLK_DDR0_APBCLKCLK	73
 90#define TMPV770X_CLK_DDR1_APBCLKCLK	74
 91#define TMPV770X_CLK_DSP0_PBCLK		75
 92#define TMPV770X_CLK_DSP1_PBCLK		76
 93#define TMPV770X_CLK_DSP2_PBCLK		77
 94#define TMPV770X_CLK_DSP3_PBCLK		78
 95#define TMPV770X_CLK_DSVIIF0_APBCLK	79
 96#define TMPV770X_CLK_VIIF0_APBCLK	80
 97#define TMPV770X_CLK_VIIF0_CFGCLK	81
 98#define TMPV770X_CLK_VIIF1_APBCLK	82
 99#define TMPV770X_CLK_VIIF1_CFGCLK	83
100#define TMPV770X_CLK_VIIF2_APBCLK	84
101#define TMPV770X_CLK_VIIF2_CFGCLK	85
102#define TMPV770X_CLK_VIIF3_APBCLK	86
103#define TMPV770X_CLK_VIIF3_CFGCLK	87
104#define TMPV770X_CLK_VIIF4_APBCLK	88
105#define TMPV770X_CLK_VIIF4_CFGCLK	89
106#define TMPV770X_CLK_VIIF5_APBCLK	90
107#define TMPV770X_CLK_VIIF5_CFGCLK	91
108#define TMPV770X_CLK_VOIF_SBUSCLK	92
109#define TMPV770X_CLK_VOIF_PROCCLK	93
110#define TMPV770X_CLK_VOIF_DPHYCFGCLK	94
111#define TMPV770X_CLK_DNN0		95
112#define TMPV770X_CLK_STMAT		96
113#define TMPV770X_CLK_HWA0		97
114#define TMPV770X_CLK_AFFINE0		98
115#define TMPV770X_CLK_HAMAT		99
116#define TMPV770X_CLK_SMLDB		100
117#define TMPV770X_CLK_HWA0_ASYNC		101
118#define TMPV770X_CLK_HWA2		102
119#define TMPV770X_CLK_FLMAT		103
120#define TMPV770X_CLK_PYRAMID		104
121#define TMPV770X_CLK_HWA2_ASYNC		105
122#define TMPV770X_CLK_DSP0		106
123#define TMPV770X_CLK_VIIFBS0		107
124#define TMPV770X_CLK_VIIFBS0_L2ISP	108
125#define TMPV770X_CLK_VIIFBS0_L1ISP	109
126#define TMPV770X_CLK_VIIFBS0_PROC	110
127#define TMPV770X_CLK_VIIFBS1		111
128#define TMPV770X_CLK_VIIFBS2		112
129#define TMPV770X_CLK_VIIFOP_MBUS	113
130#define TMPV770X_CLK_VIIFOP0_PROC	114
131#define TMPV770X_CLK_PIETHER_2P5M	115
132#define TMPV770X_CLK_PIETHER_25M	116
133#define TMPV770X_CLK_PIETHER_50M	117
134#define TMPV770X_CLK_PIETHER_125M	118
135#define TMPV770X_CLK_VOIF0_DPHYCFG	119
136#define TMPV770X_CLK_VOIF0_PROC		120
137#define TMPV770X_CLK_VOIF0_SBUS		121
138#define TMPV770X_CLK_VOIF0_DSIREF	122
139#define TMPV770X_CLK_VOIF0_PIXEL	123
140#define TMPV770X_CLK_PIREFCLK		124
141#define TMPV770X_CLK_SBUS		125
142#define TMPV770X_CLK_BUSLCK		126
143#define TMPV770X_CLK_VIIFBS1_L2ISP	127
144#define TMPV770X_CLK_VIIFBS1_L1ISP	128
145#define TMPV770X_CLK_VIIFBS1_PROC	129
146
147/* Reset */
148#define TMPV770X_RESET_PIETHER_2P5M	0
149#define TMPV770X_RESET_PIETHER_25M	1
150#define TMPV770X_RESET_PIETHER_50M	2
151#define TMPV770X_RESET_PIETHER_125M	3
152#define TMPV770X_RESET_HOX		4
153#define TMPV770X_RESET_PCIE_MSTR	5
154#define TMPV770X_RESET_PCIE_AUX		6
155#define TMPV770X_RESET_PIINTC		7
156#define TMPV770X_RESET_PIETHER_BUS	8
157#define TMPV770X_RESET_PISPI0		9
158#define TMPV770X_RESET_PISPI1		10
159#define TMPV770X_RESET_PISPI2		11
160#define TMPV770X_RESET_PISPI3		12
161#define TMPV770X_RESET_PISPI4		13
162#define TMPV770X_RESET_PISPI5		14
163#define TMPV770X_RESET_PISPI6		15
164#define TMPV770X_RESET_PIUART0		16
165#define TMPV770X_RESET_PIUART1		17
166#define TMPV770X_RESET_PIUART2		18
167#define TMPV770X_RESET_PIUART3		19
168#define TMPV770X_RESET_PII2C0		20
169#define TMPV770X_RESET_PII2C1		21
170#define TMPV770X_RESET_PII2C2		22
171#define TMPV770X_RESET_PII2C3		23
172#define TMPV770X_RESET_PII2C4		24
173#define TMPV770X_RESET_PII2C5		25
174#define TMPV770X_RESET_PII2C6		26
175#define TMPV770X_RESET_PII2C7		27
176#define TMPV770X_RESET_PII2C8		28
177#define TMPV770X_RESET_PIPCMIF		29
178#define TMPV770X_RESET_PICKMON		30
179#define TMPV770X_RESET_SBUSCLK		31
180#define TMPV770X_RESET_VIIFBS0		32
181#define TMPV770X_RESET_VIIFBS0_APB	33
182#define TMPV770X_RESET_VIIFBS0_L2ISP	34
183#define TMPV770X_RESET_VIIFBS0_L1ISP	35
184#define TMPV770X_RESET_VIIFBS1		36
185#define TMPV770X_RESET_VIIFBS1_APB	37
186#define TMPV770X_RESET_VIIFBS1_L2ISP	38
187#define TMPV770X_RESET_VIIFBS1_L1ISP	39
188
189#endif /*_DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ */