raspberrypi,rp1-clocks.h

 1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
 2/*
 3 * Copyright (C) 2021 Raspberry Pi Ltd.
 4 */
 5
 6#ifndef __DT_BINDINGS_CLOCK_RASPBERRYPI_RP1
 7#define __DT_BINDINGS_CLOCK_RASPBERRYPI_RP1
 8
 9#define RP1_PLL_SYS_CORE		0
10#define RP1_PLL_AUDIO_CORE		1
11#define RP1_PLL_VIDEO_CORE		2
12
13#define RP1_PLL_SYS			3
14#define RP1_PLL_AUDIO			4
15#define RP1_PLL_VIDEO			5
16
17#define RP1_PLL_SYS_PRI_PH		6
18#define RP1_PLL_SYS_SEC_PH		7
19#define RP1_PLL_AUDIO_PRI_PH		8
20
21#define RP1_PLL_SYS_SEC			9
22#define RP1_PLL_AUDIO_SEC		10
23#define RP1_PLL_VIDEO_SEC		11
24
25#define RP1_CLK_SYS			12
26#define RP1_CLK_SLOW_SYS		13
27#define RP1_CLK_DMA			14
28#define RP1_CLK_UART			15
29#define RP1_CLK_ETH			16
30#define RP1_CLK_PWM0			17
31#define RP1_CLK_PWM1			18
32#define RP1_CLK_AUDIO_IN		19
33#define RP1_CLK_AUDIO_OUT		20
34#define RP1_CLK_I2S			21
35#define RP1_CLK_MIPI0_CFG		22
36#define RP1_CLK_MIPI1_CFG		23
37#define RP1_CLK_PCIE_AUX		24
38#define RP1_CLK_USBH0_MICROFRAME	25
39#define RP1_CLK_USBH1_MICROFRAME	26
40#define RP1_CLK_USBH0_SUSPEND		27
41#define RP1_CLK_USBH1_SUSPEND		28
42#define RP1_CLK_ETH_TSU			29
43#define RP1_CLK_ADC			30
44#define RP1_CLK_SDIO_TIMER		31
45#define RP1_CLK_SDIO_ALT_SRC		32
46#define RP1_CLK_GP0			33
47#define RP1_CLK_GP1			34
48#define RP1_CLK_GP2			35
49#define RP1_CLK_GP3			36
50#define RP1_CLK_GP4			37
51#define RP1_CLK_GP5			38
52#define RP1_CLK_VEC			39
53#define RP1_CLK_DPI			40
54#define RP1_CLK_MIPI0_DPI		41
55#define RP1_CLK_MIPI1_DPI		42
56
57/* Extra PLL output channels - RP1B0 only */
58#define RP1_PLL_VIDEO_PRI_PH		43
59#define RP1_PLL_AUDIO_TERN		44
60
61/* MIPI clocks managed by the DSI driver */
62#define RP1_CLK_MIPI0_DSI_BYTECLOCK	45
63#define RP1_CLK_MIPI1_DSI_BYTECLOCK	46
64
65#endif