accel.h

  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
  4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
  5
  6 */
  7
  8#ifndef __ACCEL_H__
  9#define __ACCEL_H__
 10
 11#define FB_ACCEL_VIA_UNICHROME  50
 12
 13/* MMIO Base Address Definition */
 14#define MMIO_VGABASE                0x8000
 15#define MMIO_CR_READ                (MMIO_VGABASE + 0x3D4)
 16#define MMIO_CR_WRITE               (MMIO_VGABASE + 0x3D5)
 17#define MMIO_SR_READ                (MMIO_VGABASE + 0x3C4)
 18#define MMIO_SR_WRITE               (MMIO_VGABASE + 0x3C5)
 19
 20/* HW Cursor Status Define */
 21#define HW_Cursor_ON    0
 22#define HW_Cursor_OFF   1
 23
 24#define CURSOR_SIZE     (8 * 1024)
 25#define VQ_SIZE         (256 * 1024)
 26
 27#define VIA_MMIO_BLTBASE        0x200000
 28#define VIA_MMIO_BLTSIZE        0x200000
 29
 30/* Defines for 2D registers */
 31#define VIA_REG_GECMD           0x000
 32#define VIA_REG_GEMODE          0x004
 33#define VIA_REG_SRCPOS          0x008
 34#define VIA_REG_DSTPOS          0x00C
 35/* width and height */
 36#define VIA_REG_DIMENSION       0x010
 37#define VIA_REG_PATADDR         0x014
 38#define VIA_REG_FGCOLOR         0x018
 39#define VIA_REG_BGCOLOR         0x01C
 40/* top and left of clipping */
 41#define VIA_REG_CLIPTL          0x020
 42/* bottom and right of clipping */
 43#define VIA_REG_CLIPBR          0x024
 44#define VIA_REG_OFFSET          0x028
 45/* color key control */
 46#define VIA_REG_KEYCONTROL      0x02C
 47#define VIA_REG_SRCBASE         0x030
 48#define VIA_REG_DSTBASE         0x034
 49/* pitch of src and dst */
 50#define VIA_REG_PITCH           0x038
 51#define VIA_REG_MONOPAT0        0x03C
 52#define VIA_REG_MONOPAT1        0x040
 53/* from 0x100 to 0x1ff */
 54#define VIA_REG_COLORPAT        0x100
 55
 56/* defines for VIA 2D registers for vt3353/3409 (M1 engine)*/
 57#define VIA_REG_GECMD_M1        0x000
 58#define VIA_REG_GEMODE_M1       0x004
 59#define VIA_REG_GESTATUS_M1     0x004       /* as same as VIA_REG_GEMODE */
 60#define VIA_REG_PITCH_M1        0x008       /* pitch of src and dst */
 61#define VIA_REG_DIMENSION_M1    0x00C       /* width and height */
 62#define VIA_REG_DSTPOS_M1       0x010
 63#define VIA_REG_LINE_XY_M1      0x010
 64#define VIA_REG_DSTBASE_M1      0x014
 65#define VIA_REG_SRCPOS_M1       0x018
 66#define VIA_REG_LINE_K1K2_M1    0x018
 67#define VIA_REG_SRCBASE_M1      0x01C
 68#define VIA_REG_PATADDR_M1      0x020
 69#define VIA_REG_MONOPAT0_M1     0x024
 70#define VIA_REG_MONOPAT1_M1     0x028
 71#define VIA_REG_OFFSET_M1       0x02C
 72#define VIA_REG_LINE_ERROR_M1   0x02C
 73#define VIA_REG_CLIPTL_M1       0x040       /* top and left of clipping */
 74#define VIA_REG_CLIPBR_M1       0x044       /* bottom and right of clipping */
 75#define VIA_REG_KEYCONTROL_M1   0x048       /* color key control */
 76#define VIA_REG_FGCOLOR_M1      0x04C
 77#define VIA_REG_DSTCOLORKEY_M1  0x04C       /* as same as VIA_REG_FG */
 78#define VIA_REG_BGCOLOR_M1      0x050
 79#define VIA_REG_SRCCOLORKEY_M1  0x050       /* as same as VIA_REG_BG */
 80#define VIA_REG_MONOPATFGC_M1   0x058       /* Add BG color of Pattern. */
 81#define VIA_REG_MONOPATBGC_M1   0x05C       /* Add FG color of Pattern. */
 82#define VIA_REG_COLORPAT_M1     0x100       /* from 0x100 to 0x1ff */
 83
 84/* VIA_REG_PITCH(0x38): Pitch Setting */
 85#define VIA_PITCH_ENABLE        0x80000000
 86
 87/* defines for VIA HW cursor registers */
 88#define VIA_REG_CURSOR_MODE     0x2D0
 89#define VIA_REG_CURSOR_POS      0x2D4
 90#define VIA_REG_CURSOR_ORG      0x2D8
 91#define VIA_REG_CURSOR_BG       0x2DC
 92#define VIA_REG_CURSOR_FG       0x2E0
 93
 94/* VIA_REG_GEMODE(0x04): GE mode */
 95#define VIA_GEM_8bpp            0x00000000
 96#define VIA_GEM_16bpp           0x00000100
 97#define VIA_GEM_32bpp           0x00000300
 98
 99/* VIA_REG_GECMD(0x00): 2D Engine Command  */
100#define VIA_GEC_NOOP            0x00000000
101#define VIA_GEC_BLT             0x00000001
102#define VIA_GEC_LINE            0x00000005
103
104/* Rotate Command */
105#define VIA_GEC_ROT             0x00000008
106
107#define VIA_GEC_SRC_XY          0x00000000
108#define VIA_GEC_SRC_LINEAR      0x00000010
109#define VIA_GEC_DST_XY          0x00000000
110#define VIA_GEC_DST_LINRAT      0x00000020
111
112#define VIA_GEC_SRC_FB          0x00000000
113#define VIA_GEC_SRC_SYS         0x00000040
114#define VIA_GEC_DST_FB          0x00000000
115#define VIA_GEC_DST_SYS         0x00000080
116
117/* source is mono */
118#define VIA_GEC_SRC_MONO        0x00000100
119/* pattern is mono */
120#define VIA_GEC_PAT_MONO        0x00000200
121/* mono src is opaque */
122#define VIA_GEC_MSRC_OPAQUE     0x00000000
123/* mono src is transparent */
124#define VIA_GEC_MSRC_TRANS      0x00000400
125/* pattern is in frame buffer */
126#define VIA_GEC_PAT_FB          0x00000000
127/* pattern is from reg setting */
128#define VIA_GEC_PAT_REG         0x00000800
129
130#define VIA_GEC_CLIP_DISABLE    0x00000000
131#define VIA_GEC_CLIP_ENABLE     0x00001000
132
133#define VIA_GEC_FIXCOLOR_PAT    0x00002000
134
135#define VIA_GEC_INCX            0x00000000
136#define VIA_GEC_DECY            0x00004000
137#define VIA_GEC_INCY            0x00000000
138#define VIA_GEC_DECX            0x00008000
139/* mono pattern is opaque */
140#define VIA_GEC_MPAT_OPAQUE     0x00000000
141/* mono pattern is transparent */
142#define VIA_GEC_MPAT_TRANS      0x00010000
143
144#define VIA_GEC_MONO_UNPACK     0x00000000
145#define VIA_GEC_MONO_PACK       0x00020000
146#define VIA_GEC_MONO_DWORD      0x00000000
147#define VIA_GEC_MONO_WORD       0x00040000
148#define VIA_GEC_MONO_BYTE       0x00080000
149
150#define VIA_GEC_LASTPIXEL_ON    0x00000000
151#define VIA_GEC_LASTPIXEL_OFF   0x00100000
152#define VIA_GEC_X_MAJOR         0x00000000
153#define VIA_GEC_Y_MAJOR         0x00200000
154#define VIA_GEC_QUICK_START     0x00800000
155
156/* defines for VIA 3D registers */
157#define VIA_REG_STATUS          0x400
158#define VIA_REG_CR_TRANSET      0x41C
159#define VIA_REG_CR_TRANSPACE	0x420
160#define VIA_REG_TRANSET         0x43C
161#define VIA_REG_TRANSPACE       0x440
162
163/* VIA_REG_STATUS(0x400): Engine Status */
164
165/* Command Regulator is busy */
166#define VIA_CMD_RGTR_BUSY       0x00000080
167/* 2D Engine is busy */
168#define VIA_2D_ENG_BUSY         0x00000002
169/* 3D Engine is busy */
170#define VIA_3D_ENG_BUSY         0x00000001
171/* Virtual Queue is busy */
172#define VIA_VR_QUEUE_BUSY       0x00020000
173
174/* VIA_REG_STATUS(0x400): Engine Status for H5 */
175#define VIA_CMD_RGTR_BUSY_H5   0x00000010  /* Command Regulator is busy */
176#define VIA_2D_ENG_BUSY_H5     0x00000002  /* 2D Engine is busy */
177#define VIA_3D_ENG_BUSY_H5     0x00001FE1  /* 3D Engine is busy */
178#define VIA_VR_QUEUE_BUSY_H5   0x00000004  /* Virtual Queue is busy */
179
180/* VIA_REG_STATUS(0x400): Engine Status for VT3353/3409 */
181#define VIA_CMD_RGTR_BUSY_M1   0x00000010  /* Command Regulator is busy */
182#define VIA_2D_ENG_BUSY_M1     0x00000002  /* 2D Engine is busy */
183#define VIA_3D_ENG_BUSY_M1     0x00001FE1  /* 3D Engine is busy */
184#define VIA_VR_QUEUE_BUSY_M1   0x00000004  /* Virtual Queue is busy */
185
186#define MAXLOOP                 0xFFFFFF
187
188#define VIA_BITBLT_COLOR	1
189#define VIA_BITBLT_MONO		2
190#define VIA_BITBLT_FILL		3
191
192int viafb_setup_engine(struct fb_info *info);
193void viafb_reset_engine(struct viafb_par *viapar);
194void viafb_show_hw_cursor(struct fb_info *info, int Status);
195void viafb_wait_engine_idle(struct fb_info *info);
196
197#endif /* __ACCEL_H__ */