valkyriefb.h

  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 * valkyriefb.h: Constants of all sorts for valkyriefb
  4 *
  5 *  Created 8 August 1998 by 
  6 *  Martin Costabel <costabel@wanadoo.fr> and Kevin Schoedel
  7 *
  8 * Vmode-switching changes and vmode 15/17 modifications created 29 August
  9 * 1998 by Barry K. Nathan <barryn@pobox.com>.
 10 * 
 11 * vmode 10 changed by Steven Borley <sjb@salix.demon.co.uk>, 14 mai 2000
 12 *
 13 * Ported to 68k Macintosh by David Huggins-Daines <dhd@debian.org>
 14 *
 15 * Based directly on:
 16 *
 17 *  controlfb.h: Constants of all sorts for controlfb
 18 *  Copyright (C) 1998 Daniel Jacobowitz <dan@debian.org>
 19 *
 20 *  pmc-valkyrie.h: Console support for PowerMac "control" display adaptor.
 21 *  Copyright (C) 1997 Paul Mackerras.
 22 *
 23 *  pmc-valkyrie.c: Console support for PowerMac "control" display adaptor.
 24 *  Copyright (C) 1997 Paul Mackerras.
 25 *
 26 * and indirectly from:
 27 *
 28 *  pmc-control.h: Console support for PowerMac "control" display adaptor.
 29 *  Copyright (C) 1997 Paul Mackerras.
 30 *
 31 *  pmc-control.c: Console support for PowerMac "control" display adaptor.
 32 *  Copyright (C) 1996 Paul Mackerras.
 33 *
 34 *  platinumfb.c: Console support for PowerMac "platinum" display adaptor.
 35 *  Copyright (C) 1998 Jon Howell
 36 */
 37
 38#ifdef CONFIG_MAC
 39/* Valkyrie registers are word-aligned on m68k */
 40#define VALKYRIE_REG_PADSIZE	3
 41#else
 42#define VALKYRIE_REG_PADSIZE	7
 43#endif
 44
 45/*
 46 * Structure of the registers for the Valkyrie colormap registers.
 47 */
 48struct cmap_regs {
 49	unsigned char addr;
 50	char pad1[VALKYRIE_REG_PADSIZE];
 51	unsigned char lut;
 52};
 53
 54/*
 55 * Structure of the registers for the "valkyrie" display adaptor.
 56 */
 57
 58struct vpreg {			/* padded register */
 59	unsigned char r;
 60	char pad[VALKYRIE_REG_PADSIZE];
 61};
 62
 63
 64struct valkyrie_regs {
 65	struct vpreg mode;
 66	struct vpreg depth;
 67	struct vpreg status;
 68	struct vpreg reg3;
 69	struct vpreg intr;
 70	struct vpreg reg5;
 71	struct vpreg intr_enb;
 72	struct vpreg msense;
 73};
 74
 75/*
 76 * Register initialization tables for the valkyrie display.
 77 *
 78 * Dot clock rate is
 79 * 3.9064MHz * 2**clock_params[2] * clock_params[1] / clock_params[0].
 80 */
 81struct valkyrie_regvals {
 82	unsigned char mode;
 83	unsigned char clock_params[3];
 84	int	pitch[2];		/* bytes/line, indexed by color_mode */
 85	int	hres;
 86	int	vres;
 87};
 88
 89#ifndef CONFIG_MAC
 90/* Register values for 1024x768, 75Hz mode (17) */
 91/* I'm not sure which mode this is (16 or 17), so I'm defining it as 17,
 92 * since the equivalent mode in controlfb (which I adapted this from) is
 93 * also 17. Just because MacOS can't do this on Valkyrie doesn't mean we
 94 * can't! :)
 95 *
 96 * I was going to use 12, 31, 3, which I found by myself, but instead I'm
 97 * using 11, 28, 3 like controlfb, for consistency's sake.
 98 */
 99
100static struct valkyrie_regvals valkyrie_reg_init_17 = {
101    15, 
102    { 11, 28, 3 },  /* pixel clock = 79.55MHz for V=74.50Hz */
103    { 1024, 0 },
104	1024, 768
105};
106
107/* Register values for 1024x768, 72Hz mode (15) */
108/* This used to be 12, 30, 3 for pixel clock = 78.12MHz for V=72.12Hz, but
109 * that didn't match MacOS in the same video mode on this chip, and it also
110 * caused the 15" Apple Studio Display to not work in this mode. While this
111 * mode still doesn't match MacOS exactly (as far as I can tell), it's a lot
112 * closer now, and it works with the Apple Studio Display.
113 *
114 * Yes, even though MacOS calls it "72Hz", in reality it's about 70Hz.
115 */
116static struct valkyrie_regvals valkyrie_reg_init_15 = {
117    15,
118    { 12, 29, 3 },  /* pixel clock = 75.52MHz for V=69.71Hz? */
119		    /* I interpolated the V=69.71 from the vmode 14 and old 15
120		     * numbers. Is this result correct?
121		     */
122    { 1024, 0 },
123	1024, 768
124};
125
126/* Register values for 1024x768, 60Hz mode (14) */
127static struct valkyrie_regvals valkyrie_reg_init_14 = {
128    14,
129    { 15, 31, 3 },  /* pixel clock = 64.58MHz for V=59.62Hz */
130    { 1024, 0 },
131	1024, 768
132};
133#endif /* !defined CONFIG_MAC */
134
135/* Register values for 832x624, 75Hz mode (13) */
136static struct valkyrie_regvals valkyrie_reg_init_13 = {
137    9,
138    { 23, 42, 3 },  /* pixel clock = 57.07MHz for V=74.27Hz */
139    { 832, 0 },
140	832, 624
141};
142
143/* Register values for 800x600, 72Hz mode (11) */
144static struct valkyrie_regvals valkyrie_reg_init_11 = {
145    13,
146    { 17, 27, 3 },  /* pixel clock = 49.63MHz for V=71.66Hz */
147    { 800, 0 },
148	800, 600
149};
150
151/* Register values for 800x600, 60Hz mode (10) */
152static struct valkyrie_regvals valkyrie_reg_init_10 = {
153    12,
154    { 25, 32, 3 },  /* pixel clock = 40.0015MHz,
155                     used to be 20,53,2, pixel clock 41.41MHz for V=59.78Hz */
156    { 800, 1600 },
157	800, 600
158};
159
160/* Register values for 640x480, 67Hz mode (6) */
161static struct valkyrie_regvals valkyrie_reg_init_6 = {
162    6,
163    { 14, 27, 2 },  /* pixel clock = 30.13MHz for V=66.43Hz */
164    { 640, 1280 },
165	640, 480
166};
167
168/* Register values for 640x480, 60Hz mode (5) */
169static struct valkyrie_regvals valkyrie_reg_init_5 = {
170    11,
171    { 23, 37, 2 },  /* pixel clock = 25.14MHz for V=59.85Hz */
172    { 640, 1280 },
173	640, 480
174};
175
176static struct valkyrie_regvals *valkyrie_reg_init[VMODE_MAX] = {
177	NULL,
178	NULL,
179	NULL,
180	NULL,
181	&valkyrie_reg_init_5,
182	&valkyrie_reg_init_6,
183	NULL,
184	NULL,
185	NULL,
186	&valkyrie_reg_init_10,
187	&valkyrie_reg_init_11,
188	NULL,
189	&valkyrie_reg_init_13,
190#ifndef CONFIG_MAC
191	&valkyrie_reg_init_14,
192	&valkyrie_reg_init_15,
193	NULL,
194	&valkyrie_reg_init_17,
195#endif
196};