dss_features.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * linux/drivers/video/omap2/dss/dss_features.c
  4 *
  5 * Copyright (C) 2010 Texas Instruments
  6 * Author: Archit Taneja <archit@ti.com>
  7 */
  8
  9#include <linux/export.h>
 10#include <linux/kernel.h>
 11#include <linux/module.h>
 12#include <linux/types.h>
 13#include <linux/err.h>
 14#include <linux/slab.h>
 15
 16#include <video/omapfb_dss.h>
 17
 18#include "dss.h"
 19#include "dss_features.h"
 20
 21/* Defines a generic omap register field */
 22struct dss_reg_field {
 23	u8 start, end;
 24};
 25
 26struct dss_param_range {
 27	int min, max;
 28};
 29
 30struct omap_dss_features {
 31	const struct dss_reg_field *reg_fields;
 32	const int num_reg_fields;
 33
 34	const enum dss_feat_id *features;
 35	const int num_features;
 36
 37	const int num_mgrs;
 38	const int num_ovls;
 39	const enum omap_display_type *supported_displays;
 40	const enum omap_dss_output_id *supported_outputs;
 41	const enum omap_color_mode *supported_color_modes;
 42	const enum omap_overlay_caps *overlay_caps;
 43	const char * const *clksrc_names;
 44	const struct dss_param_range *dss_params;
 45
 46	const enum omap_dss_rotation_type supported_rotation_types;
 47
 48	const u32 buffer_size_unit;
 49	const u32 burst_size_unit;
 50};
 51
 52/* This struct is assigned to one of the below during initialization */
 53static const struct omap_dss_features *omap_current_dss_features;
 54
 55static const struct dss_reg_field omap2_dss_reg_fields[] = {
 56	[FEAT_REG_FIRHINC]			= { 11, 0 },
 57	[FEAT_REG_FIRVINC]			= { 27, 16 },
 58	[FEAT_REG_FIFOLOWTHRESHOLD]		= { 8, 0 },
 59	[FEAT_REG_FIFOHIGHTHRESHOLD]		= { 24, 16 },
 60	[FEAT_REG_FIFOSIZE]			= { 8, 0 },
 61	[FEAT_REG_HORIZONTALACCU]		= { 9, 0 },
 62	[FEAT_REG_VERTICALACCU]			= { 25, 16 },
 63	[FEAT_REG_DISPC_CLK_SWITCH]		= { 0, 0 },
 64};
 65
 66static const struct dss_reg_field omap3_dss_reg_fields[] = {
 67	[FEAT_REG_FIRHINC]			= { 12, 0 },
 68	[FEAT_REG_FIRVINC]			= { 28, 16 },
 69	[FEAT_REG_FIFOLOWTHRESHOLD]		= { 11, 0 },
 70	[FEAT_REG_FIFOHIGHTHRESHOLD]		= { 27, 16 },
 71	[FEAT_REG_FIFOSIZE]			= { 10, 0 },
 72	[FEAT_REG_HORIZONTALACCU]		= { 9, 0 },
 73	[FEAT_REG_VERTICALACCU]			= { 25, 16 },
 74	[FEAT_REG_DISPC_CLK_SWITCH]		= { 0, 0 },
 75};
 76
 77static const struct dss_reg_field am43xx_dss_reg_fields[] = {
 78	[FEAT_REG_FIRHINC]			= { 12, 0 },
 79	[FEAT_REG_FIRVINC]			= { 28, 16 },
 80	[FEAT_REG_FIFOLOWTHRESHOLD]	= { 11, 0 },
 81	[FEAT_REG_FIFOHIGHTHRESHOLD]		= { 27, 16 },
 82	[FEAT_REG_FIFOSIZE]		= { 10, 0 },
 83	[FEAT_REG_HORIZONTALACCU]		= { 9, 0 },
 84	[FEAT_REG_VERTICALACCU]			= { 25, 16 },
 85	[FEAT_REG_DISPC_CLK_SWITCH]		= { 0, 0 },
 86};
 87
 88static const struct dss_reg_field omap4_dss_reg_fields[] = {
 89	[FEAT_REG_FIRHINC]			= { 12, 0 },
 90	[FEAT_REG_FIRVINC]			= { 28, 16 },
 91	[FEAT_REG_FIFOLOWTHRESHOLD]		= { 15, 0 },
 92	[FEAT_REG_FIFOHIGHTHRESHOLD]		= { 31, 16 },
 93	[FEAT_REG_FIFOSIZE]			= { 15, 0 },
 94	[FEAT_REG_HORIZONTALACCU]		= { 10, 0 },
 95	[FEAT_REG_VERTICALACCU]			= { 26, 16 },
 96	[FEAT_REG_DISPC_CLK_SWITCH]		= { 9, 8 },
 97};
 98
 99static const struct dss_reg_field omap5_dss_reg_fields[] = {
100	[FEAT_REG_FIRHINC]			= { 12, 0 },
101	[FEAT_REG_FIRVINC]			= { 28, 16 },
102	[FEAT_REG_FIFOLOWTHRESHOLD]		= { 15, 0 },
103	[FEAT_REG_FIFOHIGHTHRESHOLD]		= { 31, 16 },
104	[FEAT_REG_FIFOSIZE]			= { 15, 0 },
105	[FEAT_REG_HORIZONTALACCU]		= { 10, 0 },
106	[FEAT_REG_VERTICALACCU]			= { 26, 16 },
107	[FEAT_REG_DISPC_CLK_SWITCH]		= { 9, 7 },
108};
109
110static const enum omap_display_type omap2_dss_supported_displays[] = {
111	/* OMAP_DSS_CHANNEL_LCD */
112	OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
113
114	/* OMAP_DSS_CHANNEL_DIGIT */
115	OMAP_DISPLAY_TYPE_VENC,
116};
117
118static const enum omap_display_type omap3430_dss_supported_displays[] = {
119	/* OMAP_DSS_CHANNEL_LCD */
120	OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
121	OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
122
123	/* OMAP_DSS_CHANNEL_DIGIT */
124	OMAP_DISPLAY_TYPE_VENC,
125};
126
127static const enum omap_display_type omap3630_dss_supported_displays[] = {
128	/* OMAP_DSS_CHANNEL_LCD */
129	OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
130	OMAP_DISPLAY_TYPE_DSI,
131
132	/* OMAP_DSS_CHANNEL_DIGIT */
133	OMAP_DISPLAY_TYPE_VENC,
134};
135
136static const enum omap_display_type am43xx_dss_supported_displays[] = {
137	/* OMAP_DSS_CHANNEL_LCD */
138	OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
139};
140
141static const enum omap_display_type omap4_dss_supported_displays[] = {
142	/* OMAP_DSS_CHANNEL_LCD */
143	OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
144
145	/* OMAP_DSS_CHANNEL_DIGIT */
146	OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
147
148	/* OMAP_DSS_CHANNEL_LCD2 */
149	OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
150	OMAP_DISPLAY_TYPE_DSI,
151};
152
153static const enum omap_display_type omap5_dss_supported_displays[] = {
154	/* OMAP_DSS_CHANNEL_LCD */
155	OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
156	OMAP_DISPLAY_TYPE_DSI,
157
158	/* OMAP_DSS_CHANNEL_DIGIT */
159	OMAP_DISPLAY_TYPE_HDMI | OMAP_DISPLAY_TYPE_DPI,
160
161	/* OMAP_DSS_CHANNEL_LCD2 */
162	OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
163	OMAP_DISPLAY_TYPE_DSI,
164};
165
166static const enum omap_dss_output_id omap2_dss_supported_outputs[] = {
167	/* OMAP_DSS_CHANNEL_LCD */
168	OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
169
170	/* OMAP_DSS_CHANNEL_DIGIT */
171	OMAP_DSS_OUTPUT_VENC,
172};
173
174static const enum omap_dss_output_id omap3430_dss_supported_outputs[] = {
175	/* OMAP_DSS_CHANNEL_LCD */
176	OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
177	OMAP_DSS_OUTPUT_SDI | OMAP_DSS_OUTPUT_DSI1,
178
179	/* OMAP_DSS_CHANNEL_DIGIT */
180	OMAP_DSS_OUTPUT_VENC,
181};
182
183static const enum omap_dss_output_id omap3630_dss_supported_outputs[] = {
184	/* OMAP_DSS_CHANNEL_LCD */
185	OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
186	OMAP_DSS_OUTPUT_DSI1,
187
188	/* OMAP_DSS_CHANNEL_DIGIT */
189	OMAP_DSS_OUTPUT_VENC,
190};
191
192static const enum omap_dss_output_id am43xx_dss_supported_outputs[] = {
193	/* OMAP_DSS_CHANNEL_LCD */
194	OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
195};
196
197static const enum omap_dss_output_id omap4_dss_supported_outputs[] = {
198	/* OMAP_DSS_CHANNEL_LCD */
199	OMAP_DSS_OUTPUT_DBI | OMAP_DSS_OUTPUT_DSI1,
200
201	/* OMAP_DSS_CHANNEL_DIGIT */
202	OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI,
203
204	/* OMAP_DSS_CHANNEL_LCD2 */
205	OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
206	OMAP_DSS_OUTPUT_DSI2,
207};
208
209static const enum omap_dss_output_id omap5_dss_supported_outputs[] = {
210	/* OMAP_DSS_CHANNEL_LCD */
211	OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
212	OMAP_DSS_OUTPUT_DSI1 | OMAP_DSS_OUTPUT_DSI2,
213
214	/* OMAP_DSS_CHANNEL_DIGIT */
215	OMAP_DSS_OUTPUT_HDMI,
216
217	/* OMAP_DSS_CHANNEL_LCD2 */
218	OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
219	OMAP_DSS_OUTPUT_DSI1,
220
221	/* OMAP_DSS_CHANNEL_LCD3 */
222	OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
223	OMAP_DSS_OUTPUT_DSI2,
224};
225
226static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
227	/* OMAP_DSS_GFX */
228	OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
229	OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
230	OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
231	OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
232
233	/* OMAP_DSS_VIDEO1 */
234	OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
235	OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
236	OMAP_DSS_COLOR_UYVY,
237
238	/* OMAP_DSS_VIDEO2 */
239	OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
240	OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
241	OMAP_DSS_COLOR_UYVY,
242};
243
244static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
245	/* OMAP_DSS_GFX */
246	OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
247	OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
248	OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
249	OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
250	OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
251	OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
252
253	/* OMAP_DSS_VIDEO1 */
254	OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
255	OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
256	OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
257
258	/* OMAP_DSS_VIDEO2 */
259	OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
260	OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
261	OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
262	OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
263	OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
264};
265
266static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
267	/* OMAP_DSS_GFX */
268	OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
269	OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
270	OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
271	OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
272	OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
273	OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
274	OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
275	OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
276
277	/* OMAP_DSS_VIDEO1 */
278	OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
279	OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
280	OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
281	OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
282	OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
283	OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
284	OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
285	OMAP_DSS_COLOR_RGBX32,
286
287       /* OMAP_DSS_VIDEO2 */
288	OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
289	OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
290	OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
291	OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
292	OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
293	OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
294	OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
295	OMAP_DSS_COLOR_RGBX32,
296
297	/* OMAP_DSS_VIDEO3 */
298	OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
299	OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
300	OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
301	OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
302	OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
303	OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
304	OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
305	OMAP_DSS_COLOR_RGBX32,
306
307	/* OMAP_DSS_WB */
308	OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
309	OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
310	OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
311	OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
312	OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
313	OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
314	OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
315	OMAP_DSS_COLOR_RGBX32,
316};
317
318static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
319	/* OMAP_DSS_GFX */
320	OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
321
322	/* OMAP_DSS_VIDEO1 */
323	OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
324		OMAP_DSS_OVL_CAP_REPLICATION,
325
326	/* OMAP_DSS_VIDEO2 */
327	OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
328		OMAP_DSS_OVL_CAP_REPLICATION,
329};
330
331static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
332	/* OMAP_DSS_GFX */
333	OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_POS |
334		OMAP_DSS_OVL_CAP_REPLICATION,
335
336	/* OMAP_DSS_VIDEO1 */
337	OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
338		OMAP_DSS_OVL_CAP_REPLICATION,
339
340	/* OMAP_DSS_VIDEO2 */
341	OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
342		OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
343};
344
345static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
346	/* OMAP_DSS_GFX */
347	OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
348		OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
349
350	/* OMAP_DSS_VIDEO1 */
351	OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
352		OMAP_DSS_OVL_CAP_REPLICATION,
353
354	/* OMAP_DSS_VIDEO2 */
355	OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
356		OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_POS |
357		OMAP_DSS_OVL_CAP_REPLICATION,
358};
359
360static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
361	/* OMAP_DSS_GFX */
362	OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
363		OMAP_DSS_OVL_CAP_ZORDER | OMAP_DSS_OVL_CAP_POS |
364		OMAP_DSS_OVL_CAP_REPLICATION,
365
366	/* OMAP_DSS_VIDEO1 */
367	OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
368		OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
369		OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
370
371	/* OMAP_DSS_VIDEO2 */
372	OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
373		OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
374		OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
375
376	/* OMAP_DSS_VIDEO3 */
377	OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
378		OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
379		OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
380};
381
382static const char * const omap2_dss_clk_source_names[] = {
383	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]	= "N/A",
384	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]	= "N/A",
385	[OMAP_DSS_CLK_SRC_FCK]			= "DSS_FCLK1",
386};
387
388static const char * const omap3_dss_clk_source_names[] = {
389	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]	= "DSI1_PLL_FCLK",
390	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]	= "DSI2_PLL_FCLK",
391	[OMAP_DSS_CLK_SRC_FCK]			= "DSS1_ALWON_FCLK",
392};
393
394static const char * const omap4_dss_clk_source_names[] = {
395	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]	= "PLL1_CLK1",
396	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]	= "PLL1_CLK2",
397	[OMAP_DSS_CLK_SRC_FCK]			= "DSS_FCLK",
398	[OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC]	= "PLL2_CLK1",
399	[OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI]	= "PLL2_CLK2",
400};
401
402static const char * const omap5_dss_clk_source_names[] = {
403	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]	= "DPLL_DSI1_A_CLK1",
404	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]	= "DPLL_DSI1_A_CLK2",
405	[OMAP_DSS_CLK_SRC_FCK]			= "DSS_CLK",
406	[OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC]	= "DPLL_DSI1_C_CLK1",
407	[OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI]	= "DPLL_DSI1_C_CLK2",
408};
409
410static const struct dss_param_range omap2_dss_param_range[] = {
411	[FEAT_PARAM_DSS_FCK]			= { 0, 133000000 },
412	[FEAT_PARAM_DSS_PCD]			= { 2, 255 },
413	[FEAT_PARAM_DOWNSCALE]			= { 1, 2 },
414	/*
415	 * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
416	 * scaler cannot scale a image with width more than 768.
417	 */
418	[FEAT_PARAM_LINEWIDTH]			= { 1, 768 },
419};
420
421static const struct dss_param_range omap3_dss_param_range[] = {
422	[FEAT_PARAM_DSS_FCK]			= { 0, 173000000 },
423	[FEAT_PARAM_DSS_PCD]			= { 1, 255 },
424	[FEAT_PARAM_DSIPLL_LPDIV]		= { 1, (1 << 13) - 1},
425	[FEAT_PARAM_DSI_FCK]			= { 0, 173000000 },
426	[FEAT_PARAM_DOWNSCALE]			= { 1, 4 },
427	[FEAT_PARAM_LINEWIDTH]			= { 1, 1024 },
428};
429
430static const struct dss_param_range am43xx_dss_param_range[] = {
431	[FEAT_PARAM_DSS_FCK]			= { 0, 200000000 },
432	[FEAT_PARAM_DSS_PCD]			= { 1, 255 },
433	[FEAT_PARAM_DOWNSCALE]			= { 1, 4 },
434	[FEAT_PARAM_LINEWIDTH]			= { 1, 1024 },
435};
436
437static const struct dss_param_range omap4_dss_param_range[] = {
438	[FEAT_PARAM_DSS_FCK]			= { 0, 186000000 },
439	[FEAT_PARAM_DSS_PCD]			= { 1, 255 },
440	[FEAT_PARAM_DSIPLL_LPDIV]		= { 0, (1 << 13) - 1 },
441	[FEAT_PARAM_DSI_FCK]			= { 0, 170000000 },
442	[FEAT_PARAM_DOWNSCALE]			= { 1, 4 },
443	[FEAT_PARAM_LINEWIDTH]			= { 1, 2048 },
444};
445
446static const struct dss_param_range omap5_dss_param_range[] = {
447	[FEAT_PARAM_DSS_FCK]			= { 0, 209250000 },
448	[FEAT_PARAM_DSS_PCD]			= { 1, 255 },
449	[FEAT_PARAM_DSIPLL_LPDIV]		= { 0, (1 << 13) - 1 },
450	[FEAT_PARAM_DSI_FCK]			= { 0, 209250000 },
451	[FEAT_PARAM_DOWNSCALE]			= { 1, 4 },
452	[FEAT_PARAM_LINEWIDTH]			= { 1, 2048 },
453};
454
455static const enum dss_feat_id omap2_dss_feat_list[] = {
456	FEAT_LCDENABLEPOL,
457	FEAT_LCDENABLESIGNAL,
458	FEAT_PCKFREEENABLE,
459	FEAT_FUNCGATED,
460	FEAT_ROWREPEATENABLE,
461	FEAT_RESIZECONF,
462};
463
464static const enum dss_feat_id omap3430_dss_feat_list[] = {
465	FEAT_LCDENABLEPOL,
466	FEAT_LCDENABLESIGNAL,
467	FEAT_PCKFREEENABLE,
468	FEAT_FUNCGATED,
469	FEAT_LINEBUFFERSPLIT,
470	FEAT_ROWREPEATENABLE,
471	FEAT_RESIZECONF,
472	FEAT_DSI_REVERSE_TXCLKESC,
473	FEAT_VENC_REQUIRES_TV_DAC_CLK,
474	FEAT_CPR,
475	FEAT_PRELOAD,
476	FEAT_FIR_COEF_V,
477	FEAT_ALPHA_FIXED_ZORDER,
478	FEAT_FIFO_MERGE,
479	FEAT_OMAP3_DSI_FIFO_BUG,
480	FEAT_DPI_USES_VDDS_DSI,
481};
482
483static const enum dss_feat_id am35xx_dss_feat_list[] = {
484	FEAT_LCDENABLEPOL,
485	FEAT_LCDENABLESIGNAL,
486	FEAT_PCKFREEENABLE,
487	FEAT_FUNCGATED,
488	FEAT_LINEBUFFERSPLIT,
489	FEAT_ROWREPEATENABLE,
490	FEAT_RESIZECONF,
491	FEAT_DSI_REVERSE_TXCLKESC,
492	FEAT_VENC_REQUIRES_TV_DAC_CLK,
493	FEAT_CPR,
494	FEAT_PRELOAD,
495	FEAT_FIR_COEF_V,
496	FEAT_ALPHA_FIXED_ZORDER,
497	FEAT_FIFO_MERGE,
498	FEAT_OMAP3_DSI_FIFO_BUG,
499};
500
501static const enum dss_feat_id am43xx_dss_feat_list[] = {
502	FEAT_LCDENABLEPOL,
503	FEAT_LCDENABLESIGNAL,
504	FEAT_PCKFREEENABLE,
505	FEAT_FUNCGATED,
506	FEAT_LINEBUFFERSPLIT,
507	FEAT_ROWREPEATENABLE,
508	FEAT_RESIZECONF,
509	FEAT_CPR,
510	FEAT_PRELOAD,
511	FEAT_FIR_COEF_V,
512	FEAT_ALPHA_FIXED_ZORDER,
513	FEAT_FIFO_MERGE,
514};
515
516static const enum dss_feat_id omap3630_dss_feat_list[] = {
517	FEAT_LCDENABLEPOL,
518	FEAT_LCDENABLESIGNAL,
519	FEAT_PCKFREEENABLE,
520	FEAT_FUNCGATED,
521	FEAT_LINEBUFFERSPLIT,
522	FEAT_ROWREPEATENABLE,
523	FEAT_RESIZECONF,
524	FEAT_DSI_PLL_PWR_BUG,
525	FEAT_CPR,
526	FEAT_PRELOAD,
527	FEAT_FIR_COEF_V,
528	FEAT_ALPHA_FIXED_ZORDER,
529	FEAT_FIFO_MERGE,
530	FEAT_OMAP3_DSI_FIFO_BUG,
531	FEAT_DPI_USES_VDDS_DSI,
532};
533
534static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
535	FEAT_MGR_LCD2,
536	FEAT_CORE_CLK_DIV,
537	FEAT_LCD_CLK_SRC,
538	FEAT_DSI_DCS_CMD_CONFIG_VC,
539	FEAT_DSI_VC_OCP_WIDTH,
540	FEAT_DSI_GNQ,
541	FEAT_HANDLE_UV_SEPARATE,
542	FEAT_ATTR2,
543	FEAT_CPR,
544	FEAT_PRELOAD,
545	FEAT_FIR_COEF_V,
546	FEAT_ALPHA_FREE_ZORDER,
547	FEAT_FIFO_MERGE,
548	FEAT_BURST_2D,
549};
550
551static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
552	FEAT_MGR_LCD2,
553	FEAT_CORE_CLK_DIV,
554	FEAT_LCD_CLK_SRC,
555	FEAT_DSI_DCS_CMD_CONFIG_VC,
556	FEAT_DSI_VC_OCP_WIDTH,
557	FEAT_DSI_GNQ,
558	FEAT_HDMI_CTS_SWMODE,
559	FEAT_HANDLE_UV_SEPARATE,
560	FEAT_ATTR2,
561	FEAT_CPR,
562	FEAT_PRELOAD,
563	FEAT_FIR_COEF_V,
564	FEAT_ALPHA_FREE_ZORDER,
565	FEAT_FIFO_MERGE,
566	FEAT_BURST_2D,
567};
568
569static const enum dss_feat_id omap4_dss_feat_list[] = {
570	FEAT_MGR_LCD2,
571	FEAT_CORE_CLK_DIV,
572	FEAT_LCD_CLK_SRC,
573	FEAT_DSI_DCS_CMD_CONFIG_VC,
574	FEAT_DSI_VC_OCP_WIDTH,
575	FEAT_DSI_GNQ,
576	FEAT_HDMI_CTS_SWMODE,
577	FEAT_HDMI_AUDIO_USE_MCLK,
578	FEAT_HANDLE_UV_SEPARATE,
579	FEAT_ATTR2,
580	FEAT_CPR,
581	FEAT_PRELOAD,
582	FEAT_FIR_COEF_V,
583	FEAT_ALPHA_FREE_ZORDER,
584	FEAT_FIFO_MERGE,
585	FEAT_BURST_2D,
586};
587
588static const enum dss_feat_id omap5_dss_feat_list[] = {
589	FEAT_MGR_LCD2,
590	FEAT_MGR_LCD3,
591	FEAT_CORE_CLK_DIV,
592	FEAT_LCD_CLK_SRC,
593	FEAT_DSI_DCS_CMD_CONFIG_VC,
594	FEAT_DSI_VC_OCP_WIDTH,
595	FEAT_DSI_GNQ,
596	FEAT_HDMI_CTS_SWMODE,
597	FEAT_HDMI_AUDIO_USE_MCLK,
598	FEAT_HANDLE_UV_SEPARATE,
599	FEAT_ATTR2,
600	FEAT_CPR,
601	FEAT_PRELOAD,
602	FEAT_FIR_COEF_V,
603	FEAT_ALPHA_FREE_ZORDER,
604	FEAT_FIFO_MERGE,
605	FEAT_BURST_2D,
606	FEAT_DSI_PHY_DCC,
607	FEAT_MFLAG,
608};
609
610/* OMAP2 DSS Features */
611static const struct omap_dss_features omap2_dss_features = {
612	.reg_fields = omap2_dss_reg_fields,
613	.num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
614
615	.features = omap2_dss_feat_list,
616	.num_features = ARRAY_SIZE(omap2_dss_feat_list),
617
618	.num_mgrs = 2,
619	.num_ovls = 3,
620	.supported_displays = omap2_dss_supported_displays,
621	.supported_outputs = omap2_dss_supported_outputs,
622	.supported_color_modes = omap2_dss_supported_color_modes,
623	.overlay_caps = omap2_dss_overlay_caps,
624	.clksrc_names = omap2_dss_clk_source_names,
625	.dss_params = omap2_dss_param_range,
626	.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
627	.buffer_size_unit = 1,
628	.burst_size_unit = 8,
629};
630
631/* OMAP3 DSS Features */
632static const struct omap_dss_features omap3430_dss_features = {
633	.reg_fields = omap3_dss_reg_fields,
634	.num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
635
636	.features = omap3430_dss_feat_list,
637	.num_features = ARRAY_SIZE(omap3430_dss_feat_list),
638
639	.num_mgrs = 2,
640	.num_ovls = 3,
641	.supported_displays = omap3430_dss_supported_displays,
642	.supported_outputs = omap3430_dss_supported_outputs,
643	.supported_color_modes = omap3_dss_supported_color_modes,
644	.overlay_caps = omap3430_dss_overlay_caps,
645	.clksrc_names = omap3_dss_clk_source_names,
646	.dss_params = omap3_dss_param_range,
647	.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
648	.buffer_size_unit = 1,
649	.burst_size_unit = 8,
650};
651
652/*
653 * AM35xx DSS Features. This is basically OMAP3 DSS Features without the
654 * vdds_dsi regulator.
655 */
656static const struct omap_dss_features am35xx_dss_features = {
657	.reg_fields = omap3_dss_reg_fields,
658	.num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
659
660	.features = am35xx_dss_feat_list,
661	.num_features = ARRAY_SIZE(am35xx_dss_feat_list),
662
663	.num_mgrs = 2,
664	.num_ovls = 3,
665	.supported_displays = omap3430_dss_supported_displays,
666	.supported_outputs = omap3430_dss_supported_outputs,
667	.supported_color_modes = omap3_dss_supported_color_modes,
668	.overlay_caps = omap3430_dss_overlay_caps,
669	.clksrc_names = omap3_dss_clk_source_names,
670	.dss_params = omap3_dss_param_range,
671	.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
672	.buffer_size_unit = 1,
673	.burst_size_unit = 8,
674};
675
676static const struct omap_dss_features am43xx_dss_features = {
677	.reg_fields = am43xx_dss_reg_fields,
678	.num_reg_fields = ARRAY_SIZE(am43xx_dss_reg_fields),
679
680	.features = am43xx_dss_feat_list,
681	.num_features = ARRAY_SIZE(am43xx_dss_feat_list),
682
683	.num_mgrs = 1,
684	.num_ovls = 3,
685	.supported_displays = am43xx_dss_supported_displays,
686	.supported_outputs = am43xx_dss_supported_outputs,
687	.supported_color_modes = omap3_dss_supported_color_modes,
688	.overlay_caps = omap3430_dss_overlay_caps,
689	.clksrc_names = omap2_dss_clk_source_names,
690	.dss_params = am43xx_dss_param_range,
691	.supported_rotation_types = OMAP_DSS_ROT_DMA,
692	.buffer_size_unit = 1,
693	.burst_size_unit = 8,
694};
695
696static const struct omap_dss_features omap3630_dss_features = {
697	.reg_fields = omap3_dss_reg_fields,
698	.num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
699
700	.features = omap3630_dss_feat_list,
701	.num_features = ARRAY_SIZE(omap3630_dss_feat_list),
702
703	.num_mgrs = 2,
704	.num_ovls = 3,
705	.supported_displays = omap3630_dss_supported_displays,
706	.supported_outputs = omap3630_dss_supported_outputs,
707	.supported_color_modes = omap3_dss_supported_color_modes,
708	.overlay_caps = omap3630_dss_overlay_caps,
709	.clksrc_names = omap3_dss_clk_source_names,
710	.dss_params = omap3_dss_param_range,
711	.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
712	.buffer_size_unit = 1,
713	.burst_size_unit = 8,
714};
715
716/* OMAP4 DSS Features */
717/* For OMAP4430 ES 1.0 revision */
718static const struct omap_dss_features omap4430_es1_0_dss_features  = {
719	.reg_fields = omap4_dss_reg_fields,
720	.num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
721
722	.features = omap4430_es1_0_dss_feat_list,
723	.num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
724
725	.num_mgrs = 3,
726	.num_ovls = 4,
727	.supported_displays = omap4_dss_supported_displays,
728	.supported_outputs = omap4_dss_supported_outputs,
729	.supported_color_modes = omap4_dss_supported_color_modes,
730	.overlay_caps = omap4_dss_overlay_caps,
731	.clksrc_names = omap4_dss_clk_source_names,
732	.dss_params = omap4_dss_param_range,
733	.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
734	.buffer_size_unit = 16,
735	.burst_size_unit = 16,
736};
737
738/* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
739static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
740	.reg_fields = omap4_dss_reg_fields,
741	.num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
742
743	.features = omap4430_es2_0_1_2_dss_feat_list,
744	.num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
745
746	.num_mgrs = 3,
747	.num_ovls = 4,
748	.supported_displays = omap4_dss_supported_displays,
749	.supported_outputs = omap4_dss_supported_outputs,
750	.supported_color_modes = omap4_dss_supported_color_modes,
751	.overlay_caps = omap4_dss_overlay_caps,
752	.clksrc_names = omap4_dss_clk_source_names,
753	.dss_params = omap4_dss_param_range,
754	.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
755	.buffer_size_unit = 16,
756	.burst_size_unit = 16,
757};
758
759/* For all the other OMAP4 versions */
760static const struct omap_dss_features omap4_dss_features = {
761	.reg_fields = omap4_dss_reg_fields,
762	.num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
763
764	.features = omap4_dss_feat_list,
765	.num_features = ARRAY_SIZE(omap4_dss_feat_list),
766
767	.num_mgrs = 3,
768	.num_ovls = 4,
769	.supported_displays = omap4_dss_supported_displays,
770	.supported_outputs = omap4_dss_supported_outputs,
771	.supported_color_modes = omap4_dss_supported_color_modes,
772	.overlay_caps = omap4_dss_overlay_caps,
773	.clksrc_names = omap4_dss_clk_source_names,
774	.dss_params = omap4_dss_param_range,
775	.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
776	.buffer_size_unit = 16,
777	.burst_size_unit = 16,
778};
779
780/* OMAP5 DSS Features */
781static const struct omap_dss_features omap5_dss_features = {
782	.reg_fields = omap5_dss_reg_fields,
783	.num_reg_fields = ARRAY_SIZE(omap5_dss_reg_fields),
784
785	.features = omap5_dss_feat_list,
786	.num_features = ARRAY_SIZE(omap5_dss_feat_list),
787
788	.num_mgrs = 4,
789	.num_ovls = 4,
790	.supported_displays = omap5_dss_supported_displays,
791	.supported_outputs = omap5_dss_supported_outputs,
792	.supported_color_modes = omap4_dss_supported_color_modes,
793	.overlay_caps = omap4_dss_overlay_caps,
794	.clksrc_names = omap5_dss_clk_source_names,
795	.dss_params = omap5_dss_param_range,
796	.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
797	.buffer_size_unit = 16,
798	.burst_size_unit = 16,
799};
800
801/* Functions returning values related to a DSS feature */
802int dss_feat_get_num_mgrs(void)
803{
804	return omap_current_dss_features->num_mgrs;
805}
806EXPORT_SYMBOL(dss_feat_get_num_mgrs);
807
808int dss_feat_get_num_ovls(void)
809{
810	return omap_current_dss_features->num_ovls;
811}
812EXPORT_SYMBOL(dss_feat_get_num_ovls);
813
814unsigned long dss_feat_get_param_min(enum dss_range_param param)
815{
816	return omap_current_dss_features->dss_params[param].min;
817}
818
819unsigned long dss_feat_get_param_max(enum dss_range_param param)
820{
821	return omap_current_dss_features->dss_params[param].max;
822}
823
824enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
825{
826	return omap_current_dss_features->supported_displays[channel];
827}
828
829enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel)
830{
831	return omap_current_dss_features->supported_outputs[channel];
832}
833
834enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
835{
836	return omap_current_dss_features->supported_color_modes[plane];
837}
838EXPORT_SYMBOL(dss_feat_get_supported_color_modes);
839
840enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
841{
842	return omap_current_dss_features->overlay_caps[plane];
843}
844
845bool dss_feat_color_mode_supported(enum omap_plane plane,
846		enum omap_color_mode color_mode)
847{
848	return omap_current_dss_features->supported_color_modes[plane] &
849			color_mode;
850}
851
852const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
853{
854	return omap_current_dss_features->clksrc_names[id];
855}
856
857u32 dss_feat_get_buffer_size_unit(void)
858{
859	return omap_current_dss_features->buffer_size_unit;
860}
861
862u32 dss_feat_get_burst_size_unit(void)
863{
864	return omap_current_dss_features->burst_size_unit;
865}
866
867/* DSS has_feature check */
868bool dss_has_feature(enum dss_feat_id id)
869{
870	int i;
871	const enum dss_feat_id *features = omap_current_dss_features->features;
872	const int num_features = omap_current_dss_features->num_features;
873
874	for (i = 0; i < num_features; i++) {
875		if (features[i] == id)
876			return true;
877	}
878
879	return false;
880}
881
882void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
883{
884	BUG_ON(id >= omap_current_dss_features->num_reg_fields);
885
886	*start = omap_current_dss_features->reg_fields[id].start;
887	*end = omap_current_dss_features->reg_fields[id].end;
888}
889
890bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
891{
892	return omap_current_dss_features->supported_rotation_types & rot_type;
893}
894
895void dss_features_init(enum omapdss_version version)
896{
897	switch (version) {
898	case OMAPDSS_VER_OMAP24xx:
899		omap_current_dss_features = &omap2_dss_features;
900		break;
901
902	case OMAPDSS_VER_OMAP34xx_ES1:
903	case OMAPDSS_VER_OMAP34xx_ES3:
904		omap_current_dss_features = &omap3430_dss_features;
905		break;
906
907	case OMAPDSS_VER_OMAP3630:
908		omap_current_dss_features = &omap3630_dss_features;
909		break;
910
911	case OMAPDSS_VER_OMAP4430_ES1:
912		omap_current_dss_features = &omap4430_es1_0_dss_features;
913		break;
914
915	case OMAPDSS_VER_OMAP4430_ES2:
916		omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
917		break;
918
919	case OMAPDSS_VER_OMAP4:
920		omap_current_dss_features = &omap4_dss_features;
921		break;
922
923	case OMAPDSS_VER_OMAP5:
924	case OMAPDSS_VER_DRA7xx:
925		omap_current_dss_features = &omap5_dss_features;
926		break;
927
928	case OMAPDSS_VER_AM35xx:
929		omap_current_dss_features = &am35xx_dss_features;
930		break;
931
932	case OMAPDSS_VER_AM43xx:
933		omap_current_dss_features = &am43xx_dss_features;
934		break;
935
936	default:
937		DSSWARN("Unsupported OMAP version");
938		break;
939	}
940}