FILE
matroxfb_base.c
File preview with syntax highlighting.
linux-6.19.14/drivers/video/fbdev/matrox/matroxfb_base.c
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * 4 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400 5 * 6 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz> 7 * 8 * Portions Copyright (c) 2001 Matrox Graphics Inc. 9 * 10 * Version: 1.65 2002/08/14 11 * 12 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org> 13 * 14 * Contributors: "menion?" <menion@mindless.com> 15 * Betatesting, fixes, ideas 16 * 17 * "Kurt Garloff" <garloff@suse.de> 18 * Betatesting, fixes, ideas, videomodes, videomodes timmings 19 * 20 * "Tom Rini" <trini@kernel.crashing.org> 21 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas 22 * 23 * "Bibek Sahu" <scorpio@dodds.net> 24 * Access device through readb|w|l and write b|w|l 25 * Extensive debugging stuff 26 * 27 * "Daniel Haun" <haund@usa.net> 28 * Testing, hardware cursor fixes 29 * 30 * "Scott Wood" <sawst46+@pitt.edu> 31 * Fixes 32 * 33 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de> 34 * Betatesting 35 * 36 * "Kelly French" <targon@hazmat.com> 37 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es> 38 * Betatesting, bug reporting 39 * 40 * "Pablo Bianucci" <pbian@pccp.com.ar> 41 * Fixes, ideas, betatesting 42 * 43 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es> 44 * Fixes, enhandcements, ideas, betatesting 45 * 46 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp> 47 * PPC betatesting, PPC support, backward compatibility 48 * 49 * "Paul Womar" <Paul@pwomar.demon.co.uk> 50 * "Owen Waller" <O.Waller@ee.qub.ac.uk> 51 * PPC betatesting 52 * 53 * "Thomas Pornin" <pornin@bolet.ens.fr> 54 * Alpha betatesting 55 * 56 * "Pieter van Leuven" <pvl@iae.nl> 57 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de> 58 * G100 testing 59 * 60 * "H. Peter Arvin" <hpa@transmeta.com> 61 * Ideas 62 * 63 * "Cort Dougan" <cort@cs.nmt.edu> 64 * CHRP fixes and PReP cleanup 65 * 66 * "Mark Vojkovich" <mvojkovi@ucsd.edu> 67 * G400 support 68 * 69 * "Samuel Hocevar" <sam@via.ecp.fr> 70 * Fixes 71 * 72 * "Anton Altaparmakov" <AntonA@bigfoot.com> 73 * G400 MAX/non-MAX distinction 74 * 75 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com> 76 * memtype extension (needed for GXT130P RS/6000 adapter) 77 * 78 * "Uns Lider" <unslider@miranda.org> 79 * G100 PLNWT fixes 80 * 81 * "Denis Zaitsev" <zzz@cd-club.ru> 82 * Fixes 83 * 84 * "Mike Pieper" <mike@pieper-family.de> 85 * TVOut enhandcements, V4L2 control interface. 86 * 87 * "Diego Biurrun" <diego@biurrun.de> 88 * DFP testing 89 * 90 * (following author is not in any relation with this code, but his code 91 * is included in this driver) 92 * 93 * Based on framebuffer driver for VBE 2.0 compliant graphic boards 94 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> 95 * 96 * (following author is not in any relation with this code, but his ideas 97 * were used when writing this driver) 98 * 99 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> 100 * 101 */ 102 103#include <linux/aperture.h> 104#include <linux/export.h> 105#include <linux/version.h> 106 107#include "matroxfb_base.h" 108#include "matroxfb_misc.h" 109#include "matroxfb_accel.h" 110#include "matroxfb_DAC1064.h" 111#include "matroxfb_Ti3026.h" 112#include "matroxfb_maven.h" 113#include "matroxfb_crtc2.h" 114#include "matroxfb_g450.h" 115#include <linux/matroxfb.h> 116#include <linux/interrupt.h> 117#include <linux/nvram.h> 118#include <linux/slab.h> 119#include <linux/uaccess.h> 120 121#ifdef CONFIG_PPC_PMAC 122#include <asm/machdep.h> 123static int default_vmode = VMODE_NVRAM; 124static int default_cmode = CMODE_NVRAM; 125#endif 126 127static void matroxfb_unregister_device(struct matrox_fb_info* minfo); 128 129/* --------------------------------------------------------------------- */ 130 131/* 132 * card parameters 133 */ 134 135/* --------------------------------------------------------------------- */ 136 137static struct fb_var_screeninfo vesafb_defined = { 138 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/ 139 0,0, /* virtual -> visible no offset */ 140 8, /* depth -> load bits_per_pixel */ 141 0, /* greyscale ? */ 142 {0,0,0}, /* R */ 143 {0,0,0}, /* G */ 144 {0,0,0}, /* B */ 145 {0,0,0}, /* transparency */ 146 0, /* standard pixel format */ 147 FB_ACTIVATE_NOW, 148 -1,-1, 149 FB_ACCELF_TEXT, /* accel flags */ 150 39721L,48L,16L,33L,10L, 151 96L,2L,~0, /* No sync info */ 152 FB_VMODE_NONINTERLACED, 153}; 154 155 156 157/* --------------------------------------------------------------------- */ 158static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos) 159{ 160 struct matroxfb_dh_fb_info *info = minfo->crtc2.info; 161 162 /* Make sure that displays are compatible */ 163 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel) 164 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual) 165 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length) 166 ) { 167 switch (minfo->fbcon.var.bits_per_pixel) { 168 case 16: 169 case 32: 170 pos = pos * 8; 171 if (info->interlaced) { 172 mga_outl(0x3C2C, pos); 173 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8); 174 } else { 175 mga_outl(0x3C28, pos); 176 } 177 break; 178 } 179 } 180} 181 182static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo) 183{ 184 if (minfo->crtc1.panpos >= 0) { 185 unsigned long flags; 186 int panpos; 187 188 matroxfb_DAC_lock_irqsave(flags); 189 panpos = minfo->crtc1.panpos; 190 if (panpos >= 0) { 191 unsigned int extvga_reg; 192 193 minfo->crtc1.panpos = -1; /* No update pending anymore */ 194 extvga_reg = mga_inb(M_EXTVGA_INDEX); 195 mga_setr(M_EXTVGA_INDEX, 0x00, panpos); 196 if (extvga_reg != 0x00) { 197 mga_outb(M_EXTVGA_INDEX, extvga_reg); 198 } 199 } 200 matroxfb_DAC_unlock_irqrestore(flags); 201 } 202} 203 204static irqreturn_t matrox_irq(int irq, void *dev_id) 205{ 206 u_int32_t status; 207 int handled = 0; 208 struct matrox_fb_info *minfo = dev_id; 209 210 status = mga_inl(M_STATUS); 211 212 if (status & 0x20) { 213 mga_outl(M_ICLEAR, 0x20); 214 minfo->crtc1.vsync.cnt++; 215 matroxfb_crtc1_panpos(minfo); 216 wake_up_interruptible(&minfo->crtc1.vsync.wait); 217 handled = 1; 218 } 219 if (status & 0x200) { 220 mga_outl(M_ICLEAR, 0x200); 221 minfo->crtc2.vsync.cnt++; 222 wake_up_interruptible(&minfo->crtc2.vsync.wait); 223 handled = 1; 224 } 225 return IRQ_RETVAL(handled); 226} 227 228int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable) 229{ 230 u_int32_t bm; 231 232 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 233 bm = 0x220; 234 else 235 bm = 0x020; 236 237 if (!test_and_set_bit(0, &minfo->irq_flags)) { 238 if (request_irq(minfo->pcidev->irq, matrox_irq, 239 IRQF_SHARED, "matroxfb", minfo)) { 240 clear_bit(0, &minfo->irq_flags); 241 return -EINVAL; 242 } 243 /* Clear any pending field interrupts */ 244 mga_outl(M_ICLEAR, bm); 245 mga_outl(M_IEN, mga_inl(M_IEN) | bm); 246 } else if (reenable) { 247 u_int32_t ien; 248 249 ien = mga_inl(M_IEN); 250 if ((ien & bm) != bm) { 251 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien); 252 mga_outl(M_IEN, ien | bm); 253 } 254 } 255 return 0; 256} 257 258static void matroxfb_disable_irq(struct matrox_fb_info *minfo) 259{ 260 if (test_and_clear_bit(0, &minfo->irq_flags)) { 261 /* Flush pending pan-at-vbl request... */ 262 matroxfb_crtc1_panpos(minfo); 263 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 264 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220); 265 else 266 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20); 267 free_irq(minfo->pcidev->irq, minfo); 268 } 269} 270 271int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc) 272{ 273 struct matrox_vsync *vs; 274 unsigned int cnt; 275 int ret; 276 277 switch (crtc) { 278 case 0: 279 vs = &minfo->crtc1.vsync; 280 break; 281 case 1: 282 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) { 283 return -ENODEV; 284 } 285 vs = &minfo->crtc2.vsync; 286 break; 287 default: 288 return -ENODEV; 289 } 290 ret = matroxfb_enable_irq(minfo, 0); 291 if (ret) { 292 return ret; 293 } 294 295 cnt = vs->cnt; 296 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10); 297 if (ret < 0) { 298 return ret; 299 } 300 if (ret == 0) { 301 matroxfb_enable_irq(minfo, 1); 302 return -ETIMEDOUT; 303 } 304 return 0; 305} 306 307/* --------------------------------------------------------------------- */ 308 309static void matrox_pan_var(struct matrox_fb_info *minfo, 310 struct fb_var_screeninfo *var) 311{ 312 unsigned int pos; 313 unsigned short p0, p1, p2; 314 unsigned int p3; 315 int vbl; 316 unsigned long flags; 317 318 CRITFLAGS 319 320 DBG(__func__) 321 322 if (minfo->dead) 323 return; 324 325 minfo->fbcon.var.xoffset = var->xoffset; 326 minfo->fbcon.var.yoffset = var->yoffset; 327 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32; 328 pos += minfo->curr.ydstorg.chunks; 329 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF; 330 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8; 331 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); 332 p3 = minfo->hw.CRTCEXT[8] = pos >> 21; 333 334 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */ 335 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0); 336 337 CRITBEGIN 338 339 matroxfb_DAC_lock_irqsave(flags); 340 mga_setr(M_CRTC_INDEX, 0x0D, p0); 341 mga_setr(M_CRTC_INDEX, 0x0C, p1); 342 if (minfo->devflags.support32MB) 343 mga_setr(M_EXTVGA_INDEX, 0x08, p3); 344 if (vbl) { 345 minfo->crtc1.panpos = p2; 346 } else { 347 /* Abort any pending change */ 348 minfo->crtc1.panpos = -1; 349 mga_setr(M_EXTVGA_INDEX, 0x00, p2); 350 } 351 matroxfb_DAC_unlock_irqrestore(flags); 352 353 update_crtc2(minfo, pos); 354 355 CRITEND 356} 357 358static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy) 359{ 360 /* Currently we are holding big kernel lock on all dead & usecount updates. 361 * Destroy everything after all users release it. Especially do not unregister 362 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check 363 * for device unplugged when in use. 364 * In future we should point mmio.vbase & video.vbase somewhere where we can 365 * write data without causing too much damage... 366 */ 367 368 minfo->dead = 1; 369 if (minfo->usecount) { 370 /* destroy it later */ 371 return; 372 } 373 matroxfb_unregister_device(minfo); 374 unregister_framebuffer(&minfo->fbcon); 375 matroxfb_g450_shutdown(minfo); 376 arch_phys_wc_del(minfo->wc_cookie); 377 iounmap(minfo->mmio.vbase.vaddr); 378 iounmap(minfo->video.vbase.vaddr); 379 release_mem_region(minfo->video.base, minfo->video.len_maximum); 380 release_mem_region(minfo->mmio.base, 16384); 381 kfree(minfo); 382} 383 384 /* 385 * Open/Release the frame buffer device 386 */ 387 388static int matroxfb_open(struct fb_info *info, int user) 389{ 390 struct matrox_fb_info *minfo = info2minfo(info); 391 392 DBG_LOOP(__func__) 393 394 if (minfo->dead) { 395 return -ENXIO; 396 } 397 minfo->usecount++; 398 if (user) { 399 minfo->userusecount++; 400 } 401 return(0); 402} 403 404static int matroxfb_release(struct fb_info *info, int user) 405{ 406 struct matrox_fb_info *minfo = info2minfo(info); 407 408 DBG_LOOP(__func__) 409 410 if (user) { 411 if (0 == --minfo->userusecount) { 412 matroxfb_disable_irq(minfo); 413 } 414 } 415 if (!(--minfo->usecount) && minfo->dead) { 416 matroxfb_remove(minfo, 0); 417 } 418 return(0); 419} 420 421static int matroxfb_pan_display(struct fb_var_screeninfo *var, 422 struct fb_info* info) { 423 struct matrox_fb_info *minfo = info2minfo(info); 424 425 DBG(__func__) 426 427 matrox_pan_var(minfo, var); 428 return 0; 429} 430 431static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo, 432 int bpp) 433{ 434 int bppshft2; 435 436 DBG(__func__) 437 438 bppshft2 = bpp; 439 if (!bppshft2) { 440 return 8; 441 } 442 if (isInterleave(minfo)) 443 bppshft2 >>= 1; 444 if (minfo->devflags.video64bits) 445 bppshft2 >>= 1; 446 return bppshft2; 447} 448 449static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo, 450 int xres, int bpp) 451{ 452 int over; 453 int rounding; 454 455 DBG(__func__) 456 457 switch (bpp) { 458 case 0: return xres; 459 case 4: rounding = 128; 460 break; 461 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */ 462 break; 463 case 16: rounding = 32; 464 break; 465 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */ 466 break; 467 default: rounding = 16; 468 /* on G400, 16 really does not work */ 469 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 470 rounding = 32; 471 break; 472 } 473 if (isInterleave(minfo)) { 474 rounding *= 2; 475 } 476 over = xres % rounding; 477 if (over) 478 xres += rounding-over; 479 return xres; 480} 481 482static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres, 483 int bpp) 484{ 485 const int* width; 486 int xres_new; 487 488 DBG(__func__) 489 490 if (!bpp) return xres; 491 492 width = minfo->capable.vxres; 493 494 if (minfo->devflags.precise_width) { 495 while (*width) { 496 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) { 497 break; 498 } 499 width++; 500 } 501 xres_new = *width; 502 } else { 503 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp); 504 } 505 return xres_new; 506} 507 508static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) { 509 510 DBG(__func__) 511 512 switch (var->bits_per_pixel) { 513 case 4: 514 return 16; /* pseudocolor... 16 entries HW palette */ 515 case 8: 516 return 256; /* pseudocolor... 256 entries HW palette */ 517 case 16: 518 return 16; /* directcolor... 16 entries SW palette */ 519 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 520 case 24: 521 return 16; /* directcolor... 16 entries SW palette */ 522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 523 case 32: 524 return 16; /* directcolor... 16 entries SW palette */ 525 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 526 } 527 return 16; /* return something reasonable... or panic()? */ 528} 529 530static int matroxfb_decode_var(const struct matrox_fb_info *minfo, 531 struct fb_var_screeninfo *var, int *visual, 532 int *video_cmap_len, unsigned int* ydstorg) 533{ 534 struct RGBT { 535 unsigned char bpp; 536 struct { 537 unsigned char offset, 538 length; 539 } red, 540 green, 541 blue, 542 transp; 543 signed char visual; 544 }; 545 static const struct RGBT table[]= { 546 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR}, 547 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR}, 548 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR}, 549 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR}, 550 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR} 551 }; 552 struct RGBT const *rgbt; 553 unsigned int bpp = var->bits_per_pixel; 554 unsigned int vramlen; 555 unsigned int memlen; 556 557 DBG(__func__) 558 559 switch (bpp) { 560 case 4: if (!minfo->capable.cfb4) return -EINVAL; 561 break; 562 case 8: break; 563 case 16: break; 564 case 24: break; 565 case 32: break; 566 default: return -EINVAL; 567 } 568 *ydstorg = 0; 569 vramlen = minfo->video.len_usable; 570 if (var->yres_virtual < var->yres) 571 var->yres_virtual = var->yres; 572 if (var->xres_virtual < var->xres) 573 var->xres_virtual = var->xres; 574 575 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp); 576 memlen = var->xres_virtual * bpp * var->yres_virtual / 8; 577 if (memlen > vramlen) { 578 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp); 579 memlen = var->xres_virtual * bpp * var->yres_virtual / 8; 580 } 581 /* There is hardware bug that no line can cross 4MB boundary */ 582 /* give up for CFB24, it is impossible to easy workaround it */ 583 /* for other try to do something */ 584 if (!minfo->capable.cross4MB && (memlen > 0x400000)) { 585 if (bpp == 24) { 586 /* sorry */ 587 } else { 588 unsigned int linelen; 589 unsigned int m1 = linelen = var->xres_virtual * bpp / 8; 590 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */ 591 unsigned int max_yres; 592 593 while (m1) { 594 while (m2 >= m1) m2 -= m1; 595 swap(m1, m2); 596 } 597 m2 = linelen * PAGE_SIZE / m2; 598 *ydstorg = m2 = 0x400000 % m2; 599 max_yres = (vramlen - m2) / linelen; 600 if (var->yres_virtual > max_yres) 601 var->yres_virtual = max_yres; 602 } 603 } 604 /* YDSTLEN contains only signed 16bit value */ 605 if (var->yres_virtual > 32767) 606 var->yres_virtual = 32767; 607 /* we must round yres/xres down, we already rounded y/xres_virtual up 608 if it was possible. We should return -EINVAL, but I disagree */ 609 if (var->yres_virtual < var->yres) 610 var->yres = var->yres_virtual; 611 if (var->xres_virtual < var->xres) 612 var->xres = var->xres_virtual; 613 if (var->xoffset + var->xres > var->xres_virtual) 614 var->xoffset = var->xres_virtual - var->xres; 615 if (var->yoffset + var->yres > var->yres_virtual) 616 var->yoffset = var->yres_virtual - var->yres; 617 618 if (bpp == 16 && var->green.length == 5) { 619 bpp--; /* an artificial value - 15 */ 620 } 621 622 for (rgbt = table; rgbt->bpp < bpp; rgbt++); 623#define SETCLR(clr)\ 624 var->clr.offset = rgbt->clr.offset;\ 625 var->clr.length = rgbt->clr.length 626 SETCLR(red); 627 SETCLR(green); 628 SETCLR(blue); 629 SETCLR(transp); 630#undef SETCLR 631 *visual = rgbt->visual; 632 633 if (bpp > 8) 634 dprintk("matroxfb: truecolor: " 635 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n", 636 var->transp.length, var->red.length, var->green.length, var->blue.length, 637 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset); 638 639 *video_cmap_len = matroxfb_get_cmap_len(var); 640 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel, 641 var->xres_virtual, var->yres_virtual); 642 return 0; 643} 644 645static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green, 646 unsigned blue, unsigned transp, 647 struct fb_info *fb_info) 648{ 649 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon); 650 651 DBG(__func__) 652 653 /* 654 * Set a single color register. The values supplied are 655 * already rounded down to the hardware's capabilities 656 * (according to the entries in the `var' structure). Return 657 * != 0 for invalid regno. 658 */ 659 660 if (regno >= minfo->curr.cmap_len) 661 return 1; 662 663 if (minfo->fbcon.var.grayscale) { 664 /* gray = 0.30*R + 0.59*G + 0.11*B */ 665 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; 666 } 667 668 red = CNVT_TOHW(red, minfo->fbcon.var.red.length); 669 green = CNVT_TOHW(green, minfo->fbcon.var.green.length); 670 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length); 671 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length); 672 673 switch (minfo->fbcon.var.bits_per_pixel) { 674 case 4: 675 case 8: 676 mga_outb(M_DAC_REG, regno); 677 mga_outb(M_DAC_VAL, red); 678 mga_outb(M_DAC_VAL, green); 679 mga_outb(M_DAC_VAL, blue); 680 break; 681 case 16: 682 if (regno >= 16) 683 break; 684 { 685 u_int16_t col = 686 (red << minfo->fbcon.var.red.offset) | 687 (green << minfo->fbcon.var.green.offset) | 688 (blue << minfo->fbcon.var.blue.offset) | 689 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */ 690 minfo->cmap[regno] = col | (col << 16); 691 } 692 break; 693 case 24: 694 case 32: 695 if (regno >= 16) 696 break; 697 minfo->cmap[regno] = 698 (red << minfo->fbcon.var.red.offset) | 699 (green << minfo->fbcon.var.green.offset) | 700 (blue << minfo->fbcon.var.blue.offset) | 701 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */ 702 break; 703 } 704 return 0; 705} 706 707static void matroxfb_init_fix(struct matrox_fb_info *minfo) 708{ 709 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix; 710 DBG(__func__) 711 712 strcpy(fix->id,"MATROX"); 713 714 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */ 715 fix->ypanstep = 1; 716 fix->ywrapstep = 0; 717 fix->mmio_start = minfo->mmio.base; 718 fix->mmio_len = minfo->mmio.len; 719 fix->accel = minfo->devflags.accelerator; 720} 721 722static void matroxfb_update_fix(struct matrox_fb_info *minfo) 723{ 724 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix; 725 DBG(__func__) 726 727 mutex_lock(&minfo->fbcon.mm_lock); 728 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes; 729 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes; 730 mutex_unlock(&minfo->fbcon.mm_lock); 731} 732 733static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 734{ 735 int err; 736 int visual; 737 int cmap_len; 738 unsigned int ydstorg; 739 struct matrox_fb_info *minfo = info2minfo(info); 740 741 if (minfo->dead) { 742 return -ENXIO; 743 } 744 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0) 745 return err; 746 return 0; 747} 748 749static int matroxfb_set_par(struct fb_info *info) 750{ 751 int err; 752 int visual; 753 int cmap_len; 754 unsigned int ydstorg; 755 struct fb_var_screeninfo *var; 756 struct matrox_fb_info *minfo = info2minfo(info); 757 758 DBG(__func__) 759 760 if (minfo->dead) { 761 return -ENXIO; 762 } 763 764 var = &info->var; 765 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0) 766 return err; 767 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg; 768 matroxfb_update_fix(minfo); 769 minfo->fbcon.fix.visual = visual; 770 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS; 771 minfo->fbcon.fix.type_aux = 0; 772 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3; 773 { 774 unsigned int pos; 775 776 minfo->curr.cmap_len = cmap_len; 777 ydstorg += minfo->devflags.ydstorg; 778 minfo->curr.ydstorg.bytes = ydstorg; 779 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2); 780 if (var->bits_per_pixel == 4) 781 minfo->curr.ydstorg.pixels = ydstorg; 782 else 783 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel; 784 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel); 785 { struct my_timming mt; 786 struct matrox_hw_state* hw; 787 int out; 788 789 matroxfb_var2my(var, &mt); 790 mt.crtc = MATROXFB_SRC_CRTC1; 791 /* CRTC1 delays */ 792 switch (var->bits_per_pixel) { 793 case 0: mt.delay = 31 + 0; break; 794 case 16: mt.delay = 21 + 8; break; 795 case 24: mt.delay = 17 + 8; break; 796 case 32: mt.delay = 16 + 8; break; 797 default: mt.delay = 31 + 8; break; 798 } 799 800 hw = &minfo->hw; 801 802 down_read(&minfo->altout.lock); 803 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 804 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 805 minfo->outputs[out].output->compute) { 806 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt); 807 } 808 } 809 up_read(&minfo->altout.lock); 810 minfo->crtc1.pixclock = mt.pixclock; 811 minfo->crtc1.mnp = mt.mnp; 812 minfo->hw_switch->init(minfo, &mt); 813 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32; 814 pos += minfo->curr.ydstorg.chunks; 815 816 hw->CRTC[0x0D] = pos & 0xFF; 817 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8; 818 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); 819 hw->CRTCEXT[8] = pos >> 21; 820 minfo->hw_switch->restore(minfo); 821 update_crtc2(minfo, pos); 822 down_read(&minfo->altout.lock); 823 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 824 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 825 minfo->outputs[out].output->program) { 826 minfo->outputs[out].output->program(minfo->outputs[out].data); 827 } 828 } 829 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 830 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 831 minfo->outputs[out].output->start) { 832 minfo->outputs[out].output->start(minfo->outputs[out].data); 833 } 834 } 835 up_read(&minfo->altout.lock); 836 matrox_cfbX_init(minfo); 837 } 838 } 839 minfo->initialized = 1; 840 return 0; 841} 842 843static int matroxfb_get_vblank(struct matrox_fb_info *minfo, 844 struct fb_vblank *vblank) 845{ 846 unsigned int sts1; 847 848 matroxfb_enable_irq(minfo, 0); 849 memset(vblank, 0, sizeof(*vblank)); 850 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC | 851 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK; 852 sts1 = mga_inb(M_INSTS1); 853 vblank->vcount = mga_inl(M_VCOUNT); 854 /* BTW, on my PIII/450 with G400, reading M_INSTS1 855 byte makes this call about 12% slower (1.70 vs. 2.05 us 856 per ioctl()) */ 857 if (sts1 & 1) 858 vblank->flags |= FB_VBLANK_HBLANKING; 859 if (sts1 & 8) 860 vblank->flags |= FB_VBLANK_VSYNCING; 861 if (vblank->vcount >= minfo->fbcon.var.yres) 862 vblank->flags |= FB_VBLANK_VBLANKING; 863 if (test_bit(0, &minfo->irq_flags)) { 864 vblank->flags |= FB_VBLANK_HAVE_COUNT; 865 /* Only one writer, aligned int value... 866 it should work without lock and without atomic_t */ 867 vblank->count = minfo->crtc1.vsync.cnt; 868 } 869 return 0; 870} 871 872static struct matrox_altout panellink_output = { 873 .name = "Panellink output", 874}; 875 876static int matroxfb_ioctl(struct fb_info *info, 877 unsigned int cmd, unsigned long arg) 878{ 879 void __user *argp = (void __user *)arg; 880 struct matrox_fb_info *minfo = info2minfo(info); 881 882 DBG(__func__) 883 884 if (minfo->dead) { 885 return -ENXIO; 886 } 887 888 switch (cmd) { 889 case FBIOGET_VBLANK: 890 { 891 struct fb_vblank vblank; 892 int err; 893 894 err = matroxfb_get_vblank(minfo, &vblank); 895 if (err) 896 return err; 897 if (copy_to_user(argp, &vblank, sizeof(vblank))) 898 return -EFAULT; 899 return 0; 900 } 901 case FBIO_WAITFORVSYNC: 902 { 903 u_int32_t crt; 904 905 if (get_user(crt, (u_int32_t __user *)arg)) 906 return -EFAULT; 907 908 return matroxfb_wait_for_sync(minfo, crt); 909 } 910 case MATROXFB_SET_OUTPUT_MODE: 911 { 912 struct matroxioc_output_mode mom; 913 struct matrox_altout *oproc; 914 int val; 915 916 if (copy_from_user(&mom, argp, sizeof(mom))) 917 return -EFAULT; 918 if (mom.output >= MATROXFB_MAX_OUTPUTS) 919 return -ENXIO; 920 down_read(&minfo->altout.lock); 921 oproc = minfo->outputs[mom.output].output; 922 if (!oproc) { 923 val = -ENXIO; 924 } else if (!oproc->verifymode) { 925 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) { 926 val = 0; 927 } else { 928 val = -EINVAL; 929 } 930 } else { 931 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode); 932 } 933 if (!val) { 934 if (minfo->outputs[mom.output].mode != mom.mode) { 935 minfo->outputs[mom.output].mode = mom.mode; 936 val = 1; 937 } 938 } 939 up_read(&minfo->altout.lock); 940 if (val != 1) 941 return val; 942 switch (minfo->outputs[mom.output].src) { 943 case MATROXFB_SRC_CRTC1: 944 matroxfb_set_par(info); 945 break; 946 case MATROXFB_SRC_CRTC2: 947 { 948 struct matroxfb_dh_fb_info* crtc2; 949 950 down_read(&minfo->crtc2.lock); 951 crtc2 = minfo->crtc2.info; 952 if (crtc2) 953 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon); 954 up_read(&minfo->crtc2.lock); 955 } 956 break; 957 } 958 return 0; 959 } 960 case MATROXFB_GET_OUTPUT_MODE: 961 { 962 struct matroxioc_output_mode mom; 963 struct matrox_altout *oproc; 964 int val; 965 966 if (copy_from_user(&mom, argp, sizeof(mom))) 967 return -EFAULT; 968 if (mom.output >= MATROXFB_MAX_OUTPUTS) 969 return -ENXIO; 970 down_read(&minfo->altout.lock); 971 oproc = minfo->outputs[mom.output].output; 972 if (!oproc) { 973 val = -ENXIO; 974 } else { 975 mom.mode = minfo->outputs[mom.output].mode; 976 val = 0; 977 } 978 up_read(&minfo->altout.lock); 979 if (val) 980 return val; 981 if (copy_to_user(argp, &mom, sizeof(mom))) 982 return -EFAULT; 983 return 0; 984 } 985 case MATROXFB_SET_OUTPUT_CONNECTION: 986 { 987 u_int32_t tmp; 988 int i; 989 int changes; 990 991 if (copy_from_user(&tmp, argp, sizeof(tmp))) 992 return -EFAULT; 993 for (i = 0; i < 32; i++) { 994 if (tmp & (1 << i)) { 995 if (i >= MATROXFB_MAX_OUTPUTS) 996 return -ENXIO; 997 if (!minfo->outputs[i].output) 998 return -ENXIO; 999 switch (minfo->outputs[i].src) { 1000 case MATROXFB_SRC_NONE: 1001 case MATROXFB_SRC_CRTC1: 1002 break; 1003 default: 1004 return -EBUSY; 1005 } 1006 } 1007 } 1008 if (minfo->devflags.panellink) { 1009 if (tmp & MATROXFB_OUTPUT_CONN_DFP) { 1010 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY) 1011 return -EINVAL; 1012 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1013 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) { 1014 return -EBUSY; 1015 } 1016 } 1017 } 1018 } 1019 changes = 0; 1020 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1021 if (tmp & (1 << i)) { 1022 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) { 1023 changes = 1; 1024 minfo->outputs[i].src = MATROXFB_SRC_CRTC1; 1025 } 1026 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) { 1027 changes = 1; 1028 minfo->outputs[i].src = MATROXFB_SRC_NONE; 1029 } 1030 } 1031 if (!changes) 1032 return 0; 1033 matroxfb_set_par(info); 1034 return 0; 1035 } 1036 case MATROXFB_GET_OUTPUT_CONNECTION: 1037 { 1038 u_int32_t conn = 0; 1039 int i; 1040 1041 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1042 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) { 1043 conn |= 1 << i; 1044 } 1045 } 1046 if (put_user(conn, (u_int32_t __user *)arg)) 1047 return -EFAULT; 1048 return 0; 1049 } 1050 case MATROXFB_GET_AVAILABLE_OUTPUTS: 1051 { 1052 u_int32_t conn = 0; 1053 int i; 1054 1055 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1056 if (minfo->outputs[i].output) { 1057 switch (minfo->outputs[i].src) { 1058 case MATROXFB_SRC_NONE: 1059 case MATROXFB_SRC_CRTC1: 1060 conn |= 1 << i; 1061 break; 1062 } 1063 } 1064 } 1065 if (minfo->devflags.panellink) { 1066 if (conn & MATROXFB_OUTPUT_CONN_DFP) 1067 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY; 1068 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY) 1069 conn &= ~MATROXFB_OUTPUT_CONN_DFP; 1070 } 1071 if (put_user(conn, (u_int32_t __user *)arg)) 1072 return -EFAULT; 1073 return 0; 1074 } 1075 case MATROXFB_GET_ALL_OUTPUTS: 1076 { 1077 u_int32_t conn = 0; 1078 int i; 1079 1080 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1081 if (minfo->outputs[i].output) { 1082 conn |= 1 << i; 1083 } 1084 } 1085 if (put_user(conn, (u_int32_t __user *)arg)) 1086 return -EFAULT; 1087 return 0; 1088 } 1089 case VIDIOC_QUERYCAP: 1090 { 1091 struct v4l2_capability r; 1092 1093 memset(&r, 0, sizeof(r)); 1094 strcpy(r.driver, "matroxfb"); 1095 strcpy(r.card, "Matrox"); 1096 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev)); 1097 r.version = KERNEL_VERSION(1,0,0); 1098 r.capabilities = V4L2_CAP_VIDEO_OUTPUT; 1099 if (copy_to_user(argp, &r, sizeof(r))) 1100 return -EFAULT; 1101 return 0; 1102 1103 } 1104 case VIDIOC_QUERYCTRL: 1105 { 1106 struct v4l2_queryctrl qctrl; 1107 int err; 1108 1109 if (copy_from_user(&qctrl, argp, sizeof(qctrl))) 1110 return -EFAULT; 1111 1112 down_read(&minfo->altout.lock); 1113 if (!minfo->outputs[1].output) { 1114 err = -ENXIO; 1115 } else if (minfo->outputs[1].output->getqueryctrl) { 1116 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl); 1117 } else { 1118 err = -EINVAL; 1119 } 1120 up_read(&minfo->altout.lock); 1121 if (err >= 0 && 1122 copy_to_user(argp, &qctrl, sizeof(qctrl))) 1123 return -EFAULT; 1124 return err; 1125 } 1126 case VIDIOC_G_CTRL: 1127 { 1128 struct v4l2_control ctrl; 1129 int err; 1130 1131 if (copy_from_user(&ctrl, argp, sizeof(ctrl))) 1132 return -EFAULT; 1133 1134 down_read(&minfo->altout.lock); 1135 if (!minfo->outputs[1].output) { 1136 err = -ENXIO; 1137 } else if (minfo->outputs[1].output->getctrl) { 1138 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl); 1139 } else { 1140 err = -EINVAL; 1141 } 1142 up_read(&minfo->altout.lock); 1143 if (err >= 0 && 1144 copy_to_user(argp, &ctrl, sizeof(ctrl))) 1145 return -EFAULT; 1146 return err; 1147 } 1148 case VIDIOC_S_CTRL: 1149 { 1150 struct v4l2_control ctrl; 1151 int err; 1152 1153 if (copy_from_user(&ctrl, argp, sizeof(ctrl))) 1154 return -EFAULT; 1155 1156 down_read(&minfo->altout.lock); 1157 if (!minfo->outputs[1].output) { 1158 err = -ENXIO; 1159 } else if (minfo->outputs[1].output->setctrl) { 1160 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl); 1161 } else { 1162 err = -EINVAL; 1163 } 1164 up_read(&minfo->altout.lock); 1165 return err; 1166 } 1167 } 1168 return -ENOTTY; 1169} 1170 1171/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */ 1172 1173static int matroxfb_blank(int blank, struct fb_info *info) 1174{ 1175 int seq; 1176 int crtc; 1177 CRITFLAGS 1178 struct matrox_fb_info *minfo = info2minfo(info); 1179 1180 DBG(__func__) 1181 1182 if (minfo->dead) 1183 return 1; 1184 1185 switch (blank) { 1186 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */ 1187 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break; 1188 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break; 1189 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break; 1190 default: seq = 0x00; crtc = 0x00; break; 1191 } 1192 1193 CRITBEGIN 1194 1195 mga_outb(M_SEQ_INDEX, 1); 1196 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq); 1197 mga_outb(M_EXTVGA_INDEX, 1); 1198 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc); 1199 1200 CRITEND 1201 return 0; 1202} 1203 1204static const struct fb_ops matroxfb_ops = { 1205 .owner = THIS_MODULE, 1206 .fb_open = matroxfb_open, 1207 .fb_release = matroxfb_release, 1208 __FB_DEFAULT_IOMEM_OPS_RDWR, 1209 .fb_check_var = matroxfb_check_var, 1210 .fb_set_par = matroxfb_set_par, 1211 .fb_setcolreg = matroxfb_setcolreg, 1212 .fb_pan_display =matroxfb_pan_display, 1213 .fb_blank = matroxfb_blank, 1214 .fb_ioctl = matroxfb_ioctl, 1215/* .fb_fillrect = <set by matrox_cfbX_init>, */ 1216/* .fb_copyarea = <set by matrox_cfbX_init>, */ 1217/* .fb_imageblit = <set by matrox_cfbX_init>, */ 1218/* .fb_cursor = <set by matrox_cfbX_init>, */ 1219 __FB_DEFAULT_IOMEM_OPS_MMAP, 1220}; 1221 1222#define RSDepth(X) (((X) >> 8) & 0x0F) 1223#define RS8bpp 0x1 1224#define RS15bpp 0x2 1225#define RS16bpp 0x3 1226#define RS32bpp 0x4 1227#define RS4bpp 0x5 1228#define RS24bpp 0x6 1229#define RSText 0x7 1230#define RSText8 0x8 1231/* 9-F */ 1232static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = { 1233 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 }, 1234 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 }, 1235 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 }, 1236 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 }, 1237 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 }, 1238 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 }, 1239 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */ 1240 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */ 1241}; 1242 1243/* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */ 1244static unsigned int mem; /* "matroxfb:mem:xxxxxM" */ 1245static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */ 1246static int inv24; /* "matroxfb:inv24" */ 1247static int cross4MB = -1; /* "matroxfb:cross4MB" */ 1248static int disabled; /* "matroxfb:disabled" */ 1249static int noaccel; /* "matroxfb:noaccel" */ 1250static int nopan; /* "matroxfb:nopan" */ 1251static int no_pci_retry; /* "matroxfb:nopciretry" */ 1252static int novga; /* "matroxfb:novga" */ 1253static int nobios; /* "matroxfb:nobios" */ 1254static int noinit = 1; /* "matroxfb:init" */ 1255static int inverse; /* "matroxfb:inverse" */ 1256static int sgram; /* "matroxfb:sgram" */ 1257static int mtrr = 1; /* "matroxfb:nomtrr" */ 1258static int grayscale; /* "matroxfb:grayscale" */ 1259static int dev = -1; /* "matroxfb:dev:xxxxx" */ 1260static unsigned int vesa = ~0; /* "matroxfb:vesa:xxxxx" */ 1261static int depth = -1; /* "matroxfb:depth:xxxxx" */ 1262static unsigned int xres; /* "matroxfb:xres:xxxxx" */ 1263static unsigned int yres; /* "matroxfb:yres:xxxxx" */ 1264static unsigned int upper = ~0; /* "matroxfb:upper:xxxxx" */ 1265static unsigned int lower = ~0; /* "matroxfb:lower:xxxxx" */ 1266static unsigned int vslen; /* "matroxfb:vslen:xxxxx" */ 1267static unsigned int left = ~0; /* "matroxfb:left:xxxxx" */ 1268static unsigned int right = ~0; /* "matroxfb:right:xxxxx" */ 1269static unsigned int hslen; /* "matroxfb:hslen:xxxxx" */ 1270static unsigned int pixclock; /* "matroxfb:pixclock:xxxxx" */ 1271static int sync = -1; /* "matroxfb:sync:xxxxx" */ 1272static unsigned int fv; /* "matroxfb:fv:xxxxx" */ 1273static unsigned int fh; /* "matroxfb:fh:xxxxxk" */ 1274static unsigned int maxclk; /* "matroxfb:maxclk:xxxxM" */ 1275static int dfp; /* "matroxfb:dfp */ 1276static int dfp_type = -1; /* "matroxfb:dfp:xxx */ 1277static int memtype = -1; /* "matroxfb:memtype:xxx" */ 1278static char outputs[8]; /* "matroxfb:outputs:xxx" */ 1279 1280#ifndef MODULE 1281static char videomode[64]; /* "matroxfb:mode:xxxxx" or "matroxfb:xxxxx" */ 1282#endif 1283 1284static int matroxfb_getmemory(struct matrox_fb_info *minfo, 1285 unsigned int maxSize, unsigned int *realSize) 1286{ 1287 vaddr_t vm; 1288 unsigned int offs; 1289 unsigned int offs2; 1290 unsigned char orig; 1291 unsigned char bytes[32]; 1292 unsigned char* tmp; 1293 1294 DBG(__func__) 1295 1296 vm = minfo->video.vbase; 1297 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */ 1298 /* at least 2MB */ 1299 if (maxSize < 0x0200000) return 0; 1300 if (maxSize > 0x2000000) maxSize = 0x2000000; 1301 1302 mga_outb(M_EXTVGA_INDEX, 0x03); 1303 orig = mga_inb(M_EXTVGA_DATA); 1304 mga_outb(M_EXTVGA_DATA, orig | 0x80); 1305 1306 tmp = bytes; 1307 for (offs = 0x100000; offs < maxSize; offs += 0x200000) 1308 *tmp++ = mga_readb(vm, offs); 1309 for (offs = 0x100000; offs < maxSize; offs += 0x200000) 1310 mga_writeb(vm, offs, 0x02); 1311 mga_outb(M_CACHEFLUSH, 0x00); 1312 for (offs = 0x100000; offs < maxSize; offs += 0x200000) { 1313 if (mga_readb(vm, offs) != 0x02) 1314 break; 1315 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02); 1316 if (mga_readb(vm, offs)) 1317 break; 1318 } 1319 tmp = bytes; 1320 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000) 1321 mga_writeb(vm, offs2, *tmp++); 1322 1323 mga_outb(M_EXTVGA_INDEX, 0x03); 1324 mga_outb(M_EXTVGA_DATA, orig); 1325 1326 *realSize = offs - 0x100000; 1327#ifdef CONFIG_FB_MATROX_MILLENIUM 1328 minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF)); 1329#endif 1330 return 1; 1331} 1332 1333struct video_board { 1334 int maxvram; 1335 int maxdisplayable; 1336 int accelID; 1337 struct matrox_switch* lowlevel; 1338 }; 1339#ifdef CONFIG_FB_MATROX_MILLENIUM 1340static struct video_board vbMillennium = { 1341 .maxvram = 0x0800000, 1342 .maxdisplayable = 0x0800000, 1343 .accelID = FB_ACCEL_MATROX_MGA2064W, 1344 .lowlevel = &matrox_millennium 1345}; 1346 1347static struct video_board vbMillennium2 = { 1348 .maxvram = 0x1000000, 1349 .maxdisplayable = 0x0800000, 1350 .accelID = FB_ACCEL_MATROX_MGA2164W, 1351 .lowlevel = &matrox_millennium 1352}; 1353 1354static struct video_board vbMillennium2A = { 1355 .maxvram = 0x1000000, 1356 .maxdisplayable = 0x0800000, 1357 .accelID = FB_ACCEL_MATROX_MGA2164W_AGP, 1358 .lowlevel = &matrox_millennium 1359}; 1360#endif /* CONFIG_FB_MATROX_MILLENIUM */ 1361#ifdef CONFIG_FB_MATROX_MYSTIQUE 1362static struct video_board vbMystique = { 1363 .maxvram = 0x0800000, 1364 .maxdisplayable = 0x0800000, 1365 .accelID = FB_ACCEL_MATROX_MGA1064SG, 1366 .lowlevel = &matrox_mystique 1367}; 1368#endif /* CONFIG_FB_MATROX_MYSTIQUE */ 1369#ifdef CONFIG_FB_MATROX_G 1370static struct video_board vbG100 = { 1371 .maxvram = 0x0800000, 1372 .maxdisplayable = 0x0800000, 1373 .accelID = FB_ACCEL_MATROX_MGAG100, 1374 .lowlevel = &matrox_G100 1375}; 1376 1377static struct video_board vbG200 = { 1378 .maxvram = 0x1000000, 1379 .maxdisplayable = 0x1000000, 1380 .accelID = FB_ACCEL_MATROX_MGAG200, 1381 .lowlevel = &matrox_G100 1382}; 1383static struct video_board vbG200eW = { 1384 .maxvram = 0x1000000, 1385 .maxdisplayable = 0x0800000, 1386 .accelID = FB_ACCEL_MATROX_MGAG200, 1387 .lowlevel = &matrox_G100 1388}; 1389/* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for 1390 whole 32MB */ 1391static struct video_board vbG400 = { 1392 .maxvram = 0x2000000, 1393 .maxdisplayable = 0x1000000, 1394 .accelID = FB_ACCEL_MATROX_MGAG400, 1395 .lowlevel = &matrox_G100 1396}; 1397#endif 1398 1399#define DEVF_VIDEO64BIT 0x0001 1400#define DEVF_SWAPS 0x0002 1401#define DEVF_SRCORG 0x0004 1402#define DEVF_DUALHEAD 0x0008 1403#define DEVF_CROSS4MB 0x0010 1404#define DEVF_TEXT4B 0x0020 1405/* #define DEVF_recycled 0x0040 */ 1406/* #define DEVF_recycled 0x0080 */ 1407#define DEVF_SUPPORT32MB 0x0100 1408#define DEVF_ANY_VXRES 0x0200 1409#define DEVF_TEXT16B 0x0400 1410#define DEVF_CRTC2 0x0800 1411#define DEVF_MAVEN_CAPABLE 0x1000 1412#define DEVF_PANELLINK_CAPABLE 0x2000 1413#define DEVF_G450DAC 0x4000 1414 1415#define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB) 1416#define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD) 1417#define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */ 1418#define DEVF_G200 (DEVF_G2CORE) 1419#define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2) 1420/* if you'll find how to drive DFP... */ 1421#define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD) 1422#define DEVF_G550 (DEVF_G450) 1423 1424static struct board { 1425 unsigned short vendor, device, rev, svid, sid; 1426 unsigned int flags; 1427 unsigned int maxclk; 1428 enum mga_chip chip; 1429 struct video_board* base; 1430 const char* name; 1431 } dev_list[] = { 1432#ifdef CONFIG_FB_MATROX_MILLENIUM 1433 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF, 1434 0, 0, 1435 DEVF_TEXT4B, 1436 230000, 1437 MGA_2064, 1438 &vbMillennium, 1439 "Millennium (PCI)"}, 1440 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF, 1441 0, 0, 1442 DEVF_SWAPS, 1443 220000, 1444 MGA_2164, 1445 &vbMillennium2, 1446 "Millennium II (PCI)"}, 1447 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF, 1448 0, 0, 1449 DEVF_SWAPS, 1450 250000, 1451 MGA_2164, 1452 &vbMillennium2A, 1453 "Millennium II (AGP)"}, 1454#endif 1455#ifdef CONFIG_FB_MATROX_MYSTIQUE 1456 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02, 1457 0, 0, 1458 DEVF_VIDEO64BIT | DEVF_CROSS4MB, 1459 180000, 1460 MGA_1064, 1461 &vbMystique, 1462 "Mystique (PCI)"}, 1463 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF, 1464 0, 0, 1465 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, 1466 220000, 1467 MGA_1164, 1468 &vbMystique, 1469 "Mystique 220 (PCI)"}, 1470 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02, 1471 0, 0, 1472 DEVF_VIDEO64BIT | DEVF_CROSS4MB, 1473 180000, 1474 MGA_1064, 1475 &vbMystique, 1476 "Mystique (AGP)"}, 1477 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF, 1478 0, 0, 1479 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, 1480 220000, 1481 MGA_1164, 1482 &vbMystique, 1483 "Mystique 220 (AGP)"}, 1484#endif 1485#ifdef CONFIG_FB_MATROX_G 1486 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF, 1487 0, 0, 1488 DEVF_G100, 1489 230000, 1490 MGA_G100, 1491 &vbG100, 1492 "MGA-G100 (PCI)"}, 1493 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF, 1494 0, 0, 1495 DEVF_G100, 1496 230000, 1497 MGA_G100, 1498 &vbG100, 1499 "MGA-G100 (AGP)"}, 1500 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF, 1501 0, 0, 1502 DEVF_G200, 1503 250000, 1504 MGA_G200, 1505 &vbG200, 1506 "MGA-G200 (PCI)"}, 1507 {PCI_VENDOR_ID_MATROX, 0x0532, 0xFF, 1508 0, 0, 1509 DEVF_G200, 1510 250000, 1511 MGA_G200, 1512 &vbG200eW, 1513 "MGA-G200eW (PCI)"}, 1514 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1515 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC, 1516 DEVF_G200, 1517 220000, 1518 MGA_G200, 1519 &vbG200, 1520 "MGA-G200 (AGP)"}, 1521 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1522 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP, 1523 DEVF_G200, 1524 230000, 1525 MGA_G200, 1526 &vbG200, 1527 "Mystique G200 (AGP)"}, 1528 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1529 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP, 1530 DEVF_G200, 1531 250000, 1532 MGA_G200, 1533 &vbG200, 1534 "Millennium G200 (AGP)"}, 1535 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1536 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP, 1537 DEVF_G200, 1538 230000, 1539 MGA_G200, 1540 &vbG200, 1541 "Marvel G200 (AGP)"}, 1542 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1543 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP, 1544 DEVF_G200, 1545 230000, 1546 MGA_G200, 1547 &vbG200, 1548 "MGA-G200 (AGP)"}, 1549 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1550 0, 0, 1551 DEVF_G200, 1552 230000, 1553 MGA_G200, 1554 &vbG200, 1555 "G200 (AGP)"}, 1556 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, 1557 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP, 1558 DEVF_G400, 1559 360000, 1560 MGA_G400, 1561 &vbG400, 1562 "Millennium G400 MAX (AGP)"}, 1563 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, 1564 0, 0, 1565 DEVF_G400, 1566 300000, 1567 MGA_G400, 1568 &vbG400, 1569 "G400 (AGP)"}, 1570 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF, 1571 0, 0, 1572 DEVF_G450, 1573 360000, 1574 MGA_G450, 1575 &vbG400, 1576 "G450"}, 1577 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF, 1578 0, 0, 1579 DEVF_G550, 1580 360000, 1581 MGA_G550, 1582 &vbG400, 1583 "G550"}, 1584#endif 1585 {0, 0, 0xFF, 1586 0, 0, 1587 0, 1588 0, 1589 0, 1590 NULL, 1591 NULL}}; 1592 1593#ifndef MODULE 1594static const struct fb_videomode defaultmode = { 1595 /* 640x480 @ 60Hz, 31.5 kHz */ 1596 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, 1597 0, FB_VMODE_NONINTERLACED 1598}; 1599 1600static int hotplug = 0; 1601#endif /* !MODULE */ 1602 1603static void setDefaultOutputs(struct matrox_fb_info *minfo) 1604{ 1605 unsigned int i; 1606 const char* ptr; 1607 1608 minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1; 1609 if (minfo->devflags.g450dac) { 1610 minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1; 1611 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1; 1612 } else if (dfp) { 1613 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1; 1614 } 1615 ptr = outputs; 1616 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1617 char c = *ptr++; 1618 1619 if (c == 0) { 1620 break; 1621 } 1622 if (c == '0') { 1623 minfo->outputs[i].default_src = MATROXFB_SRC_NONE; 1624 } else if (c == '1') { 1625 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1; 1626 } else if (c == '2' && minfo->devflags.crtc2) { 1627 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2; 1628 } else { 1629 printk(KERN_ERR "matroxfb: Unknown outputs setting\n"); 1630 break; 1631 } 1632 } 1633 /* Nullify this option for subsequent adapters */ 1634 outputs[0] = 0; 1635} 1636 1637static int initMatrox2(struct matrox_fb_info *minfo, struct board *b) 1638{ 1639 unsigned long ctrlptr_phys = 0; 1640 unsigned long video_base_phys = 0; 1641 unsigned int memsize; 1642 int err; 1643 1644 static const struct pci_device_id intel_82437[] = { 1645 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) }, 1646 { }, 1647 }; 1648 1649 DBG(__func__) 1650 1651 /* set default values... */ 1652 vesafb_defined.accel_flags = FB_ACCELF_TEXT; 1653 1654 minfo->hw_switch = b->base->lowlevel; 1655 minfo->devflags.accelerator = b->base->accelID; 1656 minfo->max_pixel_clock = b->maxclk; 1657 1658 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name); 1659 minfo->capable.plnwt = 1; 1660 minfo->chip = b->chip; 1661 minfo->capable.srcorg = b->flags & DEVF_SRCORG; 1662 minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT; 1663 if (b->flags & DEVF_TEXT4B) { 1664 minfo->devflags.vgastep = 4; 1665 minfo->devflags.textmode = 4; 1666 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16; 1667 } else if (b->flags & DEVF_TEXT16B) { 1668 minfo->devflags.vgastep = 16; 1669 minfo->devflags.textmode = 1; 1670 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16; 1671 } else { 1672 minfo->devflags.vgastep = 8; 1673 minfo->devflags.textmode = 1; 1674 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8; 1675 } 1676 minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0; 1677 minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES); 1678 minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0; 1679 minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0; 1680 minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0; 1681 minfo->devflags.dfp_type = dfp_type; 1682 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0; 1683 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode; 1684 minfo->devflags.textvram = 65536 / minfo->devflags.textmode; 1685 setDefaultOutputs(minfo); 1686 if (b->flags & DEVF_PANELLINK_CAPABLE) { 1687 minfo->outputs[2].data = minfo; 1688 minfo->outputs[2].output = &panellink_output; 1689 minfo->outputs[2].src = minfo->outputs[2].default_src; 1690 minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR; 1691 minfo->devflags.panellink = 1; 1692 } 1693 1694 if (minfo->capable.cross4MB < 0) 1695 minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB; 1696 if (b->flags & DEVF_SWAPS) { 1697 ctrlptr_phys = pci_resource_start(minfo->pcidev, 1); 1698 video_base_phys = pci_resource_start(minfo->pcidev, 0); 1699 minfo->devflags.fbResource = PCI_BASE_ADDRESS_0; 1700 } else { 1701 ctrlptr_phys = pci_resource_start(minfo->pcidev, 0); 1702 video_base_phys = pci_resource_start(minfo->pcidev, 1); 1703 minfo->devflags.fbResource = PCI_BASE_ADDRESS_1; 1704 } 1705 err = -EINVAL; 1706 if (!ctrlptr_phys) { 1707 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n"); 1708 goto fail; 1709 } 1710 if (!video_base_phys) { 1711 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n"); 1712 goto fail; 1713 } 1714 memsize = b->base->maxvram; 1715 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) { 1716 goto fail; 1717 } 1718 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) { 1719 goto failCtrlMR; 1720 } 1721 minfo->video.len_maximum = memsize; 1722 /* convert mem (autodetect k, M) */ 1723 if (mem < 1024) mem *= 1024; 1724 if (mem < 0x00100000) mem *= 1024; 1725 1726 if (mem && (mem < memsize)) 1727 memsize = mem; 1728 err = -ENOMEM; 1729 1730 minfo->mmio.vbase.vaddr = ioremap(ctrlptr_phys, 16384); 1731 if (!minfo->mmio.vbase.vaddr) { 1732 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys); 1733 goto failVideoMR; 1734 } 1735 minfo->mmio.base = ctrlptr_phys; 1736 minfo->mmio.len = 16384; 1737 minfo->video.base = video_base_phys; 1738 minfo->video.vbase.vaddr = ioremap_wc(video_base_phys, memsize); 1739 if (!minfo->video.vbase.vaddr) { 1740 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n", 1741 video_base_phys, memsize); 1742 goto failCtrlIO; 1743 } 1744 { 1745 u_int32_t cmd; 1746 u_int32_t mga_option; 1747 1748 pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option); 1749 pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd); 1750 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */ 1751 mga_option |= MX_OPTION_BSWAP; 1752 /* disable palette snooping */ 1753 cmd &= ~PCI_COMMAND_VGA_PALETTE; 1754 if (pci_dev_present(intel_82437)) { 1755 if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) { 1756 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n"); 1757 } 1758 mga_option |= 0x20000000; 1759 minfo->devflags.nopciretry = 1; 1760 } 1761 pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd); 1762 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option); 1763 minfo->hw.MXoptionReg = mga_option; 1764 1765 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */ 1766 /* maybe preinit() candidate, but it is same... for all devices... at this time... */ 1767 pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00); 1768 } 1769 1770 err = -ENXIO; 1771 matroxfb_read_pins(minfo); 1772 if (minfo->hw_switch->preinit(minfo)) { 1773 goto failVideoIO; 1774 } 1775 1776 err = -ENOMEM; 1777 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) { 1778 printk(KERN_ERR "matroxfb: cannot determine memory size\n"); 1779 goto failVideoIO; 1780 } 1781 minfo->devflags.ydstorg = 0; 1782 1783 minfo->video.base = video_base_phys; 1784 minfo->video.len_usable = minfo->video.len; 1785 if (minfo->video.len_usable > b->base->maxdisplayable) 1786 minfo->video.len_usable = b->base->maxdisplayable; 1787 if (mtrr) 1788 minfo->wc_cookie = arch_phys_wc_add(video_base_phys, 1789 minfo->video.len); 1790 1791 if (!minfo->devflags.novga) 1792 request_region(0x3C0, 32, "matrox"); 1793 matroxfb_g450_connect(minfo); 1794 minfo->hw_switch->reset(minfo); 1795 1796 minfo->fbcon.monspecs.hfmin = 0; 1797 minfo->fbcon.monspecs.hfmax = fh; 1798 minfo->fbcon.monspecs.vfmin = 0; 1799 minfo->fbcon.monspecs.vfmax = fv; 1800 minfo->fbcon.monspecs.dpms = 0; /* TBD */ 1801 1802 /* static settings */ 1803 vesafb_defined.red = colors[depth-1].red; 1804 vesafb_defined.green = colors[depth-1].green; 1805 vesafb_defined.blue = colors[depth-1].blue; 1806 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel; 1807 vesafb_defined.grayscale = grayscale; 1808 vesafb_defined.vmode = 0; 1809 if (noaccel) 1810 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT; 1811 1812 minfo->fbops = matroxfb_ops; 1813 minfo->fbcon.fbops = &minfo->fbops; 1814 minfo->fbcon.pseudo_palette = minfo->cmap; 1815 minfo->fbcon.flags = FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */ 1816 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */ 1817 FBINFO_HWACCEL_FILLRECT | /* And fillrect */ 1818 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */ 1819 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */ 1820 FBINFO_HWACCEL_YPAN | /* And vertical panning */ 1821 FBINFO_READS_FAST; 1822 minfo->video.len_usable &= PAGE_MASK; 1823 fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1); 1824 1825#ifndef MODULE 1826 /* mode database is marked __init!!! */ 1827 if (!hotplug) { 1828 fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL, 1829 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel); 1830 } 1831#endif /* !MODULE */ 1832 1833 /* mode modifiers */ 1834 if (hslen) 1835 vesafb_defined.hsync_len = hslen; 1836 if (vslen) 1837 vesafb_defined.vsync_len = vslen; 1838 if (left != ~0) 1839 vesafb_defined.left_margin = left; 1840 if (right != ~0) 1841 vesafb_defined.right_margin = right; 1842 if (upper != ~0) 1843 vesafb_defined.upper_margin = upper; 1844 if (lower != ~0) 1845 vesafb_defined.lower_margin = lower; 1846 if (xres) 1847 vesafb_defined.xres = xres; 1848 if (yres) 1849 vesafb_defined.yres = yres; 1850 if (sync != -1) 1851 vesafb_defined.sync = sync; 1852 else if (vesafb_defined.sync == ~0) { 1853 vesafb_defined.sync = 0; 1854 if (yres < 400) 1855 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT; 1856 else if (yres < 480) 1857 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT; 1858 } 1859 1860 /* fv, fh, maxclk limits was specified */ 1861 { 1862 unsigned int tmp; 1863 1864 if (fv) { 1865 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres 1866 + vesafb_defined.lower_margin + vesafb_defined.vsync_len); 1867 if ((tmp < fh) || (fh == 0)) fh = tmp; 1868 } 1869 if (fh) { 1870 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres 1871 + vesafb_defined.right_margin + vesafb_defined.hsync_len); 1872 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp; 1873 } 1874 tmp = (maxclk + 499) / 500; 1875 if (tmp) { 1876 tmp = (2000000000 + tmp) / tmp; 1877 if (tmp > pixclock) pixclock = tmp; 1878 } 1879 } 1880 if (pixclock) { 1881 if (pixclock < 2000) /* > 500MHz */ 1882 pixclock = 4000; /* 250MHz */ 1883 if (pixclock > 1000000) 1884 pixclock = 1000000; /* 1MHz */ 1885 vesafb_defined.pixclock = pixclock; 1886 } 1887 1888 /* FIXME: Where to move this?! */ 1889#if defined(CONFIG_PPC_PMAC) 1890#ifndef MODULE 1891 if (machine_is(powermac)) { 1892 struct fb_var_screeninfo var; 1893 1894 if (default_vmode <= 0 || default_vmode > VMODE_MAX) 1895 default_vmode = VMODE_640_480_60; 1896#if defined(CONFIG_PPC32) 1897 if (IS_REACHABLE(CONFIG_NVRAM) && default_cmode == CMODE_NVRAM) 1898 default_cmode = nvram_read_byte(NV_CMODE); 1899#endif 1900 if (default_cmode < CMODE_8 || default_cmode > CMODE_32) 1901 default_cmode = CMODE_8; 1902 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) { 1903 var.accel_flags = vesafb_defined.accel_flags; 1904 var.xoffset = var.yoffset = 0; 1905 /* Note: mac_vmode_to_var() does not set all parameters */ 1906 vesafb_defined = var; 1907 } 1908 } 1909#endif /* !MODULE */ 1910#endif /* CONFIG_PPC_PMAC */ 1911 vesafb_defined.xres_virtual = vesafb_defined.xres; 1912 if (nopan) { 1913 vesafb_defined.yres_virtual = vesafb_defined.yres; 1914 } else { 1915 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough 1916 to yres_virtual * xres_virtual < 2^32 */ 1917 } 1918 matroxfb_init_fix(minfo); 1919 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase); 1920 /* Normalize values (namely yres_virtual) */ 1921 matroxfb_check_var(&vesafb_defined, &minfo->fbcon); 1922 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over 1923 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var, 1924 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work 1925 * anyway. But we at least tried... */ 1926 minfo->fbcon.var = vesafb_defined; 1927 err = -EINVAL; 1928 1929 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n", 1930 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel, 1931 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual); 1932 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n", 1933 minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len); 1934 1935/* We do not have to set currcon to 0... register_framebuffer do it for us on first console 1936 * and we do not want currcon == 0 for subsequent framebuffers */ 1937 1938 minfo->fbcon.device = &minfo->pcidev->dev; 1939 if (register_framebuffer(&minfo->fbcon) < 0) { 1940 goto failVideoIO; 1941 } 1942 fb_info(&minfo->fbcon, "%s frame buffer device\n", minfo->fbcon.fix.id); 1943 1944 /* there is no console on this fb... but we have to initialize hardware 1945 * until someone tells me what is proper thing to do */ 1946 if (!minfo->initialized) { 1947 fb_info(&minfo->fbcon, "initializing hardware\n"); 1948 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var 1949 * already before, so register_framebuffer works correctly. */ 1950 vesafb_defined.activate |= FB_ACTIVATE_FORCE; 1951 fb_set_var(&minfo->fbcon, &vesafb_defined); 1952 } 1953 1954 return 0; 1955failVideoIO:; 1956 matroxfb_g450_shutdown(minfo); 1957 iounmap(minfo->video.vbase.vaddr); 1958failCtrlIO:; 1959 iounmap(minfo->mmio.vbase.vaddr); 1960failVideoMR:; 1961 release_mem_region(video_base_phys, minfo->video.len_maximum); 1962failCtrlMR:; 1963 release_mem_region(ctrlptr_phys, 16384); 1964fail:; 1965 return err; 1966} 1967 1968static LIST_HEAD(matroxfb_list); 1969static LIST_HEAD(matroxfb_driver_list); 1970 1971#define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb) 1972#define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node) 1973int matroxfb_register_driver(struct matroxfb_driver* drv) { 1974 struct matrox_fb_info* minfo; 1975 1976 list_add(&drv->node, &matroxfb_driver_list); 1977 list_for_each_entry(minfo, &matroxfb_list, next_fb) { 1978 void* p; 1979 1980 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS) 1981 continue; 1982 p = drv->probe(minfo); 1983 if (p) { 1984 minfo->drivers_data[minfo->drivers_count] = p; 1985 minfo->drivers[minfo->drivers_count++] = drv; 1986 } 1987 } 1988 return 0; 1989} 1990 1991void matroxfb_unregister_driver(struct matroxfb_driver* drv) { 1992 struct matrox_fb_info* minfo; 1993 1994 list_del(&drv->node); 1995 list_for_each_entry(minfo, &matroxfb_list, next_fb) { 1996 int i; 1997 1998 for (i = 0; i < minfo->drivers_count; ) { 1999 if (minfo->drivers[i] == drv) { 2000 if (drv && drv->remove) 2001 drv->remove(minfo, minfo->drivers_data[i]); 2002 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count]; 2003 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count]; 2004 } else 2005 i++; 2006 } 2007 } 2008} 2009 2010static void matroxfb_register_device(struct matrox_fb_info* minfo) { 2011 struct matroxfb_driver* drv; 2012 int i = 0; 2013 list_add(&minfo->next_fb, &matroxfb_list); 2014 for (drv = matroxfb_driver_l(matroxfb_driver_list.next); 2015 drv != matroxfb_driver_l(&matroxfb_driver_list); 2016 drv = matroxfb_driver_l(drv->node.next)) { 2017 if (drv->probe) { 2018 void *p = drv->probe(minfo); 2019 if (p) { 2020 minfo->drivers_data[i] = p; 2021 minfo->drivers[i++] = drv; 2022 if (i == MATROXFB_MAX_FB_DRIVERS) 2023 break; 2024 } 2025 } 2026 } 2027 minfo->drivers_count = i; 2028} 2029 2030static void matroxfb_unregister_device(struct matrox_fb_info* minfo) { 2031 int i; 2032 2033 list_del(&minfo->next_fb); 2034 for (i = 0; i < minfo->drivers_count; i++) { 2035 struct matroxfb_driver* drv = minfo->drivers[i]; 2036 2037 if (drv && drv->remove) 2038 drv->remove(minfo, minfo->drivers_data[i]); 2039 } 2040} 2041 2042static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) { 2043 struct board* b; 2044 u_int16_t svid; 2045 u_int16_t sid; 2046 struct matrox_fb_info* minfo; 2047 int err; 2048 u_int32_t cmd; 2049 DBG(__func__) 2050 2051 err = aperture_remove_conflicting_pci_devices(pdev, "matroxfb"); 2052 if (err) 2053 return err; 2054 2055 svid = pdev->subsystem_vendor; 2056 sid = pdev->subsystem_device; 2057 for (b = dev_list; b->vendor; b++) { 2058 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue; 2059 if (b->svid) 2060 if ((b->svid != svid) || (b->sid != sid)) continue; 2061 break; 2062 } 2063 /* not match... */ 2064 if (!b->vendor) 2065 return -ENODEV; 2066 if (dev > 0) { 2067 /* not requested one... */ 2068 dev--; 2069 return -ENODEV; 2070 } 2071 pci_read_config_dword(pdev, PCI_COMMAND, &cmd); 2072 if (pci_enable_device(pdev)) { 2073 return -1; 2074 } 2075 2076 minfo = kzalloc(sizeof(*minfo), GFP_KERNEL); 2077 if (!minfo) 2078 return -ENOMEM; 2079 2080 minfo->pcidev = pdev; 2081 minfo->dead = 0; 2082 minfo->usecount = 0; 2083 minfo->userusecount = 0; 2084 2085 pci_set_drvdata(pdev, minfo); 2086 /* DEVFLAGS */ 2087 minfo->devflags.memtype = memtype; 2088 if (memtype != -1) 2089 noinit = 0; 2090 if (cmd & PCI_COMMAND_MEMORY) { 2091 minfo->devflags.novga = novga; 2092 minfo->devflags.nobios = nobios; 2093 minfo->devflags.noinit = noinit; 2094 /* subsequent heads always needs initialization and must not enable BIOS */ 2095 novga = 1; 2096 nobios = 1; 2097 noinit = 0; 2098 } else { 2099 minfo->devflags.novga = 1; 2100 minfo->devflags.nobios = 1; 2101 minfo->devflags.noinit = 0; 2102 } 2103 2104 minfo->devflags.nopciretry = no_pci_retry; 2105 minfo->devflags.mga_24bpp_fix = inv24; 2106 minfo->devflags.precise_width = option_precise_width; 2107 minfo->devflags.sgram = sgram; 2108 minfo->capable.cross4MB = cross4MB; 2109 2110 spin_lock_init(&minfo->lock.DAC); 2111 spin_lock_init(&minfo->lock.accel); 2112 init_rwsem(&minfo->crtc2.lock); 2113 init_rwsem(&minfo->altout.lock); 2114 mutex_init(&minfo->fbcon.mm_lock); 2115 minfo->irq_flags = 0; 2116 init_waitqueue_head(&minfo->crtc1.vsync.wait); 2117 init_waitqueue_head(&minfo->crtc2.vsync.wait); 2118 minfo->crtc1.panpos = -1; 2119 2120 err = initMatrox2(minfo, b); 2121 if (!err) { 2122 matroxfb_register_device(minfo); 2123 return 0; 2124 } 2125 kfree(minfo); 2126 return -1; 2127} 2128 2129static void pci_remove_matrox(struct pci_dev* pdev) { 2130 struct matrox_fb_info* minfo; 2131 2132 minfo = pci_get_drvdata(pdev); 2133 matroxfb_remove(minfo, 1); 2134} 2135 2136static const struct pci_device_id matroxfb_devices[] = { 2137#ifdef CONFIG_FB_MATROX_MILLENIUM 2138 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 2139 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2140 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 2141 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2142 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 2143 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2144#endif 2145#ifdef CONFIG_FB_MATROX_MYSTIQUE 2146 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 2147 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2148#endif 2149#ifdef CONFIG_FB_MATROX_G 2150 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 2151 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2152 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 2153 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2154 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 2155 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2156 {PCI_VENDOR_ID_MATROX, 0x0532, 2157 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2158 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 2159 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2160 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 2161 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2162 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 2163 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2164#endif 2165 {0, 0, 2166 0, 0, 0, 0, 0} 2167}; 2168 2169MODULE_DEVICE_TABLE(pci, matroxfb_devices); 2170 2171 2172static struct pci_driver matroxfb_driver = { 2173 .name = "matroxfb", 2174 .id_table = matroxfb_devices, 2175 .probe = matroxfb_probe, 2176 .remove = pci_remove_matrox, 2177}; 2178 2179/* **************************** init-time only **************************** */ 2180 2181#define RSResolution(X) ((X) & 0x0F) 2182#define RS640x400 1 2183#define RS640x480 2 2184#define RS800x600 3 2185#define RS1024x768 4 2186#define RS1280x1024 5 2187#define RS1600x1200 6 2188#define RS768x576 7 2189#define RS960x720 8 2190#define RS1152x864 9 2191#define RS1408x1056 10 2192#define RS640x350 11 2193#define RS1056x344 12 /* 132 x 43 text */ 2194#define RS1056x400 13 /* 132 x 50 text */ 2195#define RS1056x480 14 /* 132 x 60 text */ 2196#define RSNoxNo 15 2197/* 10-FF */ 2198static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = { 2199 { 640, 400, 48, 16, 39, 8, 96, 2, 70 }, 2200 { 640, 480, 48, 16, 33, 10, 96, 2, 60 }, 2201 { 800, 600, 144, 24, 28, 8, 112, 6, 60 }, 2202 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 }, 2203 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 }, 2204 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 }, 2205 { 768, 576, 144, 16, 28, 6, 112, 4, 60 }, 2206 { 960, 720, 144, 24, 28, 8, 112, 4, 60 }, 2207 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 }, 2208 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 }, 2209 { 640, 350, 48, 16, 39, 8, 96, 2, 70 }, 2210 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 }, 2211 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 }, 2212 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 }, 2213 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 } 2214}; 2215 2216#define RSCreate(X,Y) ((X) | ((Y) << 8)) 2217static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = { 2218/* default must be first */ 2219 { ~0, RSCreate(RSNoxNo, RS8bpp ) }, 2220 { 0x101, RSCreate(RS640x480, RS8bpp ) }, 2221 { 0x100, RSCreate(RS640x400, RS8bpp ) }, 2222 { 0x180, RSCreate(RS768x576, RS8bpp ) }, 2223 { 0x103, RSCreate(RS800x600, RS8bpp ) }, 2224 { 0x188, RSCreate(RS960x720, RS8bpp ) }, 2225 { 0x105, RSCreate(RS1024x768, RS8bpp ) }, 2226 { 0x190, RSCreate(RS1152x864, RS8bpp ) }, 2227 { 0x107, RSCreate(RS1280x1024, RS8bpp ) }, 2228 { 0x198, RSCreate(RS1408x1056, RS8bpp ) }, 2229 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) }, 2230 { 0x110, RSCreate(RS640x480, RS15bpp) }, 2231 { 0x181, RSCreate(RS768x576, RS15bpp) }, 2232 { 0x113, RSCreate(RS800x600, RS15bpp) }, 2233 { 0x189, RSCreate(RS960x720, RS15bpp) }, 2234 { 0x116, RSCreate(RS1024x768, RS15bpp) }, 2235 { 0x191, RSCreate(RS1152x864, RS15bpp) }, 2236 { 0x119, RSCreate(RS1280x1024, RS15bpp) }, 2237 { 0x199, RSCreate(RS1408x1056, RS15bpp) }, 2238 { 0x11D, RSCreate(RS1600x1200, RS15bpp) }, 2239 { 0x111, RSCreate(RS640x480, RS16bpp) }, 2240 { 0x182, RSCreate(RS768x576, RS16bpp) }, 2241 { 0x114, RSCreate(RS800x600, RS16bpp) }, 2242 { 0x18A, RSCreate(RS960x720, RS16bpp) }, 2243 { 0x117, RSCreate(RS1024x768, RS16bpp) }, 2244 { 0x192, RSCreate(RS1152x864, RS16bpp) }, 2245 { 0x11A, RSCreate(RS1280x1024, RS16bpp) }, 2246 { 0x19A, RSCreate(RS1408x1056, RS16bpp) }, 2247 { 0x11E, RSCreate(RS1600x1200, RS16bpp) }, 2248 { 0x1B2, RSCreate(RS640x480, RS24bpp) }, 2249 { 0x184, RSCreate(RS768x576, RS24bpp) }, 2250 { 0x1B5, RSCreate(RS800x600, RS24bpp) }, 2251 { 0x18C, RSCreate(RS960x720, RS24bpp) }, 2252 { 0x1B8, RSCreate(RS1024x768, RS24bpp) }, 2253 { 0x194, RSCreate(RS1152x864, RS24bpp) }, 2254 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) }, 2255 { 0x19C, RSCreate(RS1408x1056, RS24bpp) }, 2256 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) }, 2257 { 0x112, RSCreate(RS640x480, RS32bpp) }, 2258 { 0x183, RSCreate(RS768x576, RS32bpp) }, 2259 { 0x115, RSCreate(RS800x600, RS32bpp) }, 2260 { 0x18B, RSCreate(RS960x720, RS32bpp) }, 2261 { 0x118, RSCreate(RS1024x768, RS32bpp) }, 2262 { 0x193, RSCreate(RS1152x864, RS32bpp) }, 2263 { 0x11B, RSCreate(RS1280x1024, RS32bpp) }, 2264 { 0x19B, RSCreate(RS1408x1056, RS32bpp) }, 2265 { 0x11F, RSCreate(RS1600x1200, RS32bpp) }, 2266 { 0x010, RSCreate(RS640x350, RS4bpp ) }, 2267 { 0x012, RSCreate(RS640x480, RS4bpp ) }, 2268 { 0x102, RSCreate(RS800x600, RS4bpp ) }, 2269 { 0x104, RSCreate(RS1024x768, RS4bpp ) }, 2270 { 0x106, RSCreate(RS1280x1024, RS4bpp ) }, 2271 { 0, 0 }}; 2272 2273static void __init matroxfb_init_params(void) { 2274 /* fh from kHz to Hz */ 2275 if (fh < 1000) 2276 fh *= 1000; /* 1kHz minimum */ 2277 /* maxclk */ 2278 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */ 2279 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */ 2280 /* fix VESA number */ 2281 if (vesa != ~0) 2282 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */ 2283 2284 /* static settings */ 2285 for (RSptr = vesamap; RSptr->vesa; RSptr++) { 2286 if (RSptr->vesa == vesa) break; 2287 } 2288 if (!RSptr->vesa) { 2289 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa); 2290 RSptr = vesamap; 2291 } 2292 { 2293 int res = RSResolution(RSptr->info)-1; 2294 if (left == ~0) 2295 left = timmings[res].left; 2296 if (!xres) 2297 xres = timmings[res].xres; 2298 if (right == ~0) 2299 right = timmings[res].right; 2300 if (!hslen) 2301 hslen = timmings[res].hslen; 2302 if (upper == ~0) 2303 upper = timmings[res].upper; 2304 if (!yres) 2305 yres = timmings[res].yres; 2306 if (lower == ~0) 2307 lower = timmings[res].lower; 2308 if (!vslen) 2309 vslen = timmings[res].vslen; 2310 if (!(fv||fh||maxclk||pixclock)) 2311 fv = timmings[res].vfreq; 2312 if (depth == -1) 2313 depth = RSDepth(RSptr->info); 2314 } 2315} 2316 2317static int __init matrox_init(void) { 2318 int err; 2319 2320 if (fb_modesetting_disabled("matroxfb")) 2321 return -ENODEV; 2322 2323 matroxfb_init_params(); 2324 err = pci_register_driver(&matroxfb_driver); 2325 dev = -1; /* accept all new devices... */ 2326 return err; 2327} 2328 2329/* **************************** exit-time only **************************** */ 2330 2331static void __exit matrox_done(void) { 2332 pci_unregister_driver(&matroxfb_driver); 2333} 2334 2335#ifndef MODULE 2336 2337/* ************************* init in-kernel code ************************** */ 2338 2339static int __init matroxfb_setup(char *options) { 2340 char *this_opt; 2341 2342 DBG(__func__) 2343 2344 if (!options || !*options) 2345 return 0; 2346 2347 while ((this_opt = strsep(&options, ",")) != NULL) { 2348 if (!*this_opt) continue; 2349 2350 dprintk("matroxfb_setup: option %s\n", this_opt); 2351 2352 if (!strncmp(this_opt, "dev:", 4)) 2353 dev = simple_strtoul(this_opt+4, NULL, 0); 2354 else if (!strncmp(this_opt, "depth:", 6)) { 2355 switch (simple_strtoul(this_opt+6, NULL, 0)) { 2356 case 0: depth = RSText; break; 2357 case 4: depth = RS4bpp; break; 2358 case 8: depth = RS8bpp; break; 2359 case 15:depth = RS15bpp; break; 2360 case 16:depth = RS16bpp; break; 2361 case 24:depth = RS24bpp; break; 2362 case 32:depth = RS32bpp; break; 2363 default: 2364 printk(KERN_ERR "matroxfb: unsupported color depth\n"); 2365 } 2366 } else if (!strncmp(this_opt, "xres:", 5)) 2367 xres = simple_strtoul(this_opt+5, NULL, 0); 2368 else if (!strncmp(this_opt, "yres:", 5)) 2369 yres = simple_strtoul(this_opt+5, NULL, 0); 2370 else if (!strncmp(this_opt, "vslen:", 6)) 2371 vslen = simple_strtoul(this_opt+6, NULL, 0); 2372 else if (!strncmp(this_opt, "hslen:", 6)) 2373 hslen = simple_strtoul(this_opt+6, NULL, 0); 2374 else if (!strncmp(this_opt, "left:", 5)) 2375 left = simple_strtoul(this_opt+5, NULL, 0); 2376 else if (!strncmp(this_opt, "right:", 6)) 2377 right = simple_strtoul(this_opt+6, NULL, 0); 2378 else if (!strncmp(this_opt, "upper:", 6)) 2379 upper = simple_strtoul(this_opt+6, NULL, 0); 2380 else if (!strncmp(this_opt, "lower:", 6)) 2381 lower = simple_strtoul(this_opt+6, NULL, 0); 2382 else if (!strncmp(this_opt, "pixclock:", 9)) 2383 pixclock = simple_strtoul(this_opt+9, NULL, 0); 2384 else if (!strncmp(this_opt, "sync:", 5)) 2385 sync = simple_strtoul(this_opt+5, NULL, 0); 2386 else if (!strncmp(this_opt, "vesa:", 5)) 2387 vesa = simple_strtoul(this_opt+5, NULL, 0); 2388 else if (!strncmp(this_opt, "maxclk:", 7)) 2389 maxclk = simple_strtoul(this_opt+7, NULL, 0); 2390 else if (!strncmp(this_opt, "fh:", 3)) 2391 fh = simple_strtoul(this_opt+3, NULL, 0); 2392 else if (!strncmp(this_opt, "fv:", 3)) 2393 fv = simple_strtoul(this_opt+3, NULL, 0); 2394 else if (!strncmp(this_opt, "mem:", 4)) 2395 mem = simple_strtoul(this_opt+4, NULL, 0); 2396 else if (!strncmp(this_opt, "mode:", 5)) 2397 strscpy(videomode, this_opt + 5, sizeof(videomode)); 2398 else if (!strncmp(this_opt, "outputs:", 8)) 2399 strscpy(outputs, this_opt + 8, sizeof(outputs)); 2400 else if (!strncmp(this_opt, "dfp:", 4)) { 2401 dfp_type = simple_strtoul(this_opt+4, NULL, 0); 2402 dfp = 1; 2403 } 2404#ifdef CONFIG_PPC_PMAC 2405 else if (!strncmp(this_opt, "vmode:", 6)) { 2406 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0); 2407 if (vmode > 0 && vmode <= VMODE_MAX) 2408 default_vmode = vmode; 2409 } else if (!strncmp(this_opt, "cmode:", 6)) { 2410 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0); 2411 switch (cmode) { 2412 case 0: 2413 case 8: 2414 default_cmode = CMODE_8; 2415 break; 2416 case 15: 2417 case 16: 2418 default_cmode = CMODE_16; 2419 break; 2420 case 24: 2421 case 32: 2422 default_cmode = CMODE_32; 2423 break; 2424 } 2425 } 2426#endif 2427 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */ 2428 disabled = 1; 2429 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */ 2430 disabled = 0; 2431 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */ 2432 sgram = 1; 2433 else if (!strcmp(this_opt, "sdram")) 2434 sgram = 0; 2435 else if (!strncmp(this_opt, "memtype:", 8)) 2436 memtype = simple_strtoul(this_opt+8, NULL, 0); 2437 else { 2438 int value = 1; 2439 2440 if (!strncmp(this_opt, "no", 2)) { 2441 value = 0; 2442 this_opt += 2; 2443 } 2444 if (! strcmp(this_opt, "inverse")) 2445 inverse = value; 2446 else if (!strcmp(this_opt, "accel")) 2447 noaccel = !value; 2448 else if (!strcmp(this_opt, "pan")) 2449 nopan = !value; 2450 else if (!strcmp(this_opt, "pciretry")) 2451 no_pci_retry = !value; 2452 else if (!strcmp(this_opt, "vga")) 2453 novga = !value; 2454 else if (!strcmp(this_opt, "bios")) 2455 nobios = !value; 2456 else if (!strcmp(this_opt, "init")) 2457 noinit = !value; 2458 else if (!strcmp(this_opt, "mtrr")) 2459 mtrr = value; 2460 else if (!strcmp(this_opt, "inv24")) 2461 inv24 = value; 2462 else if (!strcmp(this_opt, "cross4MB")) 2463 cross4MB = value; 2464 else if (!strcmp(this_opt, "grayscale")) 2465 grayscale = value; 2466 else if (!strcmp(this_opt, "dfp")) 2467 dfp = value; 2468 else { 2469 strscpy(videomode, this_opt, sizeof(videomode)); 2470 } 2471 } 2472 } 2473 return 0; 2474} 2475 2476static int __initdata initialized = 0; 2477 2478static int __init matroxfb_init(void) 2479{ 2480 char *option = NULL; 2481 int err = 0; 2482 2483 DBG(__func__) 2484 2485 if (fb_get_options("matroxfb", &option)) 2486 return -ENODEV; 2487 matroxfb_setup(option); 2488 2489 if (disabled) 2490 return -ENXIO; 2491 if (!initialized) { 2492 initialized = 1; 2493 err = matrox_init(); 2494 } 2495 hotplug = 1; 2496 /* never return failure, user can hotplug matrox later... */ 2497 return err; 2498} 2499 2500#else 2501 2502/* *************************** init module code **************************** */ 2503 2504MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>"); 2505MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550"); 2506MODULE_LICENSE("GPL"); 2507 2508module_param(mem, int, 0); 2509MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)"); 2510module_param(disabled, int, 0); 2511MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)"); 2512module_param(noaccel, int, 0); 2513MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)"); 2514module_param(nopan, int, 0); 2515MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)"); 2516module_param(no_pci_retry, int, 0); 2517MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)"); 2518module_param(novga, int, 0); 2519MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)"); 2520module_param(nobios, int, 0); 2521MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)"); 2522module_param(noinit, int, 0); 2523MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)"); 2524module_param(memtype, int, 0); 2525MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.rst for explanation) (default=3 for G200, 0 for G400)"); 2526module_param(mtrr, int, 0); 2527MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)"); 2528module_param(sgram, int, 0); 2529MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)"); 2530module_param(inv24, int, 0); 2531MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)"); 2532module_param(inverse, int, 0); 2533MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)"); 2534module_param(dev, int, 0); 2535MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)"); 2536module_param(vesa, int, 0); 2537MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)"); 2538module_param(xres, int, 0); 2539MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)"); 2540module_param(yres, int, 0); 2541MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)"); 2542module_param(upper, int, 0); 2543MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)"); 2544module_param(lower, int, 0); 2545MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)"); 2546module_param(vslen, int, 0); 2547MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)"); 2548module_param(left, int, 0); 2549MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)"); 2550module_param(right, int, 0); 2551MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)"); 2552module_param(hslen, int, 0); 2553MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)"); 2554module_param(pixclock, int, 0); 2555MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)"); 2556module_param(sync, int, 0); 2557MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)"); 2558module_param(depth, int, 0); 2559MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)"); 2560module_param(maxclk, int, 0); 2561MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz"); 2562module_param(fh, int, 0); 2563MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz"); 2564module_param(fv, int, 0); 2565MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n" 2566"You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\""); 2567module_param(grayscale, int, 0); 2568MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)"); 2569module_param(cross4MB, int, 0); 2570MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)"); 2571module_param(dfp, int, 0); 2572MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)"); 2573module_param(dfp_type, int, 0); 2574MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)"); 2575module_param_string(outputs, outputs, sizeof(outputs), 0); 2576MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)"); 2577#ifdef CONFIG_PPC_PMAC 2578module_param_named(vmode, default_vmode, int, 0); 2579MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)"); 2580module_param_named(cmode, default_cmode, int, 0); 2581MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)"); 2582#endif 2583 2584static int __init matroxfb_init(void){ 2585 2586 DBG(__func__) 2587 2588 if (disabled) 2589 return -ENXIO; 2590 2591 if (depth == 0) 2592 depth = RSText; 2593 else if (depth == 4) 2594 depth = RS4bpp; 2595 else if (depth == 8) 2596 depth = RS8bpp; 2597 else if (depth == 15) 2598 depth = RS15bpp; 2599 else if (depth == 16) 2600 depth = RS16bpp; 2601 else if (depth == 24) 2602 depth = RS24bpp; 2603 else if (depth == 32) 2604 depth = RS32bpp; 2605 else if (depth != -1) { 2606 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth); 2607 depth = -1; 2608 } 2609 matrox_init(); 2610 /* never return failure; user can hotplug matrox later... */ 2611 return 0; 2612} 2613#endif /* MODULE */ 2614 2615module_init(matroxfb_init); 2616module_exit(matrox_done); 2617EXPORT_SYMBOL(matroxfb_register_driver); 2618EXPORT_SYMBOL(matroxfb_unregister_driver); 2619EXPORT_SYMBOL(matroxfb_wait_for_sync); 2620EXPORT_SYMBOL(matroxfb_enable_irq);
~/
Read-only file preview.