g450_pll.c

  1/*
  2 *
  3 * Hardware accelerated Matrox PCI cards - G450/G550 PLL control.
  4 *
  5 * (c) 2001-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
  6 *
  7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
  8 *
  9 * Version: 1.64 2002/06/10
 10 *
 11 * This file is subject to the terms and conditions of the GNU General Public
 12 * License. See the file COPYING in the main directory of this archive for
 13 * more details.
 14 *
 15 */
 16
 17#include <linux/export.h>
 18
 19#include "g450_pll.h"
 20#include "matroxfb_DAC1064.h"
 21
 22static inline unsigned int g450_vco2f(unsigned char p, unsigned int fvco) {
 23	return (p & 0x40) ? fvco : fvco >> ((p & 3) + 1);
 24}
 25
 26static inline unsigned int g450_f2vco(unsigned char p, unsigned int fin) {
 27	return (p & 0x40) ? fin : fin << ((p & 3) + 1);
 28}
 29
 30static unsigned int g450_mnp2vco(const struct matrox_fb_info *minfo,
 31				 unsigned int mnp)
 32{
 33	unsigned int m, n;
 34
 35	m = ((mnp >> 16) & 0x0FF) + 1;
 36	n = ((mnp >>  7) & 0x1FE) + 4;
 37	return (minfo->features.pll.ref_freq * n + (m >> 1)) / m;
 38}
 39
 40unsigned int g450_mnp2f(const struct matrox_fb_info *minfo, unsigned int mnp)
 41{
 42	return g450_vco2f(mnp, g450_mnp2vco(minfo, mnp));
 43}
 44
 45static inline unsigned int pll_freq_delta(unsigned int f1, unsigned int f2) {
 46	if (f2 < f1) {
 47    		f2 = f1 - f2;
 48	} else {
 49		f2 = f2 - f1;
 50	}
 51	return f2;
 52}
 53
 54#define NO_MORE_MNP	0x01FFFFFF
 55#define G450_MNP_FREQBITS	(0xFFFFFF43)	/* do not mask high byte so we'll catch NO_MORE_MNP */
 56
 57static unsigned int g450_nextpll(const struct matrox_fb_info *minfo,
 58				 const struct matrox_pll_limits *pi,
 59				 unsigned int *fvco, unsigned int mnp)
 60{
 61	unsigned int m, n, p;
 62	unsigned int tvco = *fvco;
 63
 64	m = (mnp >> 16) & 0xFF;
 65	p = mnp & 0xFF;
 66
 67	do {
 68		if (m == 0 || m == 0xFF) {
 69			if (m == 0) {
 70				if (p & 0x40) {
 71					return NO_MORE_MNP;
 72				}
 73			        if (p & 3) {
 74					p--;
 75				} else {
 76					p = 0x40;
 77				}
 78				tvco >>= 1;
 79				if (tvco < pi->vcomin) {
 80					return NO_MORE_MNP;
 81				}
 82				*fvco = tvco;
 83			}
 84
 85			p &= 0x43;
 86			if (tvco < 550000) {
 87/*				p |= 0x00; */
 88			} else if (tvco < 700000) {
 89				p |= 0x08;
 90			} else if (tvco < 1000000) {
 91				p |= 0x10;
 92			} else if (tvco < 1150000) {
 93				p |= 0x18;
 94			} else {
 95				p |= 0x20;
 96			}
 97			m = 9;
 98		} else {
 99			m--;
100		}
101		n = ((tvco * (m+1) + minfo->features.pll.ref_freq) / (minfo->features.pll.ref_freq * 2)) - 2;
102	} while (n < 0x03 || n > 0x7A);
103	return (m << 16) | (n << 8) | p;
104}
105
106static unsigned int g450_firstpll(const struct matrox_fb_info *minfo,
107				  const struct matrox_pll_limits *pi,
108				  unsigned int *vco, unsigned int fout)
109{
110	unsigned int p;
111	unsigned int vcomax;
112
113	vcomax = pi->vcomax;
114	if (fout > (vcomax / 2)) {
115		if (fout > vcomax) {
116			*vco = vcomax;
117		} else {
118			*vco = fout;
119		}
120		p = 0x40;
121	} else {
122		unsigned int tvco;
123
124		p = 3;
125		tvco = g450_f2vco(p, fout);
126		while (p && (tvco > vcomax)) {
127			p--;
128			tvco >>= 1;
129		}
130		if (tvco < pi->vcomin) {
131			tvco = pi->vcomin;
132		}
133		*vco = tvco;
134	}
135	return g450_nextpll(minfo, pi, vco, 0xFF0000 | p);
136}
137
138static inline unsigned int g450_setpll(const struct matrox_fb_info *minfo,
139				       unsigned int mnp, unsigned int pll)
140{
141	switch (pll) {
142		case M_PIXEL_PLL_A:
143			matroxfb_DAC_out(minfo, M1064_XPIXPLLAM, mnp >> 16);
144			matroxfb_DAC_out(minfo, M1064_XPIXPLLAN, mnp >> 8);
145			matroxfb_DAC_out(minfo, M1064_XPIXPLLAP, mnp);
146			return M1064_XPIXPLLSTAT;
147
148		case M_PIXEL_PLL_B:
149			matroxfb_DAC_out(minfo, M1064_XPIXPLLBM, mnp >> 16);
150			matroxfb_DAC_out(minfo, M1064_XPIXPLLBN, mnp >> 8);
151			matroxfb_DAC_out(minfo, M1064_XPIXPLLBP, mnp);
152			return M1064_XPIXPLLSTAT;
153
154		case M_PIXEL_PLL_C:
155			matroxfb_DAC_out(minfo, M1064_XPIXPLLCM, mnp >> 16);
156			matroxfb_DAC_out(minfo, M1064_XPIXPLLCN, mnp >> 8);
157			matroxfb_DAC_out(minfo, M1064_XPIXPLLCP, mnp);
158			return M1064_XPIXPLLSTAT;
159
160		case M_SYSTEM_PLL:
161			matroxfb_DAC_out(minfo, DAC1064_XSYSPLLM, mnp >> 16);
162			matroxfb_DAC_out(minfo, DAC1064_XSYSPLLN, mnp >> 8);
163			matroxfb_DAC_out(minfo, DAC1064_XSYSPLLP, mnp);
164			return DAC1064_XSYSPLLSTAT;
165
166		case M_VIDEO_PLL:
167			matroxfb_DAC_out(minfo, M1064_XVIDPLLM, mnp >> 16);
168			matroxfb_DAC_out(minfo, M1064_XVIDPLLN, mnp >> 8);
169			matroxfb_DAC_out(minfo, M1064_XVIDPLLP, mnp);
170			return M1064_XVIDPLLSTAT;
171	}
172	return 0;
173}
174
175static inline unsigned int g450_cmppll(const struct matrox_fb_info *minfo,
176				       unsigned int mnp, unsigned int pll)
177{
178	unsigned char m = mnp >> 16;
179	unsigned char n = mnp >> 8;
180	unsigned char p = mnp;
181
182	switch (pll) {
183		case M_PIXEL_PLL_A:
184			return (matroxfb_DAC_in(minfo, M1064_XPIXPLLAM) != m ||
185				matroxfb_DAC_in(minfo, M1064_XPIXPLLAN) != n ||
186				matroxfb_DAC_in(minfo, M1064_XPIXPLLAP) != p);
187
188		case M_PIXEL_PLL_B:
189			return (matroxfb_DAC_in(minfo, M1064_XPIXPLLBM) != m ||
190				matroxfb_DAC_in(minfo, M1064_XPIXPLLBN) != n ||
191				matroxfb_DAC_in(minfo, M1064_XPIXPLLBP) != p);
192
193		case M_PIXEL_PLL_C:
194			return (matroxfb_DAC_in(minfo, M1064_XPIXPLLCM) != m ||
195				matroxfb_DAC_in(minfo, M1064_XPIXPLLCN) != n ||
196				matroxfb_DAC_in(minfo, M1064_XPIXPLLCP) != p);
197
198		case M_SYSTEM_PLL:
199			return (matroxfb_DAC_in(minfo, DAC1064_XSYSPLLM) != m ||
200				matroxfb_DAC_in(minfo, DAC1064_XSYSPLLN) != n ||
201				matroxfb_DAC_in(minfo, DAC1064_XSYSPLLP) != p);
202
203		case M_VIDEO_PLL:
204			return (matroxfb_DAC_in(minfo, M1064_XVIDPLLM) != m ||
205				matroxfb_DAC_in(minfo, M1064_XVIDPLLN) != n ||
206				matroxfb_DAC_in(minfo, M1064_XVIDPLLP) != p);
207	}
208	return 1;
209}
210
211static inline int g450_isplllocked(const struct matrox_fb_info *minfo,
212				   unsigned int regidx)
213{
214	unsigned int j;
215
216	for (j = 0; j < 1000; j++) {
217		if (matroxfb_DAC_in(minfo, regidx) & 0x40) {
218			unsigned int r = 0;
219			int i;
220
221			for (i = 0; i < 100; i++) {
222				r += matroxfb_DAC_in(minfo, regidx) & 0x40;
223			}
224			return r >= (90 * 0x40);
225		}
226		/* udelay(1)... but DAC_in is much slower... */
227	}
228	return 0;
229}
230
231static int g450_testpll(const struct matrox_fb_info *minfo, unsigned int mnp,
232			unsigned int pll)
233{
234	return g450_isplllocked(minfo, g450_setpll(minfo, mnp, pll));
235}
236
237static void updatehwstate_clk(struct matrox_hw_state* hw, unsigned int mnp, unsigned int pll) {
238	switch (pll) {
239		case M_SYSTEM_PLL:
240			hw->DACclk[3] = mnp >> 16;
241			hw->DACclk[4] = mnp >> 8;
242			hw->DACclk[5] = mnp;
243			break;
244	}
245}
246
247void matroxfb_g450_setpll_cond(struct matrox_fb_info *minfo, unsigned int mnp,
248			       unsigned int pll)
249{
250	if (g450_cmppll(minfo, mnp, pll)) {
251		g450_setpll(minfo, mnp, pll);
252	}
253}
254
255static inline unsigned int g450_findworkingpll(struct matrox_fb_info *minfo,
256					       unsigned int pll,
257					       unsigned int *mnparray,
258					       unsigned int mnpcount)
259{
260	unsigned int found = 0;
261	unsigned int idx;
262	unsigned int mnpfound = mnparray[0];
263
264	for (idx = 0; idx < mnpcount; idx++) {
265		unsigned int sarray[3];
266		unsigned int *sptr;
267		{
268			unsigned int mnp;
269
270			sptr = sarray;
271			mnp = mnparray[idx];
272			if (mnp & 0x38) {
273				*sptr++ = mnp - 8;
274			}
275			if ((mnp & 0x38) != 0x38) {
276				*sptr++ = mnp + 8;
277			}
278			*sptr = mnp;
279		}
280		while (sptr >= sarray) {
281			unsigned int mnp = *sptr--;
282
283			if (g450_testpll(minfo, mnp - 0x0300, pll) &&
284			    g450_testpll(minfo, mnp + 0x0300, pll) &&
285			    g450_testpll(minfo, mnp - 0x0200, pll) &&
286			    g450_testpll(minfo, mnp + 0x0200, pll) &&
287			    g450_testpll(minfo, mnp - 0x0100, pll) &&
288			    g450_testpll(minfo, mnp + 0x0100, pll)) {
289				if (g450_testpll(minfo, mnp, pll)) {
290					return mnp;
291				}
292			} else if (!found && g450_testpll(minfo, mnp, pll)) {
293				mnpfound = mnp;
294				found = 1;
295			}
296		}
297	}
298	g450_setpll(minfo, mnpfound, pll);
299	return mnpfound;
300}
301
302static void g450_addcache(struct matrox_pll_cache* ci, unsigned int mnp_key, unsigned int mnp_value) {
303	if (++ci->valid > ARRAY_SIZE(ci->data)) {
304		ci->valid = ARRAY_SIZE(ci->data);
305	}
306	memmove(ci->data + 1, ci->data, (ci->valid - 1) * sizeof(*ci->data));
307	ci->data[0].mnp_key = mnp_key & G450_MNP_FREQBITS;
308	ci->data[0].mnp_value = mnp_value;
309}
310
311static int g450_checkcache(struct matrox_fb_info *minfo,
312			   struct matrox_pll_cache *ci, unsigned int mnp_key)
313{
314	unsigned int i;
315
316	mnp_key &= G450_MNP_FREQBITS;
317	for (i = 0; i < ci->valid; i++) {
318		if (ci->data[i].mnp_key == mnp_key) {
319			unsigned int mnp;
320
321			mnp = ci->data[i].mnp_value;
322			if (i) {
323				memmove(ci->data + 1, ci->data, i * sizeof(*ci->data));
324				ci->data[0].mnp_key = mnp_key;
325				ci->data[0].mnp_value = mnp;
326			}
327			return mnp;
328		}
329	}
330	return NO_MORE_MNP;
331}
332
333static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
334			 unsigned int pll, unsigned int *mnparray,
335			 unsigned int *deltaarray)
336{
337	unsigned int mnpcount;
338	const struct matrox_pll_limits* pi;
339	struct matrox_pll_cache* ci;
340
341	switch (pll) {
342		case M_PIXEL_PLL_A:
343		case M_PIXEL_PLL_B:
344		case M_PIXEL_PLL_C:
345			{
346				u_int8_t tmp, xpwrctrl;
347				unsigned long flags;
348
349				matroxfb_DAC_lock_irqsave(flags);
350
351				xpwrctrl = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
352				matroxfb_DAC_out(minfo, M1064_XPWRCTRL, xpwrctrl & ~M1064_XPWRCTRL_PANELPDN);
353				mga_outb(M_SEQ_INDEX, M_SEQ1);
354				mga_outb(M_SEQ_DATA, mga_inb(M_SEQ_DATA) | M_SEQ1_SCROFF);
355				tmp = matroxfb_DAC_in(minfo, M1064_XPIXCLKCTRL);
356				tmp |= M1064_XPIXCLKCTRL_DIS;
357				if (!(tmp & M1064_XPIXCLKCTRL_PLL_UP)) {
358					tmp |= M1064_XPIXCLKCTRL_PLL_UP;
359				}
360				matroxfb_DAC_out(minfo, M1064_XPIXCLKCTRL, tmp);
361				/* DVI PLL preferred for frequencies up to
362				   panel link max, standard PLL otherwise */
363				if (fout >= minfo->max_pixel_clock_panellink)
364					tmp = 0;
365				else tmp =
366					M1064_XDVICLKCTRL_DVIDATAPATHSEL |
367					M1064_XDVICLKCTRL_C1DVICLKSEL |
368					M1064_XDVICLKCTRL_C1DVICLKEN |
369					M1064_XDVICLKCTRL_DVILOOPCTL |
370					M1064_XDVICLKCTRL_P1LOOPBWDTCTL;
371                                /* Setting this breaks PC systems so don't do it */
372				/* matroxfb_DAC_out(minfo, M1064_XDVICLKCTRL, tmp); */
373				matroxfb_DAC_out(minfo, M1064_XPWRCTRL,
374						 xpwrctrl);
375
376				matroxfb_DAC_unlock_irqrestore(flags);
377			}
378			{
379				u_int8_t misc;
380
381				misc = mga_inb(M_MISC_REG_READ) & ~0x0C;
382				switch (pll) {
383					case M_PIXEL_PLL_A:
384						break;
385					case M_PIXEL_PLL_B:
386						misc |=  0x04;
387						break;
388					default:
389						misc |=  0x0C;
390						break;
391				}
392				mga_outb(M_MISC_REG, misc);
393			}
394			pi = &minfo->limits.pixel;
395			ci = &minfo->cache.pixel;
396			break;
397		case M_SYSTEM_PLL:
398			{
399				u_int32_t opt;
400
401				pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &opt);
402				if (!(opt & 0x20)) {
403					pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, opt | 0x20);
404				}
405			}
406			pi = &minfo->limits.system;
407			ci = &minfo->cache.system;
408			break;
409		case M_VIDEO_PLL:
410			{
411				u_int8_t tmp;
412				unsigned int mnp;
413				unsigned long flags;
414
415				matroxfb_DAC_lock_irqsave(flags);
416				tmp = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
417				if (!(tmp & 2)) {
418					matroxfb_DAC_out(minfo, M1064_XPWRCTRL, tmp | 2);
419				}
420
421				mnp = matroxfb_DAC_in(minfo, M1064_XPIXPLLCM) << 16;
422				mnp |= matroxfb_DAC_in(minfo, M1064_XPIXPLLCN) << 8;
423				matroxfb_DAC_unlock_irqrestore(flags);
424			}
425			pi = &minfo->limits.video;
426			ci = &minfo->cache.video;
427			break;
428		default:
429			return -EINVAL;
430	}
431
432	mnpcount = 0;
433	{
434		unsigned int mnp;
435		unsigned int xvco;
436
437		for (mnp = g450_firstpll(minfo, pi, &xvco, fout); mnp != NO_MORE_MNP; mnp = g450_nextpll(minfo, pi, &xvco, mnp)) {
438			unsigned int idx;
439			unsigned int vco;
440			unsigned int delta;
441
442			vco = g450_mnp2vco(minfo, mnp);
443			delta = pll_freq_delta(fout, g450_vco2f(mnp, vco));
444			for (idx = mnpcount; idx > 0; idx--) {
445				/* == is important; due to nextpll algorithm we get
446				   sorted equally good frequencies from lower VCO
447				   frequency to higher - with <= lowest wins, while
448				   with < highest one wins */
449				if (delta <= deltaarray[idx-1]) {
450					/* all else being equal except VCO,
451					 * choose VCO not near (within 1/16th or so) VCOmin
452					 * (freqs near VCOmin aren't as stable)
453					 */
454					if (delta == deltaarray[idx-1]
455					    && vco != g450_mnp2vco(minfo, mnparray[idx-1])
456					    && vco < (pi->vcomin * 17 / 16)) {
457						break;
458					}
459					mnparray[idx] = mnparray[idx-1];
460					deltaarray[idx] = deltaarray[idx-1];
461				} else {
462					break;
463				}
464			}
465			mnparray[idx] = mnp;
466			deltaarray[idx] = delta;
467			mnpcount++;
468		}
469	}
470	/* VideoPLL and PixelPLL matched: do nothing... In all other cases we should get at least one frequency */
471	if (!mnpcount) {
472		return -EBUSY;
473	}
474	{
475		unsigned long flags;
476		unsigned int mnp;
477
478		matroxfb_DAC_lock_irqsave(flags);
479		mnp = g450_checkcache(minfo, ci, mnparray[0]);
480		if (mnp != NO_MORE_MNP) {
481			matroxfb_g450_setpll_cond(minfo, mnp, pll);
482		} else {
483			mnp = g450_findworkingpll(minfo, pll, mnparray, mnpcount);
484			g450_addcache(ci, mnparray[0], mnp);
485		}
486		updatehwstate_clk(&minfo->hw, mnp, pll);
487		matroxfb_DAC_unlock_irqrestore(flags);
488		return mnp;
489	}
490}
491
492/* It must be greater than number of possible PLL values.
493 * Currently there is 5(p) * 10(m) = 50 possible values. */
494#define MNP_TABLE_SIZE  64
495
496int matroxfb_g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
497			 unsigned int pll)
498{
499	unsigned int* arr;
500
501	arr = kmalloc(sizeof(*arr) * MNP_TABLE_SIZE * 2, GFP_KERNEL);
502	if (arr) {
503		int r;
504
505		r = __g450_setclk(minfo, fout, pll, arr, arr + MNP_TABLE_SIZE);
506		kfree(arr);
507		return r;
508	}
509	return -ENOMEM;
510}
511
512EXPORT_SYMBOL(matroxfb_g450_setclk);
513EXPORT_SYMBOL(g450_mnp2f);
514EXPORT_SYMBOL(matroxfb_g450_setpll_cond);
515
516MODULE_AUTHOR("(c) 2001-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
517MODULE_DESCRIPTION("Matrox G450/G550 PLL driver");
518
519MODULE_LICENSE("GPL");