tps6598x.h

  1/* SPDX-License-Identifier: GPL-2.0+ */
  2/*
  3 * Driver for TI TPS6598x USB Power Delivery controller family
  4 *
  5 * Copyright (C) 2017, Intel Corporation
  6 * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
  7 */
  8
  9#include <linux/bits.h>
 10#include <linux/bitfield.h>
 11
 12#ifndef __TPS6598X_H__
 13#define __TPS6598X_H__
 14
 15#define TPS_FIELD_GET(_mask, _reg) ((typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)))
 16
 17/* TPS_REG_STATUS bits */
 18#define TPS_STATUS_PLUG_PRESENT		BIT(0)
 19#define TPS_STATUS_PLUG_UPSIDE_DOWN	BIT(4)
 20#define TPS_STATUS_TO_UPSIDE_DOWN(s)	(!!((s) & TPS_STATUS_PLUG_UPSIDE_DOWN))
 21#define TPS_STATUS_PORTROLE		BIT(5)
 22#define TPS_STATUS_TO_TYPEC_PORTROLE(s) (!!((s) & TPS_STATUS_PORTROLE))
 23#define TPS_STATUS_DATAROLE		BIT(6)
 24#define TPS_STATUS_TO_TYPEC_DATAROLE(s)	(!!((s) & TPS_STATUS_DATAROLE))
 25#define TPS_STATUS_VCONN		BIT(7)
 26#define TPS_STATUS_TO_TYPEC_VCONN(s)	(!!((s) & TPS_STATUS_VCONN))
 27#define TPS_STATUS_OVERCURRENT		BIT(16)
 28#define TPS_STATUS_GOTO_MIN_ACTIVE	BIT(26)
 29#define TPS_STATUS_BIST			BIT(27)
 30#define TPS_STATUS_HIGH_VOLTAGE_WARNING	BIT(28)
 31#define TPS_STATUS_HIGH_LOW_VOLTAGE_WARNING BIT(29)
 32
 33#define TPS_STATUS_CONN_STATE_MASK		GENMASK(3, 1)
 34#define TPS_STATUS_CONN_STATE(x)		TPS_FIELD_GET(TPS_STATUS_CONN_STATE_MASK, (x))
 35#define TPS_STATUS_PP_5V0_SWITCH_MASK		GENMASK(9, 8)
 36#define TPS_STATUS_PP_5V0_SWITCH(x)		TPS_FIELD_GET(TPS_STATUS_PP_5V0_SWITCH_MASK, (x))
 37#define TPS_STATUS_PP_HV_SWITCH_MASK		GENMASK(11, 10)
 38#define TPS_STATUS_PP_HV_SWITCH(x)		TPS_FIELD_GET(TPS_STATUS_PP_HV_SWITCH_MASK, (x))
 39#define TPS_STATUS_PP_EXT_SWITCH_MASK		GENMASK(13, 12)
 40#define TPS_STATUS_PP_EXT_SWITCH(x)		TPS_FIELD_GET(TPS_STATUS_PP_EXT_SWITCH_MASK, (x))
 41#define TPS_STATUS_PP_CABLE_SWITCH_MASK		GENMASK(15, 14)
 42#define TPS_STATUS_PP_CABLE_SWITCH(x)		TPS_FIELD_GET(TPS_STATUS_PP_CABLE_SWITCH_MASK, (x))
 43#define TPS_STATUS_POWER_SOURCE_MASK		GENMASK(19, 18)
 44#define TPS_STATUS_POWER_SOURCE(x)		TPS_FIELD_GET(TPS_STATUS_POWER_SOURCE_MASK, (x))
 45#define TPS_STATUS_VBUS_STATUS_MASK		GENMASK(21, 20)
 46#define TPS_STATUS_VBUS_STATUS(x)		TPS_FIELD_GET(TPS_STATUS_VBUS_STATUS_MASK, (x))
 47#define TPS_STATUS_USB_HOST_PRESENT_MASK	GENMASK(23, 22)
 48#define TPS_STATUS_USB_HOST_PRESENT(x)		TPS_FIELD_GET(TPS_STATUS_USB_HOST_PRESENT_MASK, (x))
 49#define TPS_STATUS_LEGACY_MASK			GENMASK(25, 24)
 50#define TPS_STATUS_LEGACY(x)			TPS_FIELD_GET(TPS_STATUS_LEGACY_MASK, (x))
 51
 52#define TPS_STATUS_CONN_STATE_NO_CONN		0
 53#define TPS_STATUS_CONN_STATE_DISABLED		1
 54#define TPS_STATUS_CONN_STATE_AUDIO_CONN	2
 55#define TPS_STATUS_CONN_STATE_DEBUG_CONN	3
 56#define TPS_STATUS_CONN_STATE_NO_CONN_R_A	4
 57#define TPS_STATUS_CONN_STATE_RESERVED		5
 58#define TPS_STATUS_CONN_STATE_CONN_NO_R_A	6
 59#define TPS_STATUS_CONN_STATE_CONN_WITH_R_A	7
 60
 61#define TPS_STATUS_PP_SWITCH_STATE_DISABLED	0
 62#define TPS_STATUS_PP_SWITCH_STATE_FAULT	1
 63#define TPS_STATUS_PP_SWITCH_STATE_OUT		2
 64#define TPS_STATUS_PP_SWITCH_STATE_IN		3
 65
 66#define TPS_STATUS_POWER_SOURCE_UNKNOWN		0
 67#define TPS_STATUS_POWER_SOURCE_VIN_3P3		1
 68#define TPS_STATUS_POWER_SOURCE_DEAD_BAT	2
 69#define TPS_STATUS_POWER_SOURCE_VBUS		3
 70
 71#define TPS_STATUS_VBUS_STATUS_VSAFE0V		0
 72#define TPS_STATUS_VBUS_STATUS_VSAFE5V		1
 73#define TPS_STATUS_VBUS_STATUS_PD		2
 74#define TPS_STATUS_VBUS_STATUS_FAULT		3
 75
 76#define TPS_STATUS_USB_HOST_PRESENT_NO		0
 77#define TPS_STATUS_USB_HOST_PRESENT_PD_NO_USB	1
 78#define TPS_STATUS_USB_HOST_PRESENT_NO_PD	2
 79#define TPS_STATUS_USB_HOST_PRESENT_PD_USB	3
 80
 81#define TPS_STATUS_LEGACY_NO			0
 82#define TPS_STATUS_LEGACY_SINK			1
 83#define TPS_STATUS_LEGACY_SOURCE		2
 84
 85/* TPS_REG_INT_* bits */
 86#define TPS_REG_INT_USER_VID_ALT_MODE_OTHER_VDM		BIT_ULL(27+32)
 87#define TPS_REG_INT_USER_VID_ALT_MODE_ATTN_VDM		BIT_ULL(26+32)
 88#define TPS_REG_INT_USER_VID_ALT_MODE_EXIT		BIT_ULL(25+32)
 89#define TPS_REG_INT_USER_VID_ALT_MODE_ENTERED		BIT_ULL(24+32)
 90#define TPS_REG_INT_EXIT_MODES_COMPLETE			BIT_ULL(20+32)
 91#define TPS_REG_INT_DISCOVER_MODES_COMPLETE		BIT_ULL(19+32)
 92#define TPS_REG_INT_VDM_MSG_SENT			BIT_ULL(18+32)
 93#define TPS_REG_INT_VDM_ENTERED_MODE			BIT_ULL(17+32)
 94#define TPS_REG_INT_ERROR_UNABLE_TO_SOURCE		BIT_ULL(14+32)
 95#define TPS_REG_INT_SRC_TRANSITION			BIT_ULL(10+32)
 96#define TPS_REG_INT_ERROR_DISCHARGE_FAILED		BIT_ULL(9+32)
 97#define TPS_REG_INT_ERROR_MESSAGE_DATA			BIT_ULL(7+32)
 98#define TPS_REG_INT_ERROR_PROTOCOL_ERROR		BIT_ULL(6+32)
 99#define TPS_REG_INT_ERROR_MISSING_GET_CAP_MESSAGE	BIT_ULL(4+32)
100#define TPS_REG_INT_ERROR_POWER_EVENT_OCCURRED		BIT_ULL(3+32)
101#define TPS_REG_INT_ERROR_CAN_PROVIDE_PWR_LATER		BIT_ULL(2+32)
102#define TPS_REG_INT_ERROR_CANNOT_PROVIDE_PWR		BIT_ULL(1+32)
103#define TPS_REG_INT_ERROR_DEVICE_INCOMPATIBLE		BIT_ULL(0+32)
104#define TPS_REG_INT_CMD2_COMPLETE			BIT(31)
105#define TPS_REG_INT_CMD1_COMPLETE			BIT(30)
106#define TPS_REG_INT_ADC_HIGH_THRESHOLD			BIT(29)
107#define TPS_REG_INT_ADC_LOW_THRESHOLD			BIT(28)
108#define TPS_REG_INT_PD_STATUS_UPDATE			BIT(27)
109#define TPS_REG_INT_STATUS_UPDATE			BIT(26)
110#define TPS_REG_INT_DATA_STATUS_UPDATE			BIT(25)
111#define TPS_REG_INT_POWER_STATUS_UPDATE			BIT(24)
112#define TPS_REG_INT_PP_SWITCH_CHANGED			BIT(23)
113#define TPS_REG_INT_HIGH_VOLTAGE_WARNING		BIT(22)
114#define TPS_REG_INT_USB_HOST_PRESENT_NO_LONGER		BIT(21)
115#define TPS_REG_INT_USB_HOST_PRESENT			BIT(20)
116#define TPS_REG_INT_GOTO_MIN_RECEIVED			BIT(19)
117#define TPS_REG_INT_PR_SWAP_REQUESTED			BIT(17)
118#define TPS_REG_INT_SINK_CAP_MESSAGE_READY		BIT(15)
119#define TPS_REG_INT_SOURCE_CAP_MESSAGE_READY		BIT(14)
120#define TPS_REG_INT_NEW_CONTRACT_AS_PROVIDER		BIT(13)
121#define TPS_REG_INT_NEW_CONTRACT_AS_CONSUMER		BIT(12)
122#define TPS_REG_INT_VDM_RECEIVED			BIT(11)
123#define TPS_REG_INT_ATTENTION_RECEIVED			BIT(10)
124#define TPS_REG_INT_OVERCURRENT				BIT(9)
125#define TPS_REG_INT_BIST				BIT(8)
126#define TPS_REG_INT_RDO_RECEIVED_FROM_SINK		BIT(7)
127#define TPS_REG_INT_DR_SWAP_COMPLETE			BIT(5)
128#define TPS_REG_INT_PR_SWAP_COMPLETE			BIT(4)
129#define TPS_REG_INT_PLUG_EVENT				BIT(3)
130#define TPS_REG_INT_HARD_RESET				BIT(1)
131#define TPS_REG_INT_PD_SOFT_RESET			BIT(0)
132
133/* Apple-specific TPS_REG_INT_* bits */
134#define APPLE_CD_REG_INT_DATA_STATUS_UPDATE		BIT(10)
135#define APPLE_CD_REG_INT_POWER_STATUS_UPDATE		BIT(9)
136#define APPLE_CD_REG_INT_STATUS_UPDATE			BIT(8)
137#define APPLE_CD_REG_INT_PLUG_EVENT			BIT(1)
138
139/* TPS_REG_SYSTEM_POWER_STATE states */
140#define TPS_SYSTEM_POWER_STATE_S0	0x00
141#define TPS_SYSTEM_POWER_STATE_S3	0x03
142#define TPS_SYSTEM_POWER_STATE_S4	0x04
143#define TPS_SYSTEM_POWER_STATE_S5	0x05
144
145/* TPS_REG_POWER_STATUS bits */
146#define TPS_POWER_STATUS_CONNECTION(x)  TPS_FIELD_GET(BIT(0), (x))
147#define TPS_POWER_STATUS_SOURCESINK(x)	TPS_FIELD_GET(BIT(1), (x))
148#define TPS_POWER_STATUS_BC12_DET(x)	TPS_FIELD_GET(BIT(2), (x))
149
150#define TPS_POWER_STATUS_TYPEC_CURRENT_MASK GENMASK(3, 2)
151#define TPS_POWER_STATUS_PWROPMODE(p)	    TPS_FIELD_GET(TPS_POWER_STATUS_TYPEC_CURRENT_MASK, (p))
152#define TPS_POWER_STATUS_BC12_STATUS_MASK   GENMASK(6, 5)
153#define TPS_POWER_STATUS_BC12_STATUS(p)	    TPS_FIELD_GET(TPS_POWER_STATUS_BC12_STATUS_MASK, (p))
154
155#define TPS_POWER_STATUS_TYPEC_CURRENT_USB     0
156#define TPS_POWER_STATUS_TYPEC_CURRENT_1A5     1
157#define TPS_POWER_STATUS_TYPEC_CURRENT_3A0     2
158#define TPS_POWER_STATUS_TYPEC_CURRENT_PD      3
159
160#define TPS_POWER_STATUS_BC12_STATUS_SDP 0
161#define TPS_POWER_STATUS_BC12_STATUS_CDP 2
162#define TPS_POWER_STATUS_BC12_STATUS_DCP 3
163
164/* TPS25750_REG_POWER_STATUS bits */
165#define TPS25750_POWER_STATUS_CHARGER_DETECT_STATUS_MASK	GENMASK(7, 4)
166#define TPS25750_POWER_STATUS_CHARGER_DETECT_STATUS(p) \
167	TPS_FIELD_GET(TPS25750_POWER_STATUS_CHARGER_DETECT_STATUS_MASK, (p))
168#define TPS25750_POWER_STATUS_CHARGER_ADVERTISE_STATUS_MASK	GENMASK(9, 8)
169#define TPS25750_POWER_STATUS_CHARGER_ADVERTISE_STATUS(p) \
170	TPS_FIELD_GET(TPS25750_POWER_STATUS_CHARGER_ADVERTISE_STATUS_MASK, (p))
171
172#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DISABLED	0
173#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_IN_PROGRESS	1
174#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_NONE		2
175#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_SPD		3
176#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_BC_1_2_CPD	4
177#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_BC_1_2_DPD	5
178#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DIV_1_DCP	6
179#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DIV_2_DCP	7
180#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DIV_3_DCP	8
181#define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_1_2V_DCP	9
182
183/* TPS_REG_DATA_STATUS bits */
184#define TPS_DATA_STATUS_DATA_CONNECTION	     BIT(0)
185#define TPS_DATA_STATUS_UPSIDE_DOWN	     BIT(1)
186#define TPS_DATA_STATUS_ACTIVE_CABLE	     BIT(2)
187#define TPS_DATA_STATUS_USB2_CONNECTION	     BIT(4)
188#define TPS_DATA_STATUS_USB3_CONNECTION	     BIT(5)
189#define TPS_DATA_STATUS_USB3_GEN2	     BIT(6)
190#define TPS_DATA_STATUS_USB_DATA_ROLE	     BIT(7)
191#define TPS_DATA_STATUS_DP_CONNECTION	     BIT(8)
192#define TPS_DATA_STATUS_DP_SINK		     BIT(9)
193#define TPS_DATA_STATUS_TBT_CONNECTION	     BIT(16)
194#define TPS_DATA_STATUS_TBT_TYPE	     BIT(17)
195#define TPS_DATA_STATUS_OPTICAL_CABLE	     BIT(18)
196#define TPS_DATA_STATUS_ACTIVE_LINK_TRAIN    BIT(20)
197#define TPS_DATA_STATUS_FORCE_LSX	     BIT(23)
198#define TPS_DATA_STATUS_POWER_MISMATCH	     BIT(24)
199
200/* modified TPS_REG_DATA_STATUS bits for CD321x (and likely also TPS65987DDK) */
201#define CD321X_DATA_STATUS_HPD_IRQ	     BIT(14)
202#define CD321X_DATA_STATUS_HPD_LEVEL	     BIT(15)
203#define CD321X_DATA_STATUS_USB4_CONNECTION   BIT(23)
204
205#define TPS_DATA_STATUS_DP_PIN_ASSIGNMENT_MASK GENMASK(11, 10)
206#define TPS_DATA_STATUS_DP_PIN_ASSIGNMENT(x) \
207	TPS_FIELD_GET(TPS_DATA_STATUS_DP_PIN_ASSIGNMENT_MASK, (x))
208#define TPS_DATA_STATUS_TBT_CABLE_SPEED_MASK   GENMASK(27, 25)
209#define TPS_DATA_STATUS_TBT_CABLE_SPEED \
210	TPS_FIELD_GET(TPS_DATA_STATUS_TBT_CABLE_SPEED_MASK, (x))
211#define TPS_DATA_STATUS_TBT_CABLE_GEN_MASK     GENMASK(29, 28)
212#define TPS_DATA_STATUS_TBT_CABLE_GEN \
213	TPS_FIELD_GET(TPS_DATA_STATUS_TBT_CABLE_GEN_MASK, (x))
214
215/* Map data status to DP spec assignments */
216#define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT(x) \
217	((TPS_DATA_STATUS_DP_PIN_ASSIGNMENT(x) << 1) | \
218		TPS_FIELD_GET(TPS_DATA_STATUS_USB3_CONNECTION, (x)))
219#define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_E    0
220#define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_F    BIT(0)
221#define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_C    BIT(1)
222#define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_D    (BIT(1) | BIT(0))
223#define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_A    BIT(2)
224#define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_B    (BIT(2) | BIT(1))
225
226/* BOOT STATUS REG*/
227#define TPS_BOOT_STATUS_DEAD_BATTERY_FLAG	BIT(2)
228#define TPS_BOOT_STATUS_I2C_EEPROM_PRESENT	BIT(3)
229
230/* PD STATUS REG */
231#define TPS_REG_PD_STATUS_PORT_TYPE_MASK	GENMASK(5, 4)
232#define TPS_PD_STATUS_PORT_TYPE(x) \
233	TPS_FIELD_GET(TPS_REG_PD_STATUS_PORT_TYPE_MASK, x)
234
235#define TPS_PD_STATUS_PORT_TYPE_SINK_SOURCE	0
236#define TPS_PD_STATUS_PORT_TYPE_SINK		1
237#define TPS_PD_STATUS_PORT_TYPE_SOURCE		2
238#define TPS_PD_STATUS_PORT_TYPE_SOURCE_SINK	3
239
240/* SLEEP CONF REG */
241#define TPS_SLEEP_CONF_SLEEP_MODE_ALLOWED	BIT(0)
242
243/* Start Patch Download Sequence */
244#define TPS_PTCS_CONTENT_APP			BIT(0)
245#define TPS_PTCS_CONTENT_DEV			BIT(1)
246#define TPS_PTCS_OUT_BYTES			4
247#define TPS_PTCS_STATUS				1
248
249#define TPS_PTCS_STATUS_FAIL			0x80
250/* Patch Download */
251#define TPS_PTCD_OUT_BYTES			10
252#define TPS_PTCD_TRANSFER_STATUS		1
253#define TPS_PTCD_LOADING_STATE			2
254
255#define TPS_PTCD_LOAD_ERR			0x09
256/* Patch Download Complete */
257#define TPS_PTCC_OUT_BYTES			4
258#define TPS_PTCC_DEV				2
259#define TPS_PTCC_APP				3
260
261/* Version Register */
262#define TPS_VERSION_HW_VERSION_MASK            GENMASK(31, 24)
263#define TPS_VERSION_HW_VERSION(x)              TPS_FIELD_GET(TPS_VERSION_HW_VERSION_MASK, (x))
264#define TPS_VERSION_HW_65981_2_6               0x00
265#define TPS_VERSION_HW_65987_8_DH              0xF7
266#define TPS_VERSION_HW_65987_8_DK              0xF9
267
268/* Int Event Register length */
269#define TPS_65981_2_6_INTEVENT_LEN             8
270#define TPS_65987_8_INTEVENT_LEN               11
271
272#endif /* __TPS6598X_H__ */