phy-fsl-usb.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
   4 *
   5 * Author: Li Yang <LeoLi@freescale.com>
   6 *         Jerry Huang <Chang-Ming.Huang@freescale.com>
   7 *
   8 * Initialization based on code from Shlomi Gridish.
   9 */
  10
  11#include <linux/module.h>
  12#include <linux/kernel.h>
  13#include <linux/delay.h>
  14#include <linux/slab.h>
  15#include <linux/string_choices.h>
  16#include <linux/proc_fs.h>
  17#include <linux/errno.h>
  18#include <linux/interrupt.h>
  19#include <linux/io.h>
  20#include <linux/timer.h>
  21#include <linux/usb.h>
  22#include <linux/device.h>
  23#include <linux/usb/ch9.h>
  24#include <linux/usb/gadget.h>
  25#include <linux/workqueue.h>
  26#include <linux/time.h>
  27#include <linux/fsl_devices.h>
  28#include <linux/platform_device.h>
  29#include <linux/uaccess.h>
  30
  31#include <linux/unaligned.h>
  32
  33#include "phy-fsl-usb.h"
  34
  35#ifdef VERBOSE
  36#define VDBG(fmt, args...) pr_debug("[%s]  " fmt, \
  37				 __func__, ## args)
  38#else
  39#define VDBG(stuff...)	do {} while (0)
  40#endif
  41
  42#define DRIVER_VERSION "Rev. 1.55"
  43#define DRIVER_AUTHOR "Jerry Huang/Li Yang"
  44#define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
  45#define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
  46
  47static const char driver_name[] = "fsl-usb2-otg";
  48
  49const pm_message_t otg_suspend_state = {
  50	.event = 1,
  51};
  52
  53#define HA_DATA_PULSE
  54
  55static struct usb_dr_mmap *usb_dr_regs;
  56static struct fsl_otg *fsl_otg_dev;
  57static int srp_wait_done;
  58
  59/* FSM timers */
  60struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
  61	*b_ase0_brst_tmr, *b_se0_srp_tmr;
  62
  63/* Driver specific timers */
  64struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
  65	*b_srp_wait_tmr, *a_wait_enum_tmr;
  66
  67static struct list_head active_timers;
  68
  69static const struct fsl_otg_config fsl_otg_initdata = {
  70	.otg_port = 1,
  71};
  72
  73#ifdef CONFIG_PPC32
  74static u32 _fsl_readl_be(const unsigned __iomem *p)
  75{
  76	return in_be32(p);
  77}
  78
  79static u32 _fsl_readl_le(const unsigned __iomem *p)
  80{
  81	return in_le32(p);
  82}
  83
  84static void _fsl_writel_be(u32 v, unsigned __iomem *p)
  85{
  86	out_be32(p, v);
  87}
  88
  89static void _fsl_writel_le(u32 v, unsigned __iomem *p)
  90{
  91	out_le32(p, v);
  92}
  93
  94static u32 (*_fsl_readl)(const unsigned __iomem *p);
  95static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
  96
  97#define fsl_readl(p)		(*_fsl_readl)((p))
  98#define fsl_writel(v, p)	(*_fsl_writel)((v), (p))
  99
 100#else
 101#define fsl_readl(addr)		readl(addr)
 102#define fsl_writel(val, addr)	writel(val, addr)
 103#endif /* CONFIG_PPC32 */
 104
 105int write_ulpi(u8 addr, u8 data)
 106{
 107	u32 temp;
 108
 109	temp = 0x60000000 | (addr << 16) | data;
 110	fsl_writel(temp, &usb_dr_regs->ulpiview);
 111	return 0;
 112}
 113
 114/* -------------------------------------------------------------*/
 115/* Operations that will be called from OTG Finite State Machine */
 116
 117/* Charge vbus for vbus pulsing in SRP */
 118void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
 119{
 120	u32 tmp;
 121
 122	tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 123
 124	if (on)
 125		/* stop discharging, start charging */
 126		tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
 127			OTGSC_CTRL_VBUS_CHARGE;
 128	else
 129		/* stop charging */
 130		tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
 131
 132	fsl_writel(tmp, &usb_dr_regs->otgsc);
 133}
 134
 135/* Discharge vbus through a resistor to ground */
 136void fsl_otg_dischrg_vbus(int on)
 137{
 138	u32 tmp;
 139
 140	tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 141
 142	if (on)
 143		/* stop charging, start discharging */
 144		tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
 145			OTGSC_CTRL_VBUS_DISCHARGE;
 146	else
 147		/* stop discharging */
 148		tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
 149
 150	fsl_writel(tmp, &usb_dr_regs->otgsc);
 151}
 152
 153/* A-device driver vbus, controlled through PP bit in PORTSC */
 154void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
 155{
 156	u32 tmp;
 157
 158	if (on) {
 159		tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
 160		fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
 161	} else {
 162		tmp = fsl_readl(&usb_dr_regs->portsc) &
 163		      ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
 164		fsl_writel(tmp, &usb_dr_regs->portsc);
 165	}
 166}
 167
 168/*
 169 * Pull-up D+, signalling connect by periperal. Also used in
 170 * data-line pulsing in SRP
 171 */
 172void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
 173{
 174	u32 tmp;
 175
 176	tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 177
 178	if (on)
 179		tmp |= OTGSC_CTRL_DATA_PULSING;
 180	else
 181		tmp &= ~OTGSC_CTRL_DATA_PULSING;
 182
 183	fsl_writel(tmp, &usb_dr_regs->otgsc);
 184}
 185
 186/*
 187 * Generate SOF by host.  This is controlled through suspend/resume the
 188 * port.  In host mode, controller will automatically send SOF.
 189 * Suspend will block the data on the port.
 190 */
 191void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
 192{
 193	u32 tmp;
 194
 195	tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
 196	if (on)
 197		tmp |= PORTSC_PORT_FORCE_RESUME;
 198	else
 199		tmp |= PORTSC_PORT_SUSPEND;
 200
 201	fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
 202
 203}
 204
 205/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
 206void fsl_otg_start_pulse(struct otg_fsm *fsm)
 207{
 208	u32 tmp;
 209
 210	srp_wait_done = 0;
 211#ifdef HA_DATA_PULSE
 212	tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 213	tmp |= OTGSC_HA_DATA_PULSE;
 214	fsl_writel(tmp, &usb_dr_regs->otgsc);
 215#else
 216	fsl_otg_loc_conn(1);
 217#endif
 218
 219	fsl_otg_add_timer(fsm, b_data_pulse_tmr);
 220}
 221
 222void b_data_pulse_end(unsigned long foo)
 223{
 224#ifdef HA_DATA_PULSE
 225#else
 226	fsl_otg_loc_conn(0);
 227#endif
 228
 229	/* Do VBUS pulse after data pulse */
 230	fsl_otg_pulse_vbus();
 231}
 232
 233void fsl_otg_pulse_vbus(void)
 234{
 235	srp_wait_done = 0;
 236	fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
 237	/* start the timer to end vbus charge */
 238	fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
 239}
 240
 241void b_vbus_pulse_end(unsigned long foo)
 242{
 243	fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
 244
 245	/*
 246	 * As USB3300 using the same a_sess_vld and b_sess_vld voltage
 247	 * we need to discharge the bus for a while to distinguish
 248	 * residual voltage of vbus pulsing and A device pull up
 249	 */
 250	fsl_otg_dischrg_vbus(1);
 251	fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
 252}
 253
 254void b_srp_end(unsigned long foo)
 255{
 256	fsl_otg_dischrg_vbus(0);
 257	srp_wait_done = 1;
 258
 259	if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) &&
 260	    fsl_otg_dev->fsm.b_sess_vld)
 261		fsl_otg_dev->fsm.b_srp_done = 1;
 262}
 263
 264/*
 265 * Workaround for a_host suspending too fast.  When a_bus_req=0,
 266 * a_host will start by SRP.  It needs to set b_hnp_enable before
 267 * actually suspending to start HNP
 268 */
 269void a_wait_enum(unsigned long foo)
 270{
 271	VDBG("a_wait_enum timeout\n");
 272	if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
 273		fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
 274	else
 275		otg_statemachine(&fsl_otg_dev->fsm);
 276}
 277
 278/* The timeout callback function to set time out bit */
 279void set_tmout(unsigned long indicator)
 280{
 281	*(int *)indicator = 1;
 282}
 283
 284/* Initialize timers */
 285int fsl_otg_init_timers(struct otg_fsm *fsm)
 286{
 287	/* FSM used timers */
 288	a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
 289				(unsigned long)&fsm->a_wait_vrise_tmout);
 290	if (!a_wait_vrise_tmr)
 291		return -ENOMEM;
 292
 293	a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
 294				(unsigned long)&fsm->a_wait_bcon_tmout);
 295	if (!a_wait_bcon_tmr)
 296		return -ENOMEM;
 297
 298	a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
 299				(unsigned long)&fsm->a_aidl_bdis_tmout);
 300	if (!a_aidl_bdis_tmr)
 301		return -ENOMEM;
 302
 303	b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
 304				(unsigned long)&fsm->b_ase0_brst_tmout);
 305	if (!b_ase0_brst_tmr)
 306		return -ENOMEM;
 307
 308	b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
 309				(unsigned long)&fsm->b_se0_srp);
 310	if (!b_se0_srp_tmr)
 311		return -ENOMEM;
 312
 313	b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
 314				(unsigned long)&fsm->b_srp_done);
 315	if (!b_srp_fail_tmr)
 316		return -ENOMEM;
 317
 318	a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
 319				(unsigned long)&fsm);
 320	if (!a_wait_enum_tmr)
 321		return -ENOMEM;
 322
 323	/* device driver used timers */
 324	b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
 325	if (!b_srp_wait_tmr)
 326		return -ENOMEM;
 327
 328	b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
 329				TB_DATA_PLS, 0);
 330	if (!b_data_pulse_tmr)
 331		return -ENOMEM;
 332
 333	b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
 334				TB_VBUS_PLS, 0);
 335	if (!b_vbus_pulse_tmr)
 336		return -ENOMEM;
 337
 338	return 0;
 339}
 340
 341/* Uninitialize timers */
 342void fsl_otg_uninit_timers(void)
 343{
 344	/* FSM used timers */
 345	kfree(a_wait_vrise_tmr);
 346	kfree(a_wait_bcon_tmr);
 347	kfree(a_aidl_bdis_tmr);
 348	kfree(b_ase0_brst_tmr);
 349	kfree(b_se0_srp_tmr);
 350	kfree(b_srp_fail_tmr);
 351	kfree(a_wait_enum_tmr);
 352
 353	/* device driver used timers */
 354	kfree(b_srp_wait_tmr);
 355	kfree(b_data_pulse_tmr);
 356	kfree(b_vbus_pulse_tmr);
 357}
 358
 359static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
 360{
 361	struct fsl_otg_timer *timer;
 362
 363	/* REVISIT: use array of pointers to timers instead */
 364	switch (t) {
 365	case A_WAIT_VRISE:
 366		timer = a_wait_vrise_tmr;
 367		break;
 368	case A_WAIT_BCON:
 369		timer = a_wait_vrise_tmr;
 370		break;
 371	case A_AIDL_BDIS:
 372		timer = a_wait_vrise_tmr;
 373		break;
 374	case B_ASE0_BRST:
 375		timer = a_wait_vrise_tmr;
 376		break;
 377	case B_SE0_SRP:
 378		timer = a_wait_vrise_tmr;
 379		break;
 380	case B_SRP_FAIL:
 381		timer = a_wait_vrise_tmr;
 382		break;
 383	case A_WAIT_ENUM:
 384		timer = a_wait_vrise_tmr;
 385		break;
 386	default:
 387		timer = NULL;
 388	}
 389
 390	return timer;
 391}
 392
 393/* Add timer to timer list */
 394void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
 395{
 396	struct fsl_otg_timer *timer = gtimer;
 397	struct fsl_otg_timer *tmp_timer;
 398
 399	/*
 400	 * Check if the timer is already in the active list,
 401	 * if so update timer count
 402	 */
 403	list_for_each_entry(tmp_timer, &active_timers, list)
 404	    if (tmp_timer == timer) {
 405		timer->count = timer->expires;
 406		return;
 407	}
 408	timer->count = timer->expires;
 409	list_add_tail(&timer->list, &active_timers);
 410}
 411
 412static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
 413{
 414	struct fsl_otg_timer *timer;
 415
 416	timer = fsl_otg_get_timer(t);
 417	if (!timer)
 418		return;
 419
 420	fsl_otg_add_timer(fsm, timer);
 421}
 422
 423/* Remove timer from the timer list; clear timeout status */
 424void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
 425{
 426	struct fsl_otg_timer *timer = gtimer;
 427	struct fsl_otg_timer *tmp_timer, *del_tmp;
 428
 429	list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
 430		if (tmp_timer == timer)
 431			list_del(&timer->list);
 432}
 433
 434static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
 435{
 436	struct fsl_otg_timer *timer;
 437
 438	timer = fsl_otg_get_timer(t);
 439	if (!timer)
 440		return;
 441
 442	fsl_otg_del_timer(fsm, timer);
 443}
 444
 445/* Reset controller, not reset the bus */
 446void otg_reset_controller(void)
 447{
 448	u32 command;
 449
 450	command = fsl_readl(&usb_dr_regs->usbcmd);
 451	command |= (1 << 1);
 452	fsl_writel(command, &usb_dr_regs->usbcmd);
 453	while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
 454		;
 455}
 456
 457/* Call suspend/resume routines in host driver */
 458int fsl_otg_start_host(struct otg_fsm *fsm, int on)
 459{
 460	struct usb_otg *otg = fsm->otg;
 461	struct device *dev;
 462	struct fsl_otg *otg_dev =
 463		container_of(otg->usb_phy, struct fsl_otg, phy);
 464	u32 retval = 0;
 465
 466	if (!otg->host)
 467		return -ENODEV;
 468	dev = otg->host->controller;
 469
 470	/*
 471	 * Update a_vbus_vld state as a_vbus_vld int is disabled
 472	 * in device mode
 473	 */
 474	fsm->a_vbus_vld =
 475		!!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
 476	if (on) {
 477		/* start fsl usb host controller */
 478		if (otg_dev->host_working)
 479			goto end;
 480		else {
 481			otg_reset_controller();
 482			VDBG("host on......\n");
 483			if (dev->driver->pm && dev->driver->pm->resume) {
 484				retval = dev->driver->pm->resume(dev);
 485				if (fsm->id) {
 486					/* default-b */
 487					fsl_otg_drv_vbus(fsm, 1);
 488					/*
 489					 * Workaround: b_host can't driver
 490					 * vbus, but PP in PORTSC needs to
 491					 * be 1 for host to work.
 492					 * So we set drv_vbus bit in
 493					 * transceiver to 0 thru ULPI.
 494					 */
 495					write_ulpi(0x0c, 0x20);
 496				}
 497			}
 498
 499			otg_dev->host_working = 1;
 500		}
 501	} else {
 502		/* stop fsl usb host controller */
 503		if (!otg_dev->host_working)
 504			goto end;
 505		else {
 506			VDBG("host off......\n");
 507			if (dev && dev->driver) {
 508				if (dev->driver->pm && dev->driver->pm->suspend)
 509					retval = dev->driver->pm->suspend(dev);
 510				if (fsm->id)
 511					/* default-b */
 512					fsl_otg_drv_vbus(fsm, 0);
 513			}
 514			otg_dev->host_working = 0;
 515		}
 516	}
 517end:
 518	return retval;
 519}
 520
 521/*
 522 * Call suspend and resume function in udc driver
 523 * to stop and start udc driver.
 524 */
 525int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
 526{
 527	struct usb_otg *otg = fsm->otg;
 528	struct device *dev;
 529
 530	if (!otg->gadget || !otg->gadget->dev.parent)
 531		return -ENODEV;
 532
 533	VDBG("gadget %s\n", str_on_off(on));
 534	dev = otg->gadget->dev.parent;
 535
 536	if (on) {
 537		if (dev->driver->resume)
 538			dev->driver->resume(dev);
 539	} else {
 540		if (dev->driver->suspend)
 541			dev->driver->suspend(dev, otg_suspend_state);
 542	}
 543
 544	return 0;
 545}
 546
 547/*
 548 * Called by initialization code of host driver.  Register host controller
 549 * to the OTG.  Suspend host for OTG role detection.
 550 */
 551static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
 552{
 553	struct fsl_otg *otg_dev;
 554
 555	if (!otg)
 556		return -ENODEV;
 557
 558	otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
 559	if (otg_dev != fsl_otg_dev)
 560		return -ENODEV;
 561
 562	otg->host = host;
 563
 564	otg_dev->fsm.a_bus_drop = 0;
 565	otg_dev->fsm.a_bus_req = 1;
 566
 567	if (host) {
 568		VDBG("host off......\n");
 569
 570		otg->host->otg_port = fsl_otg_initdata.otg_port;
 571		otg->host->is_b_host = otg_dev->fsm.id;
 572		/*
 573		 * must leave time for hub_wq to finish its thing
 574		 * before yanking the host driver out from under it,
 575		 * so suspend the host after a short delay.
 576		 */
 577		otg_dev->host_working = 1;
 578		schedule_delayed_work(&otg_dev->otg_event, 100);
 579		return 0;
 580	} else {
 581		/* host driver going away */
 582		if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
 583		      OTGSC_STS_USB_ID)) {
 584			/* Mini-A cable connected */
 585			struct otg_fsm *fsm = &otg_dev->fsm;
 586
 587			otg->state = OTG_STATE_UNDEFINED;
 588			fsm->protocol = PROTO_UNDEF;
 589		}
 590	}
 591
 592	otg_dev->host_working = 0;
 593
 594	otg_statemachine(&otg_dev->fsm);
 595
 596	return 0;
 597}
 598
 599/* Called by initialization code of udc.  Register udc to OTG. */
 600static int fsl_otg_set_peripheral(struct usb_otg *otg,
 601					struct usb_gadget *gadget)
 602{
 603	struct fsl_otg *otg_dev;
 604
 605	if (!otg)
 606		return -ENODEV;
 607
 608	otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
 609	VDBG("otg_dev 0x%x\n", (int)otg_dev);
 610	VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
 611	if (otg_dev != fsl_otg_dev)
 612		return -ENODEV;
 613
 614	if (!gadget) {
 615		if (!otg->default_a)
 616			otg->gadget->ops->vbus_draw(otg->gadget, 0);
 617		usb_gadget_vbus_disconnect(otg->gadget);
 618		otg->gadget = 0;
 619		otg_dev->fsm.b_bus_req = 0;
 620		otg_statemachine(&otg_dev->fsm);
 621		return 0;
 622	}
 623
 624	otg->gadget = gadget;
 625	otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
 626
 627	otg_dev->fsm.b_bus_req = 1;
 628
 629	/* start the gadget right away if the ID pin says Mini-B */
 630	pr_debug("ID pin=%d\n", otg_dev->fsm.id);
 631	if (otg_dev->fsm.id == 1) {
 632		fsl_otg_start_host(&otg_dev->fsm, 0);
 633		otg_drv_vbus(&otg_dev->fsm, 0);
 634		fsl_otg_start_gadget(&otg_dev->fsm, 1);
 635	}
 636
 637	return 0;
 638}
 639
 640/*
 641 * Delayed pin detect interrupt processing.
 642 *
 643 * When the Mini-A cable is disconnected from the board,
 644 * the pin-detect interrupt happens before the disconnect
 645 * interrupts for the connected device(s).  In order to
 646 * process the disconnect interrupt(s) prior to switching
 647 * roles, the pin-detect interrupts are delayed, and handled
 648 * by this routine.
 649 */
 650static void fsl_otg_event(struct work_struct *work)
 651{
 652	struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
 653	struct otg_fsm *fsm = &og->fsm;
 654
 655	if (fsm->id) {		/* switch to gadget */
 656		fsl_otg_start_host(fsm, 0);
 657		otg_drv_vbus(fsm, 0);
 658		fsl_otg_start_gadget(fsm, 1);
 659	}
 660}
 661
 662/* B-device start SRP */
 663static int fsl_otg_start_srp(struct usb_otg *otg)
 664{
 665	struct fsl_otg *otg_dev;
 666
 667	if (!otg || otg->state != OTG_STATE_B_IDLE)
 668		return -ENODEV;
 669
 670	otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
 671	if (otg_dev != fsl_otg_dev)
 672		return -ENODEV;
 673
 674	otg_dev->fsm.b_bus_req = 1;
 675	otg_statemachine(&otg_dev->fsm);
 676
 677	return 0;
 678}
 679
 680/* A_host suspend will call this function to start hnp */
 681static int fsl_otg_start_hnp(struct usb_otg *otg)
 682{
 683	struct fsl_otg *otg_dev;
 684
 685	if (!otg)
 686		return -ENODEV;
 687
 688	otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
 689	if (otg_dev != fsl_otg_dev)
 690		return -ENODEV;
 691
 692	pr_debug("start_hnp...\n");
 693
 694	/* clear a_bus_req to enter a_suspend state */
 695	otg_dev->fsm.a_bus_req = 0;
 696	otg_statemachine(&otg_dev->fsm);
 697
 698	return 0;
 699}
 700
 701/*
 702 * Interrupt handler.  OTG/host/peripheral share the same int line.
 703 * OTG driver clears OTGSC interrupts and leaves USB interrupts
 704 * intact.  It needs to have knowledge of some USB interrupts
 705 * such as port change.
 706 */
 707irqreturn_t fsl_otg_isr(int irq, void *dev_id)
 708{
 709	struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
 710	struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
 711	u32 otg_int_src, otg_sc;
 712
 713	otg_sc = fsl_readl(&usb_dr_regs->otgsc);
 714	otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
 715
 716	/* Only clear otg interrupts */
 717	fsl_writel(otg_sc, &usb_dr_regs->otgsc);
 718
 719	/*FIXME: ID change not generate when init to 0 */
 720	fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
 721	otg->default_a = (fsm->id == 0);
 722
 723	/* process OTG interrupts */
 724	if (otg_int_src) {
 725		if (otg_int_src & OTGSC_INTSTS_USB_ID) {
 726			fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
 727			otg->default_a = (fsm->id == 0);
 728			/* clear conn information */
 729			if (fsm->id)
 730				fsm->b_conn = 0;
 731			else
 732				fsm->a_conn = 0;
 733
 734			if (otg->host)
 735				otg->host->is_b_host = fsm->id;
 736			if (otg->gadget)
 737				otg->gadget->is_a_peripheral = !fsm->id;
 738			VDBG("ID int (ID is %d)\n", fsm->id);
 739
 740			if (fsm->id) {	/* switch to gadget */
 741				schedule_delayed_work(
 742					&((struct fsl_otg *)dev_id)->otg_event,
 743					100);
 744			} else {	/* switch to host */
 745				cancel_delayed_work(&
 746						    ((struct fsl_otg *)dev_id)->
 747						    otg_event);
 748				fsl_otg_start_gadget(fsm, 0);
 749				otg_drv_vbus(fsm, 1);
 750				fsl_otg_start_host(fsm, 1);
 751			}
 752			return IRQ_HANDLED;
 753		}
 754	}
 755	return IRQ_NONE;
 756}
 757
 758static struct otg_fsm_ops fsl_otg_ops = {
 759	.chrg_vbus = fsl_otg_chrg_vbus,
 760	.drv_vbus = fsl_otg_drv_vbus,
 761	.loc_conn = fsl_otg_loc_conn,
 762	.loc_sof = fsl_otg_loc_sof,
 763	.start_pulse = fsl_otg_start_pulse,
 764
 765	.add_timer = fsl_otg_fsm_add_timer,
 766	.del_timer = fsl_otg_fsm_del_timer,
 767
 768	.start_host = fsl_otg_start_host,
 769	.start_gadget = fsl_otg_start_gadget,
 770};
 771
 772/* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
 773static int fsl_otg_conf(struct platform_device *pdev)
 774{
 775	struct fsl_otg *fsl_otg_tc;
 776	int status;
 777
 778	if (fsl_otg_dev)
 779		return 0;
 780
 781	/* allocate space to fsl otg device */
 782	fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
 783	if (!fsl_otg_tc)
 784		return -ENOMEM;
 785
 786	fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
 787	if (!fsl_otg_tc->phy.otg) {
 788		kfree(fsl_otg_tc);
 789		return -ENOMEM;
 790	}
 791
 792	INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
 793
 794	INIT_LIST_HEAD(&active_timers);
 795	status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
 796	if (status) {
 797		pr_info("Couldn't init OTG timers\n");
 798		goto err;
 799	}
 800	mutex_init(&fsl_otg_tc->fsm.lock);
 801
 802	/* Set OTG state machine operations */
 803	fsl_otg_tc->fsm.ops = &fsl_otg_ops;
 804
 805	/* initialize the otg structure */
 806	fsl_otg_tc->phy.label = DRIVER_DESC;
 807	fsl_otg_tc->phy.dev = &pdev->dev;
 808
 809	fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy;
 810	fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
 811	fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
 812	fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
 813	fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
 814
 815	fsl_otg_dev = fsl_otg_tc;
 816
 817	/* Store the otg transceiver */
 818	status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
 819	if (status) {
 820		pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
 821		goto err;
 822	}
 823
 824	return 0;
 825err:
 826	fsl_otg_uninit_timers();
 827	kfree(fsl_otg_tc->phy.otg);
 828	kfree(fsl_otg_tc);
 829	return status;
 830}
 831
 832/* OTG Initialization */
 833int usb_otg_start(struct platform_device *pdev)
 834{
 835	struct fsl_otg *p_otg;
 836	struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
 837	struct otg_fsm *fsm;
 838	int status;
 839	struct resource *res;
 840	u32 temp;
 841	struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
 842
 843	p_otg = container_of(otg_trans, struct fsl_otg, phy);
 844	fsm = &p_otg->fsm;
 845
 846	/* Initialize the state machine structure with default values */
 847	SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
 848	fsm->otg = p_otg->phy.otg;
 849
 850	/* We don't require predefined MEM/IRQ resource index */
 851	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 852	if (!res)
 853		return -ENXIO;
 854
 855	/* We don't request_mem_region here to enable resource sharing
 856	 * with host/device */
 857
 858	usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
 859	p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
 860	pdata->regs = (void *)usb_dr_regs;
 861
 862	if (pdata->init && pdata->init(pdev) != 0)
 863		return -EINVAL;
 864
 865#ifdef CONFIG_PPC32
 866	if (pdata->big_endian_mmio) {
 867		_fsl_readl = _fsl_readl_be;
 868		_fsl_writel = _fsl_writel_be;
 869	} else {
 870		_fsl_readl = _fsl_readl_le;
 871		_fsl_writel = _fsl_writel_le;
 872	}
 873#endif
 874
 875	/* request irq */
 876	p_otg->irq = platform_get_irq(pdev, 0);
 877	if (p_otg->irq < 0)
 878		return p_otg->irq;
 879	status = request_irq(p_otg->irq, fsl_otg_isr,
 880				IRQF_SHARED, driver_name, p_otg);
 881	if (status) {
 882		dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
 883			p_otg->irq, status);
 884		iounmap(p_otg->dr_mem_map);
 885		kfree(p_otg->phy.otg);
 886		kfree(p_otg);
 887		return status;
 888	}
 889
 890	/* stop the controller */
 891	temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
 892	temp &= ~USB_CMD_RUN_STOP;
 893	fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
 894
 895	/* reset the controller */
 896	temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
 897	temp |= USB_CMD_CTRL_RESET;
 898	fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
 899
 900	/* wait reset completed */
 901	while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
 902		;
 903
 904	/* configure the VBUSHS as IDLE(both host and device) */
 905	temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
 906	fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
 907
 908	/* configure PHY interface */
 909	temp = fsl_readl(&p_otg->dr_mem_map->portsc);
 910	temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
 911	switch (pdata->phy_mode) {
 912	case FSL_USB2_PHY_ULPI:
 913		temp |= PORTSC_PTS_ULPI;
 914		break;
 915	case FSL_USB2_PHY_UTMI_WIDE:
 916		temp |= PORTSC_PTW_16BIT;
 917		fallthrough;
 918	case FSL_USB2_PHY_UTMI:
 919		temp |= PORTSC_PTS_UTMI;
 920		fallthrough;
 921	default:
 922		break;
 923	}
 924	fsl_writel(temp, &p_otg->dr_mem_map->portsc);
 925
 926	if (pdata->have_sysif_regs) {
 927		/* configure control enable IO output, big endian register */
 928		temp = __raw_readl(&p_otg->dr_mem_map->control);
 929		temp |= USB_CTRL_IOENB;
 930		__raw_writel(temp, &p_otg->dr_mem_map->control);
 931	}
 932
 933	/* disable all interrupt and clear all OTGSC status */
 934	temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
 935	temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
 936	temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
 937	fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
 938
 939	/*
 940	 * The identification (id) input is FALSE when a Mini-A plug is inserted
 941	 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
 942	 * Also: record initial state of ID pin
 943	 */
 944	if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
 945		p_otg->phy.otg->state = OTG_STATE_UNDEFINED;
 946		p_otg->fsm.id = 1;
 947	} else {
 948		p_otg->phy.otg->state = OTG_STATE_A_IDLE;
 949		p_otg->fsm.id = 0;
 950	}
 951
 952	pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
 953
 954	/* enable OTG ID pin interrupt */
 955	temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
 956	temp |= OTGSC_INTR_USB_ID_EN;
 957	temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
 958	fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
 959
 960	return 0;
 961}
 962
 963static int fsl_otg_probe(struct platform_device *pdev)
 964{
 965	int ret;
 966
 967	if (!dev_get_platdata(&pdev->dev))
 968		return -ENODEV;
 969
 970	/* configure the OTG */
 971	ret = fsl_otg_conf(pdev);
 972	if (ret) {
 973		dev_err(&pdev->dev, "Couldn't configure OTG module\n");
 974		return ret;
 975	}
 976
 977	/* start OTG */
 978	ret = usb_otg_start(pdev);
 979	if (ret) {
 980		dev_err(&pdev->dev, "Can't init FSL OTG device\n");
 981		return ret;
 982	}
 983
 984	return ret;
 985}
 986
 987static void fsl_otg_remove(struct platform_device *pdev)
 988{
 989	struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
 990
 991	disable_delayed_work_sync(&fsl_otg_dev->otg_event);
 992	usb_remove_phy(&fsl_otg_dev->phy);
 993	free_irq(fsl_otg_dev->irq, fsl_otg_dev);
 994
 995	iounmap((void *)usb_dr_regs);
 996
 997	fsl_otg_uninit_timers();
 998	kfree(fsl_otg_dev->phy.otg);
 999	kfree(fsl_otg_dev);
1000
1001	if (pdata->exit)
1002		pdata->exit(pdev);
1003}
1004
1005struct platform_driver fsl_otg_driver = {
1006	.probe = fsl_otg_probe,
1007	.remove = fsl_otg_remove,
1008	.driver = {
1009		.name = driver_name,
1010	},
1011};
1012
1013module_platform_driver(fsl_otg_driver);
1014
1015MODULE_DESCRIPTION(DRIVER_INFO);
1016MODULE_AUTHOR(DRIVER_AUTHOR);
1017MODULE_LICENSE("GPL");