da8xx.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Texas Instruments DA8xx/OMAP-L1x "glue layer"
  4 *
  5 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
  6 *
  7 * Based on the DaVinci "glue layer" code.
  8 * Copyright (C) 2005-2006 by Texas Instruments
  9 *
 10 * DT support
 11 * Copyright (c) 2016 Petr Kulhavy <petr@barix.com>
 12 *
 13 * This file is part of the Inventra Controller Driver for Linux.
 14 */
 15
 16#include <linux/module.h>
 17#include <linux/clk.h>
 18#include <linux/err.h>
 19#include <linux/io.h>
 20#include <linux/of.h>
 21#include <linux/of_platform.h>
 22#include <linux/phy/phy.h>
 23#include <linux/platform_device.h>
 24#include <linux/string_choices.h>
 25#include <linux/dma-mapping.h>
 26#include <linux/usb/usb_phy_generic.h>
 27
 28#include "musb_core.h"
 29
 30/*
 31 * DA8XX specific definitions
 32 */
 33
 34/* USB 2.0 OTG module registers */
 35#define DA8XX_USB_REVISION_REG	0x00
 36#define DA8XX_USB_CTRL_REG	0x04
 37#define DA8XX_USB_STAT_REG	0x08
 38#define DA8XX_USB_EMULATION_REG 0x0c
 39#define DA8XX_USB_SRP_FIX_TIME_REG 0x18
 40#define DA8XX_USB_INTR_SRC_REG	0x20
 41#define DA8XX_USB_INTR_SRC_SET_REG 0x24
 42#define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28
 43#define DA8XX_USB_INTR_MASK_REG 0x2c
 44#define DA8XX_USB_INTR_MASK_SET_REG 0x30
 45#define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34
 46#define DA8XX_USB_INTR_SRC_MASKED_REG 0x38
 47#define DA8XX_USB_END_OF_INTR_REG 0x3c
 48#define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
 49
 50/* Control register bits */
 51#define DA8XX_SOFT_RESET_MASK	1
 52
 53#define DA8XX_USB_TX_EP_MASK	0x1f		/* EP0 + 4 Tx EPs */
 54#define DA8XX_USB_RX_EP_MASK	0x1e		/* 4 Rx EPs */
 55
 56/* USB interrupt register bits */
 57#define DA8XX_INTR_USB_SHIFT	16
 58#define DA8XX_INTR_USB_MASK	(0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */
 59					/* interrupts and DRVVBUS interrupt */
 60#define DA8XX_INTR_DRVVBUS	0x100
 61#define DA8XX_INTR_RX_SHIFT	8
 62#define DA8XX_INTR_RX_MASK	(DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT)
 63#define DA8XX_INTR_TX_SHIFT	0
 64#define DA8XX_INTR_TX_MASK	(DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT)
 65
 66#define DA8XX_MENTOR_CORE_OFFSET 0x400
 67
 68struct da8xx_glue {
 69	struct device		*dev;
 70	struct platform_device	*musb;
 71	struct platform_device	*usb_phy;
 72	struct clk		*clk;
 73	struct phy		*phy;
 74};
 75
 76/*
 77 * Because we don't set CTRL.UINT, it's "important" to:
 78 *	- not read/write INTRUSB/INTRUSBE (except during
 79 *	  initial setup, as a workaround);
 80 *	- use INTSET/INTCLR instead.
 81 */
 82
 83/**
 84 * da8xx_musb_enable - enable interrupts
 85 */
 86static void da8xx_musb_enable(struct musb *musb)
 87{
 88	void __iomem *reg_base = musb->ctrl_base;
 89	u32 mask;
 90
 91	/* Workaround: setup IRQs through both register sets. */
 92	mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) |
 93	       ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) |
 94	       DA8XX_INTR_USB_MASK;
 95	musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
 96
 97	/* Force the DRVVBUS IRQ so we can start polling for ID change. */
 98	musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
 99			DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
100}
101
102/**
103 * da8xx_musb_disable - disable HDRC and flush interrupts
104 */
105static void da8xx_musb_disable(struct musb *musb)
106{
107	void __iomem *reg_base = musb->ctrl_base;
108
109	musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
110		    DA8XX_INTR_USB_MASK |
111		    DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
112	musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
113}
114
115#define portstate(stmt)		stmt
116
117static void da8xx_musb_set_vbus(struct musb *musb, int is_on)
118{
119	WARN_ON(is_on && is_peripheral_active(musb));
120}
121
122#define	POLL_SECONDS	2
123
124static void otg_timer(struct timer_list *t)
125{
126	struct musb		*musb = timer_container_of(musb, t,
127							      dev_timer);
128	void __iomem		*mregs = musb->mregs;
129	u8			devctl;
130	unsigned long		flags;
131
132	/*
133	 * We poll because DaVinci's won't expose several OTG-critical
134	 * status change events (from the transceiver) otherwise.
135	 */
136	devctl = musb_readb(mregs, MUSB_DEVCTL);
137	dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
138		usb_otg_state_string(musb->xceiv->otg->state));
139
140	spin_lock_irqsave(&musb->lock, flags);
141	switch (musb->xceiv->otg->state) {
142	case OTG_STATE_A_WAIT_BCON:
143		devctl &= ~MUSB_DEVCTL_SESSION;
144		musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
145
146		devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
147		if (devctl & MUSB_DEVCTL_BDEVICE) {
148			musb->xceiv->otg->state = OTG_STATE_B_IDLE;
149			MUSB_DEV_MODE(musb);
150		} else {
151			musb->xceiv->otg->state = OTG_STATE_A_IDLE;
152			MUSB_HST_MODE(musb);
153		}
154		break;
155	case OTG_STATE_A_WAIT_VFALL:
156		/*
157		 * Wait till VBUS falls below SessionEnd (~0.2 V); the 1.3
158		 * RTL seems to mis-handle session "start" otherwise (or in
159		 * our case "recover"), in routine "VBUS was valid by the time
160		 * VBUSERR got reported during enumeration" cases.
161		 */
162		if (devctl & MUSB_DEVCTL_VBUS) {
163			mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
164			break;
165		}
166		musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
167		musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG,
168			    MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
169		break;
170	case OTG_STATE_B_IDLE:
171		/*
172		 * There's no ID-changed IRQ, so we have no good way to tell
173		 * when to switch to the A-Default state machine (by setting
174		 * the DEVCTL.Session bit).
175		 *
176		 * Workaround:  whenever we're in B_IDLE, try setting the
177		 * session flag every few seconds.  If it works, ID was
178		 * grounded and we're now in the A-Default state machine.
179		 *
180		 * NOTE: setting the session flag is _supposed_ to trigger
181		 * SRP but clearly it doesn't.
182		 */
183		musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION);
184		devctl = musb_readb(mregs, MUSB_DEVCTL);
185		if (devctl & MUSB_DEVCTL_BDEVICE)
186			mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
187		else
188			musb->xceiv->otg->state = OTG_STATE_A_IDLE;
189		break;
190	default:
191		break;
192	}
193	spin_unlock_irqrestore(&musb->lock, flags);
194}
195
196static void __maybe_unused da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
197{
198	static unsigned long last_timer;
199
200	if (timeout == 0)
201		timeout = jiffies + msecs_to_jiffies(3);
202
203	/* Never idle if active, or when VBUS timeout is not set as host */
204	if (musb->is_active || (musb->a_wait_bcon == 0 &&
205				musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
206		dev_dbg(musb->controller, "%s active, deleting timer\n",
207			usb_otg_state_string(musb->xceiv->otg->state));
208		timer_delete(&musb->dev_timer);
209		last_timer = jiffies;
210		return;
211	}
212
213	if (time_after(last_timer, timeout) && timer_pending(&musb->dev_timer)) {
214		dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n");
215		return;
216	}
217	last_timer = timeout;
218
219	dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
220		usb_otg_state_string(musb->xceiv->otg->state),
221		jiffies_to_msecs(timeout - jiffies));
222	mod_timer(&musb->dev_timer, timeout);
223}
224
225static int da8xx_babble_recover(struct musb *musb)
226{
227	dev_dbg(musb->controller, "resetting controller to recover from babble\n");
228	musb_writel(musb->ctrl_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
229	return 0;
230}
231
232static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
233{
234	struct musb		*musb = hci;
235	void __iomem		*reg_base = musb->ctrl_base;
236	unsigned long		flags;
237	irqreturn_t		ret = IRQ_NONE;
238	u32			status;
239
240	spin_lock_irqsave(&musb->lock, flags);
241
242	/*
243	 * NOTE: DA8XX shadows the Mentor IRQs.  Don't manage them through
244	 * the Mentor registers (except for setup), use the TI ones and EOI.
245	 */
246
247	/* Acknowledge and handle non-CPPI interrupts */
248	status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
249	if (!status)
250		goto eoi;
251
252	musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status);
253	dev_dbg(musb->controller, "USB IRQ %08x\n", status);
254
255	musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT;
256	musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT;
257	musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT;
258
259	/*
260	 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
261	 * DA8xx's missing ID change IRQ.  We need an ID change IRQ to
262	 * switch appropriately between halves of the OTG state machine.
263	 * Managing DEVCTL.Session per Mentor docs requires that we know its
264	 * value but DEVCTL.BDevice is invalid without DEVCTL.Session set.
265	 * Also, DRVVBUS pulses for SRP (but not at 5 V)...
266	 */
267	if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) {
268		int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
269		void __iomem *mregs = musb->mregs;
270		u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
271		int err;
272
273		err = musb->int_usb & MUSB_INTR_VBUSERROR;
274		if (err) {
275			/*
276			 * The Mentor core doesn't debounce VBUS as needed
277			 * to cope with device connect current spikes. This
278			 * means it's not uncommon for bus-powered devices
279			 * to get VBUS errors during enumeration.
280			 *
281			 * This is a workaround, but newer RTL from Mentor
282			 * seems to allow a better one: "re"-starting sessions
283			 * without waiting for VBUS to stop registering in
284			 * devctl.
285			 */
286			musb->int_usb &= ~MUSB_INTR_VBUSERROR;
287			musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
288			mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
289			WARNING("VBUS error workaround (delay coming)\n");
290		} else if (drvvbus) {
291			MUSB_HST_MODE(musb);
292			musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
293			portstate(musb->port1_status |= USB_PORT_STAT_POWER);
294			timer_delete(&musb->dev_timer);
295		} else if (!(musb->int_usb & MUSB_INTR_BABBLE)) {
296			/*
297			 * When babble condition happens, drvvbus interrupt
298			 * is also generated. Ignore this drvvbus interrupt
299			 * and let babble interrupt handler recovers the
300			 * controller; otherwise, the host-mode flag is lost
301			 * due to the MUSB_DEV_MODE() call below and babble
302			 * recovery logic will not be called.
303			 */
304			musb->is_active = 0;
305			MUSB_DEV_MODE(musb);
306			musb->xceiv->otg->state = OTG_STATE_B_IDLE;
307			portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
308		}
309
310		dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
311				str_on_off(drvvbus),
312				usb_otg_state_string(musb->xceiv->otg->state),
313				err ? " ERROR" : "",
314				devctl);
315		ret = IRQ_HANDLED;
316	}
317
318	if (musb->int_tx || musb->int_rx || musb->int_usb)
319		ret |= musb_interrupt(musb);
320
321 eoi:
322	/* EOI needs to be written for the IRQ to be re-asserted. */
323	if (ret == IRQ_HANDLED || status)
324		musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
325
326	/* Poll for ID change */
327	if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
328		mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
329
330	spin_unlock_irqrestore(&musb->lock, flags);
331
332	return ret;
333}
334
335static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode)
336{
337	struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
338	enum phy_mode phy_mode;
339
340	switch (musb_mode) {
341	case MUSB_HOST:		/* Force VBUS valid, ID = 0 */
342		phy_mode = PHY_MODE_USB_HOST;
343		break;
344	case MUSB_PERIPHERAL:	/* Force VBUS valid, ID = 1 */
345		phy_mode = PHY_MODE_USB_DEVICE;
346		break;
347	case MUSB_OTG:		/* Don't override the VBUS/ID comparators */
348		phy_mode = PHY_MODE_USB_OTG;
349		break;
350	default:
351		return -EINVAL;
352	}
353
354	return phy_set_mode(glue->phy, phy_mode);
355}
356
357static int da8xx_musb_init(struct musb *musb)
358{
359	struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
360	void __iomem *reg_base = musb->ctrl_base;
361	u32 rev;
362	int ret = -ENODEV;
363
364	musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
365
366	ret = clk_prepare_enable(glue->clk);
367	if (ret) {
368		dev_err(glue->dev, "failed to enable clock\n");
369		return ret;
370	}
371
372	/* Returns zero if e.g. not clocked */
373	rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG);
374	if (!rev) {
375		ret = -ENODEV;
376		goto fail;
377	}
378
379	musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
380	if (IS_ERR_OR_NULL(musb->xceiv)) {
381		ret = -EPROBE_DEFER;
382		goto fail;
383	}
384
385	timer_setup(&musb->dev_timer, otg_timer, 0);
386
387	/* Reset the controller */
388	musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
389
390	/* Start the on-chip PHY and its PLL. */
391	ret = phy_init(glue->phy);
392	if (ret) {
393		dev_err(glue->dev, "Failed to init phy.\n");
394		goto fail;
395	}
396
397	ret = phy_power_on(glue->phy);
398	if (ret) {
399		dev_err(glue->dev, "Failed to power on phy.\n");
400		goto err_phy_power_on;
401	}
402
403	msleep(5);
404
405	/* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */
406	pr_debug("DA8xx OTG revision %08x, control %02x\n", rev,
407		 musb_readb(reg_base, DA8XX_USB_CTRL_REG));
408
409	musb->isr = da8xx_musb_interrupt;
410	return 0;
411
412err_phy_power_on:
413	phy_exit(glue->phy);
414fail:
415	clk_disable_unprepare(glue->clk);
416	return ret;
417}
418
419static int da8xx_musb_exit(struct musb *musb)
420{
421	struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
422
423	timer_delete_sync(&musb->dev_timer);
424
425	phy_power_off(glue->phy);
426	phy_exit(glue->phy);
427	clk_disable_unprepare(glue->clk);
428
429	usb_put_phy(musb->xceiv);
430
431	return 0;
432}
433
434static inline u8 get_vbus_power(struct device *dev)
435{
436	struct regulator *vbus_supply;
437	int current_uA;
438
439	vbus_supply = regulator_get_optional(dev, "vbus");
440	if (IS_ERR(vbus_supply))
441		return 255;
442	current_uA = regulator_get_current_limit(vbus_supply);
443	regulator_put(vbus_supply);
444	if (current_uA <= 0 || current_uA > 510000)
445		return 255;
446	return current_uA / 1000 / 2;
447}
448
449#ifdef CONFIG_USB_TI_CPPI41_DMA
450static void da8xx_dma_controller_callback(struct dma_controller *c)
451{
452	struct musb *musb = c->musb;
453	void __iomem *reg_base = musb->ctrl_base;
454
455	musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
456}
457
458static struct dma_controller *
459da8xx_dma_controller_create(struct musb *musb, void __iomem *base)
460{
461	struct dma_controller *controller;
462
463	controller = cppi41_dma_controller_create(musb, base);
464	if (IS_ERR_OR_NULL(controller))
465		return controller;
466
467	controller->dma_callback = da8xx_dma_controller_callback;
468
469	return controller;
470}
471#endif
472
473static const struct musb_platform_ops da8xx_ops = {
474	.quirks		= MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION |
475			  MUSB_DMA_CPPI41 | MUSB_DA8XX,
476	.init		= da8xx_musb_init,
477	.exit		= da8xx_musb_exit,
478
479	.fifo_mode	= 2,
480#ifdef CONFIG_USB_TI_CPPI41_DMA
481	.dma_init	= da8xx_dma_controller_create,
482	.dma_exit	= cppi41_dma_controller_destroy,
483#endif
484	.enable		= da8xx_musb_enable,
485	.disable	= da8xx_musb_disable,
486
487	.set_mode	= da8xx_musb_set_mode,
488
489#ifndef CONFIG_USB_MUSB_HOST
490	.try_idle	= da8xx_musb_try_idle,
491#endif
492	.recover	= da8xx_babble_recover,
493
494	.set_vbus	= da8xx_musb_set_vbus,
495};
496
497static const struct platform_device_info da8xx_dev_info = {
498	.name		= "musb-hdrc",
499	.id		= PLATFORM_DEVID_AUTO,
500	.dma_mask	= DMA_BIT_MASK(32),
501};
502
503static const struct musb_hdrc_config da8xx_config = {
504	.ram_bits = 10,
505	.num_eps = 5,
506	.multipoint = 1,
507};
508
509static struct of_dev_auxdata da8xx_auxdata_lookup[] = {
510	OF_DEV_AUXDATA("ti,da830-cppi41", 0x01e01000, "cppi41-dmaengine",
511		       NULL),
512	{}
513};
514
515static int da8xx_probe(struct platform_device *pdev)
516{
517	struct musb_hdrc_platform_data	*pdata = dev_get_platdata(&pdev->dev);
518	struct da8xx_glue		*glue;
519	struct platform_device_info	pinfo;
520	struct clk			*clk;
521	struct device_node		*np = pdev->dev.of_node;
522	int				ret;
523
524	glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
525	if (!glue)
526		return -ENOMEM;
527
528	clk = devm_clk_get(&pdev->dev, NULL);
529	if (IS_ERR(clk)) {
530		dev_err(&pdev->dev, "failed to get clock\n");
531		return PTR_ERR(clk);
532	}
533
534	glue->phy = devm_phy_get(&pdev->dev, "usb-phy");
535	if (IS_ERR(glue->phy))
536		return dev_err_probe(&pdev->dev, PTR_ERR(glue->phy),
537				     "failed to get phy\n");
538
539	glue->dev			= &pdev->dev;
540	glue->clk			= clk;
541
542	if (IS_ENABLED(CONFIG_OF) && np) {
543		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
544		if (!pdata)
545			return -ENOMEM;
546
547		pdata->config	= &da8xx_config;
548		pdata->mode	= musb_get_mode(&pdev->dev);
549		pdata->power	= get_vbus_power(&pdev->dev);
550	}
551
552	pdata->platform_ops		= &da8xx_ops;
553
554	glue->usb_phy = usb_phy_generic_register();
555	ret = PTR_ERR_OR_ZERO(glue->usb_phy);
556	if (ret) {
557		dev_err(&pdev->dev, "failed to register usb_phy\n");
558		return ret;
559	}
560	platform_set_drvdata(pdev, glue);
561
562	ret = of_platform_populate(pdev->dev.of_node, NULL,
563				   da8xx_auxdata_lookup, &pdev->dev);
564	if (ret)
565		goto err_unregister_phy;
566
567	pinfo = da8xx_dev_info;
568	pinfo.parent = &pdev->dev;
569	pinfo.res = pdev->resource;
570	pinfo.num_res = pdev->num_resources;
571	pinfo.data = pdata;
572	pinfo.size_data = sizeof(*pdata);
573	pinfo.fwnode = of_fwnode_handle(np);
574	pinfo.of_node_reused = true;
575
576	glue->musb = platform_device_register_full(&pinfo);
577	ret = PTR_ERR_OR_ZERO(glue->musb);
578	if (ret) {
579		dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
580		goto err_unregister_phy;
581	}
582
583	return 0;
584
585err_unregister_phy:
586	usb_phy_generic_unregister(glue->usb_phy);
587	return ret;
588}
589
590static void da8xx_remove(struct platform_device *pdev)
591{
592	struct da8xx_glue		*glue = platform_get_drvdata(pdev);
593
594	platform_device_unregister(glue->musb);
595	usb_phy_generic_unregister(glue->usb_phy);
596}
597
598#ifdef CONFIG_PM_SLEEP
599static int da8xx_suspend(struct device *dev)
600{
601	int ret;
602	struct da8xx_glue *glue = dev_get_drvdata(dev);
603
604	ret = phy_power_off(glue->phy);
605	if (ret)
606		return ret;
607	clk_disable_unprepare(glue->clk);
608
609	return 0;
610}
611
612static int da8xx_resume(struct device *dev)
613{
614	int ret;
615	struct da8xx_glue *glue = dev_get_drvdata(dev);
616
617	ret = clk_prepare_enable(glue->clk);
618	if (ret)
619		return ret;
620	return phy_power_on(glue->phy);
621}
622#endif
623
624static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume);
625
626#ifdef CONFIG_OF
627static const struct of_device_id da8xx_id_table[] = {
628	{
629		.compatible = "ti,da830-musb",
630	},
631	{},
632};
633MODULE_DEVICE_TABLE(of, da8xx_id_table);
634#endif
635
636static struct platform_driver da8xx_driver = {
637	.probe		= da8xx_probe,
638	.remove		= da8xx_remove,
639	.driver		= {
640		.name	= "musb-da8xx",
641		.pm = &da8xx_pm_ops,
642		.of_match_table = of_match_ptr(da8xx_id_table),
643	},
644};
645
646MODULE_DESCRIPTION("DA8xx/OMAP-L1x MUSB Glue Layer");
647MODULE_AUTHOR("Sergei Shtylyov <sshtylyov@ru.mvista.com>");
648MODULE_LICENSE("GPL v2");
649module_platform_driver(da8xx_driver);