uio_dmem_genirq.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * drivers/uio/uio_dmem_genirq.c
  4 *
  5 * Userspace I/O platform driver with generic IRQ handling code.
  6 *
  7 * Copyright (C) 2012 Damian Hobson-Garcia
  8 *
  9 * Based on uio_pdrv_genirq.c by Magnus Damm
 10 */
 11
 12#include <linux/platform_device.h>
 13#include <linux/uio_driver.h>
 14#include <linux/spinlock.h>
 15#include <linux/bitops.h>
 16#include <linux/module.h>
 17#include <linux/interrupt.h>
 18#include <linux/platform_data/uio_dmem_genirq.h>
 19#include <linux/stringify.h>
 20#include <linux/pm_runtime.h>
 21#include <linux/dma-mapping.h>
 22#include <linux/slab.h>
 23#include <linux/irq.h>
 24
 25#include <linux/of.h>
 26#include <linux/of_platform.h>
 27#include <linux/of_address.h>
 28
 29#define DRIVER_NAME "uio_dmem_genirq"
 30#define DMEM_MAP_ERROR (~0)
 31
 32struct uio_dmem_genirq_platdata {
 33	struct uio_info *uioinfo;
 34	spinlock_t lock;
 35	unsigned long flags;
 36	struct platform_device *pdev;
 37	unsigned int dmem_region_start;
 38	unsigned int num_dmem_regions;
 39	struct mutex alloc_lock;
 40	unsigned int refcnt;
 41};
 42
 43/* Bits in uio_dmem_genirq_platdata.flags */
 44enum {
 45	UIO_IRQ_DISABLED = 0,
 46};
 47
 48static int uio_dmem_genirq_open(struct uio_info *info, struct inode *inode)
 49{
 50	struct uio_dmem_genirq_platdata *priv = info->priv;
 51	struct uio_mem *uiomem;
 52
 53	uiomem = &priv->uioinfo->mem[priv->dmem_region_start];
 54
 55	mutex_lock(&priv->alloc_lock);
 56	while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) {
 57		void *addr;
 58		if (!uiomem->size)
 59			break;
 60
 61		addr = dma_alloc_coherent(&priv->pdev->dev, uiomem->size,
 62					  &uiomem->dma_addr, GFP_KERNEL);
 63		uiomem->addr = addr ? (uintptr_t) addr : DMEM_MAP_ERROR;
 64		++uiomem;
 65	}
 66	priv->refcnt++;
 67
 68	mutex_unlock(&priv->alloc_lock);
 69	/* Wait until the Runtime PM code has woken up the device */
 70	pm_runtime_get_sync(&priv->pdev->dev);
 71	return 0;
 72}
 73
 74static int uio_dmem_genirq_release(struct uio_info *info, struct inode *inode)
 75{
 76	struct uio_dmem_genirq_platdata *priv = info->priv;
 77	struct uio_mem *uiomem;
 78
 79	/* Tell the Runtime PM code that the device has become idle */
 80	pm_runtime_put_sync(&priv->pdev->dev);
 81
 82	uiomem = &priv->uioinfo->mem[priv->dmem_region_start];
 83
 84	mutex_lock(&priv->alloc_lock);
 85
 86	priv->refcnt--;
 87	while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) {
 88		if (!uiomem->size)
 89			break;
 90		if (uiomem->addr) {
 91			dma_free_coherent(uiomem->dma_device, uiomem->size,
 92					  (void *) (uintptr_t) uiomem->addr,
 93					  uiomem->dma_addr);
 94		}
 95		uiomem->addr = DMEM_MAP_ERROR;
 96		++uiomem;
 97	}
 98
 99	mutex_unlock(&priv->alloc_lock);
100	return 0;
101}
102
103static irqreturn_t uio_dmem_genirq_handler(int irq, struct uio_info *dev_info)
104{
105	struct uio_dmem_genirq_platdata *priv = dev_info->priv;
106
107	/* Just disable the interrupt in the interrupt controller, and
108	 * remember the state so we can allow user space to enable it later.
109	 */
110
111	spin_lock(&priv->lock);
112	if (!__test_and_set_bit(UIO_IRQ_DISABLED, &priv->flags))
113		disable_irq_nosync(irq);
114	spin_unlock(&priv->lock);
115
116	return IRQ_HANDLED;
117}
118
119static int uio_dmem_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on)
120{
121	struct uio_dmem_genirq_platdata *priv = dev_info->priv;
122	unsigned long flags;
123
124	/* Allow user space to enable and disable the interrupt
125	 * in the interrupt controller, but keep track of the
126	 * state to prevent per-irq depth damage.
127	 *
128	 * Serialize this operation to support multiple tasks and concurrency
129	 * with irq handler on SMP systems.
130	 */
131
132	spin_lock_irqsave(&priv->lock, flags);
133	if (irq_on) {
134		if (__test_and_clear_bit(UIO_IRQ_DISABLED, &priv->flags))
135			enable_irq(dev_info->irq);
136	} else {
137		if (!__test_and_set_bit(UIO_IRQ_DISABLED, &priv->flags))
138			disable_irq_nosync(dev_info->irq);
139	}
140	spin_unlock_irqrestore(&priv->lock, flags);
141
142	return 0;
143}
144
145static void uio_dmem_genirq_pm_disable(void *data)
146{
147	struct device *dev = data;
148
149	pm_runtime_disable(dev);
150}
151
152static int uio_dmem_genirq_probe(struct platform_device *pdev)
153{
154	struct uio_dmem_genirq_pdata *pdata = dev_get_platdata(&pdev->dev);
155	struct uio_info *uioinfo = &pdata->uioinfo;
156	struct uio_dmem_genirq_platdata *priv;
157	struct uio_mem *uiomem;
158	int ret = -EINVAL;
159	int i;
160
161	if (pdev->dev.of_node) {
162		/* alloc uioinfo for one device */
163		uioinfo = devm_kzalloc(&pdev->dev, sizeof(*uioinfo), GFP_KERNEL);
164		if (!uioinfo) {
165			dev_err(&pdev->dev, "unable to kmalloc\n");
166			return -ENOMEM;
167		}
168		uioinfo->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOFn",
169					       pdev->dev.of_node);
170		if (!uioinfo->name)
171			return -ENOMEM;
172		uioinfo->version = "devicetree";
173	}
174
175	if (!uioinfo || !uioinfo->name || !uioinfo->version) {
176		dev_err(&pdev->dev, "missing platform_data\n");
177		return -EINVAL;
178	}
179
180	if (uioinfo->handler || uioinfo->irqcontrol ||
181	    uioinfo->irq_flags & IRQF_SHARED) {
182		dev_err(&pdev->dev, "interrupt configuration error\n");
183		return -EINVAL;
184	}
185
186	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
187	if (!priv) {
188		dev_err(&pdev->dev, "unable to kmalloc\n");
189		return -ENOMEM;
190	}
191
192	ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
193	if (ret) {
194		dev_err(&pdev->dev, "DMA enable failed\n");
195		return ret;
196	}
197
198	priv->uioinfo = uioinfo;
199	spin_lock_init(&priv->lock);
200	priv->flags = 0; /* interrupt is enabled to begin with */
201	priv->pdev = pdev;
202	mutex_init(&priv->alloc_lock);
203
204	if (!uioinfo->irq) {
205		/* Multiple IRQs are not supported */
206		ret = platform_get_irq(pdev, 0);
207		if (ret == -ENXIO && pdev->dev.of_node)
208			ret = UIO_IRQ_NONE;
209		else if (ret < 0)
210			return ret;
211		uioinfo->irq = ret;
212	}
213
214	if (uioinfo->irq) {
215		/*
216		 * If a level interrupt, dont do lazy disable. Otherwise the
217		 * irq will fire again since clearing of the actual cause, on
218		 * device level, is done in userspace
219		 * irqd_is_level_type() isn't used since isn't valid until
220		 * irq is configured.
221		 */
222		if (irq_get_trigger_type(uioinfo->irq) & IRQ_TYPE_LEVEL_MASK) {
223			dev_dbg(&pdev->dev, "disable lazy unmask\n");
224			irq_set_status_flags(uioinfo->irq, IRQ_DISABLE_UNLAZY);
225		}
226	}
227
228	uiomem = &uioinfo->mem[0];
229
230	for (i = 0; i < pdev->num_resources; ++i) {
231		struct resource *r = &pdev->resource[i];
232
233		if (r->flags != IORESOURCE_MEM)
234			continue;
235
236		if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
237			dev_warn(&pdev->dev, "device has more than "
238					__stringify(MAX_UIO_MAPS)
239					" I/O memory resources.\n");
240			break;
241		}
242
243		uiomem->memtype = UIO_MEM_PHYS;
244		uiomem->addr = r->start;
245		uiomem->size = resource_size(r);
246		++uiomem;
247	}
248
249	priv->dmem_region_start = uiomem - &uioinfo->mem[0];
250	priv->num_dmem_regions = pdata->num_dynamic_regions;
251
252	for (i = 0; i < pdata->num_dynamic_regions; ++i) {
253		if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
254			dev_warn(&pdev->dev, "device has more than "
255					__stringify(MAX_UIO_MAPS)
256					" dynamic and fixed memory regions.\n");
257			break;
258		}
259		uiomem->memtype = UIO_MEM_DMA_COHERENT;
260		uiomem->dma_device = &pdev->dev;
261		uiomem->addr = DMEM_MAP_ERROR;
262		uiomem->size = pdata->dynamic_region_sizes[i];
263		++uiomem;
264	}
265
266	while (uiomem < &uioinfo->mem[MAX_UIO_MAPS]) {
267		uiomem->size = 0;
268		++uiomem;
269	}
270
271	/* This driver requires no hardware specific kernel code to handle
272	 * interrupts. Instead, the interrupt handler simply disables the
273	 * interrupt in the interrupt controller. User space is responsible
274	 * for performing hardware specific acknowledge and re-enabling of
275	 * the interrupt in the interrupt controller.
276	 *
277	 * Interrupt sharing is not supported.
278	 */
279
280	uioinfo->handler = uio_dmem_genirq_handler;
281	uioinfo->irqcontrol = uio_dmem_genirq_irqcontrol;
282	uioinfo->open = uio_dmem_genirq_open;
283	uioinfo->release = uio_dmem_genirq_release;
284	uioinfo->priv = priv;
285
286	/* Enable Runtime PM for this device:
287	 * The device starts in suspended state to allow the hardware to be
288	 * turned off by default. The Runtime PM bus code should power on the
289	 * hardware and enable clocks at open().
290	 */
291	pm_runtime_enable(&pdev->dev);
292
293	ret = devm_add_action_or_reset(&pdev->dev, uio_dmem_genirq_pm_disable, &pdev->dev);
294	if (ret)
295		return ret;
296
297	return devm_uio_register_device(&pdev->dev, priv->uioinfo);
298}
299
300#ifdef CONFIG_OF
301static const struct of_device_id uio_of_genirq_match[] = {
302	{ /* empty for now */ },
303};
304MODULE_DEVICE_TABLE(of, uio_of_genirq_match);
305#endif
306
307static struct platform_driver uio_dmem_genirq = {
308	.probe = uio_dmem_genirq_probe,
309	.driver = {
310		.name = DRIVER_NAME,
311		.of_match_table = of_match_ptr(uio_of_genirq_match),
312	},
313};
314
315module_platform_driver(uio_dmem_genirq);
316
317MODULE_AUTHOR("Damian Hobson-Garcia");
318MODULE_DESCRIPTION("Userspace I/O platform driver with dynamic memory.");
319MODULE_LICENSE("GPL v2");
320MODULE_ALIAS("platform:" DRIVER_NAME);