ufshci-dwc.h

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * UFS Host driver for Synopsys Designware Core
 4 *
 5 * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
 6 *
 7 * Authors: Joao Pinto <jpinto@synopsys.com>
 8 */
 9
10#ifndef _UFSHCI_DWC_H
11#define _UFSHCI_DWC_H
12
13/* DWC HC UFSHCI specific Registers */
14enum dwc_specific_registers {
15	DWC_UFS_REG_HCLKDIV	= 0xFC,
16};
17
18/* Clock Divider Values: Hex equivalent of frequency in MHz */
19enum clk_div_values {
20	DWC_UFS_REG_HCLKDIV_DIV_62_5	= 0x3e,
21	DWC_UFS_REG_HCLKDIV_DIV_125	= 0x7d,
22	DWC_UFS_REG_HCLKDIV_DIV_200	= 0xc8,
23};
24
25/* Selector Index */
26enum selector_index {
27	SELIND_LN0_TX		= 0x00,
28	SELIND_LN1_TX		= 0x01,
29	SELIND_LN0_RX		= 0x04,
30	SELIND_LN1_RX		= 0x05,
31};
32
33#endif /* End of Header */