8250.h

  1/* SPDX-License-Identifier: GPL-2.0+ */
  2/*
  3 *  Driver for 8250/16550-type serial ports
  4 *
  5 *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  6 *
  7 *  Copyright (C) 2001 Russell King.
  8 */
  9
 10#include <linux/bits.h>
 11#include <linux/serial_8250.h>
 12#include <linux/serial_core.h>
 13#include <linux/dmaengine.h>
 14
 15#include "../serial_mctrl_gpio.h"
 16
 17struct uart_8250_dma {
 18	int (*tx_dma)(struct uart_8250_port *p);
 19	int (*rx_dma)(struct uart_8250_port *p);
 20	void (*prepare_tx_dma)(struct uart_8250_port *p);
 21	void (*prepare_rx_dma)(struct uart_8250_port *p);
 22
 23	/* Filter function */
 24	dma_filter_fn		fn;
 25	/* Parameter to the filter function */
 26	void			*rx_param;
 27	void			*tx_param;
 28
 29	struct dma_slave_config	rxconf;
 30	struct dma_slave_config	txconf;
 31
 32	struct dma_chan		*rxchan;
 33	struct dma_chan		*txchan;
 34
 35	/* Device address base for DMA operations */
 36	phys_addr_t		rx_dma_addr;
 37	phys_addr_t		tx_dma_addr;
 38
 39	/* DMA address of the buffer in memory */
 40	dma_addr_t		rx_addr;
 41	dma_addr_t		tx_addr;
 42
 43	dma_cookie_t		rx_cookie;
 44	dma_cookie_t		tx_cookie;
 45
 46	void			*rx_buf;
 47
 48	size_t			rx_size;
 49	size_t			tx_size;
 50
 51	unsigned char		tx_running;
 52	unsigned char		tx_err;
 53	unsigned char		rx_running;
 54};
 55
 56struct old_serial_port {
 57	unsigned int uart;
 58	unsigned int baud_base;
 59	unsigned int port;
 60	unsigned int irq;
 61	upf_t        flags;
 62	unsigned char io_type;
 63	unsigned char __iomem *iomem_base;
 64	unsigned short iomem_reg_shift;
 65};
 66
 67struct serial8250_config {
 68	const char	*name;
 69	unsigned short	fifo_size;
 70	unsigned short	tx_loadsz;
 71	unsigned char	fcr;
 72	unsigned char	rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
 73	unsigned int	flags;
 74};
 75
 76#define UART_CAP_FIFO	BIT(8)	/* UART has FIFO */
 77#define UART_CAP_EFR	BIT(9)	/* UART has EFR */
 78#define UART_CAP_SLEEP	BIT(10)	/* UART has IER sleep */
 79#define UART_CAP_AFE	BIT(11)	/* MCR-based hw flow control */
 80#define UART_CAP_UUE	BIT(12)	/* UART needs IER bit 6 set (Xscale) */
 81#define UART_CAP_RTOIE	BIT(13)	/* UART needs IER bit 4 set (Xscale, Tegra) */
 82#define UART_CAP_HFIFO	BIT(14)	/* UART has a "hidden" FIFO */
 83#define UART_CAP_RPM	BIT(15)	/* Runtime PM is active while idle */
 84#define UART_CAP_IRDA	BIT(16)	/* UART supports IrDA line discipline */
 85#define UART_CAP_MINI	BIT(17)	/* Mini UART on BCM283X family lacks:
 86					 * STOP PARITY EPAR SPAR WLEN5 WLEN6
 87					 */
 88#define UART_CAP_NOTEMT	BIT(18)	/* UART without interrupt on TEMT available */
 89
 90#define UART_BUG_QUOT	BIT(0)	/* UART has buggy quot LSB */
 91#define UART_BUG_TXEN	BIT(1)	/* UART has buggy TX IIR status */
 92#define UART_BUG_NOMSR	BIT(2)	/* UART has buggy MSR status bits (Au1x00) */
 93#define UART_BUG_THRE	BIT(3)	/* UART has buggy THRE reassertion */
 94#define UART_BUG_TXRACE	BIT(5)	/* UART Tx fails to set remote DR */
 95
 96/* Module parameters */
 97#define UART_NR	CONFIG_SERIAL_8250_NR_UARTS
 98
 99extern unsigned int nr_uarts;
100
101#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags)		\
102	{							\
103		.iobase		= _base,			\
104		.irq		= _irq,				\
105		.uartclk	= 1843200,			\
106		.iotype		= UPIO_PORT,			\
107		.flags		= UPF_BOOT_AUTOCONF | (_flags),	\
108	}
109
110#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
111
112extern struct uart_driver serial8250_reg;
113void serial8250_register_ports(struct uart_driver *drv, struct device *dev);
114
115/* Legacy ISA bus related APIs */
116typedef void (*serial8250_isa_config_fn)(int, struct uart_port *, u32 *);
117extern serial8250_isa_config_fn serial8250_isa_config;
118
119void serial8250_isa_init_ports(void);
120
121extern struct platform_device *serial8250_isa_devs;
122
123extern const struct uart_ops *univ8250_port_base_ops;
124extern struct uart_ops univ8250_port_ops;
125
126static inline int serial_in(struct uart_8250_port *up, int offset)
127{
128	return up->port.serial_in(&up->port, offset);
129}
130
131static inline void serial_out(struct uart_8250_port *up, int offset, int value)
132{
133	up->port.serial_out(&up->port, offset, value);
134}
135
136/**
137 *	serial_lsr_in - Read LSR register and preserve flags across reads
138 *	@up:	uart 8250 port
139 *
140 *	Read LSR register and handle saving non-preserved flags across reads.
141 *	The flags that are not preserved across reads are stored into
142 *	up->lsr_saved_flags.
143 *
144 *	Returns LSR value or'ed with the preserved flags (if any).
145 */
146static inline u16 serial_lsr_in(struct uart_8250_port *up)
147{
148	u16 lsr = up->lsr_saved_flags;
149
150	lsr |= serial_in(up, UART_LSR);
151	up->lsr_saved_flags = lsr & up->lsr_save_mask;
152
153	return lsr;
154}
155
156/*
157 * For the 16C950
158 */
159static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
160{
161	serial_out(up, UART_SCR, offset);
162	serial_out(up, UART_ICR, value);
163}
164
165static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
166						   int offset)
167{
168	unsigned int value;
169
170	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
171	serial_out(up, UART_SCR, offset);
172	value = serial_in(up, UART_ICR);
173	serial_icr_write(up, UART_ACR, up->acr);
174
175	return value;
176}
177
178void serial8250_clear_fifos(struct uart_8250_port *p);
179void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
180void serial8250_fifo_wait_for_lsr_thre(struct uart_8250_port *up, unsigned int count);
181
182void serial8250_rpm_get(struct uart_8250_port *p);
183void serial8250_rpm_put(struct uart_8250_port *p);
184DEFINE_GUARD(serial8250_rpm, struct uart_8250_port *,
185	     serial8250_rpm_get(_T), serial8250_rpm_put(_T));
186
187static inline u32 serial_dl_read(struct uart_8250_port *up)
188{
189	return up->dl_read(up);
190}
191
192static inline void serial_dl_write(struct uart_8250_port *up, u32 value)
193{
194	up->dl_write(up, value);
195}
196
197static inline bool serial8250_set_THRI(struct uart_8250_port *up)
198{
199	/* Port locked to synchronize UART_IER access against the console. */
200	lockdep_assert_held_once(&up->port.lock);
201
202	if (up->ier & UART_IER_THRI)
203		return false;
204	up->ier |= UART_IER_THRI;
205	serial_out(up, UART_IER, up->ier);
206	return true;
207}
208
209static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
210{
211	/* Port locked to synchronize UART_IER access against the console. */
212	lockdep_assert_held_once(&up->port.lock);
213
214	if (!(up->ier & UART_IER_THRI))
215		return false;
216	up->ier &= ~UART_IER_THRI;
217	serial_out(up, UART_IER, up->ier);
218	return true;
219}
220
221struct uart_8250_port *serial8250_setup_port(int index);
222struct uart_8250_port *serial8250_get_port(int line);
223
224int serial8250_em485_config(struct uart_port *port, struct ktermios *termios,
225			    struct serial_rs485 *rs485);
226void serial8250_em485_start_tx(struct uart_8250_port *p, bool toggle_ier);
227void serial8250_em485_stop_tx(struct uart_8250_port *p, bool toggle_ier);
228void serial8250_em485_destroy(struct uart_8250_port *p);
229extern struct serial_rs485 serial8250_em485_supported;
230
231/* MCR <-> TIOCM conversion */
232static inline int serial8250_TIOCM_to_MCR(int tiocm)
233{
234	int mcr = 0;
235
236	if (tiocm & TIOCM_RTS)
237		mcr |= UART_MCR_RTS;
238	if (tiocm & TIOCM_DTR)
239		mcr |= UART_MCR_DTR;
240	if (tiocm & TIOCM_OUT1)
241		mcr |= UART_MCR_OUT1;
242	if (tiocm & TIOCM_OUT2)
243		mcr |= UART_MCR_OUT2;
244	if (tiocm & TIOCM_LOOP)
245		mcr |= UART_MCR_LOOP;
246
247	return mcr;
248}
249
250static inline int serial8250_MCR_to_TIOCM(int mcr)
251{
252	int tiocm = 0;
253
254	if (mcr & UART_MCR_RTS)
255		tiocm |= TIOCM_RTS;
256	if (mcr & UART_MCR_DTR)
257		tiocm |= TIOCM_DTR;
258	if (mcr & UART_MCR_OUT1)
259		tiocm |= TIOCM_OUT1;
260	if (mcr & UART_MCR_OUT2)
261		tiocm |= TIOCM_OUT2;
262	if (mcr & UART_MCR_LOOP)
263		tiocm |= TIOCM_LOOP;
264
265	return tiocm;
266}
267
268/* MSR <-> TIOCM conversion */
269static inline int serial8250_MSR_to_TIOCM(int msr)
270{
271	int tiocm = 0;
272
273	if (msr & UART_MSR_DCD)
274		tiocm |= TIOCM_CAR;
275	if (msr & UART_MSR_RI)
276		tiocm |= TIOCM_RNG;
277	if (msr & UART_MSR_DSR)
278		tiocm |= TIOCM_DSR;
279	if (msr & UART_MSR_CTS)
280		tiocm |= TIOCM_CTS;
281
282	return tiocm;
283}
284
285static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
286{
287	serial_out(up, UART_MCR, value);
288
289	if (up->gpios)
290		mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
291}
292
293static inline int serial8250_in_MCR(struct uart_8250_port *up)
294{
295	int mctrl;
296
297	mctrl = serial_in(up, UART_MCR);
298
299	if (up->gpios) {
300		unsigned int mctrl_gpio = 0;
301
302		mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
303		mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
304	}
305
306	return mctrl;
307}
308
309#ifdef CONFIG_SERIAL_8250_PNP
310int serial8250_pnp_init(void);
311void serial8250_pnp_exit(void);
312#else
313static inline int serial8250_pnp_init(void) { return 0; }
314static inline void serial8250_pnp_exit(void) { }
315#endif
316
317#ifdef CONFIG_SERIAL_8250_RSA
318void univ8250_rsa_support(struct uart_ops *ops, const struct uart_ops *core_ops);
319void rsa_enable(struct uart_8250_port *up);
320void rsa_disable(struct uart_8250_port *up);
321void rsa_autoconfig(struct uart_8250_port *up);
322void rsa_reset(struct uart_8250_port *up);
323#else
324static inline void univ8250_rsa_support(struct uart_ops *ops, const struct uart_ops *core_ops) { }
325static inline void rsa_enable(struct uart_8250_port *up) {}
326static inline void rsa_disable(struct uart_8250_port *up) {}
327static inline void rsa_autoconfig(struct uart_8250_port *up) {}
328static inline void rsa_reset(struct uart_8250_port *up) {}
329#endif
330
331#ifdef CONFIG_SERIAL_8250_FINTEK
332int fintek_8250_probe(struct uart_8250_port *uart);
333#else
334static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
335#endif
336
337#ifdef CONFIG_ARCH_OMAP1
338#include <linux/soc/ti/omap1-soc.h>
339static inline int is_omap1_8250(struct uart_8250_port *pt)
340{
341	int res;
342
343	switch (pt->port.mapbase) {
344	case OMAP1_UART1_BASE:
345	case OMAP1_UART2_BASE:
346	case OMAP1_UART3_BASE:
347		res = 1;
348		break;
349	default:
350		res = 0;
351		break;
352	}
353
354	return res;
355}
356
357static inline int is_omap1510_8250(struct uart_8250_port *pt)
358{
359	if (!cpu_is_omap1510())
360		return 0;
361
362	return is_omap1_8250(pt);
363}
364#else
365static inline int is_omap1_8250(struct uart_8250_port *pt)
366{
367	return 0;
368}
369static inline int is_omap1510_8250(struct uart_8250_port *pt)
370{
371	return 0;
372}
373#endif
374
375#ifdef CONFIG_SERIAL_8250_DMA
376extern int serial8250_tx_dma(struct uart_8250_port *);
377extern void serial8250_tx_dma_flush(struct uart_8250_port *);
378extern int serial8250_rx_dma(struct uart_8250_port *);
379extern void serial8250_rx_dma_flush(struct uart_8250_port *);
380extern int serial8250_request_dma(struct uart_8250_port *);
381extern void serial8250_release_dma(struct uart_8250_port *);
382
383static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
384{
385	struct uart_8250_dma *dma = p->dma;
386
387	if (dma->prepare_tx_dma)
388		dma->prepare_tx_dma(p);
389}
390
391static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
392{
393	struct uart_8250_dma *dma = p->dma;
394
395	if (dma->prepare_rx_dma)
396		dma->prepare_rx_dma(p);
397}
398
399static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
400{
401	struct uart_8250_dma *dma = p->dma;
402
403	return dma && dma->tx_running;
404}
405
406static inline void serial8250_tx_dma_pause(struct uart_8250_port *p)
407{
408	struct uart_8250_dma *dma = p->dma;
409
410	if (!dma->tx_running)
411		return;
412
413	dmaengine_pause(dma->txchan);
414}
415
416static inline void serial8250_tx_dma_resume(struct uart_8250_port *p)
417{
418	struct uart_8250_dma *dma = p->dma;
419
420	if (!dma->tx_running)
421		return;
422
423	dmaengine_resume(dma->txchan);
424}
425#else
426static inline int serial8250_tx_dma(struct uart_8250_port *p)
427{
428	return -1;
429}
430static inline void serial8250_tx_dma_flush(struct uart_8250_port *p) { }
431static inline int serial8250_rx_dma(struct uart_8250_port *p)
432{
433	return -1;
434}
435static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
436static inline int serial8250_request_dma(struct uart_8250_port *p)
437{
438	return -1;
439}
440static inline void serial8250_release_dma(struct uart_8250_port *p) { }
441
442static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
443{
444	return false;
445}
446
447static inline void serial8250_tx_dma_pause(struct uart_8250_port *p) { }
448static inline void serial8250_tx_dma_resume(struct uart_8250_port *p) { }
449#endif
450
451static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
452{
453	unsigned char status;
454
455	status = serial_in(up, 0x04); /* EXCR2 */
456#define PRESL(x) ((x) & 0x30)
457	if (PRESL(status) == 0x10) {
458		/* already in high speed mode */
459		return 0;
460	} else {
461		status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
462		status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
463		serial_out(up, 0x04, status);
464	}
465	return 1;
466}
467
468static inline int serial_index(struct uart_port *port)
469{
470	return port->minor - 64;
471}