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moxa.c
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linux-6.19.14/drivers/tty/moxa.c
1// SPDX-License-Identifier: GPL-2.0+ 2/*****************************************************************************/ 3/* 4 * moxa.c -- MOXA Intellio family multiport serial driver. 5 * 6 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com). 7 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com> 8 * 9 * This code is loosely based on the Linux serial driver, written by 10 * Linus Torvalds, Theodore T'so and others. 11 */ 12 13/* 14 * MOXA Intellio Series Driver 15 * for : LINUX 16 * date : 1999/1/7 17 * version : 5.1 18 */ 19 20#include <linux/module.h> 21#include <linux/types.h> 22#include <linux/mm.h> 23#include <linux/ioport.h> 24#include <linux/errno.h> 25#include <linux/firmware.h> 26#include <linux/signal.h> 27#include <linux/sched.h> 28#include <linux/timer.h> 29#include <linux/interrupt.h> 30#include <linux/tty.h> 31#include <linux/tty_flip.h> 32#include <linux/major.h> 33#include <linux/string.h> 34#include <linux/fcntl.h> 35#include <linux/ptrace.h> 36#include <linux/serial.h> 37#include <linux/tty_driver.h> 38#include <linux/delay.h> 39#include <linux/pci.h> 40#include <linux/init.h> 41#include <linux/bitops.h> 42#include <linux/slab.h> 43#include <linux/ratelimit.h> 44 45#include <asm/io.h> 46 47/* 48 * System Configuration 49 */ 50 51#define Magic_code 0x404 52 53/* 54 * for C218 BIOS initialization 55 */ 56#define C218_ConfBase 0x800 57#define C218_status (C218_ConfBase + 0) /* BIOS running status */ 58#define C218_diag (C218_ConfBase + 2) /* diagnostic status */ 59#define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */ 60#define C218DLoad_len (C218_ConfBase + 6) /* WORD */ 61#define C218check_sum (C218_ConfBase + 8) /* BYTE */ 62#define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */ 63#define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */ 64#define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */ 65#define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */ 66#define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */ 67 68#define C218_LoadBuf 0x0F00 69#define C218_KeyCode 0x218 70#define CP204J_KeyCode 0x204 71 72/* 73 * for C320 BIOS initialization 74 */ 75#define C320_ConfBase 0x800 76#define C320_LoadBuf 0x0f00 77#define STS_init 0x05 /* for C320_status */ 78 79#define C320_status C320_ConfBase + 0 /* BIOS running status */ 80#define C320_diag C320_ConfBase + 2 /* diagnostic status */ 81#define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */ 82#define C320DLoad_len C320_ConfBase + 6 /* WORD */ 83#define C320check_sum C320_ConfBase + 8 /* WORD */ 84#define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */ 85#define C320bapi_len C320_ConfBase + 0x0c /* WORD */ 86#define C320UART_no C320_ConfBase + 0x0e /* WORD */ 87 88#define C320_KeyCode 0x320 89 90#define FixPage_addr 0x0000 /* starting addr of static page */ 91#define DynPage_addr 0x2000 /* starting addr of dynamic page */ 92#define C218_start 0x3000 /* starting addr of C218 BIOS prg */ 93#define Control_reg 0x1ff0 /* select page and reset control */ 94#define HW_reset 0x80 95 96/* 97 * Function Codes 98 */ 99#define FC_CardReset 0x80 100#define FC_ChannelReset 1 /* C320 firmware not supported */ 101#define FC_EnableCH 2 102#define FC_DisableCH 3 103#define FC_SetParam 4 104#define FC_SetMode 5 105#define FC_SetRate 6 106#define FC_LineControl 7 107#define FC_LineStatus 8 108#define FC_XmitControl 9 109#define FC_FlushQueue 10 110#define FC_SendBreak 11 111#define FC_StopBreak 12 112#define FC_LoopbackON 13 113#define FC_LoopbackOFF 14 114#define FC_ClrIrqTable 15 115#define FC_SendXon 16 116#define FC_SetTermIrq 17 /* C320 firmware not supported */ 117#define FC_SetCntIrq 18 /* C320 firmware not supported */ 118#define FC_SetBreakIrq 19 119#define FC_SetLineIrq 20 120#define FC_SetFlowCtl 21 121#define FC_GenIrq 22 122#define FC_InCD180 23 123#define FC_OutCD180 24 124#define FC_InUARTreg 23 125#define FC_OutUARTreg 24 126#define FC_SetXonXoff 25 127#define FC_OutCD180CCR 26 128#define FC_ExtIQueue 27 129#define FC_ExtOQueue 28 130#define FC_ClrLineIrq 29 131#define FC_HWFlowCtl 30 132#define FC_GetClockRate 35 133#define FC_SetBaud 36 134#define FC_SetDataMode 41 135#define FC_GetCCSR 43 136#define FC_GetDataError 45 137#define FC_RxControl 50 138#define FC_ImmSend 51 139#define FC_SetXonState 52 140#define FC_SetXoffState 53 141#define FC_SetRxFIFOTrig 54 142#define FC_SetTxFIFOCnt 55 143#define FC_UnixRate 56 144#define FC_UnixResetTimer 57 145 146#define RxFIFOTrig1 0 147#define RxFIFOTrig4 1 148#define RxFIFOTrig8 2 149#define RxFIFOTrig14 3 150 151/* 152 * Dual-Ported RAM 153 */ 154#define DRAM_global 0 155#define INT_data (DRAM_global + 0) 156#define Config_base (DRAM_global + 0x108) 157 158#define IRQindex (INT_data + 0) 159#define IRQpending (INT_data + 4) 160#define IRQtable (INT_data + 8) 161 162/* 163 * Interrupt Status 164 */ 165#define IntrRx 0x01 /* receiver data O.K. */ 166#define IntrTx 0x02 /* transmit buffer empty */ 167#define IntrFunc 0x04 /* function complete */ 168#define IntrBreak 0x08 /* received break */ 169#define IntrLine 0x10 /* line status change 170 for transmitter */ 171#define IntrIntr 0x20 /* received INTR code */ 172#define IntrQuit 0x40 /* received QUIT code */ 173#define IntrEOF 0x80 /* received EOF code */ 174 175#define IntrRxTrigger 0x100 /* rx data count reach trigger value */ 176#define IntrTxTrigger 0x200 /* tx data count below trigger value */ 177 178#define Magic_no (Config_base + 0) 179#define Card_model_no (Config_base + 2) 180#define Total_ports (Config_base + 4) 181#define Module_cnt (Config_base + 8) 182#define Module_no (Config_base + 10) 183#define Timer_10ms (Config_base + 14) 184#define Disable_IRQ (Config_base + 20) 185#define TMS320_PORT1 (Config_base + 22) 186#define TMS320_PORT2 (Config_base + 24) 187#define TMS320_CLOCK (Config_base + 26) 188 189/* 190 * DATA BUFFER in DRAM 191 */ 192#define Extern_table 0x400 /* Base address of the external table 193 (24 words * 64) total 3K bytes 194 (24 words * 128) total 6K bytes */ 195#define Extern_size 0x60 /* 96 bytes */ 196#define RXrptr 0x00 /* read pointer for RX buffer */ 197#define RXwptr 0x02 /* write pointer for RX buffer */ 198#define TXrptr 0x04 /* read pointer for TX buffer */ 199#define TXwptr 0x06 /* write pointer for TX buffer */ 200#define HostStat 0x08 /* IRQ flag and general flag */ 201#define FlagStat 0x0A 202#define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */ 203 /* x x x x | | | | */ 204 /* | | | + CTS flow */ 205 /* | | +--- RTS flow */ 206 /* | +------ TX Xon/Xoff */ 207 /* +--------- RX Xon/Xoff */ 208#define Break_cnt 0x0E /* received break count */ 209#define CD180TXirq 0x10 /* if non-0: enable TX irq */ 210#define RX_mask 0x12 211#define TX_mask 0x14 212#define Ofs_rxb 0x16 213#define Ofs_txb 0x18 214#define Page_rxb 0x1A 215#define Page_txb 0x1C 216#define EndPage_rxb 0x1E 217#define EndPage_txb 0x20 218#define Data_error 0x22 219#define RxTrigger 0x28 220#define TxTrigger 0x2a 221 222#define rRXwptr 0x34 223#define Low_water 0x36 224 225#define FuncCode 0x40 226#define FuncArg 0x42 227#define FuncArg1 0x44 228 229#define C218rx_size 0x2000 /* 8K bytes */ 230#define C218tx_size 0x8000 /* 32K bytes */ 231 232#define C218rx_mask (C218rx_size - 1) 233#define C218tx_mask (C218tx_size - 1) 234 235#define C320p8rx_size 0x2000 236#define C320p8tx_size 0x8000 237#define C320p8rx_mask (C320p8rx_size - 1) 238#define C320p8tx_mask (C320p8tx_size - 1) 239 240#define C320p16rx_size 0x2000 241#define C320p16tx_size 0x4000 242#define C320p16rx_mask (C320p16rx_size - 1) 243#define C320p16tx_mask (C320p16tx_size - 1) 244 245#define C320p24rx_size 0x2000 246#define C320p24tx_size 0x2000 247#define C320p24rx_mask (C320p24rx_size - 1) 248#define C320p24tx_mask (C320p24tx_size - 1) 249 250#define C320p32rx_size 0x1000 251#define C320p32tx_size 0x1000 252#define C320p32rx_mask (C320p32rx_size - 1) 253#define C320p32tx_mask (C320p32tx_size - 1) 254 255#define Page_size 0x2000U 256#define Page_mask (Page_size - 1) 257#define C218rx_spage 3 258#define C218tx_spage 4 259#define C218rx_pageno 1 260#define C218tx_pageno 4 261#define C218buf_pageno 5 262 263#define C320p8rx_spage 3 264#define C320p8tx_spage 4 265#define C320p8rx_pgno 1 266#define C320p8tx_pgno 4 267#define C320p8buf_pgno 5 268 269#define C320p16rx_spage 3 270#define C320p16tx_spage 4 271#define C320p16rx_pgno 1 272#define C320p16tx_pgno 2 273#define C320p16buf_pgno 3 274 275#define C320p24rx_spage 3 276#define C320p24tx_spage 4 277#define C320p24rx_pgno 1 278#define C320p24tx_pgno 1 279#define C320p24buf_pgno 2 280 281#define C320p32rx_spage 3 282#define C320p32tx_ofs C320p32rx_size 283#define C320p32tx_spage 3 284#define C320p32buf_pgno 1 285 286/* 287 * Host Status 288 */ 289#define WakeupRx 0x01 290#define WakeupTx 0x02 291#define WakeupBreak 0x08 292#define WakeupLine 0x10 293#define WakeupIntr 0x20 294#define WakeupQuit 0x40 295#define WakeupEOF 0x80 /* used in VTIME control */ 296#define WakeupRxTrigger 0x100 297#define WakeupTxTrigger 0x200 298/* 299 * Flag status 300 */ 301#define Rx_over 0x01 302#define Xoff_state 0x02 303#define Tx_flowOff 0x04 304#define Tx_enable 0x08 305#define CTS_state 0x10 306#define DSR_state 0x20 307#define DCD_state 0x80 308/* 309 * FlowControl 310 */ 311#define CTS_FlowCtl 1 312#define RTS_FlowCtl 2 313#define Tx_FlowCtl 4 314#define Rx_FlowCtl 8 315#define IXM_IXANY 0x10 316 317#define LowWater 128 318 319#define DTR_ON 1 320#define RTS_ON 2 321#define CTS_ON 1 322#define DSR_ON 2 323#define DCD_ON 8 324 325/* mode definition */ 326#define MX_CS8 0x03 327#define MX_CS7 0x02 328#define MX_CS6 0x01 329#define MX_CS5 0x00 330 331#define MX_STOP1 0x00 332#define MX_STOP15 0x04 333#define MX_STOP2 0x08 334 335#define MX_PARNONE 0x00 336#define MX_PAREVEN 0x40 337#define MX_PARODD 0xC0 338#define MX_PARMARK 0xA0 339#define MX_PARSPACE 0x20 340 341#define MOXA_FW_HDRLEN 32 342 343#define MOXAMAJOR 172 344 345#define MAX_BOARDS 4 /* Don't change this value */ 346#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */ 347#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD) 348 349#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_PCI) 350 351enum { 352 MOXA_BOARD_C218_PCI = 1, 353 MOXA_BOARD_C320_PCI, 354 MOXA_BOARD_CP204J, 355}; 356 357static char *moxa_brdname[] = 358{ 359 "C218 Turbo PCI series", 360 "C320 Turbo PCI series", 361 "CP-204J series", 362}; 363 364static const struct pci_device_id moxa_pcibrds[] = { 365 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218), 366 .driver_data = MOXA_BOARD_C218_PCI }, 367 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320), 368 .driver_data = MOXA_BOARD_C320_PCI }, 369 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J), 370 .driver_data = MOXA_BOARD_CP204J }, 371 { 0 } 372}; 373MODULE_DEVICE_TABLE(pci, moxa_pcibrds); 374 375struct moxa_port; 376 377static struct moxa_board_conf { 378 int boardType; 379 int numPorts; 380 381 unsigned int ready; 382 383 struct moxa_port *ports; 384 385 void __iomem *basemem; 386 void __iomem *intNdx; 387 void __iomem *intPend; 388 void __iomem *intTable; 389} moxa_boards[MAX_BOARDS]; 390 391struct moxa_port { 392 struct tty_port port; 393 struct moxa_board_conf *board; 394 void __iomem *tableAddr; 395 396 int type; 397 int cflag; 398 unsigned long statusflags; 399 400 u8 DCDState; /* Protected by the port lock */ 401 u8 lineCtrl; 402 u8 lowChkFlag; 403}; 404 405/* statusflags */ 406#define TXSTOPPED 1 407#define LOWWAIT 2 408#define EMPTYWAIT 3 409 410 411#define WAKEUP_CHARS 256 412 413static int ttymajor = MOXAMAJOR; 414static unsigned int moxaFuncTout = HZ / 2; 415static unsigned int moxaLowWaterChk; 416static DEFINE_MUTEX(moxa_openlock); 417static DEFINE_SPINLOCK(moxa_lock); 418 419MODULE_AUTHOR("William Chen"); 420MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver"); 421MODULE_LICENSE("GPL"); 422MODULE_FIRMWARE("c218tunx.cod"); 423MODULE_FIRMWARE("cp204unx.cod"); 424MODULE_FIRMWARE("c320tunx.cod"); 425 426module_param(ttymajor, int, 0); 427 428/* 429 * static functions: 430 */ 431static int moxa_open(struct tty_struct *, struct file *); 432static void moxa_close(struct tty_struct *, struct file *); 433static ssize_t moxa_write(struct tty_struct *, const u8 *, size_t); 434static unsigned int moxa_write_room(struct tty_struct *); 435static void moxa_flush_buffer(struct tty_struct *); 436static unsigned int moxa_chars_in_buffer(struct tty_struct *); 437static void moxa_set_termios(struct tty_struct *, const struct ktermios *); 438static void moxa_stop(struct tty_struct *); 439static void moxa_start(struct tty_struct *); 440static void moxa_hangup(struct tty_struct *); 441static int moxa_tiocmget(struct tty_struct *tty); 442static int moxa_tiocmset(struct tty_struct *tty, 443 unsigned int set, unsigned int clear); 444static void moxa_poll(struct timer_list *); 445static void moxa_set_tty_param(struct tty_struct *, const struct ktermios *); 446static void moxa_shutdown(struct tty_port *); 447static bool moxa_carrier_raised(struct tty_port *); 448static void moxa_dtr_rts(struct tty_port *, bool); 449/* 450 * moxa board interface functions: 451 */ 452static void MoxaPortEnable(struct moxa_port *); 453static void MoxaPortDisable(struct moxa_port *); 454static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t); 455static int MoxaPortGetLineOut(struct moxa_port *, bool *, bool *); 456static void MoxaPortLineCtrl(struct moxa_port *, bool, bool); 457static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int); 458static int MoxaPortLineStatus(struct moxa_port *); 459static void MoxaPortFlushData(struct moxa_port *, int); 460static ssize_t MoxaPortWriteData(struct tty_struct *, const u8 *, size_t); 461static int MoxaPortReadData(struct moxa_port *); 462static unsigned int MoxaPortTxQueue(struct moxa_port *); 463static int MoxaPortRxQueue(struct moxa_port *); 464static unsigned int MoxaPortTxFree(struct moxa_port *); 465static void MoxaPortTxDisable(struct moxa_port *); 466static void MoxaPortTxEnable(struct moxa_port *); 467static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *); 468static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *); 469static void MoxaSetFifo(struct moxa_port *port, int enable); 470 471/* 472 * I/O functions 473 */ 474 475static DEFINE_SPINLOCK(moxafunc_lock); 476 477static void moxa_wait_finish(void __iomem *ofsAddr) 478{ 479 unsigned long end = jiffies + moxaFuncTout; 480 481 while (readw(ofsAddr + FuncCode) != 0) 482 if (time_after(jiffies, end)) 483 return; 484 if (readw(ofsAddr + FuncCode) != 0) 485 printk_ratelimited(KERN_WARNING "moxa function expired\n"); 486} 487 488static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg) 489{ 490 guard(spinlock_irqsave)(&moxafunc_lock); 491 writew(arg, ofsAddr + FuncArg); 492 writew(cmd, ofsAddr + FuncCode); 493 moxa_wait_finish(ofsAddr); 494} 495 496static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg) 497{ 498 guard(spinlock_irqsave)(&moxafunc_lock); 499 writew(arg, ofsAddr + FuncArg); 500 writew(cmd, ofsAddr + FuncCode); 501 moxa_wait_finish(ofsAddr); 502 503 return readw(ofsAddr + FuncArg); 504} 505 506static void moxa_low_water_check(void __iomem *ofsAddr) 507{ 508 u16 rptr, wptr, mask, len; 509 510 if (readb(ofsAddr + FlagStat) & Xoff_state) { 511 rptr = readw(ofsAddr + RXrptr); 512 wptr = readw(ofsAddr + RXwptr); 513 mask = readw(ofsAddr + RX_mask); 514 len = (wptr - rptr) & mask; 515 if (len <= Low_water) 516 moxafunc(ofsAddr, FC_SendXon, 0); 517 } 518} 519 520/* 521 * TTY operations 522 */ 523 524static int moxa_break_ctl(struct tty_struct *tty, int state) 525{ 526 struct moxa_port *port = tty->driver_data; 527 528 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak, 529 Magic_code); 530 return 0; 531} 532 533static const struct tty_operations moxa_ops = { 534 .open = moxa_open, 535 .close = moxa_close, 536 .write = moxa_write, 537 .write_room = moxa_write_room, 538 .flush_buffer = moxa_flush_buffer, 539 .chars_in_buffer = moxa_chars_in_buffer, 540 .set_termios = moxa_set_termios, 541 .stop = moxa_stop, 542 .start = moxa_start, 543 .hangup = moxa_hangup, 544 .break_ctl = moxa_break_ctl, 545 .tiocmget = moxa_tiocmget, 546 .tiocmset = moxa_tiocmset, 547 .set_serial = moxa_set_serial_info, 548 .get_serial = moxa_get_serial_info, 549}; 550 551static const struct tty_port_operations moxa_port_ops = { 552 .carrier_raised = moxa_carrier_raised, 553 .dtr_rts = moxa_dtr_rts, 554 .shutdown = moxa_shutdown, 555}; 556 557static struct tty_driver *moxaDriver; 558static DEFINE_TIMER(moxaTimer, moxa_poll); 559 560/* 561 * HW init 562 */ 563 564static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model) 565{ 566 switch (brd->boardType) { 567 case MOXA_BOARD_C218_PCI: 568 if (model != 1) 569 goto err; 570 break; 571 case MOXA_BOARD_CP204J: 572 if (model != 3) 573 goto err; 574 break; 575 default: 576 if (model != 2) 577 goto err; 578 break; 579 } 580 return 0; 581err: 582 return -EINVAL; 583} 584 585static int moxa_check_fw(const void *ptr) 586{ 587 const __le16 *lptr = ptr; 588 589 if (*lptr != cpu_to_le16(0x7980)) 590 return -EINVAL; 591 592 return 0; 593} 594 595static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf, 596 size_t len) 597{ 598 void __iomem *baseAddr = brd->basemem; 599 u16 tmp; 600 601 writeb(HW_reset, baseAddr + Control_reg); /* reset */ 602 msleep(10); 603 memset_io(baseAddr, 0, 4096); 604 memcpy_toio(baseAddr, buf, len); /* download BIOS */ 605 writeb(0, baseAddr + Control_reg); /* restart */ 606 607 msleep(2000); 608 609 switch (brd->boardType) { 610 case MOXA_BOARD_C218_PCI: 611 tmp = readw(baseAddr + C218_key); 612 if (tmp != C218_KeyCode) 613 goto err; 614 break; 615 case MOXA_BOARD_CP204J: 616 tmp = readw(baseAddr + C218_key); 617 if (tmp != CP204J_KeyCode) 618 goto err; 619 break; 620 default: 621 tmp = readw(baseAddr + C320_key); 622 if (tmp != C320_KeyCode) 623 goto err; 624 tmp = readw(baseAddr + C320_status); 625 if (tmp != STS_init) { 626 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic " 627 "module not found\n"); 628 return -EIO; 629 } 630 break; 631 } 632 633 return 0; 634err: 635 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n"); 636 return -EIO; 637} 638 639static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr, 640 size_t len) 641{ 642 void __iomem *baseAddr = brd->basemem; 643 644 if (len < 7168) { 645 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n"); 646 return -EINVAL; 647 } 648 649 writew(len - 7168 - 2, baseAddr + C320bapi_len); 650 writeb(1, baseAddr + Control_reg); /* Select Page 1 */ 651 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168); 652 writeb(2, baseAddr + Control_reg); /* Select Page 2 */ 653 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168); 654 655 return 0; 656} 657 658static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr, 659 size_t len) 660{ 661 void __iomem *baseAddr = brd->basemem; 662 const __le16 *uptr = ptr; 663 size_t wlen, len2, j; 664 unsigned long key, loadbuf, loadlen, checksum, checksum_ok; 665 unsigned int i, retry; 666 u16 usum, keycode; 667 668 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode : 669 C218_KeyCode; 670 671 switch (brd->boardType) { 672 case MOXA_BOARD_CP204J: 673 case MOXA_BOARD_C218_PCI: 674 key = C218_key; 675 loadbuf = C218_LoadBuf; 676 loadlen = C218DLoad_len; 677 checksum = C218check_sum; 678 checksum_ok = C218chksum_ok; 679 break; 680 default: 681 key = C320_key; 682 keycode = C320_KeyCode; 683 loadbuf = C320_LoadBuf; 684 loadlen = C320DLoad_len; 685 checksum = C320check_sum; 686 checksum_ok = C320chksum_ok; 687 break; 688 } 689 690 usum = 0; 691 wlen = len >> 1; 692 for (i = 0; i < wlen; i++) 693 usum += le16_to_cpu(uptr[i]); 694 retry = 0; 695 do { 696 wlen = len >> 1; 697 j = 0; 698 while (wlen) { 699 len2 = (wlen > 2048) ? 2048 : wlen; 700 wlen -= len2; 701 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1); 702 j += len2 << 1; 703 704 writew(len2, baseAddr + loadlen); 705 writew(0, baseAddr + key); 706 for (i = 0; i < 100; i++) { 707 if (readw(baseAddr + key) == keycode) 708 break; 709 msleep(10); 710 } 711 if (readw(baseAddr + key) != keycode) 712 return -EIO; 713 } 714 writew(0, baseAddr + loadlen); 715 writew(usum, baseAddr + checksum); 716 writew(0, baseAddr + key); 717 for (i = 0; i < 100; i++) { 718 if (readw(baseAddr + key) == keycode) 719 break; 720 msleep(10); 721 } 722 retry++; 723 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3)); 724 if (readb(baseAddr + checksum_ok) != 1) 725 return -EIO; 726 727 writew(0, baseAddr + key); 728 for (i = 0; i < 600; i++) { 729 if (readw(baseAddr + Magic_no) == Magic_code) 730 break; 731 msleep(10); 732 } 733 if (readw(baseAddr + Magic_no) != Magic_code) 734 return -EIO; 735 736 if (MOXA_IS_320(brd)) { 737 writew(0x3800, baseAddr + TMS320_PORT1); 738 writew(0x3900, baseAddr + TMS320_PORT2); 739 writew(28499, baseAddr + TMS320_CLOCK); 740 } 741 writew(1, baseAddr + Disable_IRQ); 742 writew(0, baseAddr + Magic_no); 743 for (i = 0; i < 500; i++) { 744 if (readw(baseAddr + Magic_no) == Magic_code) 745 break; 746 msleep(10); 747 } 748 if (readw(baseAddr + Magic_no) != Magic_code) 749 return -EIO; 750 751 if (MOXA_IS_320(brd)) { 752 j = readw(baseAddr + Module_cnt); 753 if (j <= 0) 754 return -EIO; 755 brd->numPorts = j * 8; 756 writew(j, baseAddr + Module_no); 757 writew(0, baseAddr + Magic_no); 758 for (i = 0; i < 600; i++) { 759 if (readw(baseAddr + Magic_no) == Magic_code) 760 break; 761 msleep(10); 762 } 763 if (readw(baseAddr + Magic_no) != Magic_code) 764 return -EIO; 765 } 766 brd->intNdx = baseAddr + IRQindex; 767 brd->intPend = baseAddr + IRQpending; 768 brd->intTable = baseAddr + IRQtable; 769 770 return 0; 771} 772 773static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr, 774 size_t len) 775{ 776 void __iomem *ofsAddr, *baseAddr = brd->basemem; 777 struct moxa_port *port; 778 int retval, i; 779 780 if (len % 2) { 781 printk(KERN_ERR "MOXA: bios length is not even\n"); 782 return -EINVAL; 783 } 784 785 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */ 786 if (retval) 787 return retval; 788 789 switch (brd->boardType) { 790 case MOXA_BOARD_C218_PCI: 791 case MOXA_BOARD_CP204J: 792 port = brd->ports; 793 for (i = 0; i < brd->numPorts; i++, port++) { 794 port->board = brd; 795 port->DCDState = 0; 796 port->tableAddr = baseAddr + Extern_table + 797 Extern_size * i; 798 ofsAddr = port->tableAddr; 799 writew(C218rx_mask, ofsAddr + RX_mask); 800 writew(C218tx_mask, ofsAddr + TX_mask); 801 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb); 802 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb); 803 804 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb); 805 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb); 806 807 } 808 break; 809 default: 810 port = brd->ports; 811 for (i = 0; i < brd->numPorts; i++, port++) { 812 port->board = brd; 813 port->DCDState = 0; 814 port->tableAddr = baseAddr + Extern_table + 815 Extern_size * i; 816 ofsAddr = port->tableAddr; 817 switch (brd->numPorts) { 818 case 8: 819 writew(C320p8rx_mask, ofsAddr + RX_mask); 820 writew(C320p8tx_mask, ofsAddr + TX_mask); 821 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb); 822 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb); 823 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb); 824 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb); 825 826 break; 827 case 16: 828 writew(C320p16rx_mask, ofsAddr + RX_mask); 829 writew(C320p16tx_mask, ofsAddr + TX_mask); 830 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb); 831 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb); 832 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb); 833 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb); 834 break; 835 836 case 24: 837 writew(C320p24rx_mask, ofsAddr + RX_mask); 838 writew(C320p24tx_mask, ofsAddr + TX_mask); 839 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb); 840 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb); 841 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb); 842 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb); 843 break; 844 case 32: 845 writew(C320p32rx_mask, ofsAddr + RX_mask); 846 writew(C320p32tx_mask, ofsAddr + TX_mask); 847 writew(C320p32tx_ofs, ofsAddr + Ofs_txb); 848 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb); 849 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb); 850 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb); 851 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb); 852 break; 853 } 854 } 855 break; 856 } 857 return 0; 858} 859 860static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw) 861{ 862 const void *ptr = fw->data; 863 char rsn[64]; 864 u16 lens[5]; 865 size_t len; 866 unsigned int a, lenp, lencnt; 867 int ret = -EINVAL; 868 struct { 869 __le32 magic; /* 0x34303430 */ 870 u8 reserved1[2]; 871 u8 type; /* UNIX = 3 */ 872 u8 model; /* C218T=1, C320T=2, CP204=3 */ 873 u8 reserved2[8]; 874 __le16 len[5]; 875 } const *hdr = ptr; 876 877 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens)); 878 879 if (fw->size < MOXA_FW_HDRLEN) { 880 strcpy(rsn, "too short (even header won't fit)"); 881 goto err; 882 } 883 if (hdr->magic != cpu_to_le32(0x30343034)) { 884 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic)); 885 goto err; 886 } 887 if (hdr->type != 3) { 888 sprintf(rsn, "not for linux, type is %u", hdr->type); 889 goto err; 890 } 891 if (moxa_check_fw_model(brd, hdr->model)) { 892 sprintf(rsn, "not for this card, model is %u", hdr->model); 893 goto err; 894 } 895 896 len = MOXA_FW_HDRLEN; 897 lencnt = hdr->model == 2 ? 5 : 3; 898 for (a = 0; a < ARRAY_SIZE(lens); a++) { 899 lens[a] = le16_to_cpu(hdr->len[a]); 900 if (lens[a] && len + lens[a] <= fw->size && 901 moxa_check_fw(&fw->data[len])) 902 printk(KERN_WARNING "MOXA firmware: unexpected input " 903 "at offset %u, but going on\n", (u32)len); 904 if (!lens[a] && a < lencnt) { 905 sprintf(rsn, "too few entries in fw file"); 906 goto err; 907 } 908 len += lens[a]; 909 } 910 911 if (len != fw->size) { 912 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size, 913 (u32)len); 914 goto err; 915 } 916 917 ptr += MOXA_FW_HDRLEN; 918 lenp = 0; /* bios */ 919 920 strcpy(rsn, "read above"); 921 922 ret = moxa_load_bios(brd, ptr, lens[lenp]); 923 if (ret) 924 goto err; 925 926 /* we skip the tty section (lens[1]), since we don't need it */ 927 ptr += lens[lenp] + lens[lenp + 1]; 928 lenp += 2; /* comm */ 929 930 if (hdr->model == 2) { 931 ret = moxa_load_320b(brd, ptr, lens[lenp]); 932 if (ret) 933 goto err; 934 /* skip another tty */ 935 ptr += lens[lenp] + lens[lenp + 1]; 936 lenp += 2; 937 } 938 939 ret = moxa_load_code(brd, ptr, lens[lenp]); 940 if (ret) 941 goto err; 942 943 return 0; 944err: 945 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn); 946 return ret; 947} 948 949static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev) 950{ 951 const struct firmware *fw; 952 const char *file; 953 struct moxa_port *p; 954 unsigned int i, first_idx; 955 int ret; 956 957 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports), 958 GFP_KERNEL); 959 if (brd->ports == NULL) { 960 printk(KERN_ERR "cannot allocate memory for ports\n"); 961 ret = -ENOMEM; 962 goto err; 963 } 964 965 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) { 966 tty_port_init(&p->port); 967 p->port.ops = &moxa_port_ops; 968 p->type = PORT_16550A; 969 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL; 970 } 971 972 switch (brd->boardType) { 973 case MOXA_BOARD_C218_PCI: 974 file = "c218tunx.cod"; 975 break; 976 case MOXA_BOARD_CP204J: 977 file = "cp204unx.cod"; 978 break; 979 default: 980 file = "c320tunx.cod"; 981 break; 982 } 983 984 ret = request_firmware(&fw, file, dev); 985 if (ret) { 986 printk(KERN_ERR "MOXA: request_firmware failed. Make sure " 987 "you've placed '%s' file into your firmware " 988 "loader directory (e.g. /lib/firmware)\n", 989 file); 990 goto err_free; 991 } 992 993 ret = moxa_load_fw(brd, fw); 994 995 release_firmware(fw); 996 997 if (ret) 998 goto err_free; 999 1000 scoped_guard(spinlock_bh, &moxa_lock) { 1001 brd->ready = 1; 1002 if (!timer_pending(&moxaTimer)) 1003 mod_timer(&moxaTimer, jiffies + HZ / 50); 1004 } 1005 1006 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD; 1007 for (i = 0; i < brd->numPorts; i++) 1008 tty_port_register_device(&brd->ports[i].port, moxaDriver, 1009 first_idx + i, dev); 1010 1011 return 0; 1012err_free: 1013 for (i = 0; i < MAX_PORTS_PER_BOARD; i++) 1014 tty_port_destroy(&brd->ports[i].port); 1015 kfree(brd->ports); 1016err: 1017 return ret; 1018} 1019 1020static void moxa_board_deinit(struct moxa_board_conf *brd) 1021{ 1022 unsigned int a, opened, first_idx; 1023 1024 scoped_guard(mutex, &moxa_openlock) { 1025 scoped_guard(spinlock_bh, &moxa_lock) 1026 brd->ready = 0; 1027 1028 /* pci hot-un-plug support */ 1029 for (a = 0; a < brd->numPorts; a++) 1030 if (tty_port_initialized(&brd->ports[a].port)) 1031 tty_port_tty_hangup(&brd->ports[a].port, false); 1032 1033 for (a = 0; a < MAX_PORTS_PER_BOARD; a++) 1034 tty_port_destroy(&brd->ports[a].port); 1035 1036 while (1) { 1037 opened = 0; 1038 for (a = 0; a < brd->numPorts; a++) 1039 if (tty_port_initialized(&brd->ports[a].port)) 1040 opened++; 1041 if (!opened) 1042 break; 1043 mutex_unlock(&moxa_openlock); 1044 msleep(50); 1045 mutex_lock(&moxa_openlock); 1046 } 1047 } 1048 1049 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD; 1050 for (a = 0; a < brd->numPorts; a++) 1051 tty_unregister_device(moxaDriver, first_idx + a); 1052 1053 iounmap(brd->basemem); 1054 brd->basemem = NULL; 1055 kfree(brd->ports); 1056} 1057 1058static int moxa_pci_probe(struct pci_dev *pdev, 1059 const struct pci_device_id *ent) 1060{ 1061 struct moxa_board_conf *board; 1062 unsigned int i; 1063 int board_type = ent->driver_data; 1064 int retval; 1065 1066 retval = pci_enable_device(pdev); 1067 if (retval) { 1068 dev_err(&pdev->dev, "can't enable pci device\n"); 1069 goto err; 1070 } 1071 1072 for (i = 0; i < MAX_BOARDS; i++) 1073 if (moxa_boards[i].basemem == NULL) 1074 break; 1075 1076 retval = -ENODEV; 1077 if (i >= MAX_BOARDS) { 1078 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards " 1079 "found. Board is ignored.\n", MAX_BOARDS); 1080 goto err; 1081 } 1082 1083 board = &moxa_boards[i]; 1084 1085 retval = pci_request_region(pdev, 2, "moxa-base"); 1086 if (retval) { 1087 dev_err(&pdev->dev, "can't request pci region 2\n"); 1088 goto err; 1089 } 1090 1091 board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000); 1092 if (board->basemem == NULL) { 1093 dev_err(&pdev->dev, "can't remap io space 2\n"); 1094 retval = -ENOMEM; 1095 goto err_reg; 1096 } 1097 1098 board->boardType = board_type; 1099 switch (board_type) { 1100 case MOXA_BOARD_C218_PCI: 1101 board->numPorts = 8; 1102 break; 1103 1104 case MOXA_BOARD_CP204J: 1105 board->numPorts = 4; 1106 break; 1107 default: 1108 board->numPorts = 0; 1109 break; 1110 } 1111 1112 retval = moxa_init_board(board, &pdev->dev); 1113 if (retval) 1114 goto err_base; 1115 1116 pci_set_drvdata(pdev, board); 1117 1118 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n", 1119 moxa_brdname[board_type - 1], board->numPorts); 1120 1121 return 0; 1122err_base: 1123 iounmap(board->basemem); 1124 board->basemem = NULL; 1125err_reg: 1126 pci_release_region(pdev, 2); 1127err: 1128 return retval; 1129} 1130 1131static void moxa_pci_remove(struct pci_dev *pdev) 1132{ 1133 struct moxa_board_conf *brd = pci_get_drvdata(pdev); 1134 1135 moxa_board_deinit(brd); 1136 1137 pci_release_region(pdev, 2); 1138} 1139 1140static struct pci_driver moxa_pci_driver = { 1141 .name = "moxa", 1142 .id_table = moxa_pcibrds, 1143 .probe = moxa_pci_probe, 1144 .remove = moxa_pci_remove 1145}; 1146 1147static int __init moxa_init(void) 1148{ 1149 int retval = 0; 1150 1151 moxaDriver = tty_alloc_driver(MAX_PORTS, 1152 TTY_DRIVER_REAL_RAW | 1153 TTY_DRIVER_DYNAMIC_DEV); 1154 if (IS_ERR(moxaDriver)) 1155 return PTR_ERR(moxaDriver); 1156 1157 moxaDriver->name = "ttyMX"; 1158 moxaDriver->major = ttymajor; 1159 moxaDriver->minor_start = 0; 1160 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL; 1161 moxaDriver->subtype = SERIAL_TYPE_NORMAL; 1162 moxaDriver->init_termios = tty_std_termios; 1163 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL; 1164 moxaDriver->init_termios.c_ispeed = 9600; 1165 moxaDriver->init_termios.c_ospeed = 9600; 1166 tty_set_operations(moxaDriver, &moxa_ops); 1167 1168 if (tty_register_driver(moxaDriver)) { 1169 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n"); 1170 tty_driver_kref_put(moxaDriver); 1171 return -1; 1172 } 1173 1174 retval = pci_register_driver(&moxa_pci_driver); 1175 if (retval) 1176 printk(KERN_ERR "Can't register MOXA pci driver!\n"); 1177 1178 return retval; 1179} 1180 1181static void __exit moxa_exit(void) 1182{ 1183 pci_unregister_driver(&moxa_pci_driver); 1184 1185 timer_delete_sync(&moxaTimer); 1186 1187 tty_unregister_driver(moxaDriver); 1188 tty_driver_kref_put(moxaDriver); 1189} 1190 1191module_init(moxa_init); 1192module_exit(moxa_exit); 1193 1194static void moxa_shutdown(struct tty_port *port) 1195{ 1196 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1197 MoxaPortDisable(ch); 1198 MoxaPortFlushData(ch, 2); 1199} 1200 1201static bool moxa_carrier_raised(struct tty_port *port) 1202{ 1203 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1204 1205 guard(spinlock_irq)(&port->lock); 1206 return ch->DCDState; 1207} 1208 1209static void moxa_dtr_rts(struct tty_port *port, bool active) 1210{ 1211 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1212 MoxaPortLineCtrl(ch, active, active); 1213} 1214 1215 1216static int moxa_open(struct tty_struct *tty, struct file *filp) 1217{ 1218 struct moxa_board_conf *brd; 1219 struct moxa_port *ch; 1220 int port = tty->index; 1221 1222 scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &moxa_openlock) { 1223 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD]; 1224 if (!brd->ready) 1225 return -ENODEV; 1226 1227 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) 1228 return -ENODEV; 1229 1230 ch = &brd->ports[port % MAX_PORTS_PER_BOARD]; 1231 ch->port.count++; 1232 tty->driver_data = ch; 1233 tty_port_tty_set(&ch->port, tty); 1234 1235 guard(mutex)(&ch->port.mutex); 1236 if (!tty_port_initialized(&ch->port)) { 1237 ch->statusflags = 0; 1238 moxa_set_tty_param(tty, &tty->termios); 1239 MoxaPortLineCtrl(ch, true, true); 1240 MoxaPortEnable(ch); 1241 MoxaSetFifo(ch, ch->type == PORT_16550A); 1242 tty_port_set_initialized(&ch->port, true); 1243 } 1244 } 1245 1246 return tty_port_block_til_ready(&ch->port, tty, filp); 1247} 1248 1249static void moxa_close(struct tty_struct *tty, struct file *filp) 1250{ 1251 struct moxa_port *ch = tty->driver_data; 1252 ch->cflag = tty->termios.c_cflag; 1253 tty_port_close(&ch->port, tty, filp); 1254} 1255 1256static ssize_t moxa_write(struct tty_struct *tty, const u8 *buf, size_t count) 1257{ 1258 struct moxa_port *ch = tty->driver_data; 1259 int len; 1260 1261 if (ch == NULL) 1262 return 0; 1263 1264 scoped_guard(spinlock_irqsave, &moxa_lock) 1265 len = MoxaPortWriteData(tty, buf, count); 1266 1267 set_bit(LOWWAIT, &ch->statusflags); 1268 return len; 1269} 1270 1271static unsigned int moxa_write_room(struct tty_struct *tty) 1272{ 1273 struct moxa_port *ch; 1274 1275 if (tty->flow.stopped) 1276 return 0; 1277 ch = tty->driver_data; 1278 if (ch == NULL) 1279 return 0; 1280 return MoxaPortTxFree(ch); 1281} 1282 1283static void moxa_flush_buffer(struct tty_struct *tty) 1284{ 1285 struct moxa_port *ch = tty->driver_data; 1286 1287 if (ch == NULL) 1288 return; 1289 MoxaPortFlushData(ch, 1); 1290 tty_wakeup(tty); 1291} 1292 1293static unsigned int moxa_chars_in_buffer(struct tty_struct *tty) 1294{ 1295 struct moxa_port *ch = tty->driver_data; 1296 unsigned int chars; 1297 1298 chars = MoxaPortTxQueue(ch); 1299 if (chars) 1300 /* 1301 * Make it possible to wakeup anything waiting for output 1302 * in tty_ioctl.c, etc. 1303 */ 1304 set_bit(EMPTYWAIT, &ch->statusflags); 1305 return chars; 1306} 1307 1308static int moxa_tiocmget(struct tty_struct *tty) 1309{ 1310 struct moxa_port *ch = tty->driver_data; 1311 bool dtr_active, rts_active; 1312 int flag = 0; 1313 int status; 1314 1315 MoxaPortGetLineOut(ch, &dtr_active, &rts_active); 1316 if (dtr_active) 1317 flag |= TIOCM_DTR; 1318 if (rts_active) 1319 flag |= TIOCM_RTS; 1320 status = MoxaPortLineStatus(ch); 1321 if (status & 1) 1322 flag |= TIOCM_CTS; 1323 if (status & 2) 1324 flag |= TIOCM_DSR; 1325 if (status & 4) 1326 flag |= TIOCM_CD; 1327 return flag; 1328} 1329 1330static int moxa_tiocmset(struct tty_struct *tty, 1331 unsigned int set, unsigned int clear) 1332{ 1333 bool dtr_active, rts_active; 1334 struct moxa_port *ch; 1335 1336 guard(mutex)(&moxa_openlock); 1337 ch = tty->driver_data; 1338 if (!ch) 1339 return -EINVAL; 1340 1341 MoxaPortGetLineOut(ch, &dtr_active, &rts_active); 1342 if (set & TIOCM_RTS) 1343 rts_active = true; 1344 if (set & TIOCM_DTR) 1345 dtr_active = true; 1346 if (clear & TIOCM_RTS) 1347 rts_active = false; 1348 if (clear & TIOCM_DTR) 1349 dtr_active = false; 1350 MoxaPortLineCtrl(ch, dtr_active, rts_active); 1351 1352 return 0; 1353} 1354 1355static void moxa_set_termios(struct tty_struct *tty, 1356 const struct ktermios *old_termios) 1357{ 1358 struct moxa_port *ch = tty->driver_data; 1359 1360 if (ch == NULL) 1361 return; 1362 moxa_set_tty_param(tty, old_termios); 1363 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty)) 1364 wake_up_interruptible(&ch->port.open_wait); 1365} 1366 1367static void moxa_stop(struct tty_struct *tty) 1368{ 1369 struct moxa_port *ch = tty->driver_data; 1370 1371 if (ch == NULL) 1372 return; 1373 MoxaPortTxDisable(ch); 1374 set_bit(TXSTOPPED, &ch->statusflags); 1375} 1376 1377 1378static void moxa_start(struct tty_struct *tty) 1379{ 1380 struct moxa_port *ch = tty->driver_data; 1381 1382 if (ch == NULL) 1383 return; 1384 1385 if (!test_bit(TXSTOPPED, &ch->statusflags)) 1386 return; 1387 1388 MoxaPortTxEnable(ch); 1389 clear_bit(TXSTOPPED, &ch->statusflags); 1390} 1391 1392static void moxa_hangup(struct tty_struct *tty) 1393{ 1394 struct moxa_port *ch = tty->driver_data; 1395 tty_port_hangup(&ch->port); 1396} 1397 1398static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd) 1399{ 1400 dcd = !!dcd; 1401 1402 scoped_guard(spinlock_irqsave, &p->port.lock) { 1403 if (dcd == p->DCDState) 1404 return; 1405 1406 p->DCDState = dcd; 1407 } 1408 1409 if (!dcd) 1410 tty_port_tty_hangup(&p->port, true); 1411} 1412 1413static int moxa_poll_port(struct moxa_port *p, unsigned int handle, 1414 u16 __iomem *ip) 1415{ 1416 struct tty_struct *tty = tty_port_tty_get(&p->port); 1417 bool inited = tty_port_initialized(&p->port); 1418 void __iomem *ofsAddr; 1419 u16 intr; 1420 1421 if (tty) { 1422 if (test_bit(EMPTYWAIT, &p->statusflags) && 1423 MoxaPortTxQueue(p) == 0) { 1424 clear_bit(EMPTYWAIT, &p->statusflags); 1425 tty_wakeup(tty); 1426 } 1427 if (test_bit(LOWWAIT, &p->statusflags) && !tty->flow.stopped && 1428 MoxaPortTxQueue(p) <= WAKEUP_CHARS) { 1429 clear_bit(LOWWAIT, &p->statusflags); 1430 tty_wakeup(tty); 1431 } 1432 1433 if (inited && !tty_throttled(tty) && 1434 MoxaPortRxQueue(p) > 0) { /* RX */ 1435 MoxaPortReadData(p); 1436 tty_flip_buffer_push(&p->port); 1437 } 1438 } else { 1439 clear_bit(EMPTYWAIT, &p->statusflags); 1440 MoxaPortFlushData(p, 0); /* flush RX */ 1441 } 1442 1443 if (!handle) /* nothing else to do */ 1444 goto put; 1445 1446 intr = readw(ip); /* port irq status */ 1447 if (intr == 0) 1448 goto put; 1449 1450 writew(0, ip); /* ACK port */ 1451 ofsAddr = p->tableAddr; 1452 if (intr & IntrTx) /* disable tx intr */ 1453 writew(readw(ofsAddr + HostStat) & ~WakeupTx, 1454 ofsAddr + HostStat); 1455 1456 if (!inited) 1457 goto put; 1458 1459 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */ 1460 tty_insert_flip_char(&p->port, 0, TTY_BREAK); 1461 tty_flip_buffer_push(&p->port); 1462 } 1463 1464 if (intr & IntrLine) 1465 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state); 1466put: 1467 tty_kref_put(tty); 1468 1469 return 0; 1470} 1471 1472static void moxa_poll(struct timer_list *unused) 1473{ 1474 struct moxa_board_conf *brd; 1475 u16 __iomem *ip; 1476 unsigned int card, port, served = 0; 1477 1478 guard(spinlock)(&moxa_lock); 1479 for (card = 0; card < MAX_BOARDS; card++) { 1480 brd = &moxa_boards[card]; 1481 if (!brd->ready) 1482 continue; 1483 1484 served++; 1485 1486 ip = NULL; 1487 if (readb(brd->intPend) == 0xff) 1488 ip = brd->intTable + readb(brd->intNdx); 1489 1490 for (port = 0; port < brd->numPorts; port++) 1491 moxa_poll_port(&brd->ports[port], !!ip, ip + port); 1492 1493 if (ip) 1494 writeb(0, brd->intPend); /* ACK */ 1495 1496 if (moxaLowWaterChk) { 1497 struct moxa_port *p = brd->ports; 1498 for (port = 0; port < brd->numPorts; port++, p++) 1499 if (p->lowChkFlag) { 1500 p->lowChkFlag = 0; 1501 moxa_low_water_check(p->tableAddr); 1502 } 1503 } 1504 } 1505 moxaLowWaterChk = 0; 1506 1507 if (served) 1508 mod_timer(&moxaTimer, jiffies + HZ / 50); 1509} 1510 1511/******************************************************************************/ 1512 1513static void moxa_set_tty_param(struct tty_struct *tty, 1514 const struct ktermios *old_termios) 1515{ 1516 register struct ktermios *ts = &tty->termios; 1517 struct moxa_port *ch = tty->driver_data; 1518 int rts, cts, txflow, rxflow, xany, baud; 1519 1520 rts = cts = txflow = rxflow = xany = 0; 1521 if (ts->c_cflag & CRTSCTS) 1522 rts = cts = 1; 1523 if (ts->c_iflag & IXON) 1524 txflow = 1; 1525 if (ts->c_iflag & IXOFF) 1526 rxflow = 1; 1527 if (ts->c_iflag & IXANY) 1528 xany = 1; 1529 1530 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany); 1531 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty)); 1532 if (baud == -1) 1533 baud = tty_termios_baud_rate(old_termios); 1534 /* Not put the baud rate into the termios data */ 1535 tty_encode_baud_rate(tty, baud, baud); 1536} 1537 1538/***************************************************************************** 1539 * Driver level functions: * 1540 *****************************************************************************/ 1541 1542static void MoxaPortFlushData(struct moxa_port *port, int mode) 1543{ 1544 void __iomem *ofsAddr; 1545 if (mode < 0 || mode > 2) 1546 return; 1547 ofsAddr = port->tableAddr; 1548 moxafunc(ofsAddr, FC_FlushQueue, mode); 1549 if (mode != 1) { 1550 port->lowChkFlag = 0; 1551 moxa_low_water_check(ofsAddr); 1552 } 1553} 1554 1555/* 1556 * Moxa Port Number Description: 1557 * 1558 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And, 1559 * the port number using in MOXA driver functions will be 0 to 31 for 1560 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96 1561 * to 127 for fourth. For example, if you setup three MOXA boards, 1562 * first board is C218, second board is C320-16 and third board is 1563 * C320-32. The port number of first board (C218 - 8 ports) is from 1564 * 0 to 7. The port number of second board (C320 - 16 ports) is form 1565 * 32 to 47. The port number of third board (C320 - 32 ports) is from 1566 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to 1567 * 127 will be invalid. 1568 * 1569 * 1570 * Moxa Functions Description: 1571 * 1572 * Function 1: Driver initialization routine, this routine must be 1573 * called when initialized driver. 1574 * Syntax: 1575 * void MoxaDriverInit(); 1576 * 1577 * 1578 * Function 2: Moxa driver private IOCTL command processing. 1579 * Syntax: 1580 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port); 1581 * 1582 * unsigned int cmd : IOCTL command 1583 * unsigned long arg : IOCTL argument 1584 * int port : port number (0 - 127) 1585 * 1586 * return: 0 (OK) 1587 * -EINVAL 1588 * -ENOIOCTLCMD 1589 * 1590 * 1591 * Function 6: Enable this port to start Tx/Rx data. 1592 * Syntax: 1593 * void MoxaPortEnable(int port); 1594 * int port : port number (0 - 127) 1595 * 1596 * 1597 * Function 7: Disable this port 1598 * Syntax: 1599 * void MoxaPortDisable(int port); 1600 * int port : port number (0 - 127) 1601 * 1602 * 1603 * Function 10: Setting baud rate of this port. 1604 * Syntax: 1605 * speed_t MoxaPortSetBaud(int port, speed_t baud); 1606 * int port : port number (0 - 127) 1607 * long baud : baud rate (50 - 115200) 1608 * 1609 * return: 0 : this port is invalid or baud < 50 1610 * 50 - 115200 : the real baud rate set to the port, if 1611 * the argument baud is large than maximun 1612 * available baud rate, the real setting 1613 * baud rate will be the maximun baud rate. 1614 * 1615 * 1616 * Function 12: Configure the port. 1617 * Syntax: 1618 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud); 1619 * int port : port number (0 - 127) 1620 * struct ktermios * termio : termio structure pointer 1621 * speed_t baud : baud rate 1622 * 1623 * return: -1 : this port is invalid or termio == NULL 1624 * 0 : setting O.K. 1625 * 1626 * 1627 * Function 13: Get the DTR/RTS state of this port. 1628 * Syntax: 1629 * int MoxaPortGetLineOut(int port, bool *dtrState, bool *rtsState); 1630 * int port : port number (0 - 127) 1631 * bool * dtr_active : pointer to bool to receive the current DTR 1632 * state. (if NULL, this function will not 1633 * write to this address) 1634 * bool * rts_active : pointer to bool to receive the current RTS 1635 * state. (if NULL, this function will not 1636 * write to this address) 1637 * 1638 * return: -1 : this port is invalid 1639 * 0 : O.K. 1640 * 1641 * 1642 * Function 14: Setting the DTR/RTS output state of this port. 1643 * Syntax: 1644 * void MoxaPortLineCtrl(int port, bool dtrState, bool rtsState); 1645 * int port : port number (0 - 127) 1646 * bool dtr_active : DTR output state 1647 * bool rts_active : RTS output state 1648 * 1649 * 1650 * Function 15: Setting the flow control of this port. 1651 * Syntax: 1652 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow, 1653 * int txFlow,int xany); 1654 * int port : port number (0 - 127) 1655 * int rtsFlow : H/W RTS flow control (0: no, 1: yes) 1656 * int ctsFlow : H/W CTS flow control (0: no, 1: yes) 1657 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes) 1658 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes) 1659 * int xany : S/W XANY flow control (0: no, 1: yes) 1660 * 1661 * 1662 * Function 16: Get ths line status of this port 1663 * Syntax: 1664 * int MoxaPortLineStatus(int port); 1665 * int port : port number (0 - 127) 1666 * 1667 * return: Bit 0 - CTS state (0: off, 1: on) 1668 * Bit 1 - DSR state (0: off, 1: on) 1669 * Bit 2 - DCD state (0: off, 1: on) 1670 * 1671 * 1672 * Function 19: Flush the Rx/Tx buffer data of this port. 1673 * Syntax: 1674 * void MoxaPortFlushData(int port, int mode); 1675 * int port : port number (0 - 127) 1676 * int mode 1677 * 0 : flush the Rx buffer 1678 * 1 : flush the Tx buffer 1679 * 2 : flush the Rx and Tx buffer 1680 * 1681 * 1682 * Function 20: Write data. 1683 * Syntax: 1684 * ssize_t MoxaPortWriteData(int port, u8 *buffer, size_t length); 1685 * int port : port number (0 - 127) 1686 * u8 *buffer : pointer to write data buffer. 1687 * size_t length : write data length 1688 * 1689 * return: 0 - length : real write data length 1690 * 1691 * 1692 * Function 21: Read data. 1693 * Syntax: 1694 * int MoxaPortReadData(int port, struct tty_struct *tty); 1695 * int port : port number (0 - 127) 1696 * struct tty_struct *tty : tty for data 1697 * 1698 * return: 0 - length : real read data length 1699 * 1700 * 1701 * Function 24: Get the Tx buffer current queued data bytes 1702 * Syntax: 1703 * int MoxaPortTxQueue(int port); 1704 * int port : port number (0 - 127) 1705 * 1706 * return: .. : Tx buffer current queued data bytes 1707 * 1708 * 1709 * Function 25: Get the Tx buffer current free space 1710 * Syntax: 1711 * int MoxaPortTxFree(int port); 1712 * int port : port number (0 - 127) 1713 * 1714 * return: .. : Tx buffer current free space 1715 * 1716 * 1717 * Function 26: Get the Rx buffer current queued data bytes 1718 * Syntax: 1719 * int MoxaPortRxQueue(int port); 1720 * int port : port number (0 - 127) 1721 * 1722 * return: .. : Rx buffer current queued data bytes 1723 * 1724 * 1725 * Function 28: Disable port data transmission. 1726 * Syntax: 1727 * void MoxaPortTxDisable(int port); 1728 * int port : port number (0 - 127) 1729 * 1730 * 1731 * Function 29: Enable port data transmission. 1732 * Syntax: 1733 * void MoxaPortTxEnable(int port); 1734 * int port : port number (0 - 127) 1735 * 1736 * 1737 * Function 31: Get the received BREAK signal count and reset it. 1738 * Syntax: 1739 * int MoxaPortResetBrkCnt(int port); 1740 * int port : port number (0 - 127) 1741 * 1742 * return: 0 - .. : BREAK signal count 1743 * 1744 * 1745 */ 1746 1747static void MoxaPortEnable(struct moxa_port *port) 1748{ 1749 void __iomem *ofsAddr; 1750 u16 lowwater = 512; 1751 1752 ofsAddr = port->tableAddr; 1753 writew(lowwater, ofsAddr + Low_water); 1754 if (MOXA_IS_320(port->board)) 1755 moxafunc(ofsAddr, FC_SetBreakIrq, 0); 1756 else 1757 writew(readw(ofsAddr + HostStat) | WakeupBreak, 1758 ofsAddr + HostStat); 1759 1760 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code); 1761 moxafunc(ofsAddr, FC_FlushQueue, 2); 1762 1763 moxafunc(ofsAddr, FC_EnableCH, Magic_code); 1764 MoxaPortLineStatus(port); 1765} 1766 1767static void MoxaPortDisable(struct moxa_port *port) 1768{ 1769 void __iomem *ofsAddr = port->tableAddr; 1770 1771 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */ 1772 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code); 1773 writew(0, ofsAddr + HostStat); 1774 moxafunc(ofsAddr, FC_DisableCH, Magic_code); 1775} 1776 1777static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud) 1778{ 1779 void __iomem *ofsAddr = port->tableAddr; 1780 unsigned int clock, val; 1781 speed_t max; 1782 1783 max = MOXA_IS_320(port->board) ? 460800 : 921600; 1784 if (baud < 50) 1785 return 0; 1786 if (baud > max) 1787 baud = max; 1788 clock = 921600; 1789 val = clock / baud; 1790 moxafunc(ofsAddr, FC_SetBaud, val); 1791 baud = clock / val; 1792 return baud; 1793} 1794 1795static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio, 1796 speed_t baud) 1797{ 1798 void __iomem *ofsAddr; 1799 tcflag_t mode = 0; 1800 1801 ofsAddr = port->tableAddr; 1802 1803 mode = termio->c_cflag & CSIZE; 1804 if (mode == CS5) 1805 mode = MX_CS5; 1806 else if (mode == CS6) 1807 mode = MX_CS6; 1808 else if (mode == CS7) 1809 mode = MX_CS7; 1810 else if (mode == CS8) 1811 mode = MX_CS8; 1812 1813 if (termio->c_cflag & CSTOPB) { 1814 if (mode == MX_CS5) 1815 mode |= MX_STOP15; 1816 else 1817 mode |= MX_STOP2; 1818 } else 1819 mode |= MX_STOP1; 1820 1821 if (termio->c_cflag & PARENB) { 1822 if (termio->c_cflag & PARODD) { 1823 if (termio->c_cflag & CMSPAR) 1824 mode |= MX_PARMARK; 1825 else 1826 mode |= MX_PARODD; 1827 } else { 1828 if (termio->c_cflag & CMSPAR) 1829 mode |= MX_PARSPACE; 1830 else 1831 mode |= MX_PAREVEN; 1832 } 1833 } else 1834 mode |= MX_PARNONE; 1835 1836 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode); 1837 1838 if (MOXA_IS_320(port->board) && baud >= 921600) 1839 return -1; 1840 1841 baud = MoxaPortSetBaud(port, baud); 1842 1843 if (termio->c_iflag & (IXON | IXOFF | IXANY)) { 1844 guard(spinlock_irq)(&moxafunc_lock); 1845 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg); 1846 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1); 1847 writeb(FC_SetXonXoff, ofsAddr + FuncCode); 1848 moxa_wait_finish(ofsAddr); 1849 } 1850 return baud; 1851} 1852 1853static int MoxaPortGetLineOut(struct moxa_port *port, bool *dtr_active, 1854 bool *rts_active) 1855{ 1856 if (dtr_active) 1857 *dtr_active = port->lineCtrl & DTR_ON; 1858 if (rts_active) 1859 *rts_active = port->lineCtrl & RTS_ON; 1860 1861 return 0; 1862} 1863 1864static void MoxaPortLineCtrl(struct moxa_port *port, bool dtr_active, bool rts_active) 1865{ 1866 u8 mode = 0; 1867 1868 if (dtr_active) 1869 mode |= DTR_ON; 1870 if (rts_active) 1871 mode |= RTS_ON; 1872 port->lineCtrl = mode; 1873 moxafunc(port->tableAddr, FC_LineControl, mode); 1874} 1875 1876static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts, 1877 int txflow, int rxflow, int txany) 1878{ 1879 int mode = 0; 1880 1881 if (rts) 1882 mode |= RTS_FlowCtl; 1883 if (cts) 1884 mode |= CTS_FlowCtl; 1885 if (txflow) 1886 mode |= Tx_FlowCtl; 1887 if (rxflow) 1888 mode |= Rx_FlowCtl; 1889 if (txany) 1890 mode |= IXM_IXANY; 1891 moxafunc(port->tableAddr, FC_SetFlowCtl, mode); 1892} 1893 1894static int MoxaPortLineStatus(struct moxa_port *port) 1895{ 1896 void __iomem *ofsAddr; 1897 int val; 1898 1899 ofsAddr = port->tableAddr; 1900 if (MOXA_IS_320(port->board)) 1901 val = moxafuncret(ofsAddr, FC_LineStatus, 0); 1902 else 1903 val = readw(ofsAddr + FlagStat) >> 4; 1904 val &= 0x0B; 1905 if (val & 8) 1906 val |= 4; 1907 moxa_new_dcdstate(port, val & 8); 1908 val &= 7; 1909 return val; 1910} 1911 1912static ssize_t MoxaPortWriteData(struct tty_struct *tty, const u8 *buffer, 1913 size_t len) 1914{ 1915 struct moxa_port *port = tty->driver_data; 1916 void __iomem *baseAddr, *ofsAddr, *ofs; 1917 size_t c, total; 1918 u16 head, tail, tx_mask, spage, epage; 1919 u16 pageno, pageofs, bufhead; 1920 1921 ofsAddr = port->tableAddr; 1922 baseAddr = port->board->basemem; 1923 tx_mask = readw(ofsAddr + TX_mask); 1924 spage = readw(ofsAddr + Page_txb); 1925 epage = readw(ofsAddr + EndPage_txb); 1926 tail = readw(ofsAddr + TXwptr); 1927 head = readw(ofsAddr + TXrptr); 1928 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask); 1929 if (c > len) 1930 c = len; 1931 total = c; 1932 if (spage == epage) { 1933 bufhead = readw(ofsAddr + Ofs_txb); 1934 writew(spage, baseAddr + Control_reg); 1935 while (c > 0) { 1936 if (head > tail) 1937 len = head - tail - 1; 1938 else 1939 len = tx_mask + 1 - tail; 1940 len = (c > len) ? len : c; 1941 ofs = baseAddr + DynPage_addr + bufhead + tail; 1942 memcpy_toio(ofs, buffer, len); 1943 buffer += len; 1944 tail = (tail + len) & tx_mask; 1945 c -= len; 1946 } 1947 } else { 1948 pageno = spage + (tail >> 13); 1949 pageofs = tail & Page_mask; 1950 while (c > 0) { 1951 len = Page_size - pageofs; 1952 if (len > c) 1953 len = c; 1954 writeb(pageno, baseAddr + Control_reg); 1955 ofs = baseAddr + DynPage_addr + pageofs; 1956 memcpy_toio(ofs, buffer, len); 1957 buffer += len; 1958 if (++pageno == epage) 1959 pageno = spage; 1960 pageofs = 0; 1961 c -= len; 1962 } 1963 tail = (tail + total) & tx_mask; 1964 } 1965 writew(tail, ofsAddr + TXwptr); 1966 writeb(1, ofsAddr + CD180TXirq); /* start to send */ 1967 return total; 1968} 1969 1970static int MoxaPortReadData(struct moxa_port *port) 1971{ 1972 void __iomem *baseAddr, *ofsAddr, *ofs; 1973 u8 *dst; 1974 unsigned int count, len, total; 1975 u16 tail, rx_mask, spage, epage; 1976 u16 pageno, pageofs, bufhead, head; 1977 1978 ofsAddr = port->tableAddr; 1979 baseAddr = port->board->basemem; 1980 head = readw(ofsAddr + RXrptr); 1981 tail = readw(ofsAddr + RXwptr); 1982 rx_mask = readw(ofsAddr + RX_mask); 1983 spage = readw(ofsAddr + Page_rxb); 1984 epage = readw(ofsAddr + EndPage_rxb); 1985 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1); 1986 if (count == 0) 1987 return 0; 1988 1989 total = count; 1990 if (spage == epage) { 1991 bufhead = readw(ofsAddr + Ofs_rxb); 1992 writew(spage, baseAddr + Control_reg); 1993 while (count > 0) { 1994 ofs = baseAddr + DynPage_addr + bufhead + head; 1995 len = (tail >= head) ? (tail - head) : 1996 (rx_mask + 1 - head); 1997 len = tty_prepare_flip_string(&port->port, &dst, 1998 min(len, count)); 1999 memcpy_fromio(dst, ofs, len); 2000 head = (head + len) & rx_mask; 2001 count -= len; 2002 } 2003 } else { 2004 pageno = spage + (head >> 13); 2005 pageofs = head & Page_mask; 2006 while (count > 0) { 2007 writew(pageno, baseAddr + Control_reg); 2008 ofs = baseAddr + DynPage_addr + pageofs; 2009 len = tty_prepare_flip_string(&port->port, &dst, 2010 min(Page_size - pageofs, count)); 2011 memcpy_fromio(dst, ofs, len); 2012 2013 count -= len; 2014 pageofs = (pageofs + len) & Page_mask; 2015 if (pageofs == 0 && ++pageno == epage) 2016 pageno = spage; 2017 } 2018 head = (head + total) & rx_mask; 2019 } 2020 writew(head, ofsAddr + RXrptr); 2021 if (readb(ofsAddr + FlagStat) & Xoff_state) { 2022 moxaLowWaterChk = 1; 2023 port->lowChkFlag = 1; 2024 } 2025 return total; 2026} 2027 2028 2029static unsigned int MoxaPortTxQueue(struct moxa_port *port) 2030{ 2031 void __iomem *ofsAddr = port->tableAddr; 2032 u16 rptr, wptr, mask; 2033 2034 rptr = readw(ofsAddr + TXrptr); 2035 wptr = readw(ofsAddr + TXwptr); 2036 mask = readw(ofsAddr + TX_mask); 2037 return (wptr - rptr) & mask; 2038} 2039 2040static unsigned int MoxaPortTxFree(struct moxa_port *port) 2041{ 2042 void __iomem *ofsAddr = port->tableAddr; 2043 u16 rptr, wptr, mask; 2044 2045 rptr = readw(ofsAddr + TXrptr); 2046 wptr = readw(ofsAddr + TXwptr); 2047 mask = readw(ofsAddr + TX_mask); 2048 return mask - ((wptr - rptr) & mask); 2049} 2050 2051static int MoxaPortRxQueue(struct moxa_port *port) 2052{ 2053 void __iomem *ofsAddr = port->tableAddr; 2054 u16 rptr, wptr, mask; 2055 2056 rptr = readw(ofsAddr + RXrptr); 2057 wptr = readw(ofsAddr + RXwptr); 2058 mask = readw(ofsAddr + RX_mask); 2059 return (wptr - rptr) & mask; 2060} 2061 2062static void MoxaPortTxDisable(struct moxa_port *port) 2063{ 2064 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code); 2065} 2066 2067static void MoxaPortTxEnable(struct moxa_port *port) 2068{ 2069 moxafunc(port->tableAddr, FC_SetXonState, Magic_code); 2070} 2071 2072static int moxa_get_serial_info(struct tty_struct *tty, 2073 struct serial_struct *ss) 2074{ 2075 struct moxa_port *info = tty->driver_data; 2076 2077 if (!info) 2078 return -ENODEV; 2079 guard(mutex)(&info->port.mutex); 2080 ss->type = info->type; 2081 ss->line = info->port.tty->index; 2082 ss->flags = info->port.flags; 2083 ss->baud_base = 921600; 2084 ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10; 2085 2086 return 0; 2087} 2088 2089 2090static int moxa_set_serial_info(struct tty_struct *tty, 2091 struct serial_struct *ss) 2092{ 2093 struct moxa_port *info = tty->driver_data; 2094 unsigned int close_delay; 2095 2096 if (!info) 2097 return -ENODEV; 2098 2099 close_delay = msecs_to_jiffies(ss->close_delay * 10); 2100 2101 guard(mutex)(&info->port.mutex); 2102 if (!capable(CAP_SYS_ADMIN)) { 2103 if (close_delay != info->port.close_delay || 2104 ss->type != info->type || 2105 ((ss->flags & ~ASYNC_USR_MASK) != 2106 (info->port.flags & ~ASYNC_USR_MASK))) { 2107 return -EPERM; 2108 } 2109 } else { 2110 info->port.close_delay = close_delay; 2111 2112 MoxaSetFifo(info, ss->type == PORT_16550A); 2113 2114 info->type = ss->type; 2115 } 2116 2117 return 0; 2118} 2119 2120 2121 2122/***************************************************************************** 2123 * Static local functions: * 2124 *****************************************************************************/ 2125 2126static void MoxaSetFifo(struct moxa_port *port, int enable) 2127{ 2128 void __iomem *ofsAddr = port->tableAddr; 2129 2130 if (!enable) { 2131 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0); 2132 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1); 2133 } else { 2134 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3); 2135 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16); 2136 } 2137}
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