sun8i_thermal.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Thermal sensor driver for Allwinner SOC
  4 * Copyright (C) 2019 Yangtao Li
  5 *
  6 * Based on the work of Icenowy Zheng <icenowy@aosc.io>
  7 * Based on the work of Ondrej Jirman <megous@megous.com>
  8 * Based on the work of Josef Gajdusek <atx@atx.name>
  9 */
 10
 11#include <linux/bitmap.h>
 12#include <linux/cleanup.h>
 13#include <linux/clk.h>
 14#include <linux/device.h>
 15#include <linux/interrupt.h>
 16#include <linux/module.h>
 17#include <linux/nvmem-consumer.h>
 18#include <linux/of.h>
 19#include <linux/of_platform.h>
 20#include <linux/platform_device.h>
 21#include <linux/regmap.h>
 22#include <linux/reset.h>
 23#include <linux/slab.h>
 24#include <linux/thermal.h>
 25
 26#include "thermal_hwmon.h"
 27
 28#define MAX_SENSOR_NUM	4
 29
 30#define FT_TEMP_MASK				GENMASK(11, 0)
 31#define TEMP_CALIB_MASK				GENMASK(11, 0)
 32#define CALIBRATE_DEFAULT			0x800
 33
 34#define SUN8I_THS_CTRL0				0x00
 35#define SUN8I_THS_CTRL2				0x40
 36#define SUN8I_THS_IC				0x44
 37#define SUN8I_THS_IS				0x48
 38#define SUN8I_THS_MFC				0x70
 39#define SUN8I_THS_TEMP_CALIB			0x74
 40#define SUN8I_THS_TEMP_DATA			0x80
 41
 42#define SUN50I_THS_CTRL0			0x00
 43#define SUN50I_H6_THS_ENABLE			0x04
 44#define SUN50I_H6_THS_PC			0x08
 45#define SUN50I_H6_THS_DIC			0x10
 46#define SUN50I_H6_THS_DIS			0x20
 47#define SUN50I_H6_THS_MFC			0x30
 48#define SUN50I_H6_THS_TEMP_CALIB		0xa0
 49#define SUN50I_H6_THS_TEMP_DATA			0xc0
 50
 51#define SUN8I_THS_CTRL0_T_ACQ0(x)		(GENMASK(15, 0) & (x))
 52#define SUN8I_THS_CTRL2_T_ACQ1(x)		((GENMASK(15, 0) & (x)) << 16)
 53#define SUN8I_THS_DATA_IRQ_STS(x)		BIT(x + 8)
 54
 55#define SUN50I_THS_CTRL0_T_ACQ(x)		(GENMASK(15, 0) & ((x) - 1))
 56#define SUN50I_THS_CTRL0_T_SAMPLE_PER(x)	((GENMASK(15, 0) & ((x) - 1)) << 16)
 57#define SUN50I_THS_FILTER_EN			BIT(2)
 58#define SUN50I_THS_FILTER_TYPE(x)		(GENMASK(1, 0) & (x))
 59#define SUN50I_H6_THS_PC_TEMP_PERIOD(x)		((GENMASK(19, 0) & (x)) << 12)
 60#define SUN50I_H6_THS_DATA_IRQ_STS(x)		BIT(x)
 61
 62struct tsensor {
 63	struct ths_device		*tmdev;
 64	struct thermal_zone_device	*tzd;
 65	int				id;
 66};
 67
 68struct ths_thermal_chip {
 69	bool            has_mod_clk;
 70	bool            has_bus_clk_reset;
 71	bool		needs_sram;
 72	int		sensor_num;
 73	int		offset;
 74	int		scale;
 75	int		ft_deviation;
 76	int		temp_data_base;
 77	int		(*calibrate)(struct ths_device *tmdev,
 78				     u16 *caldata, int callen);
 79	int		(*init)(struct ths_device *tmdev);
 80	unsigned long	(*irq_ack)(struct ths_device *tmdev);
 81	int		(*calc_temp)(struct ths_device *tmdev,
 82				     int id, int reg);
 83};
 84
 85struct ths_device {
 86	const struct ths_thermal_chip		*chip;
 87	struct device				*dev;
 88	struct regmap				*regmap;
 89	struct regmap_field			*sram_regmap_field;
 90	struct reset_control			*reset;
 91	struct clk				*bus_clk;
 92	struct clk                              *mod_clk;
 93	struct tsensor				sensor[MAX_SENSOR_NUM];
 94};
 95
 96/* The H616 needs to have a bit 16 in the SRAM control register cleared. */
 97static const struct reg_field sun8i_ths_sram_reg_field = REG_FIELD(0x0, 16, 16);
 98
 99/* Temp Unit: millidegree Celsius */
100static int sun8i_ths_calc_temp(struct ths_device *tmdev,
101			       int id, int reg)
102{
103	return tmdev->chip->offset - (reg * tmdev->chip->scale / 10);
104}
105
106static int sun50i_h5_calc_temp(struct ths_device *tmdev,
107			       int id, int reg)
108{
109	if (reg >= 0x500)
110		return -1191 * reg / 10 + 223000;
111	else if (!id)
112		return -1452 * reg / 10 + 259000;
113	else
114		return -1590 * reg / 10 + 276000;
115}
116
117static int sun8i_ths_get_temp(struct thermal_zone_device *tz, int *temp)
118{
119	struct tsensor *s = thermal_zone_device_priv(tz);
120	struct ths_device *tmdev = s->tmdev;
121	int val = 0;
122
123	regmap_read(tmdev->regmap, tmdev->chip->temp_data_base +
124		    0x4 * s->id, &val);
125
126	/* ths have no data yet */
127	if (!val)
128		return -EAGAIN;
129
130	*temp = tmdev->chip->calc_temp(tmdev, s->id, val);
131	/*
132	 * According to the original sdk, there are some platforms(rarely)
133	 * that add a fixed offset value after calculating the temperature
134	 * value. We can't simply put it on the formula for calculating the
135	 * temperature above, because the formula for calculating the
136	 * temperature above is also used when the sensor is calibrated. If
137	 * do this, the correct calibration formula is hard to know.
138	 */
139	*temp += tmdev->chip->ft_deviation;
140
141	return 0;
142}
143
144static const struct thermal_zone_device_ops ths_ops = {
145	.get_temp = sun8i_ths_get_temp,
146};
147
148static const struct regmap_config config = {
149	.reg_bits = 32,
150	.val_bits = 32,
151	.reg_stride = 4,
152	.fast_io = true,
153	.max_register = 0xfc,
154};
155
156static unsigned long sun8i_h3_irq_ack(struct ths_device *tmdev)
157{
158	unsigned long irq_bitmap = 0;
159	int i, state;
160
161	regmap_read(tmdev->regmap, SUN8I_THS_IS, &state);
162
163	for (i = 0; i < tmdev->chip->sensor_num; i++) {
164		if (state & SUN8I_THS_DATA_IRQ_STS(i)) {
165			regmap_write(tmdev->regmap, SUN8I_THS_IS,
166				     SUN8I_THS_DATA_IRQ_STS(i));
167			bitmap_set(&irq_bitmap, i, 1);
168		}
169	}
170
171	return irq_bitmap;
172}
173
174static unsigned long sun50i_h6_irq_ack(struct ths_device *tmdev)
175{
176	unsigned long irq_bitmap = 0;
177	int i, state;
178
179	regmap_read(tmdev->regmap, SUN50I_H6_THS_DIS, &state);
180
181	for (i = 0; i < tmdev->chip->sensor_num; i++) {
182		if (state & SUN50I_H6_THS_DATA_IRQ_STS(i)) {
183			regmap_write(tmdev->regmap, SUN50I_H6_THS_DIS,
184				     SUN50I_H6_THS_DATA_IRQ_STS(i));
185			bitmap_set(&irq_bitmap, i, 1);
186		}
187	}
188
189	return irq_bitmap;
190}
191
192static irqreturn_t sun8i_irq_thread(int irq, void *data)
193{
194	struct ths_device *tmdev = data;
195	unsigned long irq_bitmap = tmdev->chip->irq_ack(tmdev);
196	int i;
197
198	for_each_set_bit(i, &irq_bitmap, tmdev->chip->sensor_num) {
199		/* We allow some zones to not register. */
200		if (IS_ERR(tmdev->sensor[i].tzd))
201			continue;
202		thermal_zone_device_update(tmdev->sensor[i].tzd,
203					   THERMAL_EVENT_UNSPECIFIED);
204	}
205
206	return IRQ_HANDLED;
207}
208
209static int sun8i_h3_ths_calibrate(struct ths_device *tmdev,
210				  u16 *caldata, int callen)
211{
212	int i;
213
214	if (!caldata[0] || callen < 2 * tmdev->chip->sensor_num)
215		return -EINVAL;
216
217	for (i = 0; i < tmdev->chip->sensor_num; i++) {
218		int offset = (i % 2) << 4;
219
220		regmap_update_bits(tmdev->regmap,
221				   SUN8I_THS_TEMP_CALIB + (4 * (i >> 1)),
222				   TEMP_CALIB_MASK << offset,
223				   caldata[i] << offset);
224	}
225
226	return 0;
227}
228
229static int sun50i_h6_ths_calibrate(struct ths_device *tmdev,
230				   u16 *caldata, int callen)
231{
232	struct device *dev = tmdev->dev;
233	int i, ft_temp;
234
235	if (!caldata[0])
236		return -EINVAL;
237
238	/*
239	 * efuse layout:
240	 *
241	 * 0      11  16     27   32     43   48    57
242	 * +----------+-----------+-----------+-----------+
243	 * |  temp |  |sensor0|   |sensor1|   |sensor2|   |
244	 * +----------+-----------+-----------+-----------+
245	 *                      ^           ^           ^
246	 *                      |           |           |
247	 *                      |           |           sensor3[11:8]
248	 *                      |           sensor3[7:4]
249	 *                      sensor3[3:0]
250	 *
251	 * The calibration data on the H6 is the ambient temperature and
252	 * sensor values that are filled during the factory test stage.
253	 *
254	 * The unit of stored FT temperature is 0.1 degree celsius.
255	 *
256	 * We need to calculate a delta between measured and caluclated
257	 * register values and this will become a calibration offset.
258	 */
259	ft_temp = (caldata[0] & FT_TEMP_MASK) * 100;
260
261	for (i = 0; i < tmdev->chip->sensor_num; i++) {
262		int sensor_reg, sensor_temp, cdata, offset;
263
264		if (i == 3)
265			sensor_reg = (caldata[1] >> 12)
266				     | ((caldata[2] >> 12) << 4)
267				     | ((caldata[3] >> 12) << 8);
268		else
269			sensor_reg = caldata[i + 1] & TEMP_CALIB_MASK;
270
271		sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg);
272
273		/*
274		 * Calibration data is CALIBRATE_DEFAULT - (calculated
275		 * temperature from sensor reading at factory temperature
276		 * minus actual factory temperature) * 14.88 (scale from
277		 * temperature to register values)
278		 */
279		cdata = CALIBRATE_DEFAULT -
280			((sensor_temp - ft_temp) * 10 / tmdev->chip->scale);
281		if (cdata & ~TEMP_CALIB_MASK) {
282			/*
283			 * Calibration value more than 12-bit, but calibration
284			 * register is 12-bit. In this case, ths hardware can
285			 * still work without calibration, although the data
286			 * won't be so accurate.
287			 */
288			dev_warn(dev, "sensor%d is not calibrated.\n", i);
289			continue;
290		}
291
292		offset = (i % 2) * 16;
293		regmap_update_bits(tmdev->regmap,
294				   SUN50I_H6_THS_TEMP_CALIB + (i / 2 * 4),
295				   TEMP_CALIB_MASK << offset,
296				   cdata << offset);
297	}
298
299	return 0;
300}
301
302static int sun8i_ths_calibrate(struct ths_device *tmdev)
303{
304	struct nvmem_cell *calcell;
305	struct device *dev = tmdev->dev;
306	u16 *caldata;
307	size_t callen;
308	int ret = 0;
309
310	calcell = nvmem_cell_get(dev, "calibration");
311	if (IS_ERR(calcell)) {
312		if (PTR_ERR(calcell) == -EPROBE_DEFER)
313			return -EPROBE_DEFER;
314		/*
315		 * Even if the external calibration data stored in sid is
316		 * not accessible, the THS hardware can still work, although
317		 * the data won't be so accurate.
318		 *
319		 * The default value of calibration register is 0x800 for
320		 * every sensor, and the calibration value is usually 0x7xx
321		 * or 0x8xx, so they won't be away from the default value
322		 * for a lot.
323		 *
324		 * So here we do not return error if the calibration data is
325		 * not available, except the probe needs deferring.
326		 */
327		goto out;
328	}
329
330	caldata = nvmem_cell_read(calcell, &callen);
331	if (IS_ERR(caldata)) {
332		ret = PTR_ERR(caldata);
333		goto out;
334	}
335
336	tmdev->chip->calibrate(tmdev, caldata, callen);
337
338	kfree(caldata);
339out:
340	if (!IS_ERR(calcell))
341		nvmem_cell_put(calcell);
342	return ret;
343}
344
345static void sun8i_ths_reset_control_assert(void *data)
346{
347	reset_control_assert(data);
348}
349
350static struct regmap *sun8i_ths_get_sram_regmap(struct device_node *node)
351{
352	struct platform_device *sram_pdev;
353	struct regmap *regmap = NULL;
354
355	struct device_node *sram_node __free(device_node) =
356		of_parse_phandle(node, "allwinner,sram", 0);
357	if (!sram_node)
358		return ERR_PTR(-ENODEV);
359
360	sram_pdev = of_find_device_by_node(sram_node);
361	if (!sram_pdev) {
362		/* platform device might not be probed yet */
363		return ERR_PTR(-EPROBE_DEFER);
364	}
365
366	/* If no regmap is found then the other device driver is at fault */
367	regmap = dev_get_regmap(&sram_pdev->dev, NULL);
368	if (!regmap)
369		regmap = ERR_PTR(-EINVAL);
370
371	platform_device_put(sram_pdev);
372
373	return regmap;
374}
375
376static int sun8i_ths_resource_init(struct ths_device *tmdev)
377{
378	struct device *dev = tmdev->dev;
379	struct platform_device *pdev = to_platform_device(dev);
380	void __iomem *base;
381	int ret;
382
383	base = devm_platform_ioremap_resource(pdev, 0);
384	if (IS_ERR(base))
385		return PTR_ERR(base);
386
387	tmdev->regmap = devm_regmap_init_mmio(dev, base, &config);
388	if (IS_ERR(tmdev->regmap))
389		return PTR_ERR(tmdev->regmap);
390
391	if (tmdev->chip->has_bus_clk_reset) {
392		tmdev->reset = devm_reset_control_get(dev, NULL);
393		if (IS_ERR(tmdev->reset))
394			return PTR_ERR(tmdev->reset);
395
396		ret = reset_control_deassert(tmdev->reset);
397		if (ret)
398			return ret;
399
400		ret = devm_add_action_or_reset(dev, sun8i_ths_reset_control_assert,
401					       tmdev->reset);
402		if (ret)
403			return ret;
404
405		tmdev->bus_clk = devm_clk_get_enabled(&pdev->dev, "bus");
406		if (IS_ERR(tmdev->bus_clk))
407			return PTR_ERR(tmdev->bus_clk);
408	}
409
410	if (tmdev->chip->has_mod_clk) {
411		tmdev->mod_clk = devm_clk_get_enabled(&pdev->dev, "mod");
412		if (IS_ERR(tmdev->mod_clk))
413			return PTR_ERR(tmdev->mod_clk);
414	}
415
416	ret = clk_set_rate(tmdev->mod_clk, 24000000);
417	if (ret)
418		return ret;
419
420	if (tmdev->chip->needs_sram) {
421		struct regmap *regmap;
422
423		regmap = sun8i_ths_get_sram_regmap(dev->of_node);
424		if (IS_ERR(regmap))
425			return PTR_ERR(regmap);
426		tmdev->sram_regmap_field = devm_regmap_field_alloc(dev,
427						      regmap,
428						      sun8i_ths_sram_reg_field);
429		if (IS_ERR(tmdev->sram_regmap_field))
430			return PTR_ERR(tmdev->sram_regmap_field);
431	}
432
433	ret = sun8i_ths_calibrate(tmdev);
434	if (ret)
435		return ret;
436
437	return 0;
438}
439
440static int sun8i_h3_thermal_init(struct ths_device *tmdev)
441{
442	int val;
443
444	/* average over 4 samples */
445	regmap_write(tmdev->regmap, SUN8I_THS_MFC,
446		     SUN50I_THS_FILTER_EN |
447		     SUN50I_THS_FILTER_TYPE(1));
448	/*
449	 * clkin = 24MHz
450	 * filter_samples = 4
451	 * period = 0.25s
452	 *
453	 * x = period * clkin / 4096 / filter_samples - 1
454	 *   = 365
455	 */
456	val = GENMASK(7 + tmdev->chip->sensor_num, 8);
457	regmap_write(tmdev->regmap, SUN8I_THS_IC,
458		     SUN50I_H6_THS_PC_TEMP_PERIOD(365) | val);
459	/*
460	 * T_acq = 20us
461	 * clkin = 24MHz
462	 *
463	 * x = T_acq * clkin - 1
464	 *   = 479
465	 */
466	regmap_write(tmdev->regmap, SUN8I_THS_CTRL0,
467		     SUN8I_THS_CTRL0_T_ACQ0(479));
468	val = GENMASK(tmdev->chip->sensor_num - 1, 0);
469	regmap_write(tmdev->regmap, SUN8I_THS_CTRL2,
470		     SUN8I_THS_CTRL2_T_ACQ1(479) | val);
471
472	return 0;
473}
474
475static int sun50i_h6_thermal_init(struct ths_device *tmdev)
476{
477	int val;
478
479	/* The H616 needs to have a bit in the SRAM control register cleared. */
480	if (tmdev->sram_regmap_field)
481		regmap_field_write(tmdev->sram_regmap_field, 0);
482
483	/*
484	 * The manual recommends an overall sample frequency of 50 KHz (20us,
485	 * 480 cycles at 24 MHz), which provides plenty of time for both the
486	 * acquisition time (>24 cycles) and the actual conversion time
487	 * (>14 cycles).
488	 * The lower half of the CTRL register holds the "acquire time", in
489	 * clock cycles, which the manual recommends to be 2us:
490	 * 24MHz * 2us = 48 cycles.
491	 * The high half of THS_CTRL encodes the sample frequency, in clock
492	 * cycles: 24MHz * 20us = 480 cycles.
493	 * This is explained in the H616 manual, but apparently wrongly
494	 * described in the H6 manual, although the BSP code does the same
495	 * for both SoCs.
496	 */
497	regmap_write(tmdev->regmap, SUN50I_THS_CTRL0,
498		     SUN50I_THS_CTRL0_T_ACQ(48) |
499		     SUN50I_THS_CTRL0_T_SAMPLE_PER(480));
500	/* average over 4 samples */
501	regmap_write(tmdev->regmap, SUN50I_H6_THS_MFC,
502		     SUN50I_THS_FILTER_EN |
503		     SUN50I_THS_FILTER_TYPE(1));
504	/*
505	 * clkin = 24MHz
506	 * filter_samples = 4
507	 * period = 0.25s
508	 *
509	 * x = period * clkin / 4096 / filter_samples - 1
510	 *   = 365
511	 */
512	regmap_write(tmdev->regmap, SUN50I_H6_THS_PC,
513		     SUN50I_H6_THS_PC_TEMP_PERIOD(365));
514	/* enable sensor */
515	val = GENMASK(tmdev->chip->sensor_num - 1, 0);
516	regmap_write(tmdev->regmap, SUN50I_H6_THS_ENABLE, val);
517	/* thermal data interrupt enable */
518	val = GENMASK(tmdev->chip->sensor_num - 1, 0);
519	regmap_write(tmdev->regmap, SUN50I_H6_THS_DIC, val);
520
521	return 0;
522}
523
524static int sun8i_ths_register(struct ths_device *tmdev)
525{
526	int i;
527
528	for (i = 0; i < tmdev->chip->sensor_num; i++) {
529		tmdev->sensor[i].tmdev = tmdev;
530		tmdev->sensor[i].id = i;
531		tmdev->sensor[i].tzd =
532			devm_thermal_of_zone_register(tmdev->dev,
533						      i,
534						      &tmdev->sensor[i],
535						      &ths_ops);
536
537		/*
538		 * If an individual zone fails to register for reasons
539		 * other than probe deferral (eg, a bad DT) then carry
540		 * on, other zones might register successfully.
541		 */
542		if (IS_ERR(tmdev->sensor[i].tzd)) {
543			if (PTR_ERR(tmdev->sensor[i].tzd) == -EPROBE_DEFER)
544				return PTR_ERR(tmdev->sensor[i].tzd);
545			continue;
546		}
547
548		devm_thermal_add_hwmon_sysfs(tmdev->dev, tmdev->sensor[i].tzd);
549	}
550
551	return 0;
552}
553
554static int sun8i_ths_probe(struct platform_device *pdev)
555{
556	struct ths_device *tmdev;
557	struct device *dev = &pdev->dev;
558	int ret, irq;
559
560	tmdev = devm_kzalloc(dev, sizeof(*tmdev), GFP_KERNEL);
561	if (!tmdev)
562		return -ENOMEM;
563
564	tmdev->dev = dev;
565	tmdev->chip = of_device_get_match_data(&pdev->dev);
566	if (!tmdev->chip)
567		return -EINVAL;
568
569	ret = sun8i_ths_resource_init(tmdev);
570	if (ret)
571		return ret;
572
573	irq = platform_get_irq(pdev, 0);
574	if (irq < 0)
575		return irq;
576
577	ret = tmdev->chip->init(tmdev);
578	if (ret)
579		return ret;
580
581	ret = sun8i_ths_register(tmdev);
582	if (ret)
583		return ret;
584
585	/*
586	 * Avoid entering the interrupt handler, the thermal device is not
587	 * registered yet, we deffer the registration of the interrupt to
588	 * the end.
589	 */
590	ret = devm_request_threaded_irq(dev, irq, NULL,
591					sun8i_irq_thread,
592					IRQF_ONESHOT, "ths", tmdev);
593	if (ret)
594		return ret;
595
596	return 0;
597}
598
599static const struct ths_thermal_chip sun8i_a83t_ths = {
600	.sensor_num = 3,
601	.scale = 705,
602	.offset = 191668,
603	.temp_data_base = SUN8I_THS_TEMP_DATA,
604	.calibrate = sun8i_h3_ths_calibrate,
605	.init = sun8i_h3_thermal_init,
606	.irq_ack = sun8i_h3_irq_ack,
607	.calc_temp = sun8i_ths_calc_temp,
608};
609
610static const struct ths_thermal_chip sun8i_h3_ths = {
611	.sensor_num = 1,
612	.scale = 1211,
613	.offset = 217000,
614	.has_mod_clk = true,
615	.has_bus_clk_reset = true,
616	.temp_data_base = SUN8I_THS_TEMP_DATA,
617	.calibrate = sun8i_h3_ths_calibrate,
618	.init = sun8i_h3_thermal_init,
619	.irq_ack = sun8i_h3_irq_ack,
620	.calc_temp = sun8i_ths_calc_temp,
621};
622
623static const struct ths_thermal_chip sun8i_r40_ths = {
624	.sensor_num = 2,
625	.offset = 251086,
626	.scale = 1130,
627	.has_mod_clk = true,
628	.has_bus_clk_reset = true,
629	.temp_data_base = SUN8I_THS_TEMP_DATA,
630	.calibrate = sun8i_h3_ths_calibrate,
631	.init = sun8i_h3_thermal_init,
632	.irq_ack = sun8i_h3_irq_ack,
633	.calc_temp = sun8i_ths_calc_temp,
634};
635
636static const struct ths_thermal_chip sun50i_a64_ths = {
637	.sensor_num = 3,
638	.offset = 260890,
639	.scale = 1170,
640	.has_mod_clk = true,
641	.has_bus_clk_reset = true,
642	.temp_data_base = SUN8I_THS_TEMP_DATA,
643	.calibrate = sun8i_h3_ths_calibrate,
644	.init = sun8i_h3_thermal_init,
645	.irq_ack = sun8i_h3_irq_ack,
646	.calc_temp = sun8i_ths_calc_temp,
647};
648
649static const struct ths_thermal_chip sun50i_a100_ths = {
650	.sensor_num = 3,
651	.has_bus_clk_reset = true,
652	.ft_deviation = 8000,
653	.offset = 187744,
654	.scale = 672,
655	.temp_data_base = SUN50I_H6_THS_TEMP_DATA,
656	.calibrate = sun50i_h6_ths_calibrate,
657	.init = sun50i_h6_thermal_init,
658	.irq_ack = sun50i_h6_irq_ack,
659	.calc_temp = sun8i_ths_calc_temp,
660};
661
662static const struct ths_thermal_chip sun50i_h5_ths = {
663	.sensor_num = 2,
664	.has_mod_clk = true,
665	.has_bus_clk_reset = true,
666	.temp_data_base = SUN8I_THS_TEMP_DATA,
667	.calibrate = sun8i_h3_ths_calibrate,
668	.init = sun8i_h3_thermal_init,
669	.irq_ack = sun8i_h3_irq_ack,
670	.calc_temp = sun50i_h5_calc_temp,
671};
672
673static const struct ths_thermal_chip sun50i_h6_ths = {
674	.sensor_num = 2,
675	.has_bus_clk_reset = true,
676	.ft_deviation = 7000,
677	.offset = 187744,
678	.scale = 672,
679	.temp_data_base = SUN50I_H6_THS_TEMP_DATA,
680	.calibrate = sun50i_h6_ths_calibrate,
681	.init = sun50i_h6_thermal_init,
682	.irq_ack = sun50i_h6_irq_ack,
683	.calc_temp = sun8i_ths_calc_temp,
684};
685
686static const struct ths_thermal_chip sun20i_d1_ths = {
687	.sensor_num = 1,
688	.has_bus_clk_reset = true,
689	.offset = 188552,
690	.scale = 673,
691	.temp_data_base = SUN50I_H6_THS_TEMP_DATA,
692	.calibrate = sun50i_h6_ths_calibrate,
693	.init = sun50i_h6_thermal_init,
694	.irq_ack = sun50i_h6_irq_ack,
695	.calc_temp = sun8i_ths_calc_temp,
696};
697
698static const struct ths_thermal_chip sun50i_h616_ths = {
699	.sensor_num = 4,
700	.has_bus_clk_reset = true,
701	.needs_sram = true,
702	.ft_deviation = 8000,
703	.offset = 263655,
704	.scale = 810,
705	.temp_data_base = SUN50I_H6_THS_TEMP_DATA,
706	.calibrate = sun50i_h6_ths_calibrate,
707	.init = sun50i_h6_thermal_init,
708	.irq_ack = sun50i_h6_irq_ack,
709	.calc_temp = sun8i_ths_calc_temp,
710};
711
712static const struct of_device_id of_ths_match[] = {
713	{ .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths },
714	{ .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths },
715	{ .compatible = "allwinner,sun8i-r40-ths", .data = &sun8i_r40_ths },
716	{ .compatible = "allwinner,sun50i-a64-ths", .data = &sun50i_a64_ths },
717	{ .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths },
718	{ .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths },
719	{ .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths },
720	{ .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths },
721	{ .compatible = "allwinner,sun50i-h616-ths", .data = &sun50i_h616_ths },
722	{ /* sentinel */ },
723};
724MODULE_DEVICE_TABLE(of, of_ths_match);
725
726static struct platform_driver ths_driver = {
727	.probe = sun8i_ths_probe,
728	.driver = {
729		.name = "sun8i-thermal",
730		.of_match_table = of_ths_match,
731	},
732};
733module_platform_driver(ths_driver);
734
735MODULE_DESCRIPTION("Thermal sensor driver for Allwinner SOC");
736MODULE_LICENSE("GPL v2");