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hal_com_phycfg.h

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linux-6.19.14/drivers/staging/rtl8723bs/include/hal_com_phycfg.h C
  1/* SPDX-License-Identifier: GPL-2.0 */
  2/******************************************************************************
  3 *
  4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
  5 *
  6 ******************************************************************************/
  7#ifndef __HAL_COM_PHYCFG_H__
  8#define __HAL_COM_PHYCFG_H__
  9
 10#define		PathA		0x0	/*  Useless */
 11#define		PathB		0x1
 12#define		PathC		0x2
 13#define		PathD		0x3
 14
 15enum rate_section {
 16	CCK = 0,
 17	OFDM,
 18	HT_MCS0_MCS7,
 19};
 20
 21#define MAX_POWER_INDEX			0x3F
 22
 23enum {
 24	TXPWR_LMT_FCC = 0,
 25	TXPWR_LMT_MKK,
 26	TXPWR_LMT_ETSI,
 27	TXPWR_LMT_WW,
 28	TXPWR_LMT_MAX_REGULATION_NUM,
 29};
 30
 31/*------------------------------Define structure----------------------------*/
 32struct bb_register_def {
 33	u32 rfintfs;			/*  set software control: */
 34					/* 	0x870~0x877[8 bytes] */
 35
 36	u32 rfintfo;			/*  output data: */
 37					/* 	0x860~0x86f [16 bytes] */
 38
 39	u32 rfintfe;			/*  output enable: */
 40					/* 	0x860~0x86f [16 bytes] */
 41
 42	u32 rf3wireOffset;		/*  LSSI data: */
 43					/* 	0x840~0x84f [16 bytes] */
 44
 45	u32 rfHSSIPara2;		/*  wire parameter control2 : */
 46					/* 	0x824~0x827, 0x82c~0x82f,
 47					 *	0x834~0x837, 0x83c~0x83f
 48					 */
 49	u32 rfLSSIReadBack;		/* LSSI RF readback data SI mode */
 50					/* 	0x8a0~0x8af [16 bytes] */
 51
 52	u32 rfLSSIReadBackPi;		/* LSSI RF readback data PI mode
 53					 *	0x8b8-8bc for Path A and B */
 54
 55};
 56
 57u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath,
 58			    enum rate_section RateSection);
 59
 60u8 PHY_GetRateSectionIndexOfTxPowerByRate(struct adapter *padapter, u32	RegAddr,
 61					  u32 BitMask);
 62
 63void PHY_GetRateValuesOfTxPowerByRate(struct adapter *padapter, u32 RegAddr,
 64				      u32 BitMask, u32 Value, u8 *RateIndex,
 65				      s8 *PwrByRateVal, u8 *RateNum);
 66
 67u8 PHY_GetRateIndexOfTxPowerByRate(u8 Rate);
 68
 69void PHY_SetTxPowerIndexByRateSection(struct adapter *padapter, u8 RFPath, u8 Channel,
 70				      u8 RateSection);
 71
 72s8 PHY_GetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 RateIndex);
 73
 74void PHY_SetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 Rate,
 75			  s8 Value);
 76
 77void PHY_SetTxPowerLevelByPath(struct adapter *Adapter, u8 channel, u8 path);
 78
 79void PHY_SetTxPowerIndexByRateArray(struct adapter *padapter, u8 RFPath,
 80				    enum channel_width BandWidth, u8 Channel,
 81				    u8 *Rates, u8 RateArraySize);
 82
 83void PHY_InitTxPowerByRate(struct adapter *padapter);
 84
 85void PHY_StoreTxPowerByRate(struct adapter *padapter, u32 RfPath,
 86			    u32	RegAddr, u32 BitMask, u32 Data);
 87
 88void PHY_TxPowerByRateConfiguration(struct adapter *padapter);
 89
 90u8 PHY_GetTxPowerIndexBase(struct adapter *padapter, u8 RFPath, u8 Rate,
 91			   enum channel_width BandWidth, u8 Channel);
 92
 93s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 RegPwrTblSel,
 94		      enum channel_width Bandwidth, u8 RfPath, u8 DataRate,
 95		      u8 Channel);
 96
 97void PHY_SetTxPowerLimit(struct adapter *Adapter, u8 *Regulation, u8 *Bandwidth,
 98			 u8 *RateSection, u8 *RfPath, u8 *Channel, u8 *PowerLimit);
 99
100void PHY_ConvertTxPowerLimitToPowerIndex(struct adapter *Adapter);
101
102void PHY_InitTxPowerLimit(struct adapter *Adapter);
103
104s8 PHY_GetTxPowerTrackingOffset(struct adapter *padapter, u8 Rate, u8 RFPath);
105
106void Hal_ChannelPlanToRegulation(struct adapter *Adapter, u16 ChannelPlan);
107
108#endif /* __HAL_COMMON_H__ */
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